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michel.daenzer (Michel Dänzer)
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User Since
Jul 30 2015, 12:45 AM (291 w, 3 d)

Recent Activity

Oct 20 2020

michel.daenzer added a comment to D89397: [AMDGPU] SILowerControlFlow::removeMBBifRedundant should not try to change MBB layout if it can fallthrough.

This broke 14 GL_NV_shader_atomic_int64 piglit tests (on Navi 14), e.g. tests/spec/nv_shader_atomic_int64/execution/ssbo-atomicAdd-int.shader_test:

Oct 20 2020, 9:59 AM · Restricted Project

Sep 24 2020

michel.daenzer added a comment to D87674: [AMDGPU] Insert waitcnt after returning from call.

The revert also highlights the problem that we don't have representative test in llvm/test :(

Sep 24 2020, 1:20 AM · Restricted Project

Sep 23 2020

michel.daenzer added a comment to D87674: [AMDGPU] Insert waitcnt after returning from call.

This completely broke the Mesa radeonsi driver on Navi 14. Xorg + xterm come up with major corruption & psychedelic colours.

Sep 23 2020, 7:54 AM · Restricted Project

Jun 26 2020

michel.daenzer added a comment to D82194: [AMDGPU] Enable compare operations to be selected by divergence.

Could you please advice on how to reproduce the failure and how to collect the failed shaders assembly?
Is MESA_DEBUG set is enough?

Jun 26 2020, 9:50 AM · Restricted Project

Jun 24 2020

michel.daenzer added a comment to D82194: [AMDGPU] Enable compare operations to be selected by divergence.

This change broke thousands of piglit gpu profile tests with Mesa radeonsi on Navi 14.

Jun 24 2020, 7:31 AM · Restricted Project

May 15 2020

michel.daenzer added a comment to D80007: [AMDGPU] Fix assertion failure in SIInsertHardClauses.

This fixes radeonsi on Navi 14, thanks.

May 15 2020, 7:34 AM · Restricted Project
michel.daenzer added a comment to D79792: [AMDGPU] New SIInsertHardClauses pass.

This pretty much broke the world with radeonsi on Navi 14:

May 15 2020, 6:27 AM · Restricted Project

May 13 2019

michel.daenzer added a comment to D61812: [AMDGPU] Fixed handling of imemdiate i1 literals.

FWIW, this fixes the regression I reported, without regressing any other tests I run.

May 13 2019, 7:47 AM · Restricted Project

Sep 21 2018

michel.daenzer added a comment to D52221: [AMDGPU] lower-switch in preISel as a workaround for legacy DA.

This broke glamor with the radeonsi driver, hits unreachable():

Sep 21 2018, 8:50 AM

Jul 16 2018

michel.daenzer added a comment to D49065: AMDGPU: Stop wasting argument registers with v3i32/v3f32.

I can confirm Mesa now works with this patch, however, it still breaks 9 lit tests for me:

Jul 16 2018, 7:48 AM

Jul 13 2018

michel.daenzer added a comment to D49065: AMDGPU: Stop wasting argument registers with v3i32/v3f32.

This patch along with the prerequisite patch doesn't break Mesa.

Jul 13 2018, 1:06 AM

Aug 17 2017

michel.daenzer added a comment to D36305: AMDGPU: exp should not be in WQM mode.

Never mind, I think I confused WQM and WWM.

Aug 17 2017, 7:23 PM

Jun 29 2017

michel.daenzer added a comment to D34847: [AMDGPU] Mark all export instructions as DisableWQM.

This isn't necessary. Exports can't enable pixels that weren't enabled in the first place.

Jun 29 2017, 7:34 PM

May 12 2017

michel.daenzer added a comment to D33114: [AMDGPU] Fixes for the new waitcnt insertion pass. Add test..

No regressions in piglit gpu.py on Kaveri.

May 12 2017, 2:59 AM

Jan 9 2017

michel.daenzer added a comment to D23131: AMDGPU: Fix an interaction between WQM and polygon stippling.

this commit breaks color rendering for amdgpu/radeon users and causes icons/etc to appear oversaturated red.

https://u.teknik.io/lqpTR.png

please revert or revise this

Jan 9 2017, 7:06 PM

Aug 8 2016

michel.daenzer added inline comments to D22195: AMDGPU: Move SIWholeQuadMode pass to after machine scheduling.
Aug 8 2016, 2:59 AM

Jul 11 2016

michel.daenzer added a comment to D22217: AMDGPU: Unify MOVRELSOffset and MOVRELDOffset.

This breaks test/CodeGen/AMDGPU/llvm.SI.gather4.ll for me:

Jul 11 2016, 11:17 PM

Jan 25 2016

michel.daenzer added a comment to D16556: AMDGPU: Restore AMDGPU prefixed rsq intrinsic for now.

Thanks Matt, but it occurred to me in the meantime that we could just update Mesa master for the new intrinsic name instead. Any takers?

Jan 25 2016, 9:58 PM

Jan 21 2016

michel.daenzer added a comment to D16328: AMDGPU: Remove AMDIL.round.nearest intrinsic.

(And as an aside, I feel we should absolutely avoid changes to LLVM that break Mesa silently.

Jan 21 2016, 6:27 PM

Jan 20 2016

michel.daenzer added a comment to D16328: AMDGPU: Remove AMDIL.round.nearest intrinsic.

Is it expected that released versions of mesa will work with future llvm releases?

Jan 20 2016, 11:22 PM

Jul 30 2015

michel.daenzer added a comment to D11621: AMDGPU/SI: Mark SMRD instructions as rematerializable.

Also, is rematerializing SMRD instructions to save SGPR spills really a win? 64 SGPRs can be spilled to a single VGPR, but the rematerialized SMRD instruction is only cheap if the loaded value is still in cache, right?

Jul 30 2015, 12:47 AM