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hsmhsm (Mahesha S)
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User Since
Jan 14 2020, 12:20 AM (46 w, 7 h)

Recent Activity

Wed, Nov 18

hsmhsm updated the diff for D91516: [AMDGPU] Support for device scope shared variables.

Updated lit tests based on latest source changes.

Wed, Nov 18, 3:12 AM · Restricted Project

Tue, Nov 17

hsmhsm updated the summary of D91516: [AMDGPU] Support for device scope shared variables.
Tue, Nov 17, 11:23 PM · Restricted Project
hsmhsm added a comment to D91516: [AMDGPU] Support for device scope shared variables.

This is a bit different than the most recent proposal which I thought avoided the need to pass multiple arguments per kernel and allowed supporting indirect calls. I thought this was going to produce a table in constant memory containing the offsets which would be indexed instead.

We had not arrived at any general consensus on which approach to stick to. Following were the sugguested proposals:

(1) Function argument driven approach:
(2) Table driven approach:

(2.1)  Table within global memory
(2.2)  Table within shared memory
(2.2.)  Table within constant memory

Being a less used feature, and also as suggested by Sam in his one of the early emails (while disussing it), I have choosen approach (1) since I felt that it is comparitavely simpler approach, and try others only when this approach does not practically work either due to performance issues or any other valid reasons.

Tue, Nov 17, 11:20 PM · Restricted Project
hsmhsm updated the summary of D91516: [AMDGPU] Support for device scope shared variables.
Tue, Nov 17, 11:06 PM · Restricted Project
hsmhsm updated the diff for D91516: [AMDGPU] Support for device scope shared variables.

Fixed some of the review comments by Matt.

Tue, Nov 17, 11:02 PM · Restricted Project

Mon, Nov 16

hsmhsm added inline comments to D91516: [AMDGPU] Support for device scope shared variables.
Mon, Nov 16, 8:39 PM · Restricted Project
hsmhsm added a comment to D91516: [AMDGPU] Support for device scope shared variables.

This is a bit different than the most recent proposal which I thought avoided the need to pass multiple arguments per kernel and allowed supporting indirect calls. I thought this was going to produce a table in constant memory containing the offsets which would be indexed instead.

We had not arrived at any general consensus on which approach to stick to. Following were the sugguested proposals:

Mon, Nov 16, 8:34 PM · Restricted Project
hsmhsm updated the diff for D91516: [AMDGPU] Support for device scope shared variables.

Fixed warnings by clang-tidy.

Mon, Nov 16, 12:38 AM · Restricted Project

Sun, Nov 15

hsmhsm removed a reviewer for D91516: [AMDGPU] Support for device scope shared variables: jdoerfert.
Sun, Nov 15, 11:18 PM · Restricted Project
hsmhsm abandoned D89905: [AMDGPU] Support for device scope shared variables.

This revision was created just for tracking the progress of the work. Now that the code is ready for actual review, I created a new official revision - https://reviews.llvm.org/D91516, and hence closing this revision.

Sun, Nov 15, 11:18 PM · Restricted Project
hsmhsm requested review of D91516: [AMDGPU] Support for device scope shared variables.
Sun, Nov 15, 11:09 PM · Restricted Project
hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Add lit test-cases.

Sun, Nov 15, 10:32 AM · Restricted Project

Sat, Nov 14

hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Retain original name for new cloned functions.

Sat, Nov 14, 9:49 PM · Restricted Project
hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Make sure to run this pass as first AMDGPU IR pass.

Sat, Nov 14, 9:08 PM · Restricted Project
hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Fixed minor bug in the updated code in the last commit.

Sat, Nov 14, 8:01 AM · Restricted Project
hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Updated introductory comment.

Sat, Nov 14, 7:28 AM · Restricted Project
hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Handle higher dimensional arrays.

Sat, Nov 14, 3:36 AM · Restricted Project

Thu, Nov 12

hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Successfully tested an HIP application which defines different shared
variables of different types within different device functions, and there
exist call graph path from kernel to all these device functions.

Thu, Nov 12, 11:51 PM · Restricted Project
hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Succesfully tested an HIP application which has more than one LDS globals.

Thu, Nov 12, 10:10 AM · Restricted Project

Wed, Nov 11

hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Successfully tested simple sum-reduce HIP application.

Wed, Nov 11, 11:46 AM · Restricted Project

Tue, Nov 10

hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Support for replacing constant expressions [in progress].

Tue, Nov 10, 11:28 AM · Restricted Project

Mon, Nov 9

hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

First cut of clode clean-up

Mon, Nov 9, 9:30 AM · Restricted Project
hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Fixes previous incorrect commit.

Mon, Nov 9, 2:50 AM · Restricted Project
hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

First bug fix.

Mon, Nov 9, 2:33 AM · Restricted Project
hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Support for indirect LDS globals.

Mon, Nov 9, 12:28 AM · Restricted Project

Thu, Nov 5

hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Code refactoring as per the new logic of processing.

Thu, Nov 5, 12:54 PM · Restricted Project

Wed, Nov 4

hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Partial support for indirect LDS globals.

Wed, Nov 4, 3:34 AM · Restricted Project

Oct 30 2020

hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Completed the handling of direct LDS globals within kernel

Oct 30 2020, 3:43 AM · Restricted Project

Oct 27 2020

hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Fix bug and compute offset for each LDS

Oct 27 2020, 11:31 PM · Restricted Project

Oct 23 2020

hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Collect all associated LDS globals associated with a kernel.

Oct 23 2020, 4:50 AM · Restricted Project

Oct 22 2020

hsmhsm updated the diff for D89905: [AMDGPU] Support for device scope shared variables.

Implemented few more necessary data structures

Oct 22 2020, 3:36 AM · Restricted Project

Oct 21 2020

hsmhsm requested review of D89905: [AMDGPU] Support for device scope shared variables.
Oct 21 2020, 12:06 PM · Restricted Project

Aug 18 2020

hsmhsm abandoned D85767: [AMDGPU] Spill register and offset register cannot be same.

The fix is already taken care in the patch https://reviews.llvm.org/D85772, hence, I am closing this patch.

Aug 18 2020, 9:49 PM · Restricted Project

Aug 13 2020

hsmhsm added a comment to D85767: [AMDGPU] Spill register and offset register cannot be same.

Looks like this patch and the patch https://reviews.llvm.org/D85772 fix the same issue. Me and Austin discussed about it, and decided to go ahead with https://reviews.llvm.org/D85772 instead of this patch. So, I will close this patch once https://reviews.llvm.org/D85772 is merged.

Aug 13 2020, 9:47 AM · Restricted Project
hsmhsm updated the diff for D85767: [AMDGPU] Spill register and offset register cannot be same.

Add a comment

Aug 13 2020, 7:46 AM · Restricted Project
hsmhsm updated the diff for D85767: [AMDGPU] Spill register and offset register cannot be same.

Fixed further review comments by Matt

Aug 13 2020, 7:39 AM · Restricted Project
hsmhsm updated the diff for D85767: [AMDGPU] Spill register and offset register cannot be same.

Added LLVM lit test

Aug 13 2020, 3:17 AM · Restricted Project

Aug 11 2020

hsmhsm requested review of D85767: [AMDGPU] Spill register and offset register cannot be same.
Aug 11 2020, 12:01 PM · Restricted Project

Jul 30 2020

hsmhsm committed rG33fd4a18e7d3: [AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic (authored by hsmhsm).
[AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic
Jul 30 2020, 9:11 AM
hsmhsm closed D84354: [AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic.
Jul 30 2020, 9:11 AM · Restricted Project
hsmhsm updated the summary of D84354: [AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic.
Jul 30 2020, 12:32 AM · Restricted Project
hsmhsm updated the summary of D84354: [AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic.
Jul 30 2020, 12:31 AM · Restricted Project
hsmhsm updated the summary of D84354: [AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic.
Jul 30 2020, 12:30 AM · Restricted Project
hsmhsm added a comment to D84354: [AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic.

I tested the SHOC benchmark and rocSPARSE testsuite for this new heuristic as suggested by Stas. The numbers are almost same as in case of previous heuristic (NumBytes <= 32).

Jul 30 2020, 12:24 AM · Restricted Project
hsmhsm updated the diff for D84354: [AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic.

Implemented new heuristic as suggested by Stas.

Jul 30 2020, 12:19 AM · Restricted Project

Jul 29 2020

hsmhsm added a comment to D84354: [AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic.

This is fine in principle, but will create too big clusters for sub-dword loads. In case of byte loads you could cluster 32 instructions and that will for sure stall because you would overflow a 4-bit counter. Moreover, a sub-dword load will likely occupy a whole VGPR anyway, so in that scenario you will even consume 32 registers, while you are looking into consuming not more than 8.

In addition to the byte size you also need to limit a number of loads. Our previous experience showed visible benefits up to 5-6 loads. Also note the case of 16 bit loads. Assume you have limited num-loads to 6. Now you would likely need 12 registers to hold it which is still more than 8 you had in mind. How about this:

LoadSize = NumBytes / NumLoads;
NumDWORDs = (LoadSize + 3) / 4;
return NumDWORDs <= 8;

You would still have the same logic for wide loads but limit it to 8 loads for sub-dword case.

Jul 29 2020, 4:04 AM · Restricted Project

Jul 23 2020

hsmhsm updated the diff for D84354: [AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic.

Fixed second review comment by Matt (though he said it is not mandatory)

Jul 23 2020, 11:52 PM · Restricted Project

Jul 22 2020

hsmhsm updated the diff for D84354: [AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic.

Take care of review comments by Matt.

Jul 22 2020, 9:57 PM · Restricted Project
hsmhsm updated the summary of D84354: [AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic.
Jul 22 2020, 12:45 PM · Restricted Project
Herald added a project to D84354: [AMDGPU/MemOpsCluster] Clean-up fixme's around mem ops clustering logic: Restricted Project.
Jul 22 2020, 12:42 PM · Restricted Project
hsmhsm accepted D84199: GlobalISel: Add utilty for getting function argument live ins.

IMHO, it is a good idea to add a generic utility support to get a virtual live-in register for a given physical register. Otherwise, each target land-up implementing it as I had done it for AMDGPU target sometime back. Thanks for cleaning it up. Except for my above minor comment, it is LGTM from my side unless other reviewers have any additional comments.

Jul 22 2020, 2:07 AM · Restricted Project
hsmhsm added inline comments to D84199: GlobalISel: Add utilty for getting function argument live ins.
Jul 22 2020, 2:03 AM · Restricted Project

Jul 17 2020

hsmhsm abandoned D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag.

This review request is no longer required. I am abandoning it.

Jul 17 2020, 12:11 AM · Restricted Project
hsmhsm added a comment to D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag.

And, I am closing this phabricator review.

Jul 17 2020, 12:08 AM · Restricted Project
hsmhsm added a comment to D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag.

And, further I reverted my original commmit (cc9d69385659be32178506a38b4f2e112ed01ad4) which had introduced faulty heuristic since I am not finding any quick solution here. Now, none of the issues should be blocked because of this faulty patch. I will now start from scratch again to arrive at the heauristic which hopefully purley based on number of custered-bytes without mixing-up with number of clustered instructions.

Jul 17 2020, 12:07 AM · Restricted Project

Jul 16 2020

hsmhsm committed rG4905536086ee: Revert "[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem… (authored by hsmhsm).
Revert "[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem…
Jul 16 2020, 11:55 PM
hsmhsm added a reverting change for rGcc9d69385659: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops…: rG4905536086ee: Revert "[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem….
Jul 16 2020, 11:55 PM
hsmhsm updated subscribers of D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag.

I agree with you on your comments (and also with what @rampitec had made eariler).

Jul 16 2020, 10:07 PM · Restricted Project

Jul 13 2020

hsmhsm added a comment to D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag.

PING to give LGTM if the patch looks fine.

Jul 13 2020, 9:46 PM · Restricted Project
hsmhsm added inline comments to D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag.
Jul 13 2020, 1:01 PM · Restricted Project
hsmhsm added inline comments to D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag.
Jul 13 2020, 12:26 PM · Restricted Project
hsmhsm added inline comments to D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag.
Jul 13 2020, 12:07 PM · Restricted Project
hsmhsm added inline comments to D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag.
Jul 13 2020, 11:55 AM · Restricted Project
hsmhsm updated the summary of D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag.
Jul 13 2020, 2:39 AM · Restricted Project
hsmhsm updated the summary of D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag.
Jul 13 2020, 2:37 AM · Restricted Project
hsmhsm updated the diff for D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag.

Rebased to upstream master.

Jul 13 2020, 2:33 AM · Restricted Project
hsmhsm updated the diff for D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag.

Have taken care of review comment by Jay.

Jul 13 2020, 2:03 AM · Restricted Project

Jul 11 2020

Herald added a project to D83626: [AMDGPU/MemOpsCluster] Guard new mem ops clustering heuristic logic by a flag: Restricted Project.
Jul 11 2020, 11:16 AM · Restricted Project

Jun 23 2020

hsmhsm committed rGcc9d69385659: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops… (authored by hsmhsm).
[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops…
Jun 23 2020, 12:22 PM
hsmhsm closed D82393: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.
Jun 23 2020, 12:21 PM · Restricted Project
hsmhsm added a comment to D82393: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.

This patch was earlier got reviewed, accepted, and committed via https://reviews.llvm.org/D81085. But, I had to revert it because of the reasons updated in https://reviews.llvm.org/D81085. Now, those blocking issues are closed via https://reviews.llvm.org/D81649. But, meanwhile, few testcases which are updated in this patch, got changed, and conflicted. Hence, I again had to fix those test cases, and had to open this new revisoin.

Jun 23 2020, 10:43 AM · Restricted Project
hsmhsm created D82393: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.
Jun 23 2020, 10:10 AM · Restricted Project
hsmhsm committed rG5832950adbfc: [AMDGPU/MemOpsCluster] Compute `width` for `MIMG` instruction class. (authored by hsmhsm).
[AMDGPU/MemOpsCluster] Compute `width` for `MIMG` instruction class.
Jun 23 2020, 5:17 AM
hsmhsm closed D81649: [AMDGPU/MemOpsCluster] Compute `width` for `MIMG` instruction class..
Jun 23 2020, 5:17 AM · Restricted Project
hsmhsm added inline comments to D81649: [AMDGPU/MemOpsCluster] Compute `width` for `MIMG` instruction class..
Jun 23 2020, 3:40 AM · Restricted Project
hsmhsm updated the diff for D81649: [AMDGPU/MemOpsCluster] Compute `width` for `MIMG` instruction class..

Taken care of review comments by Jay.

Jun 23 2020, 3:40 AM · Restricted Project
hsmhsm added inline comments to D81649: [AMDGPU/MemOpsCluster] Compute `width` for `MIMG` instruction class..
Jun 23 2020, 3:08 AM · Restricted Project
hsmhsm added inline comments to D81649: [AMDGPU/MemOpsCluster] Compute `width` for `MIMG` instruction class..
Jun 23 2020, 3:08 AM · Restricted Project
hsmhsm updated the diff for D81649: [AMDGPU/MemOpsCluster] Compute `width` for `MIMG` instruction class..

Added test.

Jun 23 2020, 2:36 AM · Restricted Project

Jun 11 2020

hsmhsm created D81649: [AMDGPU/MemOpsCluster] Compute `width` for `MIMG` instruction class..
Jun 11 2020, 6:01 AM · Restricted Project

Jun 10 2020

hsmhsm added a comment to D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.

Ok, this is interesting. Anyway, so, we need to make sure that SIInstrInfo::getMemOperandsWithOffsetWidth() will compute width for all cases. So, for the new case, that you have added, will you going to sumbit a patch which make sure that width is computed for this new case as well?

Jun 10 2020, 4:20 AM · Restricted Project
hsmhsm added a comment to D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.

Looks like this breaks check-llvm: http://45.33.8.238/linux/19836/step_12.txt

@hsmhsm you can reproduce the failures if you run the tests under valgrind with llvm-lit --vg. Adding an assert(Width > 0) just after MachineScheduler calls getMemOperandsWithOffsetWidth would make the failure even more obvious.

The problem is: first you committed D80946 which returns Width from all cases in SIInstrInfo::getMemOperandsWithOffsetWidth. Then I committed D74035, which was written earlier, which adds a new isMIMG case but does not set Width.

Jun 10 2020, 4:20 AM · Restricted Project

Jun 9 2020

hsmhsm added a comment to D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.

This is surprizing, in my local repo the tests pass, but, it fails in pre-checkin build. I have locally built the patch from scratch with upstream rebased repo, and tested it as below:

Jun 9 2020, 8:12 AM · Restricted Project
hsmhsm committed rG7410571ce902: Revert "[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem… (authored by hsmhsm).
Revert "[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem…
Jun 9 2020, 7:07 AM
hsmhsm added a reverting change for rG40a632a33511: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops…: rG7410571ce902: Revert "[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem….
Jun 9 2020, 7:07 AM
hsmhsm added a comment to D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.

Reverted in the commit - 7410571ce902c92087cb582b10710e17904d5b7a

Jun 9 2020, 7:05 AM · Restricted Project
hsmhsm committed rG40a632a33511: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops… (authored by hsmhsm).
[AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops…
Jun 9 2020, 2:09 AM
hsmhsm closed D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.
Jun 9 2020, 2:09 AM · Restricted Project
hsmhsm added a comment to D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.

Unit test failures in the latest Harbormaster build are spurious - llvm.amdgcn.image.nsa.ll actually passes in my local repo build, and other three failures are unsupported cases.

Jun 9 2020, 1:36 AM · Restricted Project

Jun 8 2020

hsmhsm updated the diff for D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.

Rebased to upstream master to make sure Harbormaster build is fine before commiting this patch.

Jun 8 2020, 11:57 PM · Restricted Project
hsmhsm updated the summary of D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.
Jun 8 2020, 11:57 PM · Restricted Project

Jun 7 2020

hsmhsm updated the diff for D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.

Rebase to latest upstream.

Jun 7 2020, 10:57 PM · Restricted Project

Jun 5 2020

hsmhsm updated the diff for D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.

Rebase to latest upstream

Jun 5 2020, 4:22 AM · Restricted Project
hsmhsm updated the summary of D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.
Jun 5 2020, 3:49 AM · Restricted Project
hsmhsm added a comment to D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.

You already expressed that you have no objection with this patch in one of our internal email communications. As @foad expressed, it would be great if you also take a look at this patch, and officially give LGTM.

Jun 5 2020, 3:49 AM · Restricted Project
hsmhsm updated the diff for D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.

Have taken care of review comments by Jay.

Jun 5 2020, 3:16 AM · Restricted Project
hsmhsm added inline comments to D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.
Jun 5 2020, 2:09 AM · Restricted Project

Jun 4 2020

hsmhsm updated the diff for D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.

Fixed LLVM lit test regressions.

Jun 4 2020, 1:03 AM · Restricted Project

Jun 3 2020

hsmhsm updated the summary of D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.
Jun 3 2020, 4:53 AM · Restricted Project
hsmhsm created D81085: [AMDGPU/MemOpsCluster] Implement new heuristic for computing max mem ops cluster size.
Jun 3 2020, 4:53 AM · Restricted Project