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guopeilin (guopeilin)
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Wed, Nov 11, 3:34 AM (2 w, 22 h)

Recent Activity

Yesterday

guopeilin added inline comments to D91512: [AArch64][Isel] Avoid implicit zext for SIGN_EXTEND_INREG ( TRUNCATE ).
Wed, Nov 25, 5:18 PM · Restricted Project

Tue, Nov 24

guopeilin updated the diff for D91512: [AArch64][Isel] Avoid implicit zext for SIGN_EXTEND_INREG ( TRUNCATE ).
Tue, Nov 24, 12:26 AM · Restricted Project

Fri, Nov 20

guopeilin added inline comments to D91512: [AArch64][Isel] Avoid implicit zext for SIGN_EXTEND_INREG ( TRUNCATE ).
Fri, Nov 20, 2:14 AM · Restricted Project
guopeilin added inline comments to D91512: [AArch64][Isel] Avoid implicit zext for SIGN_EXTEND_INREG ( TRUNCATE ).
Fri, Nov 20, 12:52 AM · Restricted Project

Thu, Nov 19

guopeilin added a comment to D91513: [DeadMachineInstrctionElim] Post order visit all blocks and Iteratively run DeadMachineInstructionElim pass until nothing dead.

Do you have permission to commit?

Thu, Nov 19, 10:12 PM · Restricted Project

Wed, Nov 18

guopeilin added a comment to D91513: [DeadMachineInstrctionElim] Post order visit all blocks and Iteratively run DeadMachineInstructionElim pass until nothing dead.

Using post-order is quite straight-forward and only involves several lines of change. Please check the attachment.

That test passed with this traverse order change.

That's a great help, I pass all my related cases with this patch, Thanks a lot.

Now that we decide to use post order to visit all blocks of a function, I think we need to consider that what if CFG contains cycles?


From this picture, we can see that post order is not clearly defined cause there exits cycles, one of the possible orders is that [ m, g, d, e, c, b, t, x]
So m comes before g, if we define something in m and use it in g. Then even though both def and use are useless, cause we visit m first, we will still get a dead definition after we post-order visit all blocks.
So is it possible there still exist some cases theoretically that cannot be fixed by post-order visit? That is we may still need to iteratively run?

You are right, that's possible. That case should be rare as that's a def in the back-edge with acyclic dep. Could you merge the post-order change together with the iterative runs? so that, in the regular case, we at most run twice. Please keep on eye on compile time.

Wed, Nov 18, 1:42 AM · Restricted Project
guopeilin updated the diff for D91513: [DeadMachineInstrctionElim] Post order visit all blocks and Iteratively run DeadMachineInstructionElim pass until nothing dead.
Wed, Nov 18, 1:41 AM · Restricted Project

Tue, Nov 17

guopeilin updated the diff for D91325: [IndVarSimplify] Notify top most loop to drop cached exit counts.
Tue, Nov 17, 10:02 PM · Restricted Project
guopeilin added a comment to D91513: [DeadMachineInstrctionElim] Post order visit all blocks and Iteratively run DeadMachineInstructionElim pass until nothing dead.

Using post-order is quite straight-forward and only involves several lines of change. Please check the attachment.

That test passed with this traverse order change.

That's a great help, I pass all my related cases with this patch, Thanks a lot.

Tue, Nov 17, 6:29 PM · Restricted Project
guopeilin added a comment to D91513: [DeadMachineInstrctionElim] Post order visit all blocks and Iteratively run DeadMachineInstructionElim pass until nothing dead.

Using post-order is quite straight-forward and only involves several lines of change. Please check the attachment.

That test passed with this traverse order change.

Tue, Nov 17, 6:22 PM · Restricted Project

Mon, Nov 16

guopeilin added a comment to D91325: [IndVarSimplify] Notify top most loop to drop cached exit counts.

Yse, So I use forgetTopmostLoop() after optimizeLoopExits directly, I think it's more concise.

Mon, Nov 16, 10:07 PM · Restricted Project
guopeilin updated the diff for D91325: [IndVarSimplify] Notify top most loop to drop cached exit counts.
Mon, Nov 16, 10:04 PM · Restricted Project
guopeilin updated the diff for D91325: [IndVarSimplify] Notify top most loop to drop cached exit counts.

use forgetTopmostLoop() directly instead of visiting exitingBB among nested loops

Mon, Nov 16, 8:13 PM · Restricted Project
guopeilin retitled D91513: [DeadMachineInstrctionElim] Post order visit all blocks and Iteratively run DeadMachineInstructionElim pass until nothing dead from [DeadMachineInstrctionElim] Iteratively run DeadMachineInstrcutionElim pass until nothing dead to [DeadMachineInstrctionElim] Iteratively run DeadMachineInstructionElim pass until nothing dead.
Mon, Nov 16, 5:26 PM · Restricted Project
guopeilin retitled D91513: [DeadMachineInstrctionElim] Post order visit all blocks and Iteratively run DeadMachineInstructionElim pass until nothing dead from [DeadMachineInstrctionElim] Iteratively run DeadMachineInstrcutionElim pass untill nothing dead to [DeadMachineInstrctionElim] Iteratively run DeadMachineInstrcutionElim pass until nothing dead.
Mon, Nov 16, 5:26 PM · Restricted Project
guopeilin added a comment to D91513: [DeadMachineInstrctionElim] Post order visit all blocks and Iteratively run DeadMachineInstructionElim pass until nothing dead.

could you elaborate more on why we need to run that iteratively? since the original one runs bottom-up, supposedly it should find all.

Mon, Nov 16, 5:25 PM · Restricted Project

Sun, Nov 15

guopeilin added reviewers for D91513: [DeadMachineInstrctionElim] Post order visit all blocks and Iteratively run DeadMachineInstructionElim pass until nothing dead: sunfish, hliao, rampitec, wwei.
Sun, Nov 15, 8:24 PM · Restricted Project
guopeilin added reviewers for D91512: [AArch64][Isel] Avoid implicit zext for SIGN_EXTEND_INREG ( TRUNCATE ): wwei, t.p.northover, paulwalker-arm, efriedma, dmgreen, samparker.
Sun, Nov 15, 8:16 PM · Restricted Project
guopeilin requested review of D91513: [DeadMachineInstrctionElim] Post order visit all blocks and Iteratively run DeadMachineInstructionElim pass until nothing dead.
Sun, Nov 15, 7:22 PM · Restricted Project
guopeilin requested review of D91512: [AArch64][Isel] Avoid implicit zext for SIGN_EXTEND_INREG ( TRUNCATE ).
Sun, Nov 15, 7:17 PM · Restricted Project

Fri, Nov 13

guopeilin added a comment to D91325: [IndVarSimplify] Notify top most loop to drop cached exit counts.

I'm not really getting how wrong cached exit count may possibly lead to hang. Could you please explain this problem more?

Fri, Nov 13, 12:49 AM · Restricted Project

Thu, Nov 12

guopeilin added a comment to D91325: [IndVarSimplify] Notify top most loop to drop cached exit counts.

https://bugs.llvm.org/show_bug.cgi?id=48158

Thu, Nov 12, 5:31 PM · Restricted Project
guopeilin added reviewers for D91325: [IndVarSimplify] Notify top most loop to drop cached exit counts: reames, apilipenko, ebrevnov.
Thu, Nov 12, 1:00 AM · Restricted Project
guopeilin requested review of D91325: [IndVarSimplify] Notify top most loop to drop cached exit counts.
Thu, Nov 12, 12:49 AM · Restricted Project