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- User Since
- Oct 12 2016, 4:50 AM (224 w, 21 h)
Nov 27 2020
Reverted getFragmentSizeInBits to return an integral type and not TypeSize, because scalable variables cannot be part of structs/arrays - hence they cannot be pointed by fragments.
NFC. Rename declare in test.
I reverted the return type of the lambda function to be integral type instead of TypeSize.
NFC: fix code formatting.
Rename test file. NFC.
Nov 25 2020
Fix formatting in test. NFC
Nov 24 2020
I have extracted D92020 to implement only the change of interface for AllocaInst::getAllocationSizeInBits.
Add comment to DbgVariableIntrinsic::getFragmentSizeInBits(). NFC
Rebase on top of D92020. NFC.
Nov 20 2020
I have added assertions around before TypeSize comparisons where it made sense to do so, but not in the lambda used in the sort invocation.
Thank you for the review @sdesmalen
I have removed the C test, as the LL test is enough to test the changes I have done in Local.cpp.
This last change is trying to remove the failure at https://reviews.llvm.org/harbormaster/unit/view/196974/
I haven’t been able to reproduce such failure on my dev machine, so I just changed the RUN lines in the test (added -c, used 2>%t) to see if the bot is going to be happy with the new invocation.
FYI: I am trying to figure out this failure that does not appear on my machine: https://reviews.llvm.org/harbormaster/unit/view/196974/
I updated the RUN lines of the .ll test to prevent the failure at https://reviews.llvm.org/harbormaster/unit/view/196899/.
Nov 19 2020
Nov 18 2020
This LGTM. May I ask to extend the commit message to add a reference to the paragraph in section "3.7.3.3", item 2 on page 23 of the specs version 00bet6?
Nov 17 2020
HI @joechrisellis - thank you. This LGTM.
Parking this for the moment, as we need to refine the heuristic to decide when to prevent the spurious zero extension.
Nov 16 2020
Nov 12 2020
Improve comment in test.
Nov 11 2020
@rengolin - thank you for looking into this. The patch has changed quite a bit since you approved it (faulty codegen for one of the macros, which I have removed from this patch). You might want to re-look at it.
Thank you @joechrisellis - LGTM!
I have added more test coverage for the codegen of the examples mentioned in section 3.7.3.3 of the SVE ACLE. The tests are generic to work for -msve-vector-bits=128|...|2048.
Nov 10 2020
Hi @joechrisellis - thank you for this patch!
Nov 9 2020
In the last update I removed the tests for __ARM_FEATURE_SVE_PREDICATE_OPERATORSbut forgot to remove the code that generates and tests the macro.
I removed the enablement of __ARM_FEATURE_SVE_PREDICATE_OPERATORS as the codegen is incorrect.
LGTM, thanks for explaining!
LGTM - but can you explain in the commit why you are doing this? In particular, can you state that the test case still fails without the fix that removed the warning?
NFC: rebase on top of master.
NFC: update tests to use %clang_cc1 instead of %clang to prevent errors for missing includes: https://reviews.llvm.org/B77907
Nov 6 2020
Nov 3 2020
Fix typo in comment.
Thank you for your review @resistor. I simplified the logic in the
lambda function as suggested in your comment.
Thank you for the review @resistor. I have implememted the
optimization also looking through a sign_extend node. Tests to cover
this have been added, but only for extending i32 into i64 because
illegal values like i8 are always sign extended inreg.
Nov 2 2020
Updating the patch after splitting it in three patches. I'll link the remeining here after publishing them.
Oct 29 2020
s/Mask/SignBitPos/ in the code I changed. Revert the change in a place were Mask was accidentally renamed.
- fixed typo
- described tests
LGTM, thank you!
I have addressed the comment from @samparker about making the check in
UsesDifferInSignExtension independent on the order of the uses. The
code now uses llvm::any_of on all uses.
Oct 28 2020
Address all review comments but one (still working on the version of UsesDifferInSignExtension that doesn't care about the order of the uses).
Hi @c-rhodes, Peter asked me to take a look at this. LGTM, I only have minor stuff.
I have removed the method SelectionDAG::isZeroExtendInReg in favour of using the machinery already available in DAGCombiner.
Oct 27 2020
Oct 26 2020
Oct 23 2020
LGTM! Thanks.
Oct 22 2020
Oct 21 2020
Oct 16 2020
LGTM from the perspective of making sure that this solution can be extended to any of the architectures that libmvec supports.
Oct 13 2020
Thank you for modifying the implementation to facilitate the extension to other targets.
Oct 8 2020
Sep 16 2020
Fix typo.
Sep 14 2020
Sep 11 2020
@sdesmalen - I have moved the check outside the switch statement as discussed in our phone call.
Sep 7 2020
Aug 28 2020
Nit: there is a typo in the commit message: whre -> where.
Aug 26 2020
I have added test coverage for st1[bhwd] for both .s and .d version of the alias for [<Za>.<T>, #0].