- User Since
- May 20 2016, 1:12 AM (244 w, 5 d)
Mon, Jan 4
Dec 23 2020
I do not currently have commit access, but I have asked to so see if I can get it again and then I will push this patch.
Oct 27 2020
Rebased on master. Changed unsigned into Register in a couple of places and changed "no-frame-pointer-elim" to "frame-pointer" in test.
Oct 26 2020
It was some time since I worked with LLVM, but this looks good to me. It tries to fix a couple of things, so it would probably been better to divide it up into more than one patch and add some more tests, but this is fine. I compared the result with GAS for V8 and it matches.
Oct 22 2020
I will try and review it next week.
Jan 14 2019
Fixed warnings related to sign and unused parameters.
Jan 11 2019
It seems that warnings are disabled by default for libunwind? Or I did something wrong when running cmake. Enabling warnings got me list of things I will have to fix before committing.
Added message to static_assert and moved the AArch64 check one step up.
Added assert to verify that DW_CFA_AARCH64_negate_ra_state and DW_CFA_GNU_window_save have the same value.
Added functionality to be able to differ between DW_CFA_AARCH64_negate_ra_state and DW_CFA_GNU_window_save.
Jan 10 2019
For me native support is enough, so I removed the Sparc define from the !_LIBUNWIND_IS_NATIVE_ONLY section. That should make it compile with -DLIBUNWIND_ENABLE_CROSS_UNWINDING=ON.
Jan 9 2019
On 64-bit Sparc we can allow tail call optimizations on functions that returns a struct even though the caller does not (and vice versa).
Jan 8 2019
Do not tail call opt if either the callee or caller returns a struct and the other does not.
Removed empty lines and moved the trace message to before the operation.
Thanks for the review!
Dec 20 2018
I have been using this Sparc version of libunwind when running the libc++ testsuite and have not had any problems related to libunwind. Does anyone have any additional comments or is it ok to commit?
Dec 18 2018
This update does not use __builtin_extract_return_addr in _Unwind_GetIP. Instead it modifies the return address in stepWithDwarf, similar to aarch64. It also checks if the instruction at the return address is an unimp instruction. If it is, that means that the function is returning a struct and that we should skip one extra instruction.
Dec 17 2018
Only include DW_CFA_GNU_window_save support when compiling for Sparc.
Dec 13 2018
Added a check to make sure that the integer mask is between 0 and 127 when parsing. The immediate is now printed as an integer when outside the valid range. Also fixed a disassembly issue and added some more tests.
Nov 23 2018
Any other comments @jyknight , or does it look ok?
Oct 22 2018
Oct 15 2018
Removed the UseRegG* features and enabled the ReserveRegG6, ReserveRegG7, and ReserveRegG5 (on 32-bit) features by default.
Sep 27 2018
Sep 4 2018
See https://reviews.llvm.org/D51487 instead.
Sep 3 2018
Rebased and changed objdump output check from Unknown to symbol name (Local/Extern).
Sep 2 2018
The assert does not trigger after https://reviews.llvm.org/rL334383. Is it ok to apply this patch? Just need to change the objdump output from Unknown to the symbol name.
Aug 31 2018
Aug 30 2018
The partial write psr instruction is now part of binutils (https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=df28970).
Aug 27 2018
Yes, the SPARC V8e manual did not provide a mnemonic for it so it is invented here. I have submitted a similar patch to binutils so I will hold this patch until the other one gets approved, in case someone wants me to change the name.
I'm fixing them for the failures and to learn about LLVM. I have no use case and I'm perfectly fine with and in favor of removing the support. Can I just revert the patch that introduced the support, or should I submit a removal patch for review?
When I was testing the code I saw that it sometimes generated two versions of the same constant, one with the single SETHI with the complement form, and one with the standard SETHI/ORri pair. So I added the hasOneUse() part to prevent the case when a constant is encoded using three instructions instead of just one or two.
Aug 24 2018
Aug 22 2018
Aug 20 2018
Reserving registers ASR1-ASR31
Added attributes to prevent %g2-%g5 from being used as scratch register or to allow the use of %g5-%g7 as scratch registers. %g5 is reserved by default for 32-bit but not for 64-bit.
Moved code into a PerformDAGCombine function.
Aug 17 2018
Aug 14 2018
Aug 13 2018
Added optional argument to getFRAMEADDR to always flush register windows regardless of depth. Also simplified the code a bit.
Reserved register ASR23 to avoid error stating that register ASR23 is "an undefined physical register". Not sure if this is the correct solution, so putting this up for review again.
Added assert for Src.getSimpleValueType() and improved formatting.
Sorry, I forgot to test it with -verify-machineinstrs. I will revert it as I do not know how to fix it at this time.
Changed dyn_cast to cast. SRet is only allowed on the first argument, checked by LowerFormalArguments_32 at line 406, so I replaced [i] with .