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HsiangKai (Hsiangkai Wang)
Kai

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User Since
May 4 2016, 7:01 PM (229 w, 5 d)

Recent Activity

Wed, Sep 23

HsiangKai accepted D87873: [RISCV] Merge the pipeline models for Rocket.

LGTM.

Wed, Sep 23, 4:16 PM · Restricted Project

Sun, Sep 20

HsiangKai added a comment to D87873: [RISCV] Merge the pipeline models for Rocket.

Why not delete RISCVSchedRocket32.td?

Sun, Sep 20, 10:26 PM · Restricted Project

Wed, Sep 9

HsiangKai updated the diff for D84732: [RISCV] Support vmsge.vx and vmsgeu.vx pseudo instructions in RVV..

Update according to @rogfer01's comments.

Wed, Sep 9, 6:44 PM · Restricted Project
HsiangKai added inline comments to D84732: [RISCV] Support vmsge.vx and vmsgeu.vx pseudo instructions in RVV..
Wed, Sep 9, 6:44 PM · Restricted Project

Aug 24 2020

HsiangKai accepted D85069: [RISCV] add the MC layer support of riscv vector Zvamo extension.
Aug 24 2020, 4:19 PM · Restricted Project

Aug 23 2020

HsiangKai added inline comments to D84732: [RISCV] Support vmsge.vx and vmsgeu.vx pseudo instructions in RVV..
Aug 23 2020, 10:59 PM · Restricted Project
HsiangKai updated the diff for D84732: [RISCV] Support vmsge.vx and vmsgeu.vx pseudo instructions in RVV..

Add VRNoV0 register class.

Aug 23 2020, 10:53 PM · Restricted Project

Aug 20 2020

HsiangKai added a comment to D85069: [RISCV] add the MC layer support of riscv vector Zvamo extension.

Just a couple of nits, but otherwise it LGTM.

Aug 20 2020, 7:54 PM · Restricted Project

Aug 17 2020

HsiangKai added inline comments to D85069: [RISCV] add the MC layer support of riscv vector Zvamo extension.
Aug 17 2020, 8:42 PM · Restricted Project
HsiangKai added a comment to D85400: [RISCV] add the MC layer support of riscv vector Zvqmac extension.

These instructions and encodings are already removed from vector specification. We could postpone the patch after these instructions are included in the vector specification.

Aug 17 2020, 8:10 PM · Restricted Project
HsiangKai accepted D84416: [RISCV] add the assemble and disassemble support of Zvlsseg instructions.

LGTM.

Aug 17 2020, 7:53 PM · Restricted Project

Aug 12 2020

HsiangKai added a comment to D83775: [RISCV] add the assemble and disassemble support of Zvlsseg instructions.

Duplicated in D84416. Abandon this one.

Aug 12 2020, 4:15 PM · Restricted Project
HsiangKai added inline comments to D84416: [RISCV] add the assemble and disassemble support of Zvlsseg instructions.
Aug 12 2020, 4:13 PM · Restricted Project

Aug 9 2020

HsiangKai added a comment to D85069: [RISCV] add the MC layer support of riscv vector Zvamo extension.

I confused the relationship of sub-extensions before. Sorry for that.
There are some discussions[0] about the relationship between vector sub-extensions. It seems that


V-extension implies Zvamo + Zvlsseg

Zvqmac, Zvamo and Zvlsseg are stand alone sub extensions. That is, Zvamo does not imply V extension.

Zvqmac has no implied extensions.
Zvamo implies A-extension.
Zvlsseg has no implied extensions.

Do you agree with that?

[0] https://github.com/riscv/riscv-v-spec/issues/546

So, let me summarize:
Zvlsseg has no implied extensions
Zvqmac has no implied extensions
Zvamo required A extension ? If so, is it suitable that use -mattr=+a, +experimental-zvamo to enable the zvamo extension?

Aug 9 2020, 11:07 PM · Restricted Project

Aug 6 2020

HsiangKai added a comment to D84732: [RISCV] Support vmsge.vx and vmsgeu.vx pseudo instructions in RVV..

Ping.

Aug 6 2020, 8:08 PM · Restricted Project
HsiangKai requested review of D84732: [RISCV] Support vmsge.vx and vmsgeu.vx pseudo instructions in RVV..
Aug 6 2020, 8:08 PM · Restricted Project
HsiangKai added a comment to D85069: [RISCV] add the MC layer support of riscv vector Zvamo extension.

I confused the relationship of sub-extensions before. Sorry for that.
There are some discussions[0] about the relationship between vector sub-extensions. It seems that


Aug 6 2020, 8:03 PM · Restricted Project

Aug 3 2020

HsiangKai added a comment to D84416: [RISCV] add the assemble and disassemble support of Zvlsseg instructions.

D80802 is landed. Please rebase on master.

Aug 3 2020, 4:01 PM · Restricted Project
HsiangKai added inline comments to D85069: [RISCV] add the MC layer support of riscv vector Zvamo extension.
Aug 3 2020, 1:34 AM · Restricted Project

Aug 2 2020

HsiangKai added inline comments to D85069: [RISCV] add the MC layer support of riscv vector Zvamo extension.
Aug 2 2020, 11:58 PM · Restricted Project

Jul 31 2020

HsiangKai committed rG721d93fc5aa8: Support experimental v extension v0.9. (authored by HsiangKai).
Support experimental v extension v0.9.
Jul 31 2020, 4:43 PM
HsiangKai committed rG47a4a27f4720: Upgrade MC to v0.9. (authored by HsiangKai).
Upgrade MC to v0.9.
Jul 31 2020, 4:43 PM
HsiangKai closed D81213: [RISCV] Support experimental v extension v0.9..
Jul 31 2020, 4:42 PM · Restricted Project
HsiangKai closed D80802: [RISCV] Upgrade RVV MC to v0.9..
Jul 31 2020, 4:42 PM · Restricted Project, Restricted Project

Jul 28 2020

HsiangKai added a comment to D80802: [RISCV] Upgrade RVV MC to v0.9..

Thanks for your review, @fpallares.

Jul 28 2020, 2:44 AM · Restricted Project, Restricted Project
HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

Add comments in RISCVInstrInfoV.td.

Jul 28 2020, 2:42 AM · Restricted Project, Restricted Project
HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

Address @fpallares's comments.

Jul 28 2020, 12:59 AM · Restricted Project, Restricted Project

Jul 21 2020

HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

According the description from v0.9,

Jul 21 2020, 1:52 AM · Restricted Project, Restricted Project
HsiangKai added a comment to D80802: [RISCV] Upgrade RVV MC to v0.9..

Apologies we didn't identify this earlier but with the change of the mask register layout (MLEN=1) the overlap constraints involving the mask register were modified:

RVV-0.8, Section 5.3. Vector Masking:

The destination vector register group for a masked vector instruction can only overlap the source mask register (v0) when LMUL=1. Otherwise, an illegal instruction exception is raised.

RVV-0.9, Section 5.3. Vector Masking:

The destination vector register group for a masked vector instruction cannot overlap the source mask register (v0), unless the destination vector register is being written with a mask value (e.g., comparisons) or the scalar result of a reduction. Otherwise, an illegal instruction exception is raised.

The change was introduced in this commit.

From my understanding, with this change an instruction such as the following should be rejected in RVV-0.9:

vadd.vv	v0, v1, v2, v0.t

Also note that vadc/vsbc already have this behaviour.

Jul 21 2020, 1:41 AM · Restricted Project, Restricted Project

Jul 16 2020

HsiangKai added a comment to D80802: [RISCV] Upgrade RVV MC to v0.9..

Since this patch replaces 0.8 support with 0.9, it should include an update to the version check in clang/lib/Driver/ToolChains/Arch/RISCV.cpp to match.

Jul 16 2020, 9:52 AM · Restricted Project, Restricted Project
HsiangKai added inline comments to D80802: [RISCV] Upgrade RVV MC to v0.9..
Jul 16 2020, 2:10 AM · Restricted Project, Restricted Project
HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

Simplify instruction format for vector load/store.

Jul 16 2020, 1:42 AM · Restricted Project, Restricted Project
HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

To simplify the instruction definitions for vector load/store as @fpallares' suggestions.

Jul 16 2020, 1:29 AM · Restricted Project, Restricted Project

Jul 15 2020

HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

clang format.

Jul 15 2020, 1:48 AM · Restricted Project, Restricted Project
HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

Refine RISCVAsmParser::validateInstruction().

Jul 15 2020, 1:45 AM · Restricted Project, Restricted Project

Jul 14 2020

HsiangKai added inline comments to D80802: [RISCV] Upgrade RVV MC to v0.9..
Jul 14 2020, 7:49 PM · Restricted Project, Restricted Project
HsiangKai added reviewers for D83775: [RISCV] add the assemble and disassemble support of Zvlsseg instructions: rogfer01, fpallares, evandro.
Jul 14 2020, 7:24 PM · Restricted Project

Jul 7 2020

HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

Address @rogfer01 and @fpallares' comments.

Jul 7 2020, 5:09 AM · Restricted Project, Restricted Project

Jul 1 2020

HsiangKai added a comment to D81214: [RISCV] Add vector instructions for FPR64..

FPR32 version V instructions should be enough for CodeGen.

Jul 1 2020, 9:42 AM · Restricted Project
HsiangKai abandoned D81214: [RISCV] Add vector instructions for FPR64..
Jul 1 2020, 9:42 AM · Restricted Project

Jun 30 2020

HsiangKai committed rGa7b0f391852b: [MVT] Add new MVT types for RISC-V vector. (authored by HsiangKai).
[MVT] Add new MVT types for RISC-V vector.
Jun 30 2020, 10:20 AM
HsiangKai closed D81724: [MVT] Add new MVT types for RISC-V vector..
Jun 30 2020, 10:20 AM · Restricted Project

Jun 29 2020

HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

Update patch with full context.

Jun 29 2020, 10:32 PM · Restricted Project, Restricted Project
HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

Correct instructions validation according to v0.9 spec.

Jun 29 2020, 10:32 PM · Restricted Project, Restricted Project
HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

Rebase on master.

Jun 29 2020, 7:47 PM · Restricted Project, Restricted Project

Jun 27 2020

HsiangKai committed rG66da87dcbaf9: [RISCV] Assemble/Disassemble v-ext instructions. (authored by HsiangKai).
[RISCV] Assemble/Disassemble v-ext instructions.
Jun 27 2020, 11:27 PM
HsiangKai committed rGd698ff92a59c: [RISCV] Support experimental v extensions. (authored by HsiangKai).
[RISCV] Support experimental v extensions.
Jun 27 2020, 11:27 PM
HsiangKai closed D69987: [RISCV] Assemble/Disassemble v-ext instructions..
Jun 27 2020, 11:27 PM · Restricted Project, Restricted Project
HsiangKai closed D81188: [RISCV] Support experimental v extensions..
Jun 27 2020, 11:27 PM · Restricted Project

Jun 25 2020

HsiangKai added a reviewer for D81724: [MVT] Add new MVT types for RISC-V vector.: fpallares.
Jun 25 2020, 9:40 AM · Restricted Project
HsiangKai added a reviewer for D81214: [RISCV] Add vector instructions for FPR64.: fpallares.
Jun 25 2020, 9:40 AM · Restricted Project
HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

Simplify the logic of validateInstruction() in RISCVAsmParser.cpp.

Jun 25 2020, 9:40 AM · Restricted Project, Restricted Project
HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

Address @fpallares's comments.

Jun 25 2020, 9:07 AM · Restricted Project, Restricted Project
HsiangKai added inline comments to D69987: [RISCV] Assemble/Disassemble v-ext instructions..
Jun 25 2020, 8:00 AM · Restricted Project, Restricted Project
HsiangKai added inline comments to D69987: [RISCV] Assemble/Disassemble v-ext instructions..
Jun 25 2020, 8:00 AM · Restricted Project, Restricted Project

Jun 19 2020

HsiangKai updated the diff for D81724: [MVT] Add new MVT types for RISC-V vector..

Add nxv1f16.

Jun 19 2020, 2:39 AM · Restricted Project

Jun 18 2020

HsiangKai updated the diff for D81724: [MVT] Add new MVT types for RISC-V vector..

Remove redundant types.

Jun 18 2020, 12:30 AM · Restricted Project

Jun 12 2020

HsiangKai added a reviewer for D81724: [MVT] Add new MVT types for RISC-V vector.: craig.topper.
Jun 12 2020, 8:38 AM · Restricted Project
HsiangKai updated the diff for D81724: [MVT] Add new MVT types for RISC-V vector..
Jun 12 2020, 8:37 AM · Restricted Project
HsiangKai added inline comments to D81724: [MVT] Add new MVT types for RISC-V vector..
Jun 12 2020, 8:37 AM · Restricted Project
HsiangKai created D81724: [MVT] Add new MVT types for RISC-V vector..
Jun 12 2020, 2:40 AM · Restricted Project

Jun 9 2020

HsiangKai abandoned D79543: [RISCV] Enable 'undisturbed' semantics in instruction definitions..

I need to think about is it necessary to describe 'undisturbed' semantics in instruction definitions. Do not review it now.

Jun 9 2020, 11:57 PM · Restricted Project

Jun 4 2020

HsiangKai updated the diff for D69987: [RISCV] Assemble/Disassemble v-ext instructions..
Jun 4 2020, 8:23 PM · Restricted Project, Restricted Project
HsiangKai created D81214: [RISCV] Add vector instructions for FPR64..
Jun 4 2020, 7:51 PM · Restricted Project
HsiangKai created D81213: [RISCV] Support experimental v extension v0.9..
Jun 4 2020, 7:51 PM · Restricted Project
HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..

Address @evandro's comments.

Jun 4 2020, 7:51 PM · Restricted Project, Restricted Project
HsiangKai updated the diff for D69987: [RISCV] Assemble/Disassemble v-ext instructions..

Remove redundant RVVConstraint.

Jun 4 2020, 7:51 PM · Restricted Project, Restricted Project
HsiangKai updated the diff for D81188: [RISCV] Support experimental v extensions..

Address @MaskRay's comments.

Jun 4 2020, 7:51 PM · Restricted Project
HsiangKai added inline comments to D69987: [RISCV] Assemble/Disassemble v-ext instructions..
Jun 4 2020, 7:19 PM · Restricted Project, Restricted Project
HsiangKai added a comment to D69987: [RISCV] Assemble/Disassemble v-ext instructions..

Drive-by comment: the clang side change isn't tightly coupled with the LLVM side changes. It should be a separate patch.

Jun 4 2020, 12:42 PM · Restricted Project, Restricted Project
HsiangKai created D81188: [RISCV] Support experimental v extensions..
Jun 4 2020, 12:42 PM · Restricted Project
HsiangKai updated the diff for D69987: [RISCV] Assemble/Disassemble v-ext instructions..
Jun 4 2020, 12:42 PM · Restricted Project, Restricted Project
HsiangKai added a comment to D69987: [RISCV] Assemble/Disassemble v-ext instructions..

Ping.

Jun 4 2020, 7:38 AM · Restricted Project, Restricted Project

May 30 2020

HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..
May 30 2020, 3:09 AM · Restricted Project, Restricted Project
HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..
May 30 2020, 2:37 AM · Restricted Project, Restricted Project

May 29 2020

HsiangKai updated the diff for D80802: [RISCV] Upgrade RVV MC to v0.9..
May 29 2020, 8:06 AM · Restricted Project, Restricted Project
HsiangKai created D80802: [RISCV] Upgrade RVV MC to v0.9..
May 29 2020, 8:06 AM · Restricted Project, Restricted Project

May 28 2020

HsiangKai updated the diff for D69987: [RISCV] Assemble/Disassemble v-ext instructions..

Apply clang-format.

May 28 2020, 5:57 AM · Restricted Project, Restricted Project
HsiangKai updated the diff for D69987: [RISCV] Assemble/Disassemble v-ext instructions..
  • Check operands for widening and narrowing instructions.
  • Modify according to @fpallares's comments.
May 28 2020, 2:07 AM · Restricted Project, Restricted Project

May 22 2020

HsiangKai accepted D80352: [RISCV] Register null target streamer for RISC-V.

LGTM.

May 22 2020, 1:49 AM · Restricted Project

May 21 2020

HsiangKai added a comment to D80352: [RISCV] Register null target streamer for RISC-V.

Use clang-format to format your commit.

May 21 2020, 1:36 AM · Restricted Project

May 20 2020

HsiangKai updated the summary of D69987: [RISCV] Assemble/Disassemble v-ext instructions..
May 20 2020, 3:27 PM · Restricted Project, Restricted Project
HsiangKai added inline comments to D69987: [RISCV] Assemble/Disassemble v-ext instructions..
May 20 2020, 2:53 PM · Restricted Project, Restricted Project
HsiangKai added a comment to D69987: [RISCV] Assemble/Disassemble v-ext instructions..

Update to version 0.8-draft-20191213.

May 20 2020, 7:34 AM · Restricted Project, Restricted Project

May 19 2020

HsiangKai added a comment to D69987: [RISCV] Assemble/Disassemble v-ext instructions..

Is this patch ready to land? Are there any comments or suggestions I missed?

May 19 2020, 11:02 PM · Restricted Project, Restricted Project
HsiangKai updated the diff for D69987: [RISCV] Assemble/Disassemble v-ext instructions..

Fix clang-tidy warnings.

May 19 2020, 11:02 PM · Restricted Project, Restricted Project
HsiangKai added inline comments to D79543: [RISCV] Enable 'undisturbed' semantics in instruction definitions..
May 19 2020, 2:40 AM · Restricted Project

May 7 2020

HsiangKai updated the diff for D69987: [RISCV] Assemble/Disassemble v-ext instructions..

Rebase on master.

May 7 2020, 10:15 AM · Restricted Project, Restricted Project

May 6 2020

HsiangKai created D79543: [RISCV] Enable 'undisturbed' semantics in instruction definitions..
May 6 2020, 7:53 PM · Restricted Project

Apr 23 2020

HsiangKai updated the diff for D69987: [RISCV] Assemble/Disassemble v-ext instructions..
  • Refine naming.
  • Some typo.
Apr 23 2020, 2:06 AM · Restricted Project, Restricted Project
HsiangKai updated the diff for D69987: [RISCV] Assemble/Disassemble v-ext instructions..
  • Address @simoncook's comments.
  • Reorder instructions according to "V" specification.
  • Add pseudo instructions in "V" specification.
  • Add comments in RISCVInstrInfoV.td
  • "V" implies "F".
Apr 23 2020, 1:34 AM · Restricted Project, Restricted Project

Apr 18 2020

HsiangKai updated the diff for D69987: [RISCV] Assemble/Disassemble v-ext instructions..
Apr 18 2020, 9:09 AM · Restricted Project, Restricted Project

Apr 2 2020

HsiangKai updated the diff for D69987: [RISCV] Assemble/Disassemble v-ext instructions..
  • Fix clang-format errors.
  • Rename variables according to LLVM Coding Standards.
Apr 2 2020, 6:27 PM · Restricted Project, Restricted Project
HsiangKai updated the diff for D69987: [RISCV] Assemble/Disassemble v-ext instructions..
  • Rebase on master branch.
  • Fix validInstruction() bugs.
  • Update test cases.
Apr 2 2020, 6:28 AM · Restricted Project, Restricted Project

Apr 1 2020

HsiangKai committed rG501522b5b2a1: [RISCV] Support RISC-V ELF attributes sections in llvm-readobj. (authored by HsiangKai).
[RISCV] Support RISC-V ELF attributes sections in llvm-readobj.
Apr 1 2020, 7:08 AM
HsiangKai closed D75833: [RISCV] Support RISC-V ELF attribute section in llvm-readobj.
Apr 1 2020, 7:08 AM · Restricted Project
HsiangKai updated the diff for D75833: [RISCV] Support RISC-V ELF attribute section in llvm-readobj.
Apr 1 2020, 5:30 AM · Restricted Project
HsiangKai updated the diff for D75833: [RISCV] Support RISC-V ELF attribute section in llvm-readobj.
Apr 1 2020, 2:16 AM · Restricted Project
HsiangKai updated the diff for D75833: [RISCV] Support RISC-V ELF attribute section in llvm-readobj.

Use reportError() to handle error messages.

Apr 1 2020, 12:30 AM · Restricted Project

Mar 31 2020

HsiangKai committed rG581ba35291a6: [RISCV] ELF attribute section for RISC-V. (authored by HsiangKai).
[RISCV] ELF attribute section for RISC-V.
Mar 31 2020, 1:37 AM