In D89178#2352272, @craig.topper wrote:

Are we ok with this implementation?

I don't have a great way to protect intrinsics not using TargetConstant properly in the future, but I think we're ok at the moment based on what I see in the isel table.

TKS all review!!

TKS for reviewing!

ping

Thanks for your reviews! Please let me suspend this patch first.

In D88194#2322366, @spatel wrote:

Ok, I don't have any other questions/comments (other than it would still be helpful to reduce/pre-commit the tests).

Hello @spatel, Sorrry, I don't much understand the "reduce/pre-commit tests",
did you mean the test here "cet_endbr_imm_enhance.ll" should be merge into other existing test ?

@spatel thank you very much for your review! and very sorry for the later update!
CET stands for Intel Control-flow Enforcement Technology, which was designed by H.J. and has already implemented in llvm and gcc. Now it can be googled out.
CET adds an Indirect Branch Tracking capability (by inserting Endbr instruction at the destination of the indirect branch) to provide software the ability to restrict COP/JOP attacks.

@nickdesaulniers thank you very much for your guide!
Sorry for the later update, I take a travel these days.

@Craig and MaskRay , thank you very much for your careful reviews !!

I tend not do it for -O0, most projects/libs not use -O0 to build.
This is not a bug, we just refine the CET.

Hello Craig, could you help accept, TKS!

Done, TKS !!

Should we add a test here ?

Hello efriedma, first thanks for your suggestion.
I agree with"specific load instruction isn't good approach", I just don't know how to easily identify the catch variable in Machine IR.
So I choose the first Load in landing-pad. (I think this can be checked in catch's lowering)

+1

That is really more clear than old code. I +1 for this refine.

In D83111#2134747, @craig.topper wrote:

LGTM with all instances of "pointer point" replace with just "pointer"

Fix some missed change last time.
1 doxygen comments: amxintrin.h --> x86intrin.h

refine ldtilecfg and sttilecfg comment.

2 replace tile reg num 8 with TileRegHigh+1

I tried it, it just remove tags, not tags with their info, I miss-understand at first, thank you!

Hello, Craig, can I commit it now?

check-llvm passed.
LGTM

In D82705#2124135, @craig.topper wrote:

-Fix the previously noted missing break
-Prevent trying to create a register encoding past tmm7

3 case failed

LLVM :: MC/Disassembler/X86/simple-tests.txt
LLVM :: MC/Disassembler/X86/x86-16.txt
LLVM :: MC/Disassembler/X86/x86-32.txt

Change VTILE to TILE

Done, but I find the last llvm code can not pass "make check-all", no relation with this patch.

Hello rsmith,
first, very sorry for have committed this patch before your reply, I waited 10 days, I thought you have agreed it.
I think the linux-ABI can be the specification of this head file. The context of this cet.h is according to the linux ABI about CET.
We explained in which case we should use this cet.h file. (line 2-4)
tks

@rsmith

Hello @rsmith if you feel OK too, could you help accept it. Thank you!
Hello every friends, I plan to commit it in these days, if you do not oppose it, thank you!

! In D79617#2029228, @hjl.tools wrote:
Works for me.

Hello, H.J., could you help accept this patch, I hope it can go to llvm 10.0.1.
Thank you!!

Refine the Macro _CET_ENDBR

Add #undef _CET_ENDBR

I want to put this patch to llvm10.0.1, could you help review and then accept this patch?

Good thing is that: CET is already defined to 1/2/3 according to -fcf-protection=xxx at front end, So we directly used it for preprocessor.