In D94685#2504510, @atanasyan wrote:@ntesic Do you have commit access?
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Jan 18 2021
Jan 18 2021
Addressed comments:
- Use shouldUpdateCallSiteInfo() predicate
- Use ToErase->eraseFromParent()
- Reduce function attributes in test
Jan 14 2021
Jan 14 2021
In D78105#2487169, @nickdesaulniers wrote:Compiler crash reported in: https://bugs.llvm.org/show_bug.cgi?id=48695
Dec 9 2020
Dec 9 2020
Dec 3 2020
Dec 3 2020
- Move implementation to DwarfDebug
- Update tests to check DWARF
In D92471#2428505, @dstenb wrote:I think it would be preferable if we could do this in a target independent place, so that downstream targets, and upstream targets that do not yet support call sites, do not have to care about this.
Can we do this in collectCallSiteParameters by looking at the call instruction's undef uses?
Something like this:
@@ -787,6 +787,15 @@ static void collectCallSiteParameters(const MachineInstr *CallMI, (void)InsertedReg; } + for (auto &MO : CallMI->uses()) { + if (!MO.isReg() || !MO.isUndef()) + continue; + auto It = ForwardedRegWorklist.find(MO.getReg()); + if (It == ForwardedRegWorklist.end()) + continue; + ForwardedRegWorklist.erase(It); + } +
Dec 2 2020
Dec 2 2020
Jun 17 2020
Jun 17 2020
May 29 2020
May 29 2020
@dstenb Thanks for the review. Any additional comments?
May 25 2020
May 25 2020
Address comment - delaySlotSupported change.
Compress test-CHECK-lines.
Clang format.
May 22 2020
May 22 2020
ntesic updated the diff for D78108: [CSInfo][MIPS] Describe parameter value loaded by ADDiu instruction.
Address comments.
Rebase.
May 21 2020
May 21 2020
Capture "&" instead of "this" in delaySlotSupported lambda.
Address comments.
Change of delay slot guard - use assertions instead of target check.
Address comments.
Transform lambda
nextInstrInterpret
into static function
interpretNextInstr
May 15 2020
May 15 2020
Address comment - spelling.
Rebase.
May 14 2020
May 14 2020
In D78105#2035965, @dstenb wrote:LGTM. Thanks!
Do you need help with landing this?
Address comments:
- tests changes
- patch summary update
May 12 2020
May 12 2020
ntesic added inline comments to D78108: [CSInfo][MIPS] Describe parameter value loaded by ADDiu instruction.
In D78105#2025646, @vsk wrote:This seems to be in great shape. Does it have any dependencies?
Address comment.
Tests update - use only one !DILocation per scope.
May 11 2020
May 11 2020
The main purpose of the "delay slot guard" is to ensure that call_site DIE won't be created for call with delay slot, because it could have incorrect "return PC" value (DW_AT_low_pc, DW_AT_call_return_pc).
This will happen if the call and its delay slot instruction are not in the expected order.
May 4 2020
May 4 2020
Address comment.
Apr 28 2020
Apr 28 2020
Address comments.
Apr 24 2020
Apr 24 2020
Merging into https://reviews.llvm.org/D78105.
Address comment.
Add changes from https://reviews.llvm.org/D78104.
Apr 23 2020
Apr 23 2020
ntesic updated the diff for D78108: [CSInfo][MIPS] Describe parameter value loaded by ADDiu instruction.
Address comments.
ntesic added inline comments to D78108: [CSInfo][MIPS] Describe parameter value loaded by ADDiu instruction.
@dstenb
Thanks for the review.
I agree with all suggestions.
In D78104#1985262, @aprantl wrote:This would benefit from some kind of test.
Apr 14 2020
Apr 14 2020
Nov 14 2019
Nov 14 2019