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llvm/include/llvm/CodeGen/SelectionDAGNodes.h
Show First 20 Lines • Show All 517 Lines • ▼ Show 20 Lines | class LoadSDNodeBitfields { | ||||
uint16_t ExtTy : 2; // enum ISD::LoadExtType | uint16_t ExtTy : 2; // enum ISD::LoadExtType | ||||
uint16_t IsExpanding : 1; | uint16_t IsExpanding : 1; | ||||
}; | }; | ||||
class StoreSDNodeBitfields { | class StoreSDNodeBitfields { | ||||
friend class StoreSDNode; | friend class StoreSDNode; | ||||
friend class MaskedStoreSDNode; | friend class MaskedStoreSDNode; | ||||
friend class MaskedScatterSDNode; | |||||
uint16_t : NumLSBaseSDNodeBits; | uint16_t : NumLSBaseSDNodeBits; | ||||
uint16_t IsTruncating : 1; | uint16_t IsTruncating : 1; | ||||
uint16_t IsCompressing : 1; | uint16_t IsCompressing : 1; | ||||
}; | }; | ||||
union { | union { | ||||
▲ Show 20 Lines • Show All 1,851 Lines • ▼ Show 20 Lines | MaskedGatherScatterSDNode(ISD::NodeType NodeTy, unsigned Order, | ||||
LSBaseSDNodeBits.AddressingMode = IndexType; | LSBaseSDNodeBits.AddressingMode = IndexType; | ||||
assert(getIndexType() == IndexType && "Value truncated"); | assert(getIndexType() == IndexType && "Value truncated"); | ||||
} | } | ||||
/// How is Index applied to BasePtr when computing addresses. | /// How is Index applied to BasePtr when computing addresses. | ||||
ISD::MemIndexType getIndexType() const { | ISD::MemIndexType getIndexType() const { | ||||
return static_cast<ISD::MemIndexType>(LSBaseSDNodeBits.AddressingMode); | return static_cast<ISD::MemIndexType>(LSBaseSDNodeBits.AddressingMode); | ||||
} | } | ||||
void setIndexType(ISD::MemIndexType IndexType) { | |||||
LSBaseSDNodeBits.AddressingMode = IndexType; | |||||
} | |||||
bool isIndexScaled() const { | bool isIndexScaled() const { | ||||
return (getIndexType() == ISD::SIGNED_SCALED) || | return (getIndexType() == ISD::SIGNED_SCALED) || | ||||
(getIndexType() == ISD::UNSIGNED_SCALED); | (getIndexType() == ISD::UNSIGNED_SCALED); | ||||
} | } | ||||
bool isIndexSigned() const { | bool isIndexSigned() const { | ||||
return (getIndexType() == ISD::SIGNED_SCALED) || | return (getIndexType() == ISD::SIGNED_SCALED) || | ||||
(getIndexType() == ISD::SIGNED_UNSCALED); | (getIndexType() == ISD::SIGNED_UNSCALED); | ||||
} | } | ||||
Show All 34 Lines | |||||
/// This class is used to represent an MSCATTER node | /// This class is used to represent an MSCATTER node | ||||
/// | /// | ||||
class MaskedScatterSDNode : public MaskedGatherScatterSDNode { | class MaskedScatterSDNode : public MaskedGatherScatterSDNode { | ||||
public: | public: | ||||
friend class SelectionDAG; | friend class SelectionDAG; | ||||
MaskedScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, | MaskedScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, | ||||
EVT MemVT, MachineMemOperand *MMO, | bool IsTrunc, EVT MemVT, MachineMemOperand *MMO, | ||||
ISD::MemIndexType IndexType) | ISD::MemIndexType IndexType) | ||||
: MaskedGatherScatterSDNode(ISD::MSCATTER, Order, dl, VTs, MemVT, MMO, | : MaskedGatherScatterSDNode(ISD::MSCATTER, Order, dl, VTs, MemVT, MMO, | ||||
IndexType) {} | IndexType) { | ||||
StoreSDNodeBits.IsTruncating = IsTrunc; | |||||
} | |||||
/// Return true if the op does a truncation before store. | |||||
/// For integers this is the same as doing a TRUNCATE and storing the result. | |||||
/// For floats, it is the same as doing an FP_ROUND and storing the result. | |||||
bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; } | |||||
const SDValue &getValue() const { return getOperand(1); } | const SDValue &getValue() const { return getOperand(1); } | ||||
static bool classof(const SDNode *N) { | static bool classof(const SDNode *N) { | ||||
return N->getOpcode() == ISD::MSCATTER; | return N->getOpcode() == ISD::MSCATTER; | ||||
} | } | ||||
}; | }; | ||||
▲ Show 20 Lines • Show All 239 Lines • Show Last 20 Lines |