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Differential D75098 Diff 261771 llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp

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llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp

Show First 20 Lines • Show All 169 Lines • ▼ Show 20 LinesEmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone, bool IsCloned,
// If all uses are reading from the src physical register and copying the // If all uses are reading from the src physical register and copying the
// register is either impossible or very expensive, then don't create a copy. // register is either impossible or very expensive, then don't create a copy.
if (MatchReg && SrcRC->getCopyCost() < 0) { if (MatchReg && SrcRC->getCopyCost() < 0) {
VRBase = SrcReg; VRBase = SrcReg;
} else { } else {
// Create the reg, emit the copy. // Create the reg, emit the copy.
VRBase = MRI->createVirtualRegister(DstRC); VRBase = MRI->createVirtualRegister(DstRC);
BuildMI(*MBB, InsertPos, Node->getDebugLoc(), TII->get(TargetOpcode::COPY), const MachineBasicBlock::iterator Term = MBB->getFirstTerminator();
VRBase).addReg(SrcReg); // FIXME: The predicate to determine whether an instruction is a COPY or
arsenmUnsubmitted
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I would expect this to not special case INLINEASM_BR. This should be any value defined by a terminator instruction

arsenm: I would expect this to not special case INLINEASM_BR. This should be any value defined by a…
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Does this include unconditional jump terminators?

void: Does this include unconditional jump terminators?
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I'm not sure how you could construct a sensible unconditional jump that would require a copy after it. Seems like something to check in the verifier

arsenm: I'm not sure how you could construct a sensible unconditional jump that would require a copy…
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My comment wasn't very good. When converting something to a TCOPY, we need to figure out which terminators are candidates for having a TCOPY after them. Or perhaps better, what condition requires a TCOPY instead of a regular COPY.

void: My comment wasn't very good. When converting something to a TCOPY, we need to figure out which…
// TCOPY should be generic. At this time though the criteria isn't
// well-known except for INLINEASM_BR instructions.
unsigned TgtOpc =
Term != MBB->end() && Term->getOpcode() == TargetOpcode::INLINEASM_BR
? TargetOpcode::TCOPY
: TargetOpcode::COPY;
BuildMI(*MBB, InsertPos, Node->getDebugLoc(), TII->get(TgtOpc), VRBase)
.addReg(SrcReg);
} }
SDValue Op(Node, ResNo); SDValue Op(Node, ResNo);
if (IsClone) if (IsClone)
VRBaseMap.erase(Op); VRBaseMap.erase(Op);
bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second; bool isNew = VRBaseMap.insert(std::make_pair(Op, VRBase)).second;
(void)isNew; // Silence compiler warning. (void)isNew; // Silence compiler warning.
assert(isNew && "Node emitted out of order - early"); assert(isNew && "Node emitted out of order - early");
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