Changeset View
Changeset View
Standalone View
Standalone View
lib/IR/AutoUpgrade.cpp
| Show First 20 Lines • Show All 65 Lines • ▼ Show 20 Lines | |||||
| } | } | ||||
| static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) { | static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) { | ||||
| // All of the intrinsics matches below should be marked with which llvm | // All of the intrinsics matches below should be marked with which llvm | ||||
| // version started autoupgrading them. At some point in the future we would | // version started autoupgrading them. At some point in the future we would | ||||
| // like to use this information to remove upgrade code for some older | // like to use this information to remove upgrade code for some older | ||||
| // intrinsics. It is currently undecided how we will determine that future | // intrinsics. It is currently undecided how we will determine that future | ||||
| // point. | // point. | ||||
| if (Name=="ssse3.pabs.b.128" || // Added in 6.0 | if (Name.startswith("sse2.paddus") || // Added in 7.0 | ||||
| Name.startswith("sse2.psubus") || // Added in 7.0 | |||||
| Name.startswith("avx2.paddus") || // Added in 7.0 | |||||
| Name.startswith("avx2.psubus") || // Added in 7.0 | |||||
| Name.startswith("avx512.mask.paddus") || // Added in 7.0 | |||||
| Name.startswith("avx512.mask.psubus") || // Added in 7.0 | |||||
RKSimon: This is version 8.0 now | |||||
| Name=="ssse3.pabs.b.128" || // Added in 6.0 | |||||
| Name=="ssse3.pabs.w.128" || // Added in 6.0 | Name=="ssse3.pabs.w.128" || // Added in 6.0 | ||||
| Name=="ssse3.pabs.d.128" || // Added in 6.0 | Name=="ssse3.pabs.d.128" || // Added in 6.0 | ||||
| Name.startswith("fma4.vfmadd.s") || // Added in 7.0 | Name.startswith("fma4.vfmadd.s") || // Added in 7.0 | ||||
| Name.startswith("fma.vfmadd.") || // Added in 7.0 | Name.startswith("fma.vfmadd.") || // Added in 7.0 | ||||
| Name.startswith("fma.vfmsub.") || // Added in 7.0 | Name.startswith("fma.vfmsub.") || // Added in 7.0 | ||||
| Name.startswith("fma.vfmaddsub.") || // Added in 7.0 | Name.startswith("fma.vfmaddsub.") || // Added in 7.0 | ||||
| Name.startswith("fma.vfmsubadd.") || // Added in 7.0 | Name.startswith("fma.vfmsubadd.") || // Added in 7.0 | ||||
| Name.startswith("fma.vfnmadd.") || // Added in 7.0 | Name.startswith("fma.vfnmadd.") || // Added in 7.0 | ||||
| ▲ Show 20 Lines • Show All 811 Lines • ▼ Show 20 Lines | static Value *UpgradeX86ALIGNIntrinsics(IRBuilder<> &Builder, Value *Op0, | ||||
| Value *Align = Builder.CreateShuffleVector(Op1, Op0, | Value *Align = Builder.CreateShuffleVector(Op1, Op0, | ||||
| makeArrayRef(Indices, NumElts), | makeArrayRef(Indices, NumElts), | ||||
| "palignr"); | "palignr"); | ||||
| return EmitX86Select(Builder, Mask, Align, Passthru); | return EmitX86Select(Builder, Mask, Align, Passthru); | ||||
| } | } | ||||
| static Value *UpgradeX86AddSubSatIntrinsics(IRBuilder<> &Builder, CallInst &CI, | |||||
| bool IsAddition) { | |||||
| Value *Op0 = CI.getOperand(0); | |||||
| Value *Op1 = CI.getOperand(1); | |||||
| // Collect vector elements and type data. | |||||
| Type *ResultType = CI.getType(); | |||||
| Value *Res; | |||||
| if (IsAddition) { | |||||
| // ADDUS: a > (a+b) ? ~0 : (a+b) | |||||
| // If Op0 > Add, overflow occured. | |||||
| Value *Add = Builder.CreateAdd(Op0, Op1); | |||||
| Value *ICmp = Builder.CreateICmp(ICmpInst::ICMP_UGT, Op0, Add); | |||||
| Value *Max = llvm::Constant::getAllOnesValue(ResultType); | |||||
| Res = Builder.CreateSelect(ICmp, Max, Add); | |||||
| } else { | |||||
| // SUBUS: max(a, b) - b | |||||
| Value *ICmp = Builder.CreateICmp(ICmpInst::ICMP_UGT, Op0, Op1); | |||||
| Value *Select = Builder.CreateSelect(ICmp, Op0, Op1); | |||||
| Res = Builder.CreateSub(Select, Op1); | |||||
| } | |||||
| if (CI.getNumArgOperands() == 4) { // For masked intrinsics. | |||||
| Value *VecSrc = CI.getOperand(2); | |||||
| Value *Mask = CI.getOperand(3); | |||||
| Res = EmitX86Select(Builder, Mask, Res, VecSrc); | |||||
| } | |||||
| return Res; | |||||
| } | |||||
| static Value *UpgradeMaskedStore(IRBuilder<> &Builder, | static Value *UpgradeMaskedStore(IRBuilder<> &Builder, | ||||
| Value *Ptr, Value *Data, Value *Mask, | Value *Ptr, Value *Data, Value *Mask, | ||||
| bool Aligned) { | bool Aligned) { | ||||
| // Cast the pointer to the right type. | // Cast the pointer to the right type. | ||||
| Ptr = Builder.CreateBitCast(Ptr, | Ptr = Builder.CreateBitCast(Ptr, | ||||
| llvm::PointerType::getUnqual(Data->getType())); | llvm::PointerType::getUnqual(Data->getType())); | ||||
| unsigned Align = | unsigned Align = | ||||
| Aligned ? cast<VectorType>(Data->getType())->getBitWidth() / 8 : 1; | Aligned ? cast<VectorType>(Data->getType())->getBitWidth() / 8 : 1; | ||||
| ▲ Show 20 Lines • Show All 1,144 Lines • ▼ Show 20 Lines | if (IsX86 && (Name.startswith("sse2.pcmp") || | ||||
| unsigned NumElts = CI->getType()->getVectorNumElements(); | unsigned NumElts = CI->getType()->getVectorNumElements(); | ||||
| Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts); | Type *MaskTy = VectorType::get(Type::getInt32Ty(C), NumElts); | ||||
| Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), | Rep = Builder.CreateShuffleVector(Op, UndefValue::get(Op->getType()), | ||||
| Constant::getNullValue(MaskTy)); | Constant::getNullValue(MaskTy)); | ||||
| if (CI->getNumArgOperands() == 3) | if (CI->getNumArgOperands() == 3) | ||||
| Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, | Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep, | ||||
| CI->getArgOperand(1)); | CI->getArgOperand(1)); | ||||
| } else if (IsX86 && (Name.startswith("sse2.paddus") || | |||||
| Name.startswith("avx2.paddus") || | |||||
| Name.startswith("avx512.mask.paddus"))) { | |||||
| Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, true /*IsAdd*/); | |||||
| } else if (IsX86 && (Name.startswith("sse2.psubus") || | |||||
| Name.startswith("avx2.psubus") || | |||||
| Name.startswith("avx512.mask.psubus"))) { | |||||
| Rep = UpgradeX86AddSubSatIntrinsics(Builder, *CI, false /*IsAdd*/); | |||||
| } else if (IsX86 && Name.startswith("avx512.mask.palignr.")) { | }else if (IsX86 && Name.startswith("avx512.mask.palignr.")) { | ||||
| Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), | Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), | ||||
| CI->getArgOperand(1), | CI->getArgOperand(1), | ||||
| CI->getArgOperand(2), | CI->getArgOperand(2), | ||||
| CI->getArgOperand(3), | CI->getArgOperand(3), | ||||
| CI->getArgOperand(4), | CI->getArgOperand(4), | ||||
| false); | false); | ||||
| } else if (IsX86 && Name.startswith("avx512.mask.valign.")) { | } else if (IsX86 && Name.startswith("avx512.mask.valign.")) { | ||||
| Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), | Rep = UpgradeX86ALIGNIntrinsics(Builder, CI->getArgOperand(0), | ||||
| ▲ Show 20 Lines • Show All 1,651 Lines • Show Last 20 Lines | |||||
This is version 8.0 now