diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -4622,45 +4622,6 @@
       ReplaceNode(Node, CNode);
       return;
     }
-
-    case Intrinsic::x86_tdpbssd_internal:
-    case Intrinsic::x86_tdpbsud_internal:
-    case Intrinsic::x86_tdpbusd_internal:
-    case Intrinsic::x86_tdpbuud_internal: {
-      if (!Subtarget->hasAMXINT8())
-        break;
-      SDValue Chain = Node->getOperand(0);
-      unsigned Opc;
-      switch (IntNo) {
-      case Intrinsic::x86_tdpbssd_internal: Opc = X86::PTDPBSSDV; break;
-      case Intrinsic::x86_tdpbsud_internal: Opc = X86::PTDPBSUDV; break;
-      case Intrinsic::x86_tdpbusd_internal: Opc = X86::PTDPBUSDV; break;
-      case Intrinsic::x86_tdpbuud_internal: Opc = X86::PTDPBUUDV; break;
-      default: llvm_unreachable("Impossible intrinsic");
-      }
-      SDValue Ops[] = {Node->getOperand(2),
-                       Node->getOperand(3),
-                       Node->getOperand(4),
-                       Node->getOperand(5),
-                       Node->getOperand(6),
-                       Node->getOperand(7),
-                       Chain};
-      MachineSDNode *CNode =
-          CurDAG->getMachineNode(Opc, dl, {MVT::x86amx, MVT::Other}, Ops);
-      ReplaceNode(Node, CNode);
-      return;
-    }
-    case Intrinsic::x86_tilezero_internal: {
-      if (!Subtarget->hasAMXTILE())
-        break;
-      unsigned Opc = X86::PTILEZEROV;
-      SDValue Chain = Node->getOperand(0);
-      SDValue Ops[] = {Node->getOperand(2), Node->getOperand(3), Chain};
-      MachineSDNode *CNode =
-          CurDAG->getMachineNode(Opc, dl, {MVT::x86amx, MVT::Other}, Ops);
-      ReplaceNode(Node, CNode);
-      return;
-    }
     }
     break;
   }
diff --git a/llvm/lib/Target/X86/X86InstrAMX.td b/llvm/lib/Target/X86/X86InstrAMX.td
--- a/llvm/lib/Target/X86/X86InstrAMX.td
+++ b/llvm/lib/Target/X86/X86InstrAMX.td
@@ -48,15 +48,16 @@
                      VEX, T8XD;
 
     // Pseduo instruction for RA.
-    def PTILELOADDV : PseudoI<(outs TILE: $dst), (ins GR16:$src1,
-                                                      GR16:$src2,
-                                                      opaquemem:$src3), []>;
+    def PTILELOADDV : PseudoI<(outs TILE:$dst), (ins GR16:$src1,
+                                                     GR16:$src2,
+                                                     opaquemem:$src3), []>;
     def PTILESTOREDV : PseudoI<(outs), (ins GR16:$src1,
                                             GR16:$src2, opaquemem:$src3,
                                             TILE:$src4), []>;
     let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1 in
-      def PTILEZEROV : PseudoI<(outs TILE: $dst), (ins GR16:$src1,
-                                                     GR16:$src2), []>;
+      def PTILEZEROV : PseudoI<(outs TILE:$dst), (ins GR16:$src1, GR16:$src2),
+                                [(set TILE:$dst, (int_x86_tilezero_internal
+                                  GR16:$src1, GR16:$src2))]>;
 
     let usesCustomInserter = 1 in {
       // Pseudo instructions, using immediates instead of tile registers.
@@ -94,18 +95,30 @@
 
     // Pseduo instruction for RA.
     let Constraints = "$src4 = $dst" in {
-      def PTDPBSSDV : PseudoI<(outs TILE: $dst), (ins GR16:$src1,
+      def PTDPBSSDV : PseudoI<(outs TILE:$dst), (ins GR16:$src1,
                               GR16:$src2, GR16:$src3, TILE:$src4,
-                              TILE:$src5, TILE:$src6), []>;
+                              TILE:$src5, TILE:$src6),
+                              [(set TILE: $dst,
+                              (int_x86_tdpbssd_internal GR16:$src1, GR16:$src2,
+                              GR16:$src3, TILE:$src4, TILE:$src5, TILE:$src6))]>;
       def PTDPBSUDV : PseudoI<(outs TILE: $dst), (ins GR16:$src1,
                               GR16:$src2, GR16:$src3, TILE:$src4,
-                              TILE:$src5, TILE:$src6), []>;
+                              TILE:$src5, TILE:$src6),
+                              [(set TILE: $dst,
+                              (int_x86_tdpbsud_internal GR16:$src1, GR16:$src2,
+                               GR16:$src3, TILE:$src4, TILE:$src5, TILE:$src6))]>;
       def PTDPBUSDV : PseudoI<(outs TILE: $dst), (ins GR16:$src1,
                               GR16:$src2, GR16:$src3, TILE:$src4,
-                              TILE:$src5, TILE:$src6), []>;
+                              TILE:$src5, TILE:$src6),
+                              [(set TILE: $dst,
+                              (int_x86_tdpbusd_internal GR16:$src1, GR16:$src2,
+                              GR16:$src3, TILE:$src4, TILE:$src5, TILE:$src6))]>;
       def PTDPBUUDV : PseudoI<(outs TILE: $dst), (ins GR16:$src1,
                               GR16:$src2, GR16:$src3, TILE:$src4,
-                              TILE:$src5, TILE:$src6), []>;
+                              TILE:$src5, TILE:$src6),
+                              [(set TILE: $dst,
+                              (int_x86_tdpbuud_internal GR16:$src1, GR16:$src2,
+                              GR16:$src3, TILE:$src4, TILE:$src5, TILE:$src6))]>;
     }
 
     let usesCustomInserter = 1 in {