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[X86] Allow PTILEZEROV and PTILELOADDV to be rematerializable
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Authored by pengfei on Feb 25 2021, 1:24 AM.

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Summary

Spilling and reloading AMX registers are expensive. We allow PTILEZEROV
and PTILELOADDV to be rematerializable to avoid the register spilling.

Diff Detail

Event Timeline

pengfei created this revision.Feb 25 2021, 1:24 AM
pengfei requested review of this revision.Feb 25 2021, 1:24 AM
Herald added a project: Restricted Project. · View Herald TranscriptFeb 25 2021, 1:24 AM
LuoYuanke accepted this revision.Feb 26 2021, 4:57 AM

LGTM. Thanks.

This revision is now accepted and ready to land.Feb 26 2021, 4:57 AM
LuoYuanke added inline comments.Feb 27 2021, 12:21 AM
llvm/lib/Target/X86/X86InstrInfo.cpp
1010

Sorry. I just noticed the ptileloaddv is also rematerialized. I'm not sure about it, because we need the stride (encoded as index) information and we need also make sure the memory address is global variable. What do you think?

LuoYuanke added inline comments.Feb 27 2021, 3:04 AM
llvm/lib/Target/X86/X86InstrInfo.cpp
1010

We may need to make sure the memory is not modified before reload. Constant pool should be ok.

pengfei added inline comments.Feb 27 2021, 4:14 AM
llvm/lib/Target/X86/X86InstrInfo.cpp
1010

I did a research and found it has difficulties:
The PTILELOADDV doesn't have a MachineMemOperand like other load MIs, so we cannot analyze the memory through it.
I also checked the other load MIs' rematerializion, and found they only do it for RIP based (which AMX doesn't support) addressing and PIC. I guess these represent the handling of constant pool.
Finally, I think loading form constant pool is rare for AMX. So I think we cound just disable the rematerializion for ptileloaddv. What do you think?

LuoYuanke added inline comments.Feb 27 2021, 4:29 AM
llvm/lib/Target/X86/X86InstrInfo.cpp
1010

I agree to disable it first, and re-enable it when we have a safe approach.

pengfei added inline comments.Feb 27 2021, 5:10 AM
llvm/lib/Target/X86/X86InstrInfo.cpp
1010

Thanks. Done by rG42e025f9deab.