diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp --- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -261,6 +261,13 @@ None) == PPC::AM_PCRel; } + /// SelectPDForm - Returns true if address N can be represented by Prefixed + /// DForm addressing mode (a base register, plus a signed 34-bit immediate. + bool SelectPDForm(SDNode *Parent, SDValue N, SDValue &Disp, SDValue &Base) { + return PPCLowering->SelectOptimalAddrMode(Parent, N, Disp, Base, *CurDAG, + None) == PPC::AM_PrefixDForm; + } + /// SelectXForm - Returns true if address N can be represented by the /// addressing mode of XForm instructions (an indexed [r+r] operation). bool SelectXForm(SDNode *Parent, SDValue N, SDValue &Disp, SDValue &Base) { diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h --- a/llvm/lib/Target/PowerPC/PPCISelLowering.h +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h @@ -712,6 +712,7 @@ AM_DForm, AM_DSForm, AM_DQForm, + AM_PrefixDForm, AM_XForm, AM_PCRel }; diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -1509,6 +1509,8 @@ PPC::MOF_NotAddNorCst | PPC::MOF_Vector256 | PPC::MOF_SubtargetP10, PPC::MOF_AddrIsSImm32 | PPC::MOF_Vector256 | PPC::MOF_SubtargetP10, }; + AddrModesMap[PPC::AM_PrefixDForm] = {PPC::MOF_RPlusSImm34 | + PPC::MOF_SubtargetP10}; AddrModesMap[PPC::AM_PCRel] = {PPC::MOF_PCRel | PPC::MOF_SubtargetP10}; } @@ -16883,6 +16885,9 @@ for (auto FlagSet : AddrModesMap.at(PPC::AM_DQForm)) if ((Flags & FlagSet) == FlagSet) return PPC::AM_DQForm; + for (auto FlagSet : AddrModesMap.at(PPC::AM_PrefixDForm)) + if ((Flags & FlagSet) == FlagSet) + return PPC::AM_PrefixDForm; for (auto FlagSet : AddrModesMap.at(PPC::AM_PCRel)) if ((Flags & FlagSet) == FlagSet) return PPC::AM_PCRel; @@ -17004,6 +17009,19 @@ FlagSet |= PPC::MOF_PCRel; return FlagSet; } + + // If the node is the paired load/store intrinsics, compute flags for + // address computation and return early. + unsigned ParentOp = Parent->getOpcode(); + if ((ParentOp == ISD::INTRINSIC_W_CHAIN) || + (ParentOp == ISD::INTRINSIC_VOID)) { + unsigned ID = cast(Parent->getOperand(1))->getZExtValue(); + SDValue IntrinOp = (ID == Intrinsic::ppc_vsx_lxvp) ? + Parent->getOperand(2) : Parent->getOperand(3); + computeFlagsForAddressComputation(IntrinOp, FlagSet, DAG); + FlagSet |= PPC::MOF_Vector256; + return FlagSet; + } } // Mark this as something we don't want to handle here if it is atomic @@ -17201,6 +17219,24 @@ Base = N; break; } + case PPC::AM_PrefixDForm: { + int64_t Imm34 = 0; + unsigned Opcode = N.getOpcode(); + if (((Opcode == ISD::ADD) || (Opcode == ISD::OR)) && + (isIntS34Immediate(N.getOperand(1), Imm34))) { + // N is an Add/OR Node, and it's operand is a 34-bit signed immediate. + Disp = DAG.getTargetConstant(Imm34, DL, N.getValueType()); + if (FrameIndexSDNode *FI = dyn_cast(N.getOperand(0))) + Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType()); + else + Base = N.getOperand(0); + } else if (isIntS34Immediate(N, Imm34)) { + // The address is a 34-bit signed immediate. + Disp = DAG.getTargetConstant(Imm34, DL, N.getValueType()); + Base = DAG.getRegister(PPC::ZERO8, N.getValueType()); + } + break; + } case PPC::AM_PCRel: { Disp = N; break; diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -1150,6 +1150,7 @@ def XForm : ComplexPattern; def ForceXForm : ComplexPattern; def PCRelForm : ComplexPattern; +def PDForm : ComplexPattern; //===----------------------------------------------------------------------===// // PowerPC Instruction Predicate Definitions. diff --git a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td --- a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td +++ b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td @@ -1663,18 +1663,18 @@ let Predicates = [PairedVectorMemops] in { // Intrinsics for Paired Vector Loads. - def : Pat<(v256i1 (int_ppc_vsx_lxvp iaddrX16:$src)), (LXVP memrix16:$src)>; - def : Pat<(v256i1 (int_ppc_vsx_lxvp xaddrX16:$src)), (LXVPX xaddrX16:$src)>; + def : Pat<(v256i1 (int_ppc_vsx_lxvp DQForm:$src)), (LXVP memrix16:$src)>; + def : Pat<(v256i1 (int_ppc_vsx_lxvp XForm:$src)), (LXVPX XForm:$src)>; let Predicates = [PairedVectorMemops, PrefixInstrs] in { - def : Pat<(v256i1 (int_ppc_vsx_lxvp iaddrX34:$src)), (PLXVP memri34:$src)>; + def : Pat<(v256i1 (int_ppc_vsx_lxvp PDForm:$src)), (PLXVP memri34:$src)>; } // Intrinsics for Paired Vector Stores. - def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, iaddrX16:$dst), + def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, DQForm:$dst), (STXVP $XSp, memrix16:$dst)>; - def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, xaddrX16:$dst), - (STXVPX $XSp, xaddrX16:$dst)>; + def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, XForm:$dst), + (STXVPX $XSp, XForm:$dst)>; let Predicates = [PairedVectorMemops, PrefixInstrs] in { - def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, iaddrX34:$dst), + def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, PDForm:$dst), (PSTXVP $XSp, memri34:$dst)>; } } @@ -2665,6 +2665,43 @@ // nand(A, nand(B, C)) def : xxevalPattern<(or (vnot v4i32:$vA), (and v4i32:$vB, v4i32:$vC)), !sub(255, 14)>; + + // Anonymous patterns to select prefixed VSX loads and stores. + // Load / Store f128 + def : Pat<(f128 (load PDForm:$src)), + (COPY_TO_REGCLASS (PLXV memri34:$src), VRRC)>; + def : Pat<(store f128:$XS, PDForm:$dst), + (PSTXV (COPY_TO_REGCLASS $XS, VSRC), memri34:$dst)>; + + // Load / Store v4i32 + def : Pat<(v4i32 (load PDForm:$src)), (PLXV memri34:$src)>; + def : Pat<(store v4i32:$XS, PDForm:$dst), (PSTXV $XS, memri34:$dst)>; + + // Load / Store v2i64 + def : Pat<(v2i64 (load PDForm:$src)), (PLXV memri34:$src)>; + def : Pat<(store v2i64:$XS, PDForm:$dst), (PSTXV $XS, memri34:$dst)>; + + // Load / Store v4f32 + def : Pat<(v4f32 (load PDForm:$src)), (PLXV memri34:$src)>; + def : Pat<(store v4f32:$XS, PDForm:$dst), (PSTXV $XS, memri34:$dst)>; + + // Load / Store v2f64 + def : Pat<(v2f64 (load PDForm:$src)), (PLXV memri34:$src)>; + def : Pat<(store v2f64:$XS, PDForm:$dst), (PSTXV $XS, memri34:$dst)>; + + // Cases For PPCstore_scal_int_from_vsr + def : Pat<(PPCstore_scal_int_from_vsr + (f64 (PPCcv_fp_to_uint_in_vsr f64:$src)), PDForm:$dst, 8), + (PSTXSD (XSCVDPUXDS f64:$src), PDForm:$dst)>; + def : Pat<(PPCstore_scal_int_from_vsr + (f64 (PPCcv_fp_to_sint_in_vsr f64:$src)), PDForm:$dst, 8), + (PSTXSD (XSCVDPSXDS f64:$src), PDForm:$dst)>; + def : Pat<(PPCstore_scal_int_from_vsr + (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), PDForm:$dst, 8), + (PSTXSD (COPY_TO_REGCLASS (XSCVQPUDZ f128:$src), VFRC), PDForm:$dst)>; + def : Pat<(PPCstore_scal_int_from_vsr + (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), PDForm:$dst, 8), + (PSTXSD (COPY_TO_REGCLASS (XSCVQPSDZ f128:$src), VFRC), PDForm:$dst)>; } let Predicates = [PrefixInstrs] in { @@ -2688,6 +2725,63 @@ (XXBLENDVW $A, $B, $C)>; def : Pat<(int_ppc_vsx_xxblendvd v2i64:$A, v2i64:$B, v2i64:$C), (XXBLENDVD $A, $B, $C)>; + + // Anonymous patterns to select prefixed loads and stores. + // Load i32 + def : Pat<(i32 (extloadi1 PDForm:$src)), (PLBZ memri34:$src)>; + def : Pat<(i32 (zextloadi1 PDForm:$src)), (PLBZ memri34:$src)>; + def : Pat<(i32 (extloadi8 PDForm:$src)), (PLBZ memri34:$src)>; + def : Pat<(i32 (zextloadi8 PDForm:$src)), (PLBZ memri34:$src)>; + def : Pat<(i32 (extloadi16 PDForm:$src)), (PLHZ memri34:$src)>; + def : Pat<(i32 (zextloadi16 PDForm:$src)), (PLHZ memri34:$src)>; + def : Pat<(i32 (sextloadi16 PDForm:$src)), (PLHA memri34:$src)>; + def : Pat<(i32 (load PDForm:$src)), (PLWZ memri34:$src)>; + + // Store i32 + def : Pat<(truncstorei8 i32:$rS, PDForm:$dst), (PSTB gprc:$rS, memri34:$dst)>; + def : Pat<(truncstorei16 i32:$rS, PDForm:$dst), (PSTH gprc:$rS, memri34:$dst)>; + def : Pat<(store i32:$rS, PDForm:$dst), (PSTW gprc:$rS, memri34:$dst)>; + + // Load i64 + def : Pat<(i64 (extloadi1 PDForm:$src)), (PLBZ8 memri34:$src)>; + def : Pat<(i64 (zextloadi1 PDForm:$src)), (PLBZ8 memri34:$src)>; + def : Pat<(i64 (extloadi8 PDForm:$src)), (PLBZ8 memri34:$src)>; + def : Pat<(i64 (zextloadi8 PDForm:$src)), (PLBZ8 memri34:$src)>; + def : Pat<(i64 (extloadi16 PDForm:$src)), (PLHZ8 memri34:$src)>; + def : Pat<(i64 (zextloadi16 PDForm:$src)), (PLHZ8 memri34:$src)>; + def : Pat<(i64 (sextloadi16 PDForm:$src)), (PLHA8 memri34:$src)>; + def : Pat<(i64 (extloadi32 PDForm:$src)), (PLWZ8 memri34:$src)>; + def : Pat<(i64 (zextloadi32 PDForm:$src)), (PLWZ8 memri34:$src)>; + def : Pat<(i64 (sextloadi32 PDForm:$src)), (PLWA8 memri34:$src)>; + def : Pat<(i64 (load PDForm:$src)), (PLD memri34:$src)>; + + // Store i64 + def : Pat<(truncstorei8 i64:$rS, PDForm:$dst), (PSTB8 g8rc:$rS, memri34:$dst)>; + def : Pat<(truncstorei16 i64:$rS, PDForm:$dst), (PSTH8 g8rc:$rS, memri34:$dst)>; + def : Pat<(truncstorei32 i64:$rS, PDForm:$dst), (PSTW8 g8rc:$rS, memri34:$dst)>; + def : Pat<(store i64:$rS, PDForm:$dst), (PSTD g8rc:$rS, memri34:$dst)>; + + // Load / Store f32 + def : Pat<(f32 (load PDForm:$src)), (PLFS memri34:$src)>; + def : Pat<(store f32:$FRS, PDForm:$dst), (PSTFS $FRS, memri34:$dst)>; + + // Load / Store f64 + def : Pat<(f64 (extloadf32 PDForm:$src)), + (COPY_TO_REGCLASS (PLFS memri34:$src), VSFRC)>; + def : Pat<(f64 (load PDForm:$src)), (PLFD memri34:$src)>; + def : Pat<(store f64:$FRS, PDForm:$dst), (PSTFD $FRS, memri34:$dst)>; + + // Atomic Load + def : Pat<(atomic_load_8 PDForm:$src), (PLBZ memri34:$src)>; + def : Pat<(atomic_load_16 PDForm:$src), (PLHZ memri34:$src)>; + def : Pat<(atomic_load_32 PDForm:$src), (PLWZ memri34:$src)>; + def : Pat<(atomic_load_64 PDForm:$src), (PLD memri34:$src)>; + + // Atomic Store + def : Pat<(atomic_store_8 PDForm:$dst, i32:$RS), (PSTB $RS, memri34:$dst)>; + def : Pat<(atomic_store_16 PDForm:$dst, i32:$RS), (PSTH $RS, memri34:$dst)>; + def : Pat<(atomic_store_32 PDForm:$dst, i32:$RS), (PSTW $RS, memri34:$dst)>; + def : Pat<(atomic_store_64 PDForm:$dst, i64:$RS), (PSTD $RS, memri34:$dst)>; } def InsertEltShift { diff --git a/llvm/test/CodeGen/PowerPC/atomics-i16-ldst.ll b/llvm/test/CodeGen/PowerPC/atomics-i16-ldst.ll --- a/llvm/test/CodeGen/PowerPC/atomics-i16-ldst.ll +++ b/llvm/test/CodeGen/PowerPC/atomics-i16-ldst.ll @@ -50,8 +50,7 @@ define dso_local signext i16 @ld_align32_int16_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int16_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -181,8 +180,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -356,8 +354,7 @@ define dso_local signext i16 @ld_align32_int16_t_int8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int16_t_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -487,8 +484,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -661,8 +657,7 @@ define dso_local signext i16 @ld_align32_int16_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int16_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: blr ; @@ -788,8 +783,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: blr ; @@ -958,8 +952,7 @@ define dso_local signext i16 @ld_align32_int16_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int16_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1092,8 +1085,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1268,8 +1260,7 @@ define dso_local signext i16 @ld_align32_int16_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int16_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1402,8 +1393,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1577,8 +1567,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint16_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -1708,8 +1697,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -1885,8 +1873,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_int8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint16_t_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr @@ -2025,8 +2012,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr @@ -2210,8 +2196,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint16_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -2337,8 +2322,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -2507,8 +2491,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint16_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -2641,8 +2624,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -2817,8 +2799,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint16_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -2951,8 +2932,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -3124,8 +3104,7 @@ define dso_local void @st_align32_uint16_t_uint8_t(i8* nocapture %ptr, i16 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint16_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint8_t: @@ -3246,8 +3225,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint8_t: @@ -3407,8 +3385,7 @@ define dso_local void @st_align32_uint16_t_uint16_t(i8* nocapture %ptr, i16 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint16_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint16_t: @@ -3525,8 +3502,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint16_t: @@ -3682,8 +3658,7 @@ define dso_local void @st_align32_uint16_t_uint32_t(i8* nocapture %ptr, i16 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint16_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint32_t: @@ -3807,8 +3782,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint32_t: @@ -3970,8 +3944,7 @@ define dso_local void @st_align32_uint16_t_uint64_t(i8* nocapture %ptr, i16 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint16_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint64_t: @@ -4095,8 +4068,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint64_t: @@ -4258,8 +4230,7 @@ define dso_local void @st_align32_int16_t_uint32_t(i8* nocapture %ptr, i16 signext %str) { ; CHECK-P10-LABEL: st_align32_int16_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_int16_t_uint32_t: @@ -4383,8 +4354,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint32_t: @@ -4546,8 +4516,7 @@ define dso_local void @st_align32_int16_t_uint64_t(i8* nocapture %ptr, i16 signext %str) { ; CHECK-P10-LABEL: st_align32_int16_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_int16_t_uint64_t: @@ -4671,8 +4640,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint64_t: diff --git a/llvm/test/CodeGen/PowerPC/atomics-i32-ldst.ll b/llvm/test/CodeGen/PowerPC/atomics-i32-ldst.ll --- a/llvm/test/CodeGen/PowerPC/atomics-i32-ldst.ll +++ b/llvm/test/CodeGen/PowerPC/atomics-i32-ldst.ll @@ -50,8 +50,7 @@ define dso_local signext i32 @ld_align32_int32_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int32_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -181,8 +180,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -356,8 +354,7 @@ define dso_local signext i32 @ld_align32_int32_t_int8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int32_t_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -487,8 +484,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -663,8 +659,7 @@ define dso_local signext i32 @ld_align32_int32_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int32_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -797,8 +792,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -973,8 +967,7 @@ define dso_local signext i32 @ld_align32_int32_t_int16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int32_t_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1107,8 +1100,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1281,8 +1273,7 @@ define dso_local signext i32 @ld_align32_int32_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int32_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsw r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1408,8 +1399,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsw r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1578,8 +1568,7 @@ define dso_local signext i32 @ld_align32_int32_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int32_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsw r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1712,8 +1701,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsw r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1887,8 +1875,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint32_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -2018,8 +2005,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -2195,8 +2181,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_int8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint32_t_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr @@ -2335,8 +2320,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr @@ -2522,8 +2506,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint32_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -2656,8 +2639,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -2834,8 +2816,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_int16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint32_t_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr @@ -2977,8 +2958,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr @@ -3162,8 +3142,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint32_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr ; @@ -3289,8 +3268,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr ; @@ -3459,8 +3437,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint32_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr ; @@ -3593,8 +3570,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr ; @@ -3766,8 +3742,7 @@ define dso_local void @st_align32_uint32_t_uint8_t(i8* nocapture %ptr, i32 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint32_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint8_t: @@ -3888,8 +3863,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint8_t: @@ -4051,8 +4025,7 @@ define dso_local void @st_align32_uint32_t_uint16_t(i8* nocapture %ptr, i32 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint32_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint16_t: @@ -4176,8 +4149,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint16_t: @@ -4337,8 +4309,7 @@ define dso_local void @st_align32_uint32_t_uint32_t(i8* nocapture %ptr, i32 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint32_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint32_t: @@ -4455,8 +4426,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint32_t: @@ -4612,8 +4582,7 @@ define dso_local void @st_align32_uint32_t_uint64_t(i8* nocapture %ptr, i32 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint32_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint64_t: @@ -4737,8 +4706,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint64_t: @@ -4900,8 +4868,7 @@ define dso_local void @st_align32_int32_t_uint64_t(i8* nocapture %ptr, i32 signext %str) { ; CHECK-P10-LABEL: st_align32_int32_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_int32_t_uint64_t: @@ -5025,8 +4992,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int32_t_uint64_t: diff --git a/llvm/test/CodeGen/PowerPC/atomics-i64-ldst.ll b/llvm/test/CodeGen/PowerPC/atomics-i64-ldst.ll --- a/llvm/test/CodeGen/PowerPC/atomics-i64-ldst.ll +++ b/llvm/test/CodeGen/PowerPC/atomics-i64-ldst.ll @@ -50,8 +50,7 @@ define dso_local i64 @ld_align32_int64_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int64_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -181,8 +180,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -356,8 +354,7 @@ define dso_local i64 @ld_align32_int64_t_int8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int64_t_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -487,8 +484,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -663,8 +659,7 @@ define dso_local i64 @ld_align32_int64_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int64_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -797,8 +792,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -973,8 +967,7 @@ define dso_local i64 @ld_align32_int64_t_int16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int64_t_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1107,8 +1100,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1283,8 +1275,7 @@ define dso_local i64 @ld_align32_int64_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int64_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr ; @@ -1417,8 +1408,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr ; @@ -1593,8 +1583,7 @@ define dso_local i64 @ld_align32_int64_t_int32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int64_t_int32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsw r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1727,8 +1716,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsw r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1899,8 +1887,7 @@ define dso_local i64 @ld_align32_int64_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int64_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_int64_t_uint64_t: @@ -2017,8 +2004,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint64_t: @@ -2175,8 +2161,7 @@ define dso_local i64 @ld_align32_uint64_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -2306,8 +2291,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -2481,8 +2465,7 @@ define dso_local i64 @ld_align32_uint64_t_int8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -2612,8 +2595,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -2788,8 +2770,7 @@ define dso_local i64 @ld_align32_uint64_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -2922,8 +2903,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr ; @@ -3098,8 +3078,7 @@ define dso_local i64 @ld_align32_uint64_t_int16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: blr ; @@ -3232,8 +3211,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsh r3, r3 ; CHECK-P10-NEXT: blr ; @@ -3408,8 +3386,7 @@ define dso_local i64 @ld_align32_uint64_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr ; @@ -3542,8 +3519,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr ; @@ -3718,8 +3694,7 @@ define dso_local i64 @ld_align32_uint64_t_int32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_int32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsw r3, r3 ; CHECK-P10-NEXT: blr ; @@ -3852,8 +3827,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsw r3, r3 ; CHECK-P10-NEXT: blr ; @@ -4024,8 +3998,7 @@ define dso_local i64 @ld_align32_uint64_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint64_t: @@ -4142,8 +4115,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint64_t: @@ -4298,8 +4270,7 @@ define dso_local void @st_align32_uint64_t_uint8_t(i8* nocapture %ptr, i64 %str) { ; CHECK-P10-LABEL: st_align32_uint64_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint8_t: @@ -4420,8 +4391,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint8_t: @@ -4583,8 +4553,7 @@ define dso_local void @st_align32_uint64_t_uint16_t(i8* nocapture %ptr, i64 %str) { ; CHECK-P10-LABEL: st_align32_uint64_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint16_t: @@ -4708,8 +4677,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint16_t: @@ -4871,8 +4839,7 @@ define dso_local void @st_align32_uint64_t_uint32_t(i8* nocapture %ptr, i64 %str) { ; CHECK-P10-LABEL: st_align32_uint64_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint32_t: @@ -4996,8 +4963,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint32_t: @@ -5157,8 +5123,7 @@ define dso_local void @st_align32_uint64_t_uint64_t(i8* nocapture %ptr, i64 %str) { ; CHECK-P10-LABEL: st_align32_uint64_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint64_t: @@ -5275,8 +5240,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint64_t: diff --git a/llvm/test/CodeGen/PowerPC/atomics-i8-ldst.ll b/llvm/test/CodeGen/PowerPC/atomics-i8-ldst.ll --- a/llvm/test/CodeGen/PowerPC/atomics-i8-ldst.ll +++ b/llvm/test/CodeGen/PowerPC/atomics-i8-ldst.ll @@ -48,8 +48,7 @@ define dso_local signext i8 @ld_align32_int8_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int8_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -172,8 +171,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -342,8 +340,7 @@ define dso_local signext i8 @ld_align32_int8_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int8_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -476,8 +473,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -652,8 +648,7 @@ define dso_local signext i8 @ld_align32_int8_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int8_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -786,8 +781,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -962,8 +956,7 @@ define dso_local signext i8 @ld_align32_int8_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int8_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1096,8 +1089,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1269,8 +1261,7 @@ define dso_local zeroext i8 @ld_align32_uint8_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint8_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -1393,8 +1384,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -1563,8 +1553,7 @@ define dso_local zeroext i8 @ld_align32_uint8_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint8_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -1697,8 +1686,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -1873,8 +1861,7 @@ define dso_local zeroext i8 @ld_align32_uint8_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint8_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -2007,8 +1994,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -2183,8 +2169,7 @@ define dso_local zeroext i8 @ld_align32_uint8_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint8_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -2317,8 +2302,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 56 ; CHECK-P10-NEXT: blr ; @@ -2488,8 +2472,7 @@ define dso_local void @st_align32_uint8_t_uint8_t(i8* nocapture %ptr, i8 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint8_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint8_t: @@ -2603,8 +2586,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint8_t: @@ -2760,8 +2742,7 @@ define dso_local void @st_align32_uint8_t_uint16_t(i8* nocapture %ptr, i8 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint8_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint16_t: @@ -2885,8 +2866,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint16_t: @@ -3048,8 +3028,7 @@ define dso_local void @st_align32_uint8_t_uint32_t(i8* nocapture %ptr, i8 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint8_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint32_t: @@ -3173,8 +3152,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint32_t: @@ -3336,8 +3314,7 @@ define dso_local void @st_align32_uint8_t_uint64_t(i8* nocapture %ptr, i8 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint8_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint64_t: @@ -3461,8 +3438,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint64_t: @@ -3624,8 +3600,7 @@ define dso_local void @st_align32_int8_t_uint16_t(i8* nocapture %ptr, i8 signext %str) { ; CHECK-P10-LABEL: st_align32_int8_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_int8_t_uint16_t: @@ -3749,8 +3724,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint16_t: @@ -3912,8 +3886,7 @@ define dso_local void @st_align32_int8_t_uint32_t(i8* nocapture %ptr, i8 signext %str) { ; CHECK-P10-LABEL: st_align32_int8_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_int8_t_uint32_t: @@ -4037,8 +4010,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint32_t: @@ -4200,8 +4172,7 @@ define dso_local void @st_align32_int8_t_uint64_t(i8* nocapture %ptr, i8 signext %str) { ; CHECK-P10-LABEL: st_align32_int8_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_int8_t_uint64_t: @@ -4325,8 +4296,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint64_t: diff --git a/llvm/test/CodeGen/PowerPC/f128_ldst.ll b/llvm/test/CodeGen/PowerPC/f128_ldst.ll --- a/llvm/test/CodeGen/PowerPC/f128_ldst.ll +++ b/llvm/test/CodeGen/PowerPC/f128_ldst.ll @@ -29,11 +29,16 @@ ; Function Attrs: norecurse nounwind readonly willreturn define dso_local fp128 @ld_unalign16___float128___float128(i8* nocapture readonly %ptr) { -; CHECK-LABEL: ld_unalign16___float128___float128: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: li r4, 1 -; CHECK-NEXT: lxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_unalign16___float128___float128: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: plxv v2, 1(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: ld_unalign16___float128___float128: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: li r4, 1 +; CHECK-PREP10-NEXT: lxvx v2, r3, r4 +; CHECK-PREP10-NEXT: blr entry: %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1 %0 = bitcast i8* %add.ptr to fp128* @@ -43,11 +48,16 @@ ; Function Attrs: norecurse nounwind readonly willreturn define dso_local fp128 @ld_align16___float128___float128(i8* nocapture readonly %ptr) { -; CHECK-LABEL: ld_align16___float128___float128: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: li r4, 8 -; CHECK-NEXT: lxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_align16___float128___float128: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: plxv v2, 8(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: ld_align16___float128___float128: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: li r4, 8 +; CHECK-PREP10-NEXT: lxvx v2, r3, r4 +; CHECK-PREP10-NEXT: blr entry: %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8 %0 = bitcast i8* %add.ptr to fp128* @@ -59,8 +69,7 @@ define dso_local fp128 @ld_unalign32___float128___float128(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_unalign32___float128___float128: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lxvx v2, r3, r4 +; CHECK-P10-NEXT: plxv v2, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_unalign32___float128___float128: @@ -80,8 +89,7 @@ define dso_local fp128 @ld_align32___float128___float128(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32___float128___float128: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lxvx v2, r3, r4 +; CHECK-P10-NEXT: plxv v2, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32___float128___float128: @@ -205,12 +213,18 @@ ; Function Attrs: norecurse nounwind readonly willreturn define dso_local fp128 @ld_disjoint_unalign16___float128___float128(i64 %ptr) { -; CHECK-LABEL: ld_disjoint_unalign16___float128___float128: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: rldicr r3, r3, 0, 51 -; CHECK-NEXT: li r4, 6 -; CHECK-NEXT: lxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_disjoint_unalign16___float128___float128: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P10-NEXT: plxv v2, 6(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: ld_disjoint_unalign16___float128___float128: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-PREP10-NEXT: li r4, 6 +; CHECK-PREP10-NEXT: lxvx v2, r3, r4 +; CHECK-PREP10-NEXT: blr entry: %and = and i64 %ptr, -4096 %or = or i64 %and, 6 @@ -221,12 +235,18 @@ ; Function Attrs: norecurse nounwind readonly willreturn define dso_local fp128 @ld_disjoint_align16___float128___float128(i64 %ptr) { -; CHECK-LABEL: ld_disjoint_align16___float128___float128: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: rldicr r3, r3, 0, 51 -; CHECK-NEXT: li r4, 24 -; CHECK-NEXT: lxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_disjoint_align16___float128___float128: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P10-NEXT: plxv v2, 24(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: ld_disjoint_align16___float128___float128: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-PREP10-NEXT: li r4, 24 +; CHECK-PREP10-NEXT: lxvx v2, r3, r4 +; CHECK-PREP10-NEXT: blr entry: %and = and i64 %ptr, -4096 %or = or i64 %and, 24 @@ -255,8 +275,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign32___float128___float128: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lxvx v2, r3, r4 +; CHECK-P10-NEXT: plxv v2, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_disjoint_unalign32___float128___float128: @@ -280,8 +299,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lxvx v2, r3, r4 +; CHECK-P10-NEXT: plxv v2, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_disjoint_align32___float128___float128: @@ -500,11 +518,16 @@ ; Function Attrs: nofree norecurse nounwind willreturn writeonly define dso_local void @st_unalign16___float128___float128(i8* nocapture %ptr, fp128 %str) { -; CHECK-LABEL: st_unalign16___float128___float128: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: li r4, 1 -; CHECK-NEXT: stxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: st_unalign16___float128___float128: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: pstxv v2, 1(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: st_unalign16___float128___float128: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: li r4, 1 +; CHECK-PREP10-NEXT: stxvx v2, r3, r4 +; CHECK-PREP10-NEXT: blr entry: %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1 %0 = bitcast i8* %add.ptr to fp128* @@ -514,11 +537,16 @@ ; Function Attrs: nofree norecurse nounwind willreturn writeonly define dso_local void @st_align16___float128___float128(i8* nocapture %ptr, fp128 %str) { -; CHECK-LABEL: st_align16___float128___float128: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: li r4, 8 -; CHECK-NEXT: stxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: st_align16___float128___float128: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: pstxv v2, 8(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: st_align16___float128___float128: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: li r4, 8 +; CHECK-PREP10-NEXT: stxvx v2, r3, r4 +; CHECK-PREP10-NEXT: blr entry: %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8 %0 = bitcast i8* %add.ptr to fp128* @@ -530,8 +558,7 @@ define dso_local void @st_unalign32___float128___float128(i8* nocapture %ptr, fp128 %str) { ; CHECK-P10-LABEL: st_unalign32___float128___float128: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: stxvx v2, r3, r4 +; CHECK-P10-NEXT: pstxv v2, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_unalign32___float128___float128: @@ -551,8 +578,7 @@ define dso_local void @st_align32___float128___float128(i8* nocapture %ptr, fp128 %str) { ; CHECK-P10-LABEL: st_align32___float128___float128: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: stxvx v2, r3, r4 +; CHECK-P10-NEXT: pstxv v2, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32___float128___float128: @@ -676,12 +702,18 @@ ; Function Attrs: nofree norecurse nounwind willreturn writeonly define dso_local void @st_disjoint_unalign16___float128___float128(i64 %ptr, fp128 %str) { -; CHECK-LABEL: st_disjoint_unalign16___float128___float128: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: rldicr r3, r3, 0, 51 -; CHECK-NEXT: li r4, 6 -; CHECK-NEXT: stxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: st_disjoint_unalign16___float128___float128: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P10-NEXT: pstxv v2, 6(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: st_disjoint_unalign16___float128___float128: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-PREP10-NEXT: li r4, 6 +; CHECK-PREP10-NEXT: stxvx v2, r3, r4 +; CHECK-PREP10-NEXT: blr entry: %and = and i64 %ptr, -4096 %or = or i64 %and, 6 @@ -692,12 +724,18 @@ ; Function Attrs: nofree norecurse nounwind willreturn writeonly define dso_local void @st_disjoint_align16___float128___float128(i64 %ptr, fp128 %str) { -; CHECK-LABEL: st_disjoint_align16___float128___float128: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: rldicr r3, r3, 0, 51 -; CHECK-NEXT: li r4, 24 -; CHECK-NEXT: stxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: st_disjoint_align16___float128___float128: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P10-NEXT: pstxv v2, 24(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: st_disjoint_align16___float128___float128: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-PREP10-NEXT: li r4, 24 +; CHECK-PREP10-NEXT: stxvx v2, r3, r4 +; CHECK-PREP10-NEXT: blr entry: %and = and i64 %ptr, -4096 %or = or i64 %and, 24 @@ -726,8 +764,7 @@ ; CHECK-P10-LABEL: st_disjoint_unalign32___float128___float128: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: stxvx v2, r3, r4 +; CHECK-P10-NEXT: pstxv v2, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_disjoint_unalign32___float128___float128: @@ -751,8 +788,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: stxvx v2, r3, r4 +; CHECK-P10-NEXT: pstxv v2, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_disjoint_align32___float128___float128: @@ -1001,12 +1037,11 @@ ; CHECK-P10-BE-LABEL: testGlob128PtrPlus3: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd128@toc@ha -; CHECK-P10-BE-NEXT: li r4, 3 ; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd128@toc@l -; CHECK-P10-BE-NEXT: lxvx vs0, r3, r4 +; CHECK-P10-BE-NEXT: plxv vs0, 3(r3), 0 ; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt128@toc@ha ; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt128@toc@l -; CHECK-P10-BE-NEXT: stxvx vs0, r3, r4 +; CHECK-P10-BE-NEXT: pstxv vs0, 3(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-PREP10-LABEL: testGlob128PtrPlus3: @@ -1036,12 +1071,11 @@ ; CHECK-P10-BE-LABEL: testGlob128PtrPlus4: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd128@toc@ha -; CHECK-P10-BE-NEXT: li r4, 4 ; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd128@toc@l -; CHECK-P10-BE-NEXT: lxvx vs0, r3, r4 +; CHECK-P10-BE-NEXT: plxv vs0, 4(r3), 0 ; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt128@toc@ha ; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt128@toc@l -; CHECK-P10-BE-NEXT: stxvx vs0, r3, r4 +; CHECK-P10-BE-NEXT: pstxv vs0, 4(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-PREP10-LABEL: testGlob128PtrPlus4: diff --git a/llvm/test/CodeGen/PowerPC/int128_ldst.ll b/llvm/test/CodeGen/PowerPC/int128_ldst.ll --- a/llvm/test/CodeGen/PowerPC/int128_ldst.ll +++ b/llvm/test/CodeGen/PowerPC/int128_ldst.ll @@ -36,10 +36,8 @@ define dso_local i128 @ld_unalign16___int128___int128(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_unalign16___int128___int128: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: li r4, 1 -; CHECK-P10-NEXT: ldx r5, r3, r4 -; CHECK-P10-NEXT: li r4, 9 -; CHECK-P10-NEXT: ldx r4, r3, r4 +; CHECK-P10-NEXT: pld r5, 1(r3), 0 +; CHECK-P10-NEXT: pld r4, 9(r3), 0 ; CHECK-P10-NEXT: mr r3, r5 ; CHECK-P10-NEXT: blr ; @@ -258,10 +256,8 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign16___int128___int128: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r4, r3, 0, 51 -; CHECK-P10-NEXT: li r3, 6 -; CHECK-P10-NEXT: li r5, 14 -; CHECK-P10-NEXT: ldx r3, r4, r3 -; CHECK-P10-NEXT: ldx r4, r4, r5 +; CHECK-P10-NEXT: pld r3, 6(r4), 0 +; CHECK-P10-NEXT: pld r4, 14(r4), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_unalign16___int128___int128: @@ -326,10 +322,8 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign32___int128___int128: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r4, r3, 0, 43 -; CHECK-P10-NEXT: pli r3, 99999 -; CHECK-P10-NEXT: pli r5, 100007 -; CHECK-P10-NEXT: ldx r3, r4, r3 -; CHECK-P10-NEXT: ldx r4, r4, r5 +; CHECK-P10-NEXT: pld r3, 99999(r4), 0 +; CHECK-P10-NEXT: pld r4, 100007(r4), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_unalign32___int128___int128: @@ -364,11 +358,9 @@ ; CHECK-P10-LABEL: ld_disjoint_align32___int128___int128: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 -; CHECK-P10-NEXT: pli r5, 999990008 ; CHECK-P10-NEXT: and r4, r3, r4 -; CHECK-P10-NEXT: pli r3, 999990000 -; CHECK-P10-NEXT: ldx r3, r4, r3 -; CHECK-P10-NEXT: ldx r4, r4, r5 +; CHECK-P10-NEXT: pld r3, 999990000(r4), 0 +; CHECK-P10-NEXT: pld r4, 999990008(r4), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_disjoint_align32___int128___int128: @@ -682,10 +674,8 @@ define dso_local void @st_unalign16__int128___int128(i8* nocapture %ptr, i128 %str) { ; CHECK-P10-LABEL: st_unalign16__int128___int128: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: li r6, 9 -; CHECK-P10-NEXT: stdx r5, r3, r6 -; CHECK-P10-NEXT: li r5, 1 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r5, 9(r3), 0 +; CHECK-P10-NEXT: pstd r4, 1(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_unalign16__int128___int128: @@ -891,10 +881,8 @@ ; CHECK-P10-LABEL: st_disjoint_unalign16__int128___int128: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 -; CHECK-P10-NEXT: li r6, 14 -; CHECK-P10-NEXT: stdx r5, r3, r6 -; CHECK-P10-NEXT: li r5, 6 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r5, 14(r3), 0 +; CHECK-P10-NEXT: pstd r4, 6(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_unalign16__int128___int128: @@ -959,10 +947,8 @@ ; CHECK-P10-LABEL: st_disjoint_unalign32__int128___int128: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r6, 100007 -; CHECK-P10-NEXT: stdx r5, r3, r6 -; CHECK-P10-NEXT: pli r5, 99999 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r5, 100007(r3), 0 +; CHECK-P10-NEXT: pstd r4, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_unalign32__int128___int128: @@ -998,10 +984,8 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r6, -15264 ; CHECK-P10-NEXT: and r3, r3, r6 -; CHECK-P10-NEXT: pli r6, 999990008 -; CHECK-P10-NEXT: stdx r5, r3, r6 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r5, 999990008(r3), 0 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32__int128___int128: diff --git a/llvm/test/CodeGen/PowerPC/mma-acc-memops.ll b/llvm/test/CodeGen/PowerPC/mma-acc-memops.ll --- a/llvm/test/CodeGen/PowerPC/mma-acc-memops.ll +++ b/llvm/test/CodeGen/PowerPC/mma-acc-memops.ll @@ -102,23 +102,15 @@ ; BE-PAIRED-LABEL: testUnalignedLdSt: ; BE-PAIRED: # %bb.0: # %entry ; BE-PAIRED-NEXT: addis r3, r2, f@toc@ha -; BE-PAIRED-NEXT: li r4, 11 ; BE-PAIRED-NEXT: addi r3, r3, f@toc@l -; BE-PAIRED-NEXT: lxvx vs0, r3, r4 -; BE-PAIRED-NEXT: li r4, 27 -; BE-PAIRED-NEXT: lxvx vs1, r3, r4 -; BE-PAIRED-NEXT: li r4, 43 -; BE-PAIRED-NEXT: lxvx vs2, r3, r4 -; BE-PAIRED-NEXT: li r4, 59 -; BE-PAIRED-NEXT: lxvx vs3, r3, r4 -; BE-PAIRED-NEXT: li r4, 35 -; BE-PAIRED-NEXT: stxvx vs1, r3, r4 -; BE-PAIRED-NEXT: li r4, 19 -; BE-PAIRED-NEXT: stxvx vs0, r3, r4 -; BE-PAIRED-NEXT: li r4, 67 -; BE-PAIRED-NEXT: stxvx vs3, r3, r4 -; BE-PAIRED-NEXT: li r4, 51 -; BE-PAIRED-NEXT: stxvx vs2, r3, r4 +; BE-PAIRED-NEXT: plxv vs1, 27(r3), 0 +; BE-PAIRED-NEXT: plxv vs0, 11(r3), 0 +; BE-PAIRED-NEXT: plxv vs3, 59(r3), 0 +; BE-PAIRED-NEXT: plxv vs2, 43(r3), 0 +; BE-PAIRED-NEXT: pstxv vs1, 35(r3), 0 +; BE-PAIRED-NEXT: pstxv vs0, 19(r3), 0 +; BE-PAIRED-NEXT: pstxv vs3, 67(r3), 0 +; BE-PAIRED-NEXT: pstxv vs2, 51(r3), 0 ; BE-PAIRED-NEXT: blr entry: %0 = bitcast <512 x i1>* @f to i8* @@ -204,15 +196,11 @@ ; BE-PAIRED-LABEL: testUnalignedLdStPair: ; BE-PAIRED: # %bb.0: # %entry ; BE-PAIRED-NEXT: addis r3, r2, g@toc@ha -; BE-PAIRED-NEXT: li r4, 11 ; BE-PAIRED-NEXT: addi r3, r3, g@toc@l -; BE-PAIRED-NEXT: lxvx vs0, r3, r4 -; BE-PAIRED-NEXT: li r4, 27 -; BE-PAIRED-NEXT: lxvx vs1, r3, r4 -; BE-PAIRED-NEXT: li r4, 35 -; BE-PAIRED-NEXT: stxvx vs1, r3, r4 -; BE-PAIRED-NEXT: li r4, 19 -; BE-PAIRED-NEXT: stxvx vs0, r3, r4 +; BE-PAIRED-NEXT: plxv vs1, 27(r3), 0 +; BE-PAIRED-NEXT: plxv vs0, 11(r3), 0 +; BE-PAIRED-NEXT: pstxv vs1, 35(r3), 0 +; BE-PAIRED-NEXT: pstxv vs0, 19(r3), 0 ; BE-PAIRED-NEXT: blr entry: %0 = bitcast <256 x i1>* @g to i8* diff --git a/llvm/test/CodeGen/PowerPC/mma-intrinsics.ll b/llvm/test/CodeGen/PowerPC/mma-intrinsics.ll --- a/llvm/test/CodeGen/PowerPC/mma-intrinsics.ll +++ b/llvm/test/CodeGen/PowerPC/mma-intrinsics.ll @@ -634,8 +634,7 @@ ; CHECK-NEXT: lxv vs0, 48(r3) ; CHECK-NEXT: lxv vs3, 0(r3) ; CHECK-NEXT: lxv vs2, 16(r3) -; CHECK-NEXT: li r3, 8 -; CHECK-NEXT: lxvpx vsp4, r4, r3 +; CHECK-NEXT: plxvp vsp4, 8(r4), 0 ; CHECK-NEXT: xxmtacc acc0 ; CHECK-NEXT: pmxvf64gernn acc0, vsp4, v2, 0, 0 ; CHECK-NEXT: xxmfacc acc0 @@ -651,8 +650,7 @@ ; CHECK-BE-NEXT: lxv vs0, 0(r3) ; CHECK-BE-NEXT: lxv vs3, 48(r3) ; CHECK-BE-NEXT: lxv vs2, 32(r3) -; CHECK-BE-NEXT: li r3, 8 -; CHECK-BE-NEXT: lxvpx vsp4, r4, r3 +; CHECK-BE-NEXT: plxvp vsp4, 8(r4), 0 ; CHECK-BE-NEXT: xxmtacc acc0 ; CHECK-BE-NEXT: pmxvf64gernn acc0, vsp4, v2, 0, 0 ; CHECK-BE-NEXT: xxmfacc acc0 diff --git a/llvm/test/CodeGen/PowerPC/paired-vector-intrinsics.ll b/llvm/test/CodeGen/PowerPC/paired-vector-intrinsics.ll --- a/llvm/test/CodeGen/PowerPC/paired-vector-intrinsics.ll +++ b/llvm/test/CodeGen/PowerPC/paired-vector-intrinsics.ll @@ -167,30 +167,26 @@ define void @test_ldst_3(<256 x i1>* %vpp, <256 x i1>* %vp2) { ; CHECK-LABEL: test_ldst_3: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: li r5, 18 -; CHECK-NEXT: lxvpx vsp0, r3, r5 -; CHECK-NEXT: stxvpx vsp0, r4, r5 +; CHECK-NEXT: plxvp vsp0, 18(r3), 0 +; CHECK-NEXT: pstxvp vsp0, 18(r4), 0 ; CHECK-NEXT: blr ; ; CHECK-NOMMA-LABEL: test_ldst_3: ; CHECK-NOMMA: # %bb.0: # %entry -; CHECK-NOMMA-NEXT: li r5, 18 -; CHECK-NOMMA-NEXT: lxvpx vsp0, r3, r5 -; CHECK-NOMMA-NEXT: stxvpx vsp0, r4, r5 +; CHECK-NOMMA-NEXT: plxvp vsp0, 18(r3), 0 +; CHECK-NOMMA-NEXT: pstxvp vsp0, 18(r4), 0 ; CHECK-NOMMA-NEXT: blr ; ; CHECK-BE-LABEL: test_ldst_3: ; CHECK-BE: # %bb.0: # %entry -; CHECK-BE-NEXT: li r5, 18 -; CHECK-BE-NEXT: lxvpx vsp0, r3, r5 -; CHECK-BE-NEXT: stxvpx vsp0, r4, r5 +; CHECK-BE-NEXT: plxvp vsp0, 18(r3), 0 +; CHECK-BE-NEXT: pstxvp vsp0, 18(r4), 0 ; CHECK-BE-NEXT: blr ; ; CHECK-BE-NOMMA-LABEL: test_ldst_3: ; CHECK-BE-NOMMA: # %bb.0: # %entry -; CHECK-BE-NOMMA-NEXT: li r5, 18 -; CHECK-BE-NOMMA-NEXT: lxvpx vsp0, r3, r5 -; CHECK-BE-NOMMA-NEXT: stxvpx vsp0, r4, r5 +; CHECK-BE-NOMMA-NEXT: plxvp vsp0, 18(r3), 0 +; CHECK-BE-NOMMA-NEXT: pstxvp vsp0, 18(r4), 0 ; CHECK-BE-NOMMA-NEXT: blr entry: %0 = bitcast <256 x i1>* %vpp to i8* @@ -205,30 +201,26 @@ define void @test_ldst_4(<256 x i1>* %vpp, <256 x i1>* %vp2) { ; CHECK-LABEL: test_ldst_4: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: li r5, 1 -; CHECK-NEXT: lxvpx vsp0, r3, r5 -; CHECK-NEXT: stxvpx vsp0, r4, r5 +; CHECK-NEXT: plxvp vsp0, 1(r3), 0 +; CHECK-NEXT: pstxvp vsp0, 1(r4), 0 ; CHECK-NEXT: blr ; ; CHECK-NOMMA-LABEL: test_ldst_4: ; CHECK-NOMMA: # %bb.0: # %entry -; CHECK-NOMMA-NEXT: li r5, 1 -; CHECK-NOMMA-NEXT: lxvpx vsp0, r3, r5 -; CHECK-NOMMA-NEXT: stxvpx vsp0, r4, r5 +; CHECK-NOMMA-NEXT: plxvp vsp0, 1(r3), 0 +; CHECK-NOMMA-NEXT: pstxvp vsp0, 1(r4), 0 ; CHECK-NOMMA-NEXT: blr ; ; CHECK-BE-LABEL: test_ldst_4: ; CHECK-BE: # %bb.0: # %entry -; CHECK-BE-NEXT: li r5, 1 -; CHECK-BE-NEXT: lxvpx vsp0, r3, r5 -; CHECK-BE-NEXT: stxvpx vsp0, r4, r5 +; CHECK-BE-NEXT: plxvp vsp0, 1(r3), 0 +; CHECK-BE-NEXT: pstxvp vsp0, 1(r4), 0 ; CHECK-BE-NEXT: blr ; ; CHECK-BE-NOMMA-LABEL: test_ldst_4: ; CHECK-BE-NOMMA: # %bb.0: # %entry -; CHECK-BE-NOMMA-NEXT: li r5, 1 -; CHECK-BE-NOMMA-NEXT: lxvpx vsp0, r3, r5 -; CHECK-BE-NOMMA-NEXT: stxvpx vsp0, r4, r5 +; CHECK-BE-NOMMA-NEXT: plxvp vsp0, 1(r3), 0 +; CHECK-BE-NOMMA-NEXT: pstxvp vsp0, 1(r4), 0 ; CHECK-BE-NOMMA-NEXT: blr entry: %0 = bitcast <256 x i1>* %vpp to i8* @@ -243,30 +235,26 @@ define void @test_ldst_5(<256 x i1>* %vpp, <256 x i1>* %vp2) { ; CHECK-LABEL: test_ldst_5: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: li r5, 42 -; CHECK-NEXT: lxvpx vsp0, r3, r5 -; CHECK-NEXT: stxvpx vsp0, r4, r5 +; CHECK-NEXT: plxvp vsp0, 42(r3), 0 +; CHECK-NEXT: pstxvp vsp0, 42(r4), 0 ; CHECK-NEXT: blr ; ; CHECK-NOMMA-LABEL: test_ldst_5: ; CHECK-NOMMA: # %bb.0: # %entry -; CHECK-NOMMA-NEXT: li r5, 42 -; CHECK-NOMMA-NEXT: lxvpx vsp0, r3, r5 -; CHECK-NOMMA-NEXT: stxvpx vsp0, r4, r5 +; CHECK-NOMMA-NEXT: plxvp vsp0, 42(r3), 0 +; CHECK-NOMMA-NEXT: pstxvp vsp0, 42(r4), 0 ; CHECK-NOMMA-NEXT: blr ; ; CHECK-BE-LABEL: test_ldst_5: ; CHECK-BE: # %bb.0: # %entry -; CHECK-BE-NEXT: li r5, 42 -; CHECK-BE-NEXT: lxvpx vsp0, r3, r5 -; CHECK-BE-NEXT: stxvpx vsp0, r4, r5 +; CHECK-BE-NEXT: plxvp vsp0, 42(r3), 0 +; CHECK-BE-NEXT: pstxvp vsp0, 42(r4), 0 ; CHECK-BE-NEXT: blr ; ; CHECK-BE-NOMMA-LABEL: test_ldst_5: ; CHECK-BE-NOMMA: # %bb.0: # %entry -; CHECK-BE-NOMMA-NEXT: li r5, 42 -; CHECK-BE-NOMMA-NEXT: lxvpx vsp0, r3, r5 -; CHECK-BE-NOMMA-NEXT: stxvpx vsp0, r4, r5 +; CHECK-BE-NOMMA-NEXT: plxvp vsp0, 42(r3), 0 +; CHECK-BE-NOMMA-NEXT: pstxvp vsp0, 42(r4), 0 ; CHECK-BE-NOMMA-NEXT: blr entry: %0 = bitcast <256 x i1>* %vpp to i8* @@ -313,41 +301,77 @@ } define void @test_ldst_7(<256 x i1>* %vpp, <256 x i1>* %vp2) { -; FIXME: A prefixed load (plxvp) is expected here as the offset in this -; test case is a constant that fits within 34-bits. ; CHECK-LABEL: test_ldst_7: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: pli r5, 32799 +; CHECK-NEXT: plxvp vsp0, 32799(r3), 0 +; CHECK-NEXT: pstxvp vsp0, 32799(r4), 0 +; CHECK-NEXT: blr +; +; CHECK-NOMMA-LABEL: test_ldst_7: +; CHECK-NOMMA: # %bb.0: # %entry +; CHECK-NOMMA-NEXT: plxvp vsp0, 32799(r3), 0 +; CHECK-NOMMA-NEXT: pstxvp vsp0, 32799(r4), 0 +; CHECK-NOMMA-NEXT: blr +; +; CHECK-BE-LABEL: test_ldst_7: +; CHECK-BE: # %bb.0: # %entry +; CHECK-BE-NEXT: plxvp vsp0, 32799(r3), 0 +; CHECK-BE-NEXT: pstxvp vsp0, 32799(r4), 0 +; CHECK-BE-NEXT: blr +; +; CHECK-BE-NOMMA-LABEL: test_ldst_7: +; CHECK-BE-NOMMA: # %bb.0: # %entry +; CHECK-BE-NOMMA-NEXT: plxvp vsp0, 32799(r3), 0 +; CHECK-BE-NOMMA-NEXT: pstxvp vsp0, 32799(r4), 0 +; CHECK-BE-NOMMA-NEXT: blr +entry: + %0 = bitcast <256 x i1>* %vpp to i8* + %1 = getelementptr i8, i8* %0, i64 32799 + %2 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(i8* %1) + %3 = bitcast <256 x i1>* %vp2 to i8* + %4 = getelementptr i8, i8* %3, i64 32799 + tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %2, i8* %4) + ret void +} + +define void @test_ldst_8(<256 x i1>* %vpp, <256 x i1>* %vp2) { +; CHECK-LABEL: test_ldst_8: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pli r5, -7179869185 +; CHECK-NEXT: rldic r5, r5, 0, 30 ; CHECK-NEXT: lxvpx vsp0, r3, r5 ; CHECK-NEXT: stxvpx vsp0, r4, r5 ; CHECK-NEXT: blr ; -; CHECK-NOMMA-LABEL: test_ldst_7: +; CHECK-NOMMA-LABEL: test_ldst_8: ; CHECK-NOMMA: # %bb.0: # %entry -; CHECK-NOMMA-NEXT: pli r5, 32799 +; CHECK-NOMMA-NEXT: pli r5, -7179869185 +; CHECK-NOMMA-NEXT: rldic r5, r5, 0, 30 ; CHECK-NOMMA-NEXT: lxvpx vsp0, r3, r5 ; CHECK-NOMMA-NEXT: stxvpx vsp0, r4, r5 ; CHECK-NOMMA-NEXT: blr ; -; CHECK-BE-LABEL: test_ldst_7: +; CHECK-BE-LABEL: test_ldst_8: ; CHECK-BE: # %bb.0: # %entry -; CHECK-BE-NEXT: pli r5, 32799 +; CHECK-BE-NEXT: pli r5, -7179869185 +; CHECK-BE-NEXT: rldic r5, r5, 0, 30 ; CHECK-BE-NEXT: lxvpx vsp0, r3, r5 ; CHECK-BE-NEXT: stxvpx vsp0, r4, r5 ; CHECK-BE-NEXT: blr ; -; CHECK-BE-NOMMA-LABEL: test_ldst_7: +; CHECK-BE-NOMMA-LABEL: test_ldst_8: ; CHECK-BE-NOMMA: # %bb.0: # %entry -; CHECK-BE-NOMMA-NEXT: pli r5, 32799 +; CHECK-BE-NOMMA-NEXT: pli r5, -7179869185 +; CHECK-BE-NOMMA-NEXT: rldic r5, r5, 0, 30 ; CHECK-BE-NOMMA-NEXT: lxvpx vsp0, r3, r5 ; CHECK-BE-NOMMA-NEXT: stxvpx vsp0, r4, r5 ; CHECK-BE-NOMMA-NEXT: blr entry: %0 = bitcast <256 x i1>* %vpp to i8* - %1 = getelementptr i8, i8* %0, i64 32799 + %1 = getelementptr i8, i8* %0, i64 9999999999 %2 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(i8* %1) %3 = bitcast <256 x i1>* %vp2 to i8* - %4 = getelementptr i8, i8* %3, i64 32799 + %4 = getelementptr i8, i8* %3, i64 9999999999 tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %2, i8* %4) ret void } diff --git a/llvm/test/CodeGen/PowerPC/pcrel_ldst.ll b/llvm/test/CodeGen/PowerPC/pcrel_ldst.ll --- a/llvm/test/CodeGen/PowerPC/pcrel_ldst.ll +++ b/llvm/test/CodeGen/PowerPC/pcrel_ldst.ll @@ -1038,12 +1038,11 @@ ; CHECK-P10-BE-LABEL: testGlob7PtrPlus3: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd7@toc@ha -; CHECK-P10-BE-NEXT: li r4, 3 -; CHECK-P10-BE-NEXT: addis r5, r2, GlobSt7@toc@ha +; CHECK-P10-BE-NEXT: addis r4, r2, GlobSt7@toc@ha ; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd7@toc@l -; CHECK-P10-BE-NEXT: addi r5, r5, GlobSt7@toc@l -; CHECK-P10-BE-NEXT: ldx r3, r3, r4 -; CHECK-P10-BE-NEXT: stdx r3, r5, r4 +; CHECK-P10-BE-NEXT: addi r4, r4, GlobSt7@toc@l +; CHECK-P10-BE-NEXT: pld r3, 3(r3), 0 +; CHECK-P10-BE-NEXT: pstd r3, 3(r4), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-LABEL: testGlob7PtrPlus3: @@ -1224,12 +1223,11 @@ ; CHECK-P10-BE-LABEL: testGlob8PtrPlus3: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd8@toc@ha -; CHECK-P10-BE-NEXT: li r4, 3 -; CHECK-P10-BE-NEXT: addis r5, r2, GlobSt8@toc@ha +; CHECK-P10-BE-NEXT: addis r4, r2, GlobSt8@toc@ha ; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd8@toc@l -; CHECK-P10-BE-NEXT: addi r5, r5, GlobSt8@toc@l -; CHECK-P10-BE-NEXT: ldx r3, r3, r4 -; CHECK-P10-BE-NEXT: stdx r3, r5, r4 +; CHECK-P10-BE-NEXT: addi r4, r4, GlobSt8@toc@l +; CHECK-P10-BE-NEXT: pld r3, 3(r3), 0 +; CHECK-P10-BE-NEXT: pstd r3, 3(r4), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-LABEL: testGlob8PtrPlus3: @@ -1566,12 +1564,11 @@ ; CHECK-P10-BE-LABEL: testGlob10PtrPlus3: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd10@toc@ha -; CHECK-P10-BE-NEXT: li r4, 3 -; CHECK-P10-BE-NEXT: addis r5, r2, GlobSt10@toc@ha +; CHECK-P10-BE-NEXT: addis r4, r2, GlobSt10@toc@ha ; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd10@toc@l -; CHECK-P10-BE-NEXT: addi r5, r5, GlobSt10@toc@l -; CHECK-P10-BE-NEXT: ldx r3, r3, r4 -; CHECK-P10-BE-NEXT: stdx r3, r5, r4 +; CHECK-P10-BE-NEXT: addi r4, r4, GlobSt10@toc@l +; CHECK-P10-BE-NEXT: pld r3, 3(r3), 0 +; CHECK-P10-BE-NEXT: pstd r3, 3(r4), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-LABEL: testGlob10PtrPlus3: @@ -1768,12 +1765,11 @@ ; CHECK-P10-BE-LABEL: testGlob11PtrPlus3: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd11@toc@ha -; CHECK-P10-BE-NEXT: li r4, 3 ; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd11@toc@l -; CHECK-P10-BE-NEXT: lxvx vs0, r3, r4 +; CHECK-P10-BE-NEXT: plxv vs0, 3(r3), 0 ; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt11@toc@ha ; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt11@toc@l -; CHECK-P10-BE-NEXT: stxvx vs0, r3, r4 +; CHECK-P10-BE-NEXT: pstxv vs0, 3(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LABEL: testGlob11PtrPlus3: @@ -1825,12 +1821,11 @@ ; CHECK-P10-BE-LABEL: testGlob11PtrPlus4: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd11@toc@ha -; CHECK-P10-BE-NEXT: li r4, 4 ; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd11@toc@l -; CHECK-P10-BE-NEXT: lxvx vs0, r3, r4 +; CHECK-P10-BE-NEXT: plxv vs0, 4(r3), 0 ; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt11@toc@ha ; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt11@toc@l -; CHECK-P10-BE-NEXT: stxvx vs0, r3, r4 +; CHECK-P10-BE-NEXT: pstxv vs0, 4(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LABEL: testGlob11PtrPlus4: @@ -2052,12 +2047,11 @@ ; CHECK-P10-BE-LABEL: testGlob12PtrPlus3: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd12@toc@ha -; CHECK-P10-BE-NEXT: li r4, 3 ; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd12@toc@l -; CHECK-P10-BE-NEXT: lxvx vs0, r3, r4 +; CHECK-P10-BE-NEXT: plxv vs0, 3(r3), 0 ; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt12@toc@ha ; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt12@toc@l -; CHECK-P10-BE-NEXT: stxvx vs0, r3, r4 +; CHECK-P10-BE-NEXT: pstxv vs0, 3(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LABEL: testGlob12PtrPlus3: @@ -2109,12 +2103,11 @@ ; CHECK-P10-BE-LABEL: testGlob12PtrPlus4: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd12@toc@ha -; CHECK-P10-BE-NEXT: li r4, 4 ; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd12@toc@l -; CHECK-P10-BE-NEXT: lxvx vs0, r3, r4 +; CHECK-P10-BE-NEXT: plxv vs0, 4(r3), 0 ; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt12@toc@ha ; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt12@toc@l -; CHECK-P10-BE-NEXT: stxvx vs0, r3, r4 +; CHECK-P10-BE-NEXT: pstxv vs0, 4(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LABEL: testGlob12PtrPlus4: diff --git a/llvm/test/CodeGen/PowerPC/prefixed-ld-st.ll b/llvm/test/CodeGen/PowerPC/prefixed-ld-st.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/prefixed-ld-st.ll @@ -0,0 +1,1093 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O3 \ +; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \ +; RUN: < %s | FileCheck %s +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O3 \ +; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \ +; RUN: < %s | FileCheck %s + +; i32 tests: loading, storing a non-constant address +define void @extload_store_i8_i32_add(i8* nocapture readonly %Ld, i8* nocapture %St) { +; CHECK-LABEL: extload_store_i8_i32_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plbz r3, 4294967297(r3), 0 +; CHECK-NEXT: pstb r3, 4294967297(r4), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %Ld, i64 4294967297 + %0 = load i8, i8* %add.ptr, align 1 + %add.ptr1 = getelementptr inbounds i8, i8* %St, i64 4294967297 + store i8 %0, i8* %add.ptr1, align 1 + ret void +} + +define void @zextload_store_i8_i32_add(i8* nocapture readonly %Ld, i32* nocapture %St) { +; CHECK-LABEL: zextload_store_i8_i32_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plbz r3, 4294967297(r3), 0 +; CHECK-NEXT: pstw r3, 4294967297(r4), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %Ld, i64 4294967297 + %0 = load i8, i8* %add.ptr, align 1 + %conv = zext i8 %0 to i32 + %1 = bitcast i32* %St to i8* + %add.ptr1 = getelementptr inbounds i8, i8* %1, i64 4294967297 + %2 = bitcast i8* %add.ptr1 to i32* + store i32 %conv, i32* %2, align 4 + ret void +} + +define void @extload_store_i16_i32_add(i16* nocapture readonly %Ld, i16* nocapture %St) { +; CHECK-LABEL: extload_store_i16_i32_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plhz r3, 4294967297(r3), 0 +; CHECK-NEXT: psth r3, 4294967297(r4), 0 +; CHECK-NEXT: blr +entry: + %0 = bitcast i16* %Ld to i8* + %add.ptr = getelementptr inbounds i8, i8* %0, i64 4294967297 + %1 = bitcast i8* %add.ptr to i16* + %2 = load i16, i16* %1, align 2 + %3 = bitcast i16* %St to i8* + %add.ptr1 = getelementptr inbounds i8, i8* %3, i64 4294967297 + %4 = bitcast i8* %add.ptr1 to i16* + store i16 %2, i16* %4, align 2 + ret void +} + +define void @zextload_store_i16_i32_add(i16* nocapture readonly %Ld, i32* nocapture %St) { +; CHECK-LABEL: zextload_store_i16_i32_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plhz r3, 4294967297(r3), 0 +; CHECK-NEXT: pstw r3, 4294967297(r4), 0 +; CHECK-NEXT: blr +entry: + %0 = bitcast i16* %Ld to i8* + %add.ptr = getelementptr inbounds i8, i8* %0, i64 4294967297 + %1 = bitcast i8* %add.ptr to i16* + %2 = load i16, i16* %1, align 2 + %conv = zext i16 %2 to i32 + %3 = bitcast i32* %St to i8* + %add.ptr1 = getelementptr inbounds i8, i8* %3, i64 4294967297 + %4 = bitcast i8* %add.ptr1 to i32* + store i32 %conv, i32* %4, align 4 + ret void +} + +define void @sextload_store_i16_i32_add(i16* nocapture readonly %Ld, i32* nocapture %St) { +; CHECK-LABEL: sextload_store_i16_i32_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plha r3, 4294967297(r3), 0 +; CHECK-NEXT: pstw r3, 4294967297(r4), 0 +; CHECK-NEXT: blr +entry: + %0 = bitcast i16* %Ld to i8* + %add.ptr = getelementptr inbounds i8, i8* %0, i64 4294967297 + %1 = bitcast i8* %add.ptr to i16* + %2 = load i16, i16* %1, align 2 + %conv = sext i16 %2 to i32 + %3 = bitcast i32* %St to i8* + %add.ptr1 = getelementptr inbounds i8, i8* %3, i64 4294967297 + %4 = bitcast i8* %add.ptr1 to i32* + store i32 %conv, i32* %4, align 4 + ret void +} + +define void @load_store_i32_add(i32* nocapture readonly %Ld, i32* nocapture %St) { +; CHECK-LABEL: load_store_i32_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plwz r3, 4294967297(r3), 0 +; CHECK-NEXT: pstw r3, 4294967297(r4), 0 +; CHECK-NEXT: blr +entry: + %0 = bitcast i32* %Ld to i8* + %add.ptr = getelementptr inbounds i8, i8* %0, i64 4294967297 + %1 = bitcast i8* %add.ptr to i32* + %2 = load i32, i32* %1, align 4 + %3 = bitcast i32* %St to i8* + %add.ptr1 = getelementptr inbounds i8, i8* %3, i64 4294967297 + %4 = bitcast i8* %add.ptr1 to i32* + store i32 %2, i32* %4, align 4 + ret void +} + +; i64 tests: loading, storing a non-constant address +define signext i8 @extload_i8_i64_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: extload_i8_i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plbz r3, 4294967297(r3), 0 +; CHECK-NEXT: extsb r3, r3 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = load i8, i8* %add.ptr, align 1 + ret i8 %0 +} + +define zeroext i8 @zextload_i8_i64_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: zextload_i8_i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plbz r3, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = load i8, i8* %add.ptr, align 1 + ret i8 %0 +} + +define i16 @extload_i16_i64_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: extload_i16_i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plhz r3, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i16* + %1 = load i16, i16* %0, align 2 + ret i16 %1 +} + +define zeroext i16 @zextload_i16_i64_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: zextload_i16_i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plhz r3, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i16* + %1 = load i16, i16* %0, align 2 + ret i16 %1 +} + +define signext i16 @sextload_i16_i64_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: sextload_i16_i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plha r3, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i16* + %1 = load i16, i16* %0, align 2 + ret i16 %1 +} + +define i32 @extload_i32_i64_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: extload_i32_i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plwz r3, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i32* + %1 = load i32, i32* %0, align 4 + ret i32 %1 +} + +define zeroext i32 @zextload_i32_i64_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: zextload_i32_i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plwz r3, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i32* + %1 = load i32, i32* %0, align 4 + ret i32 %1 +} + +define signext i32 @sextload_i32_i64_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: sextload_i32_i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plwa r3, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i32* + %1 = load i32, i32* %0, align 4 + ret i32 %1 +} + +define i64 @load_i64_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: load_i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pld r3, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i64* + %1 = load i64, i64* %0, align 8 + ret i64 %1 +} + +define void @store_i8_i64_add(i8* nocapture %ptr, i8 zeroext %str) { +; CHECK-LABEL: store_i8_i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstb r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + store i8 %str, i8* %add.ptr, align 1 + ret void +} + +define void @store_i16_i64_add(i8* nocapture %ptr, i16 zeroext %str) { +; CHECK-LABEL: store_i16_i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: psth r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i16* + store i16 %str, i16* %0, align 2 + ret void +} + +define void @store_i32_i64_add(i8* nocapture %ptr, i32 zeroext %str) { +; CHECK-LABEL: store_i32_i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstw r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i32* + store i32 %str, i32* %0, align 4 + ret void +} + +define void @store_i64_add(i8* nocapture %ptr, i64 %str) { +; CHECK-LABEL: store_i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstd r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i64* + store i64 %str, i64* %0, align 8 + ret void +} + +; float, double, f128: loading, storing a non-constant address +define float @load_float_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: load_float_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plfs f1, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to float* + %1 = load float, float* %0, align 4 + ret float %1 +} + +define double @extload_float_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: extload_float_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plfs f1, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to float* + %1 = load float, float* %0, align 4 + %conv = fpext float %1 to double + ret double %conv +} + +define double @load_double_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: load_double_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plfd f1, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to double* + %1 = load double, double* %0, align 8 + ret double %1 +} + +define void @store_float_add(i8* nocapture %ptr, float %str) { +; CHECK-LABEL: store_float_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstfs f1, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to float* + store float %str, float* %0, align 4 + ret void +} + +define void @store_double_add(i8* nocapture %ptr, double %str) { +; CHECK-LABEL: store_double_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstfd f1, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to double* + store double %str, double* %0, align 8 + ret void +} + +define fp128 @load_f128_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: load_f128_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plxv v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to fp128* + %1 = load fp128, fp128* %0, align 16 + ret fp128 %1 +} + +define void @store_f128_add(i8* nocapture %ptr, fp128 %str) { +; CHECK-LABEL: store_f128_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstxv v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to fp128* + store fp128 %str, fp128* %0, align 16 + ret void +} + +define void @store_double_fp_to_uint_add(i8* nocapture %ptr, double %str) { +; CHECK-LABEL: store_double_fp_to_uint_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xscvdpuxds v2, f1 +; CHECK-NEXT: pstxsd v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %conv = fptoui double %str to i64 + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i64* + store i64 %conv, i64* %0, align 8 + ret void +} + +define void @store_double_fp_to_int_add(i8* nocapture %ptr, double %str) { +; CHECK-LABEL: store_double_fp_to_int_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xscvdpsxds v2, f1 +; CHECK-NEXT: pstxsd v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %conv = fptosi double %str to i64 + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i64* + store i64 %conv, i64* %0, align 8 + ret void +} + +define void @store_f128_fp_to_uint_add(i8* nocapture %ptr, fp128 %str) { +; CHECK-LABEL: store_f128_fp_to_uint_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xscvqpudz v2, v2 +; CHECK-NEXT: pstxsd v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %conv = fptoui fp128 %str to i64 + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i64* + store i64 %conv, i64* %0, align 8 + ret void +} + +define void @store_f128_fp_to_int_add(i8* nocapture %ptr, fp128 %str) { +; CHECK-LABEL: store_f128_fp_to_int_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xscvqpsdz v2, v2 +; CHECK-NEXT: pstxsd v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %conv = fptosi fp128 %str to i64 + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i64* + store i64 %conv, i64* %0, align 8 + ret void +} + +; v4i32, v2i64, v4f32, v2f64: loading, storing a non-constant address +define <4 x i32> @load_v4i32_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: load_v4i32_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plxv v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to <4 x i32>* + %1 = load <4 x i32>, <4 x i32>* %0, align 16 + ret <4 x i32> %1 +} + +define void @store_v4i32_add(i8* nocapture %ptr, <4 x i32> %str) { +; CHECK-LABEL: store_v4i32_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstxv v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to <4 x i32>* + store <4 x i32> %str, <4 x i32>* %0, align 16 + ret void +} + +define <2 x i64> @load_v2i64_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: load_v2i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plxv v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to <2 x i64>* + %1 = load <2 x i64>, <2 x i64>* %0, align 16 + ret <2 x i64> %1 +} + +define void @store_v2i64_add(i8* nocapture %ptr, <2 x i64> %str) { +; CHECK-LABEL: store_v2i64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstxv v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to <2 x i64>* + store <2 x i64> %str, <2 x i64>* %0, align 16 + ret void +} + +define <4 x float> @load_v4f32_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: load_v4f32_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plxv v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to <4 x float>* + %1 = load <4 x float>, <4 x float>* %0, align 16 + ret <4 x float> %1 +} + +define void @store_v4f32_add(i8* nocapture %ptr, <4 x float> %str) { +; CHECK-LABEL: store_v4f32_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstxv v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to <4 x float>* + store <4 x float> %str, <4 x float>* %0, align 16 + ret void +} + +define <2 x double> @load_v2f64_add(i8* nocapture readonly %ptr) { +; CHECK-LABEL: load_v2f64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plxv v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to <2 x double>* + %1 = load <2 x double>, <2 x double>* %0, align 16 + ret <2 x double> %1 +} + +define void @store_v2f64_add(i8* nocapture %ptr, <2 x double> %str) { +; CHECK-LABEL: store_v2f64_add: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstxv v2, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to <2 x double>* + store <2 x double> %str, <2 x double>* %0, align 16 + ret void +} + +; Testing prefixed load/store intrinsics +define void @ld_st_intrinsics(<256 x i1>* %vpp, <256 x i1>* %vp2) { +; CHECK-LABEL: ld_st_intrinsics: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plxvp vsp0, 32799(r3), 0 +; CHECK-NEXT: pstxvp vsp0, 32799(r4), 0 +; CHECK-NEXT: blr +entry: + %0 = bitcast <256 x i1>* %vpp to i8* + %1 = getelementptr i8, i8* %0, i64 32799 + %2 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(i8* %1) + %3 = bitcast <256 x i1>* %vp2 to i8* + %4 = getelementptr i8, i8* %3, i64 32799 + tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %2, i8* %4) + ret void +} + +declare <256 x i1> @llvm.ppc.vsx.lxvp(i8*) #6 +declare void @llvm.ppc.vsx.stxvp(<256 x i1>, i8*) #7 + +; Atomic Loads and Stores +define zeroext i8 @atomic_load_i8(i8* nocapture readonly %ptr) { +; CHECK-LABEL: atomic_load_i8: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plbz r3, 4294967297(r3), 0 +; CHECK-NEXT: clrldi r3, r3, 56 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = load atomic i8, i8* %add.ptr monotonic, align 1 + ret i8 %0 +} + +define signext i16 @atomic_load_i16(i8* nocapture readonly %ptr) { +; CHECK-LABEL: atomic_load_i16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plhz r3, 4294967297(r3), 0 +; CHECK-NEXT: extsh r3, r3 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i16* + %1 = load atomic i16, i16* %0 monotonic, align 2 + ret i16 %1 +} + +define signext i32 @atomic_load_i32(i8* nocapture readonly %ptr) { +; CHECK-LABEL: atomic_load_i32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plwz r3, 4294967297(r3), 0 +; CHECK-NEXT: extsw r3, r3 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i32* + %1 = load atomic i32, i32* %0 monotonic, align 4 + ret i32 %1 +} + +define i64 @atomic_load_i64(i8* nocapture readonly %ptr) { +; CHECK-LABEL: atomic_load_i64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pld r3, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i64* + %1 = load atomic i64, i64* %0 monotonic, align 8 + ret i64 %1 +} + +define void @atomic_store_i8_i32(i8* nocapture %ptr, i8 zeroext %str) { +; CHECK-LABEL: atomic_store_i8_i32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstb r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + store atomic i8 %str, i8* %add.ptr monotonic, align 1 + ret void +} + +define void @atomic_store_i16_i32(i8* nocapture %ptr, i16 signext %str) { +; CHECK-LABEL: atomic_store_i16_i32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: psth r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i16* + store atomic i16 %str, i16* %0 monotonic, align 2 + ret void +} + +define void @atomic_store_i32_i32(i8* nocapture %ptr, i32 signext %str) { +; CHECK-LABEL: atomic_store_i32_i32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstw r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i32* + store atomic i32 %str, i32* %0 monotonic, align 4 + ret void +} + +define void @atomic_store_i64(i8* nocapture %ptr, i64 %str) { +; CHECK-LABEL: atomic_store_i64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstd r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 4294967297 + %0 = bitcast i8* %add.ptr to i64* + store atomic i64 %str, i64* %0 monotonic, align 8 + ret void +} + +; i32 tests: loading, storing a constant address +define void @extload_i8_i32_cst(i8* nocapture %St) { +; CHECK-LABEL: extload_i8_i32_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plbz r4, 4294967297(0), 0 +; CHECK-NEXT: pstb r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %0 = load i8, i8* inttoptr (i64 4294967297 to i8*), align 1 + %add.ptr = getelementptr inbounds i8, i8* %St, i64 4294967297 + store i8 %0, i8* %add.ptr, align 1 + ret void +} + +define void @store_i8_i32_cst(i8* nocapture readonly %Ld) { +; CHECK-LABEL: store_i8_i32_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plbz r3, 4294967297(r3), 0 +; CHECK-NEXT: pstb r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %add.ptr = getelementptr inbounds i8, i8* %Ld, i64 4294967297 + %0 = load i8, i8* %add.ptr, align 1 + store i8 %0, i8* inttoptr (i64 4294967297 to i8*), align 1 + ret void +} + +define void @zextload_i8_i32_cst(i32* nocapture %St) { +; CHECK-LABEL: zextload_i8_i32_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plbz r4, 4294967297(0), 0 +; CHECK-NEXT: pstw r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %0 = load i8, i8* inttoptr (i64 4294967297 to i8*), align 1 + %conv = zext i8 %0 to i32 + %1 = bitcast i32* %St to i8* + %add.ptr = getelementptr inbounds i8, i8* %1, i64 4294967297 + %2 = bitcast i8* %add.ptr to i32* + store i32 %conv, i32* %2, align 4 + ret void +} + +define void @extload_i16_i32_cst(i16* nocapture %St) { +; CHECK-LABEL: extload_i16_i32_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plhz r4, 4294967297(0), 0 +; CHECK-NEXT: psth r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %0 = load i16, i16* inttoptr (i64 4294967297 to i16*), align 2 + %1 = bitcast i16* %St to i8* + %add.ptr = getelementptr inbounds i8, i8* %1, i64 4294967297 + %2 = bitcast i8* %add.ptr to i16* + store i16 %0, i16* %2, align 2 + ret void +} + +define void @store_i16_i32_cst(i16* nocapture readonly %Ld) { +; CHECK-LABEL: store_i16_i32_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plhz r3, 4294967297(r3), 0 +; CHECK-NEXT: psth r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = bitcast i16* %Ld to i8* + %add.ptr = getelementptr inbounds i8, i8* %0, i64 4294967297 + %1 = bitcast i8* %add.ptr to i16* + %2 = load i16, i16* %1, align 2 + store i16 %2, i16* inttoptr (i64 4294967297 to i16*), align 2 + ret void +} + +define void @zextload_i16_i32_cst(i32* nocapture %St) { +; CHECK-LABEL: zextload_i16_i32_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plhz r4, 4294967297(0), 0 +; CHECK-NEXT: pstw r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %0 = load i16, i16* inttoptr (i64 4294967297 to i16*), align 2 + %conv = zext i16 %0 to i32 + %1 = bitcast i32* %St to i8* + %add.ptr = getelementptr inbounds i8, i8* %1, i64 4294967297 + %2 = bitcast i8* %add.ptr to i32* + store i32 %conv, i32* %2, align 4 + ret void +} + +define void @sextload_i16_i32_cst(i32* nocapture %St) { +; CHECK-LABEL: sextload_i16_i32_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plha r4, 4294967297(0), 0 +; CHECK-NEXT: pstw r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %0 = load i16, i16* inttoptr (i64 4294967297 to i16*), align 2 + %conv = sext i16 %0 to i32 + %1 = bitcast i32* %St to i8* + %add.ptr = getelementptr inbounds i8, i8* %1, i64 4294967297 + %2 = bitcast i8* %add.ptr to i32* + store i32 %conv, i32* %2, align 4 + ret void +} + +define void @load_i32_cst(i32* nocapture %St) { +; CHECK-LABEL: load_i32_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plwz r4, 4294967297(0), 0 +; CHECK-NEXT: pstw r4, 4294967297(r3), 0 +; CHECK-NEXT: blr +entry: + %0 = load i32, i32* inttoptr (i64 4294967297 to i32*), align 4 + %1 = bitcast i32* %St to i8* + %add.ptr = getelementptr inbounds i8, i8* %1, i64 4294967297 + %2 = bitcast i8* %add.ptr to i32* + store i32 %0, i32* %2, align 4 + ret void +} + +define void @store_i32_cst(i32* nocapture readonly %Ld) { +; CHECK-LABEL: store_i32_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plwz r3, 4294967297(r3), 0 +; CHECK-NEXT: pstw r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = bitcast i32* %Ld to i8* + %add.ptr = getelementptr inbounds i8, i8* %0, i64 4294967297 + %1 = bitcast i8* %add.ptr to i32* + %2 = load i32, i32* %1, align 4 + store i32 %2, i32* inttoptr (i64 4294967297 to i32*), align 4 + ret void +} + +; i64 tests: loading a constant address +define signext i8 @extload_i8_i64_cst() { +; CHECK-LABEL: extload_i8_i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plbz r3, 4294967297(0), 0 +; CHECK-NEXT: extsb r3, r3 +; CHECK-NEXT: blr +entry: + %0 = load i8, i8* inttoptr (i64 4294967297 to i8*), align 1 + ret i8 %0 +} + +define zeroext i8 @zextload_i8_i64_cst() { +; CHECK-LABEL: zextload_i8_i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plbz r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load i8, i8* inttoptr (i64 4294967297 to i8*), align 1 + ret i8 %0 +} + +define i16 @extload_i16_i64_cst() { +; CHECK-LABEL: extload_i16_i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plhz r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load i16, i16* inttoptr (i64 4294967297 to i16*), align 2 + ret i16 %0 +} + +define zeroext i16 @zextload_i16_i64_cst() { +; CHECK-LABEL: zextload_i16_i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plhz r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load i16, i16* inttoptr (i64 4294967297 to i16*), align 2 + ret i16 %0 +} + +define signext i16 @sextload_i16_i64_cst() { +; CHECK-LABEL: sextload_i16_i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plha r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load i16, i16* inttoptr (i64 4294967297 to i16*), align 2 + ret i16 %0 +} + +define i32 @extload_i32_i64_cst() { +; CHECK-LABEL: extload_i32_i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plwz r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load i32, i32* inttoptr (i64 4294967297 to i32*), align 4 + ret i32 %0 +} + +define zeroext i32 @zextload_i32_i64_cst() { +; CHECK-LABEL: zextload_i32_i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plwz r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load i32, i32* inttoptr (i64 4294967297 to i32*), align 4 + ret i32 %0 +} + +define signext i32 @sextload_i32_i64_cst() { +; CHECK-LABEL: sextload_i32_i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plwa r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load i32, i32* inttoptr (i64 4294967297 to i32*), align 4 + ret i32 %0 +} + +define i64 @load_i64_cst() { +; CHECK-LABEL: load_i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pld r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load i64, i64* inttoptr (i64 4294967297 to i64*), align 8 + ret i64 %0 +} + +define void @store_i8_i64_cst(i8 zeroext %str) { +; CHECK-LABEL: store_i8_i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstb r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + store i8 %str, i8* inttoptr (i64 4294967297 to i8*), align 1 + ret void +} + +define void @store_i16_i64_cst(i16 zeroext %str) { +; CHECK-LABEL: store_i16_i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: psth r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + store i16 %str, i16* inttoptr (i64 4294967297 to i16*), align 2 + ret void +} + +define void @store_i32_i64_cst(i32 zeroext %str) { +; CHECK-LABEL: store_i32_i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstw r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + store i32 %str, i32* inttoptr (i64 4294967297 to i32*), align 4 + ret void +} + +define void @store_i64_cst(i64 %str) { +; CHECK-LABEL: store_i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstd r3, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + store i64 %str, i64* inttoptr (i64 4294967297 to i64*), align 8 + ret void +} + +; float, double, f128: loading a constant address +define float @load_float_cst() { +; CHECK-LABEL: load_float_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plfs f1, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load float, float* inttoptr (i64 4294967297 to float*), align 4 + ret float %0 +} + +define double @extload_float_cst() { +; CHECK-LABEL: extload_float_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plfs f1, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load float, float* inttoptr (i64 4294967297 to float*), align 4 + %conv = fpext float %0 to double + ret double %conv +} + +define double @load_double_cst() { +; CHECK-LABEL: load_double_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plfd f1, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load double, double* inttoptr (i64 4294967297 to double*), align 8 + ret double %0 +} + +define void @store_float_cst(float %str) { +; CHECK-LABEL: store_float_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstfs f1, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + store float %str, float* inttoptr (i64 4294967297 to float*), align 4 + ret void +} + +define void @store_double_cst(double %str) { +; CHECK-LABEL: store_double_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstfd f1, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + store double %str, double* inttoptr (i64 4294967297 to double*), align 8 + ret void +} + +define fp128 @load_f128_cst() { +; CHECK-LABEL: load_f128_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plxv v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load fp128, fp128* inttoptr (i64 4294967297 to fp128*), align 16 + ret fp128 %0 +} + +define void @store_f128_cst(fp128 %str) { +; CHECK-LABEL: store_f128_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstxv v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + store fp128 %str, fp128* inttoptr (i64 4294967297 to fp128*), align 16 + ret void +} + +define void @store_double_fp_to_uint_cst(double %str) { +; CHECK-LABEL: store_double_fp_to_uint_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xscvdpuxds v2, f1 +; CHECK-NEXT: pstxsd v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %conv = fptoui double %str to i64 + store i64 %conv, i64* inttoptr (i64 4294967297 to i64*), align 8 + ret void +} + +define void @store_double_fp_to_int_cst(double %str) { +; CHECK-LABEL: store_double_fp_to_int_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xscvdpsxds v2, f1 +; CHECK-NEXT: pstxsd v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %conv = fptosi double %str to i64 + store i64 %conv, i64* inttoptr (i64 4294967297 to i64*), align 8 + ret void +} + +define void @store_f128_fp_to_uint_cst(fp128 %str) { +; CHECK-LABEL: store_f128_fp_to_uint_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xscvqpudz v2, v2 +; CHECK-NEXT: pstxsd v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %conv = fptoui fp128 %str to i64 + store i64 %conv, i64* inttoptr (i64 4294967297 to i64*), align 8 + ret void +} + +define void @store_f128_fp_to_int_cst(fp128 %str) { +; CHECK-LABEL: store_f128_fp_to_int_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: xscvqpsdz v2, v2 +; CHECK-NEXT: pstxsd v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %conv = fptosi fp128 %str to i64 + store i64 %conv, i64* inttoptr (i64 4294967297 to i64*), align 8 + ret void +} + +; v4i32, v2i64, v4f32, v2f64: loading a constant address +define <4 x i32> @load_v4i32_cst() { +; CHECK-LABEL: load_v4i32_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plxv v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load <4 x i32>, <4 x i32>* inttoptr (i64 4294967297 to <4 x i32>*), align 16 + ret <4 x i32> %0 +} + +define void @store_v4i32_cst(<4 x i32> %str) { +; CHECK-LABEL: store_v4i32_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstxv v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + store <4 x i32> %str, <4 x i32>* inttoptr (i64 4294967297 to <4 x i32>*), align 16 + ret void +} + +define <2 x i64> @load_v2i64_cst() { +; CHECK-LABEL: load_v2i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plxv v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load <2 x i64>, <2 x i64>* inttoptr (i64 4294967297 to <2 x i64>*), align 16 + ret <2 x i64> %0 +} + +define void @store_v2i64_cst(<2 x i64> %str) { +; CHECK-LABEL: store_v2i64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstxv v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + store <2 x i64> %str, <2 x i64>* inttoptr (i64 4294967297 to <2 x i64>*), align 16 + ret void +} + +define <4 x float> @load_v4f32_cst() { +; CHECK-LABEL: load_v4f32_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plxv v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load <4 x float>, <4 x float>* inttoptr (i64 4294967297 to <4 x float>*), align 16 + ret <4 x float> %0 +} + +define void @store_v4f32_cst(<4 x float> %str) { +; CHECK-LABEL: store_v4f32_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstxv v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + store <4 x float> %str, <4 x float>* inttoptr (i64 4294967297 to <4 x float>*), align 16 + ret void +} + +define <2 x double> @load_v2f64_cst() { +; CHECK-LABEL: load_v2f64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: plxv v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + %0 = load <2 x double>, <2 x double>* inttoptr (i64 4294967297 to <2 x double>*), align 16 + ret <2 x double> %0 +} + +define void @store_v2f64_cst(<2 x double> %str) { +; CHECK-LABEL: store_v2f64_cst: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pstxv v2, 4294967297(0), 0 +; CHECK-NEXT: blr +entry: + store <2 x double> %str, <2 x double>* inttoptr (i64 4294967297 to <2 x double>*), align 16 + ret void +} diff --git a/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll --- a/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll +++ b/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll @@ -2516,8 +2516,7 @@ define dso_local double @ld_align32_double_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_double_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvuxddp f1, f0 ; CHECK-P10-NEXT: blr ; @@ -2650,8 +2649,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvuxddp f1, f0 ; CHECK-P10-NEXT: blr ; @@ -2826,8 +2824,7 @@ define dso_local double @ld_align32_double_int64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_double_int64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvsxddp f1, f0 ; CHECK-P10-NEXT: blr ; @@ -2960,8 +2957,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvsxddp f1, f0 ; CHECK-P10-NEXT: blr ; @@ -3134,8 +3130,7 @@ define dso_local double @ld_align32_double_float(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_double_float: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfsx f1, r3, r4 +; CHECK-P10-NEXT: plfs f1, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_double_float: @@ -3259,8 +3254,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfsx f1, r3, r4 +; CHECK-P10-NEXT: plfs f1, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_double_float: @@ -3420,8 +3414,7 @@ define dso_local double @ld_align32_double_double(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_double_double: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f1, r3, r4 +; CHECK-P10-NEXT: plfd f1, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_double_double: @@ -3538,8 +3531,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f1, r3, r4 +; CHECK-P10-NEXT: plfd f1, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_double_double: @@ -6138,9 +6130,8 @@ define dso_local void @st_align32_double_uint64_t(i8* nocapture %ptr, double %str) { ; CHECK-P10-LABEL: st_align32_double_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxds f0, f1 -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: stxsdx f0, r3, r4 +; CHECK-P10-NEXT: xscvdpuxds v2, f1 +; CHECK-P10-NEXT: pstxsd v2, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_double_uint64_t: @@ -6300,11 +6291,10 @@ define dso_local void @st_disjoint_align32_double_uint64_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_disjoint_align32_double_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxds f0, f1 +; CHECK-P10-NEXT: xscvdpuxds v2, f1 ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: stxsdx f0, r3, r4 +; CHECK-P10-NEXT: pstxsd v2, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_double_uint64_t: @@ -6526,9 +6516,8 @@ define dso_local void @st_align32_double_int64_t(i8* nocapture %ptr, double %str) { ; CHECK-P10-LABEL: st_align32_double_int64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxds f0, f1 -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: stxsdx f0, r3, r4 +; CHECK-P10-NEXT: xscvdpsxds v2, f1 +; CHECK-P10-NEXT: pstxsd v2, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_double_int64_t: @@ -6688,11 +6677,10 @@ define dso_local void @st_disjoint_align32_double_int64_t(i64 %ptr, double %str) { ; CHECK-P10-LABEL: st_disjoint_align32_double_int64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxds f0, f1 +; CHECK-P10-NEXT: xscvdpsxds v2, f1 ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: stxsdx f0, r3, r4 +; CHECK-P10-NEXT: pstxsd v2, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_double_int64_t: @@ -6902,8 +6890,7 @@ ; CHECK-P10-LABEL: st_align32_double_float: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: xsrsp f0, f1 -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_double_float: @@ -7036,8 +7023,7 @@ ; CHECK-P10-NEXT: xsrsp f0, f1 ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_double_float: @@ -7218,8 +7204,7 @@ define dso_local void @st_align32_double_double(i8* nocapture %ptr, double %str) { ; CHECK-P10-LABEL: st_align32_double_double: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: stfdx f1, r3, r4 +; CHECK-P10-NEXT: pstfd f1, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_double_double: @@ -7336,8 +7321,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: stfdx f1, r3, r4 +; CHECK-P10-NEXT: pstfd f1, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_double_double: diff --git a/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll --- a/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll +++ b/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll @@ -2516,8 +2516,7 @@ define dso_local float @ld_align32_float_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_float_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvuxdsp f1, f0 ; CHECK-P10-NEXT: blr ; @@ -2650,8 +2649,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvuxdsp f1, f0 ; CHECK-P10-NEXT: blr ; @@ -2826,8 +2824,7 @@ define dso_local float @ld_align32_float_int64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_float_int64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvsxdsp f1, f0 ; CHECK-P10-NEXT: blr ; @@ -2960,8 +2957,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvsxdsp f1, f0 ; CHECK-P10-NEXT: blr ; @@ -3132,8 +3128,7 @@ define dso_local float @ld_align32_float_float(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_float_float: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfsx f1, r3, r4 +; CHECK-P10-NEXT: plfs f1, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_float_float: @@ -3250,8 +3245,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfsx f1, r3, r4 +; CHECK-P10-NEXT: plfs f1, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_float_float: @@ -3409,8 +3403,7 @@ define dso_local float @ld_align32_float_double(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_float_double: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xsrsp f1, f0 ; CHECK-P10-NEXT: blr ; @@ -3543,8 +3536,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xsrsp f1, f0 ; CHECK-P10-NEXT: blr ; @@ -6160,9 +6152,8 @@ define dso_local void @st_align32_float_uint64_t(i8* nocapture %ptr, float %str) { ; CHECK-P10-LABEL: st_align32_float_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxds f0, f1 -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: stxsdx f0, r3, r4 +; CHECK-P10-NEXT: xscvdpuxds v2, f1 +; CHECK-P10-NEXT: pstxsd v2, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_float_uint64_t: @@ -6322,11 +6313,10 @@ define dso_local void @st_disjoint_align32_float_uint64_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_disjoint_align32_float_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpuxds f0, f1 +; CHECK-P10-NEXT: xscvdpuxds v2, f1 ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: stxsdx f0, r3, r4 +; CHECK-P10-NEXT: pstxsd v2, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_float_uint64_t: @@ -6548,9 +6538,8 @@ define dso_local void @st_align32_float_int64_t(i8* nocapture %ptr, float %str) { ; CHECK-P10-LABEL: st_align32_float_int64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxds f0, f1 -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: stxsdx f0, r3, r4 +; CHECK-P10-NEXT: xscvdpsxds v2, f1 +; CHECK-P10-NEXT: pstxsd v2, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_float_int64_t: @@ -6710,11 +6699,10 @@ define dso_local void @st_disjoint_align32_float_int64_t(i64 %ptr, float %str) { ; CHECK-P10-LABEL: st_disjoint_align32_float_int64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: xscvdpsxds f0, f1 +; CHECK-P10-NEXT: xscvdpsxds v2, f1 ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: stxsdx f0, r3, r4 +; CHECK-P10-NEXT: pstxsd v2, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_float_int64_t: @@ -6919,8 +6907,7 @@ define dso_local void @st_align32_float_float(i8* nocapture %ptr, float %str) { ; CHECK-P10-LABEL: st_align32_float_float: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: stfsx f1, r3, r4 +; CHECK-P10-NEXT: pstfs f1, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_float_float: @@ -7037,8 +7024,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: stfsx f1, r3, r4 +; CHECK-P10-NEXT: pstfs f1, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_float_float: @@ -7194,8 +7180,7 @@ define dso_local void @st_align32_float_double(i8* nocapture %ptr, float %str) { ; CHECK-P10-LABEL: st_align32_float_double: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: stfdx f1, r3, r4 +; CHECK-P10-NEXT: pstfd f1, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_float_double: @@ -7319,8 +7304,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: stfdx f1, r3, r4 +; CHECK-P10-NEXT: pstfd f1, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_float_double: diff --git a/llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll --- a/llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll +++ b/llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll @@ -50,8 +50,7 @@ define dso_local signext i16 @ld_align32_int16_t_int8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int16_t_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -181,8 +180,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -353,8 +351,7 @@ define dso_local signext i16 @ld_align32_int16_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int16_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhax r3, r3, r4 +; CHECK-P10-NEXT: plha r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_int16_t_uint16_t: @@ -471,8 +468,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhax r3, r3, r4 +; CHECK-P10-NEXT: plha r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_uint16_t: @@ -638,14 +634,12 @@ define dso_local signext i16 @ld_align32_int16_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LE-LABEL: ld_align32_int16_t_uint32_t: ; CHECK-P10-LE: # %bb.0: # %entry -; CHECK-P10-LE-NEXT: pli r4, 99999000 -; CHECK-P10-LE-NEXT: lhax r3, r3, r4 +; CHECK-P10-LE-NEXT: plha r3, 99999000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_align32_int16_t_uint32_t: ; CHECK-P10-BE: # %bb.0: # %entry -; CHECK-P10-BE-NEXT: pli r4, 99999002 -; CHECK-P10-BE-NEXT: lhax r3, r3, r4 +; CHECK-P10-BE-NEXT: plha r3, 99999002(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_align32_int16_t_uint32_t: @@ -855,16 +849,14 @@ ; CHECK-P10-LE: # %bb.0: # %entry ; CHECK-P10-LE-NEXT: lis r4, -15264 ; CHECK-P10-LE-NEXT: and r3, r3, r4 -; CHECK-P10-LE-NEXT: pli r4, 999990000 -; CHECK-P10-LE-NEXT: lhax r3, r3, r4 +; CHECK-P10-LE-NEXT: plha r3, 999990000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_disjoint_align32_int16_t_uint32_t: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: lis r4, -15264 ; CHECK-P10-BE-NEXT: and r3, r3, r4 -; CHECK-P10-BE-NEXT: pli r4, 999990002 -; CHECK-P10-BE-NEXT: lhax r3, r3, r4 +; CHECK-P10-BE-NEXT: plha r3, 999990002(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_disjoint_align32_int16_t_uint32_t: @@ -1176,14 +1168,12 @@ define dso_local signext i16 @ld_align32_int16_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LE-LABEL: ld_align32_int16_t_uint64_t: ; CHECK-P10-LE: # %bb.0: # %entry -; CHECK-P10-LE-NEXT: pli r4, 99999000 -; CHECK-P10-LE-NEXT: lhax r3, r3, r4 +; CHECK-P10-LE-NEXT: plha r3, 99999000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_align32_int16_t_uint64_t: ; CHECK-P10-BE: # %bb.0: # %entry -; CHECK-P10-BE-NEXT: pli r4, 99999006 -; CHECK-P10-BE-NEXT: lhax r3, r3, r4 +; CHECK-P10-BE-NEXT: plha r3, 99999006(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_align32_int16_t_uint64_t: @@ -1393,16 +1383,14 @@ ; CHECK-P10-LE: # %bb.0: # %entry ; CHECK-P10-LE-NEXT: lis r4, -15264 ; CHECK-P10-LE-NEXT: and r3, r3, r4 -; CHECK-P10-LE-NEXT: pli r4, 999990000 -; CHECK-P10-LE-NEXT: lhax r3, r3, r4 +; CHECK-P10-LE-NEXT: plha r3, 999990000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_disjoint_align32_int16_t_uint64_t: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: lis r4, -15264 ; CHECK-P10-BE-NEXT: and r3, r3, r4 -; CHECK-P10-BE-NEXT: pli r4, 999990006 -; CHECK-P10-BE-NEXT: lhax r3, r3, r4 +; CHECK-P10-BE-NEXT: plha r3, 999990006(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_disjoint_align32_int16_t_uint64_t: @@ -1710,8 +1698,7 @@ define dso_local signext i16 @ld_align32_int16_t_float(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int16_t_float: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: extsw r3, r3 @@ -1862,8 +1849,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: extsw r3, r3 @@ -2065,8 +2051,7 @@ define dso_local signext i16 @ld_align32_int16_t_double(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int16_t_double: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: extsw r3, r3 @@ -2217,8 +2202,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: extsw r3, r3 @@ -2412,8 +2396,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint16_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_uint16_t_uint8_t: @@ -2534,8 +2517,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint8_t: @@ -2700,8 +2682,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_int8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint16_t_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr @@ -2840,8 +2821,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: clrldi r3, r3, 48 ; CHECK-P10-NEXT: blr @@ -3023,8 +3003,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint16_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_uint16_t_uint16_t: @@ -3141,8 +3120,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint16_t: @@ -3308,14 +3286,12 @@ define dso_local zeroext i16 @ld_align32_uint16_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LE-LABEL: ld_align32_uint16_t_uint32_t: ; CHECK-P10-LE: # %bb.0: # %entry -; CHECK-P10-LE-NEXT: pli r4, 99999000 -; CHECK-P10-LE-NEXT: lhzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_align32_uint16_t_uint32_t: ; CHECK-P10-BE: # %bb.0: # %entry -; CHECK-P10-BE-NEXT: pli r4, 99999002 -; CHECK-P10-BE-NEXT: lhzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plhz r3, 99999002(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_align32_uint16_t_uint32_t: @@ -3525,16 +3501,14 @@ ; CHECK-P10-LE: # %bb.0: # %entry ; CHECK-P10-LE-NEXT: lis r4, -15264 ; CHECK-P10-LE-NEXT: and r3, r3, r4 -; CHECK-P10-LE-NEXT: pli r4, 999990000 -; CHECK-P10-LE-NEXT: lhzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint16_t_uint32_t: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: lis r4, -15264 ; CHECK-P10-BE-NEXT: and r3, r3, r4 -; CHECK-P10-BE-NEXT: pli r4, 999990002 -; CHECK-P10-BE-NEXT: lhzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plhz r3, 999990002(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint16_t_uint32_t: @@ -3846,14 +3820,12 @@ define dso_local zeroext i16 @ld_align32_uint16_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LE-LABEL: ld_align32_uint16_t_uint64_t: ; CHECK-P10-LE: # %bb.0: # %entry -; CHECK-P10-LE-NEXT: pli r4, 99999000 -; CHECK-P10-LE-NEXT: lhzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_align32_uint16_t_uint64_t: ; CHECK-P10-BE: # %bb.0: # %entry -; CHECK-P10-BE-NEXT: pli r4, 99999006 -; CHECK-P10-BE-NEXT: lhzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plhz r3, 99999006(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_align32_uint16_t_uint64_t: @@ -4063,16 +4035,14 @@ ; CHECK-P10-LE: # %bb.0: # %entry ; CHECK-P10-LE-NEXT: lis r4, -15264 ; CHECK-P10-LE-NEXT: and r3, r3, r4 -; CHECK-P10-LE-NEXT: pli r4, 999990000 -; CHECK-P10-LE-NEXT: lhzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint16_t_uint64_t: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: lis r4, -15264 ; CHECK-P10-BE-NEXT: and r3, r3, r4 -; CHECK-P10-BE-NEXT: pli r4, 999990006 -; CHECK-P10-BE-NEXT: lhzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plhz r3, 999990006(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint16_t_uint64_t: @@ -4364,8 +4334,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_float(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint16_t_float: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 @@ -4516,8 +4485,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 @@ -4718,8 +4686,7 @@ define dso_local zeroext i16 @ld_align32_uint16_t_double(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint16_t_double: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 @@ -4870,8 +4837,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 @@ -5065,8 +5031,7 @@ define dso_local void @st_align32_uint16_t_uint8_t(i8* nocapture %ptr, i16 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint16_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint8_t: @@ -5187,8 +5152,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint8_t: @@ -5348,8 +5312,7 @@ define dso_local void @st_align32_uint16_t_uint16_t(i8* nocapture %ptr, i16 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint16_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint16_t: @@ -5466,8 +5429,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint16_t: @@ -5623,8 +5585,7 @@ define dso_local void @st_align32_uint16_t_uint32_t(i8* nocapture %ptr, i16 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint16_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint32_t: @@ -5748,8 +5709,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint32_t: @@ -5911,8 +5871,7 @@ define dso_local void @st_align32_uint16_t_uint64_t(i8* nocapture %ptr, i16 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint16_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint16_t_uint64_t: @@ -6036,8 +5995,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint64_t: @@ -6204,9 +6162,8 @@ ; CHECK-P10-LABEL: st_align32_uint16_t_float: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwz f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvuxdsp f0, f0 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_uint16_t_float: @@ -6383,10 +6340,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwz f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvuxdsp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_float: @@ -6594,9 +6550,8 @@ ; CHECK-P10-LABEL: st_align32_uint16_t_double: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwz f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvuxddp f0, f0 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_uint16_t_double: @@ -6773,10 +6728,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwz f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvuxddp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_double: @@ -6979,8 +6933,7 @@ define dso_local void @st_align32_int16_t_uint32_t(i8* nocapture %ptr, i16 signext %str) { ; CHECK-P10-LABEL: st_align32_int16_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_int16_t_uint32_t: @@ -7104,8 +7057,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint32_t: @@ -7267,8 +7219,7 @@ define dso_local void @st_align32_int16_t_uint64_t(i8* nocapture %ptr, i16 signext %str) { ; CHECK-P10-LABEL: st_align32_int16_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_int16_t_uint64_t: @@ -7392,8 +7343,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint64_t: @@ -7560,9 +7510,8 @@ ; CHECK-P10-LABEL: st_align32_int16_t_float: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwa f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvsxdsp f0, f0 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_int16_t_float: @@ -7739,10 +7688,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwa f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvsxdsp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int16_t_float: @@ -7951,9 +7899,8 @@ ; CHECK-P10-LABEL: st_align32_int16_t_double: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwa f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvsxddp f0, f0 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_int16_t_double: @@ -8130,10 +8077,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwa f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvsxddp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int16_t_double: diff --git a/llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll --- a/llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll +++ b/llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll @@ -50,8 +50,7 @@ define dso_local signext i32 @ld_align32_int32_t_int8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int32_t_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -199,8 +198,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -373,8 +371,7 @@ define dso_local signext i32 @ld_align32_int32_t_int16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int32_t_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhax r3, r3, r4 +; CHECK-P10-NEXT: plha r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_int32_t_int16_t: @@ -515,8 +512,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhax r3, r3, r4 +; CHECK-P10-NEXT: plha r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_int16_t: @@ -676,8 +672,7 @@ define dso_local signext i32 @ld_align32_int32_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int32_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwax r3, r3, r4 +; CHECK-P10-NEXT: plwa r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_int32_t_uint32_t: @@ -779,8 +774,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign16_int32_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 -; CHECK-P10-NEXT: li r4, 6 -; CHECK-P10-NEXT: lwax r3, r3, r4 +; CHECK-P10-NEXT: plwa r3, 6(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_unalign16_int32_t_uint32_t: @@ -840,8 +834,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwax r3, r3, r4 +; CHECK-P10-NEXT: plwa r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint32_t: @@ -986,17 +979,39 @@ ; Function Attrs: norecurse nounwind readonly uwtable willreturn define dso_local signext i32 @ld_unalign16_int32_t_uint64_t(i8* nocapture readonly %ptr) { -; CHECK-LE-LABEL: ld_unalign16_int32_t_uint64_t: -; CHECK-LE: # %bb.0: # %entry -; CHECK-LE-NEXT: li r4, 1 -; CHECK-LE-NEXT: lwax r3, r3, r4 -; CHECK-LE-NEXT: blr +; CHECK-P10-LE-LABEL: ld_unalign16_int32_t_uint64_t: +; CHECK-P10-LE: # %bb.0: # %entry +; CHECK-P10-LE-NEXT: plwa r3, 1(r3), 0 +; CHECK-P10-LE-NEXT: blr ; -; CHECK-BE-LABEL: ld_unalign16_int32_t_uint64_t: -; CHECK-BE: # %bb.0: # %entry -; CHECK-BE-NEXT: li r4, 5 -; CHECK-BE-NEXT: lwax r3, r3, r4 -; CHECK-BE-NEXT: blr +; CHECK-P10-BE-LABEL: ld_unalign16_int32_t_uint64_t: +; CHECK-P10-BE: # %bb.0: # %entry +; CHECK-P10-BE-NEXT: plwa r3, 5(r3), 0 +; CHECK-P10-BE-NEXT: blr +; +; CHECK-P9-LE-LABEL: ld_unalign16_int32_t_uint64_t: +; CHECK-P9-LE: # %bb.0: # %entry +; CHECK-P9-LE-NEXT: li r4, 1 +; CHECK-P9-LE-NEXT: lwax r3, r3, r4 +; CHECK-P9-LE-NEXT: blr +; +; CHECK-P9-BE-LABEL: ld_unalign16_int32_t_uint64_t: +; CHECK-P9-BE: # %bb.0: # %entry +; CHECK-P9-BE-NEXT: li r4, 5 +; CHECK-P9-BE-NEXT: lwax r3, r3, r4 +; CHECK-P9-BE-NEXT: blr +; +; CHECK-P8-LE-LABEL: ld_unalign16_int32_t_uint64_t: +; CHECK-P8-LE: # %bb.0: # %entry +; CHECK-P8-LE-NEXT: li r4, 1 +; CHECK-P8-LE-NEXT: lwax r3, r3, r4 +; CHECK-P8-LE-NEXT: blr +; +; CHECK-P8-BE-LABEL: ld_unalign16_int32_t_uint64_t: +; CHECK-P8-BE: # %bb.0: # %entry +; CHECK-P8-BE-NEXT: li r4, 5 +; CHECK-P8-BE-NEXT: lwax r3, r3, r4 +; CHECK-P8-BE-NEXT: blr entry: %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1 %0 = bitcast i8* %add.ptr to i64* @@ -1028,14 +1043,12 @@ define dso_local signext i32 @ld_align32_int32_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LE-LABEL: ld_align32_int32_t_uint64_t: ; CHECK-P10-LE: # %bb.0: # %entry -; CHECK-P10-LE-NEXT: pli r4, 99999000 -; CHECK-P10-LE-NEXT: lwax r3, r3, r4 +; CHECK-P10-LE-NEXT: plwa r3, 99999000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_align32_int32_t_uint64_t: ; CHECK-P10-BE: # %bb.0: # %entry -; CHECK-P10-BE-NEXT: pli r4, 99999004 -; CHECK-P10-BE-NEXT: lwax r3, r3, r4 +; CHECK-P10-BE-NEXT: plwa r3, 99999004(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_align32_int32_t_uint64_t: @@ -1223,15 +1236,13 @@ ; CHECK-P10-LE-LABEL: ld_disjoint_unalign16_int32_t_uint64_t: ; CHECK-P10-LE: # %bb.0: # %entry ; CHECK-P10-LE-NEXT: rldicr r3, r3, 0, 51 -; CHECK-P10-LE-NEXT: li r4, 6 -; CHECK-P10-LE-NEXT: lwax r3, r3, r4 +; CHECK-P10-LE-NEXT: plwa r3, 6(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_disjoint_unalign16_int32_t_uint64_t: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: rldicr r3, r3, 0, 51 -; CHECK-P10-BE-NEXT: li r4, 10 -; CHECK-P10-BE-NEXT: lwax r3, r3, r4 +; CHECK-P10-BE-NEXT: plwa r3, 10(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_disjoint_unalign16_int32_t_uint64_t: @@ -1321,16 +1332,14 @@ ; CHECK-P10-LE: # %bb.0: # %entry ; CHECK-P10-LE-NEXT: lis r4, -15264 ; CHECK-P10-LE-NEXT: and r3, r3, r4 -; CHECK-P10-LE-NEXT: pli r4, 999990000 -; CHECK-P10-LE-NEXT: lwax r3, r3, r4 +; CHECK-P10-LE-NEXT: plwa r3, 999990000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_disjoint_align32_int32_t_uint64_t: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: lis r4, -15264 ; CHECK-P10-BE-NEXT: and r3, r3, r4 -; CHECK-P10-BE-NEXT: pli r4, 999990004 -; CHECK-P10-BE-NEXT: lwax r3, r3, r4 +; CHECK-P10-BE-NEXT: plwa r3, 999990004(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_disjoint_align32_int32_t_uint64_t: @@ -1638,8 +1647,7 @@ define dso_local signext i32 @ld_align32_int32_t_float(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int32_t_float: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: extsw r3, r3 @@ -1810,8 +1818,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: extsw r3, r3 @@ -2012,8 +2019,7 @@ define dso_local signext i32 @ld_align32_int32_t_double(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int32_t_double: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: extsw r3, r3 @@ -2184,8 +2190,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: extsw r3, r3 @@ -2379,8 +2384,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint32_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint8_t: @@ -2501,8 +2505,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint8_t: @@ -2667,8 +2670,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_int8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint32_t_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr @@ -2807,8 +2809,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr @@ -2992,8 +2993,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint32_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint16_t: @@ -3117,8 +3117,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint16_t: @@ -3282,8 +3281,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_int16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint32_t_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhax r3, r3, r4 +; CHECK-P10-NEXT: plha r3, 99999000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr ; @@ -3416,8 +3414,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhax r3, r3, r4 +; CHECK-P10-NEXT: plha r3, 999990000(r3), 0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 ; CHECK-P10-NEXT: blr ; @@ -3588,8 +3585,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint32_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint32_t: @@ -3706,8 +3702,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint32_t: @@ -3873,14 +3868,12 @@ define dso_local zeroext i32 @ld_align32_uint32_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LE-LABEL: ld_align32_uint32_t_uint64_t: ; CHECK-P10-LE: # %bb.0: # %entry -; CHECK-P10-LE-NEXT: pli r4, 99999000 -; CHECK-P10-LE-NEXT: lwzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plwz r3, 99999000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_align32_uint32_t_uint64_t: ; CHECK-P10-BE: # %bb.0: # %entry -; CHECK-P10-BE-NEXT: pli r4, 99999004 -; CHECK-P10-BE-NEXT: lwzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plwz r3, 99999004(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_align32_uint32_t_uint64_t: @@ -4090,16 +4083,14 @@ ; CHECK-P10-LE: # %bb.0: # %entry ; CHECK-P10-LE-NEXT: lis r4, -15264 ; CHECK-P10-LE-NEXT: and r3, r3, r4 -; CHECK-P10-LE-NEXT: pli r4, 999990000 -; CHECK-P10-LE-NEXT: lwzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plwz r3, 999990000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint32_t_uint64_t: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: lis r4, -15264 ; CHECK-P10-BE-NEXT: and r3, r3, r4 -; CHECK-P10-BE-NEXT: pli r4, 999990004 -; CHECK-P10-BE-NEXT: lwzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plwz r3, 999990004(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint32_t_uint64_t: @@ -4407,8 +4398,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_float(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint32_t_float: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpuxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 @@ -4559,8 +4549,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpuxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 @@ -4761,8 +4750,7 @@ define dso_local zeroext i32 @ld_align32_uint32_t_double(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint32_t_double: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpuxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 @@ -4913,8 +4901,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpuxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 @@ -5108,8 +5095,7 @@ define dso_local void @st_align32_uint32_t_uint8_t(i8* nocapture %ptr, i32 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint32_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint8_t: @@ -5230,8 +5216,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint8_t: @@ -5393,8 +5378,7 @@ define dso_local void @st_align32_uint32_t_uint16_t(i8* nocapture %ptr, i32 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint32_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint16_t: @@ -5518,8 +5502,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint16_t: @@ -5679,8 +5662,7 @@ define dso_local void @st_align32_uint32_t_uint32_t(i8* nocapture %ptr, i32 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint32_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint32_t: @@ -5797,8 +5779,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint32_t: @@ -5954,8 +5935,7 @@ define dso_local void @st_align32_uint32_t_uint64_t(i8* nocapture %ptr, i32 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint32_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint32_t_uint64_t: @@ -6079,8 +6059,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint64_t: @@ -6247,9 +6226,8 @@ ; CHECK-P10-LABEL: st_align32_uint32_t_float: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwz f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvuxdsp f0, f0 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_uint32_t_float: @@ -6426,10 +6404,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwz f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvuxdsp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_float: @@ -6637,9 +6614,8 @@ ; CHECK-P10-LABEL: st_align32_uint32_t_double: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwz f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvuxddp f0, f0 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_uint32_t_double: @@ -6816,10 +6792,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwz f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvuxddp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_double: @@ -7022,8 +6997,7 @@ define dso_local void @st_align32_int32_t_uint64_t(i8* nocapture %ptr, i32 signext %str) { ; CHECK-P10-LABEL: st_align32_int32_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_int32_t_uint64_t: @@ -7147,8 +7121,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int32_t_uint64_t: @@ -7315,9 +7288,8 @@ ; CHECK-P10-LABEL: st_align32_int32_t_float: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwa f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvsxdsp f0, f0 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_int32_t_float: @@ -7494,10 +7466,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwa f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvsxdsp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int32_t_float: @@ -7705,9 +7676,8 @@ ; CHECK-P10-LABEL: st_align32_int32_t_double: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwa f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvsxddp f0, f0 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_int32_t_double: @@ -7884,10 +7854,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwa f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvsxddp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int32_t_double: diff --git a/llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll --- a/llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll +++ b/llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll @@ -53,8 +53,7 @@ define dso_local i64 @ld_align32_int64_t_float(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int64_t_float: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxds f0, f0 ; CHECK-P10-NEXT: mffprd r3, f0 ; CHECK-P10-NEXT: blr @@ -196,8 +195,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxds f0, f0 ; CHECK-P10-NEXT: mffprd r3, f0 ; CHECK-P10-NEXT: blr @@ -385,8 +383,7 @@ define dso_local i64 @ld_align32_int64_t_double(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int64_t_double: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxds f0, f0 ; CHECK-P10-NEXT: mffprd r3, f0 ; CHECK-P10-NEXT: blr @@ -528,8 +525,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxds f0, f0 ; CHECK-P10-NEXT: mffprd r3, f0 ; CHECK-P10-NEXT: blr @@ -725,8 +721,7 @@ define dso_local i64 @ld_unalign32_uint64_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_unalign32_uint64_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_uint8_t: @@ -746,8 +741,7 @@ define dso_local i64 @ld_align32_uint64_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint8_t: @@ -925,8 +919,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_uint8_t: @@ -951,8 +944,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint8_t: @@ -1207,8 +1199,7 @@ define dso_local i64 @ld_unalign32_uint64_t_int8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_unalign32_uint64_t_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1230,8 +1221,7 @@ define dso_local i64 @ld_align32_uint64_t_int8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_int8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1422,8 +1412,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_int8_t: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1450,8 +1439,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -1722,8 +1710,7 @@ define dso_local i64 @ld_unalign32_uint64_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_unalign32_uint64_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_uint16_t: @@ -1744,8 +1731,7 @@ define dso_local i64 @ld_align32_uint64_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint16_t: @@ -1927,8 +1913,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_uint16_t: @@ -1953,8 +1938,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhzx r3, r3, r4 +; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint16_t: @@ -2208,8 +2192,7 @@ define dso_local i64 @ld_unalign32_uint64_t_int16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_unalign32_uint64_t_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lhax r3, r3, r4 +; CHECK-P10-NEXT: plha r3, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_int16_t: @@ -2230,8 +2213,7 @@ define dso_local i64 @ld_align32_uint64_t_int16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lhax r3, r3, r4 +; CHECK-P10-NEXT: plha r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_uint64_t_int16_t: @@ -2413,8 +2395,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_int16_t: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lhax r3, r3, r4 +; CHECK-P10-NEXT: plha r3, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_int16_t: @@ -2439,8 +2420,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lhax r3, r3, r4 +; CHECK-P10-NEXT: plha r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_int16_t: @@ -2694,8 +2674,7 @@ define dso_local i64 @ld_unalign32_uint64_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_unalign32_uint64_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_uint32_t: @@ -2716,8 +2695,7 @@ define dso_local i64 @ld_align32_uint64_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint32_t: @@ -2899,8 +2877,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_uint32_t: @@ -2925,8 +2902,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwzx r3, r3, r4 +; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint32_t: @@ -3150,11 +3126,16 @@ ; Function Attrs: norecurse nounwind readonly uwtable willreturn define dso_local i64 @ld_unalign16_uint64_t_int32_t(i8* nocapture readonly %ptr) { -; CHECK-LABEL: ld_unalign16_uint64_t_int32_t: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: li r4, 1 -; CHECK-NEXT: lwax r3, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_unalign16_uint64_t_int32_t: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: plwa r3, 1(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: ld_unalign16_uint64_t_int32_t: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: li r4, 1 +; CHECK-PREP10-NEXT: lwax r3, r3, r4 +; CHECK-PREP10-NEXT: blr entry: %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1 %0 = bitcast i8* %add.ptr to i32* @@ -3181,8 +3162,7 @@ define dso_local i64 @ld_unalign32_uint64_t_int32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_unalign32_uint64_t_int32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lwax r3, r3, r4 +; CHECK-P10-NEXT: plwa r3, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_int32_t: @@ -3203,8 +3183,7 @@ define dso_local i64 @ld_align32_uint64_t_int32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_int32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lwax r3, r3, r4 +; CHECK-P10-NEXT: plwa r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_uint64_t_int32_t: @@ -3338,8 +3317,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign16_uint64_t_int32_t: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 -; CHECK-P10-NEXT: li r4, 6 -; CHECK-P10-NEXT: lwax r3, r3, r4 +; CHECK-P10-NEXT: plwa r3, 6(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_unalign16_uint64_t_int32_t: @@ -3401,8 +3379,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_int32_t: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lwax r3, r3, r4 +; CHECK-P10-NEXT: plwa r3, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_int32_t: @@ -3427,8 +3404,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lwax r3, r3, r4 +; CHECK-P10-NEXT: plwa r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_int32_t: @@ -3659,11 +3635,16 @@ ; Function Attrs: norecurse nounwind readonly uwtable willreturn define dso_local i64 @ld_unalign16_uint64_t_uint64_t(i8* nocapture readonly %ptr) { -; CHECK-LABEL: ld_unalign16_uint64_t_uint64_t: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: li r4, 1 -; CHECK-NEXT: ldx r3, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_unalign16_uint64_t_uint64_t: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: pld r3, 1(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: ld_unalign16_uint64_t_uint64_t: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: li r4, 1 +; CHECK-PREP10-NEXT: ldx r3, r3, r4 +; CHECK-PREP10-NEXT: blr entry: %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1 %0 = bitcast i8* %add.ptr to i64* @@ -3688,8 +3669,7 @@ define dso_local i64 @ld_unalign32_uint64_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_unalign32_uint64_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_uint64_t: @@ -3709,8 +3689,7 @@ define dso_local i64 @ld_align32_uint64_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint64_t: @@ -3837,8 +3816,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign16_uint64_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 -; CHECK-P10-NEXT: li r4, 6 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 6(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_unalign16_uint64_t_uint64_t: @@ -3897,8 +3875,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_uint64_t: @@ -3922,8 +3899,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: ldx r3, r3, r4 +; CHECK-P10-NEXT: pld r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint64_t: @@ -4147,12 +4123,19 @@ ; Function Attrs: norecurse nounwind readonly uwtable willreturn define dso_local i64 @ld_unalign16_uint64_t_float(i8* nocapture readonly %ptr) { -; CHECK-LABEL: ld_unalign16_uint64_t_float: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: lfs f0, 1(r3) -; CHECK-NEXT: xscvdpuxds f0, f0 -; CHECK-NEXT: mffprd r3, f0 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_unalign16_uint64_t_float: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: plfs f0, 1(r3), 0 +; CHECK-P10-NEXT: xscvdpuxds f0, f0 +; CHECK-P10-NEXT: mffprd r3, f0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: ld_unalign16_uint64_t_float: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: lfs f0, 1(r3) +; CHECK-PREP10-NEXT: xscvdpuxds f0, f0 +; CHECK-PREP10-NEXT: mffprd r3, f0 +; CHECK-PREP10-NEXT: blr entry: %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1 %0 = bitcast i8* %add.ptr to float* @@ -4181,8 +4164,7 @@ define dso_local i64 @ld_unalign32_uint64_t_float(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_unalign32_uint64_t_float: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 99999(r3), 0 ; CHECK-P10-NEXT: xscvdpuxds f0, f0 ; CHECK-P10-NEXT: mffprd r3, f0 ; CHECK-P10-NEXT: blr @@ -4207,8 +4189,7 @@ define dso_local i64 @ld_align32_uint64_t_float(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_float: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpuxds f0, f0 ; CHECK-P10-NEXT: mffprd r3, f0 ; CHECK-P10-NEXT: blr @@ -4359,13 +4340,21 @@ ; Function Attrs: norecurse nounwind readonly uwtable willreturn define dso_local i64 @ld_disjoint_unalign16_uint64_t_float(i64 %ptr) { -; CHECK-LABEL: ld_disjoint_unalign16_uint64_t_float: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: rldicr r3, r3, 0, 51 -; CHECK-NEXT: lfs f0, 6(r3) -; CHECK-NEXT: xscvdpuxds f0, f0 -; CHECK-NEXT: mffprd r3, f0 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_disjoint_unalign16_uint64_t_float: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P10-NEXT: plfs f0, 6(r3), 0 +; CHECK-P10-NEXT: xscvdpuxds f0, f0 +; CHECK-P10-NEXT: mffprd r3, f0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: ld_disjoint_unalign16_uint64_t_float: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-PREP10-NEXT: lfs f0, 6(r3) +; CHECK-PREP10-NEXT: xscvdpuxds f0, f0 +; CHECK-PREP10-NEXT: mffprd r3, f0 +; CHECK-PREP10-NEXT: blr entry: %and = and i64 %ptr, -4096 %or = or i64 %and, 6 @@ -4416,8 +4405,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_float: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 99999(r3), 0 ; CHECK-P10-NEXT: xscvdpuxds f0, f0 ; CHECK-P10-NEXT: mffprd r3, f0 ; CHECK-P10-NEXT: blr @@ -4446,8 +4434,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpuxds f0, f0 ; CHECK-P10-NEXT: mffprd r3, f0 ; CHECK-P10-NEXT: blr @@ -4740,12 +4727,19 @@ ; Function Attrs: norecurse nounwind readonly uwtable willreturn define dso_local i64 @ld_unalign16_uint64_t_double(i8* nocapture readonly %ptr) { -; CHECK-LABEL: ld_unalign16_uint64_t_double: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: lfd f0, 1(r3) -; CHECK-NEXT: xscvdpuxds f0, f0 -; CHECK-NEXT: mffprd r3, f0 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_unalign16_uint64_t_double: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: plfd f0, 1(r3), 0 +; CHECK-P10-NEXT: xscvdpuxds f0, f0 +; CHECK-P10-NEXT: mffprd r3, f0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: ld_unalign16_uint64_t_double: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: lfd f0, 1(r3) +; CHECK-PREP10-NEXT: xscvdpuxds f0, f0 +; CHECK-PREP10-NEXT: mffprd r3, f0 +; CHECK-PREP10-NEXT: blr entry: %add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1 %0 = bitcast i8* %add.ptr to double* @@ -4774,8 +4768,7 @@ define dso_local i64 @ld_unalign32_uint64_t_double(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_unalign32_uint64_t_double: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999(r3), 0 ; CHECK-P10-NEXT: xscvdpuxds f0, f0 ; CHECK-P10-NEXT: mffprd r3, f0 ; CHECK-P10-NEXT: blr @@ -4800,8 +4793,7 @@ define dso_local i64 @ld_align32_uint64_t_double(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint64_t_double: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpuxds f0, f0 ; CHECK-P10-NEXT: mffprd r3, f0 ; CHECK-P10-NEXT: blr @@ -4952,13 +4944,21 @@ ; Function Attrs: norecurse nounwind readonly uwtable willreturn define dso_local i64 @ld_disjoint_unalign16_uint64_t_double(i64 %ptr) { -; CHECK-LABEL: ld_disjoint_unalign16_uint64_t_double: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: rldicr r3, r3, 0, 51 -; CHECK-NEXT: lfd f0, 6(r3) -; CHECK-NEXT: xscvdpuxds f0, f0 -; CHECK-NEXT: mffprd r3, f0 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_disjoint_unalign16_uint64_t_double: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P10-NEXT: plfd f0, 6(r3), 0 +; CHECK-P10-NEXT: xscvdpuxds f0, f0 +; CHECK-P10-NEXT: mffprd r3, f0 +; CHECK-P10-NEXT: blr +; +; CHECK-PREP10-LABEL: ld_disjoint_unalign16_uint64_t_double: +; CHECK-PREP10: # %bb.0: # %entry +; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-PREP10-NEXT: lfd f0, 6(r3) +; CHECK-PREP10-NEXT: xscvdpuxds f0, f0 +; CHECK-PREP10-NEXT: mffprd r3, f0 +; CHECK-PREP10-NEXT: blr entry: %and = and i64 %ptr, -4096 %or = or i64 %and, 6 @@ -5009,8 +5009,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_double: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999(r3), 0 ; CHECK-P10-NEXT: xscvdpuxds f0, f0 ; CHECK-P10-NEXT: mffprd r3, f0 ; CHECK-P10-NEXT: blr @@ -5039,8 +5038,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpuxds f0, f0 ; CHECK-P10-NEXT: mffprd r3, f0 ; CHECK-P10-NEXT: blr @@ -5346,8 +5344,7 @@ define dso_local void @st_align32_uint64_t_uint8_t(i8* nocapture %ptr, i64 %str) { ; CHECK-P10-LABEL: st_align32_uint64_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint8_t: @@ -5485,8 +5482,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint8_t: @@ -5648,8 +5644,7 @@ define dso_local void @st_align32_uint64_t_uint16_t(i8* nocapture %ptr, i64 %str) { ; CHECK-P10-LABEL: st_align32_uint64_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint16_t: @@ -5790,8 +5785,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint16_t: @@ -5953,8 +5947,7 @@ define dso_local void @st_align32_uint64_t_int16_t(i8* nocapture %ptr, i64 %str) { ; CHECK-P10-LABEL: st_align32_uint64_t_int16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint64_t_int16_t: @@ -6095,8 +6088,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_int16_t: @@ -6258,8 +6250,7 @@ define dso_local void @st_align32_uint64_t_uint32_t(i8* nocapture %ptr, i64 %str) { ; CHECK-P10-LABEL: st_align32_uint64_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint32_t: @@ -6400,8 +6391,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint32_t: @@ -6561,8 +6551,7 @@ define dso_local void @st_align32_uint64_t_uint64_t(i8* nocapture %ptr, i64 %str) { ; CHECK-P10-LABEL: st_align32_uint64_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint64_t_uint64_t: @@ -6695,8 +6684,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint64_t: @@ -6857,9 +6845,8 @@ ; CHECK-P10-LABEL: st_align32_uint64_t_float: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprd f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvuxdsp f0, f0 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_uint64_t_float: @@ -7055,10 +7042,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprd f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvuxdsp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_float: @@ -7266,9 +7252,8 @@ ; CHECK-P10-LABEL: st_align32_uint64_t_double: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprd f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvuxddp f0, f0 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_uint64_t_double: @@ -7464,10 +7449,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprd f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvuxddp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_double: @@ -7675,9 +7659,8 @@ ; CHECK-P10-LABEL: st_align32_int64_t_float: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprd f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvsxdsp f0, f0 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_int64_t_float: @@ -7873,10 +7856,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprd f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvsxdsp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int64_t_float: @@ -8084,9 +8066,8 @@ ; CHECK-P10-LABEL: st_align32_int64_t_double: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprd f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvsxddp f0, f0 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_int64_t_double: @@ -8282,10 +8263,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprd f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvsxddp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int64_t_double: diff --git a/llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll --- a/llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll +++ b/llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll @@ -48,8 +48,7 @@ define dso_local signext i8 @ld_align32_int8_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int8_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -172,8 +171,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: extsb r3, r3 ; CHECK-P10-NEXT: blr ; @@ -354,15 +352,13 @@ define dso_local signext i8 @ld_align32_int8_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LE-LABEL: ld_align32_int8_t_uint16_t: ; CHECK-P10-LE: # %bb.0: # %entry -; CHECK-P10-LE-NEXT: pli r4, 99999000 -; CHECK-P10-LE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-LE-NEXT: extsb r3, r3 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_align32_int8_t_uint16_t: ; CHECK-P10-BE: # %bb.0: # %entry -; CHECK-P10-BE-NEXT: pli r4, 99999001 -; CHECK-P10-BE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plbz r3, 99999001(r3), 0 ; CHECK-P10-BE-NEXT: extsb r3, r3 ; CHECK-P10-BE-NEXT: blr ; @@ -593,8 +589,7 @@ ; CHECK-P10-LE: # %bb.0: # %entry ; CHECK-P10-LE-NEXT: lis r4, -15264 ; CHECK-P10-LE-NEXT: and r3, r3, r4 -; CHECK-P10-LE-NEXT: pli r4, 999990000 -; CHECK-P10-LE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-LE-NEXT: extsb r3, r3 ; CHECK-P10-LE-NEXT: blr ; @@ -602,8 +597,7 @@ ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: lis r4, -15264 ; CHECK-P10-BE-NEXT: and r3, r3, r4 -; CHECK-P10-BE-NEXT: pli r4, 999990001 -; CHECK-P10-BE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plbz r3, 999990001(r3), 0 ; CHECK-P10-BE-NEXT: extsb r3, r3 ; CHECK-P10-BE-NEXT: blr ; @@ -946,15 +940,13 @@ define dso_local signext i8 @ld_align32_int8_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LE-LABEL: ld_align32_int8_t_uint32_t: ; CHECK-P10-LE: # %bb.0: # %entry -; CHECK-P10-LE-NEXT: pli r4, 99999000 -; CHECK-P10-LE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-LE-NEXT: extsb r3, r3 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_align32_int8_t_uint32_t: ; CHECK-P10-BE: # %bb.0: # %entry -; CHECK-P10-BE-NEXT: pli r4, 99999003 -; CHECK-P10-BE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plbz r3, 99999003(r3), 0 ; CHECK-P10-BE-NEXT: extsb r3, r3 ; CHECK-P10-BE-NEXT: blr ; @@ -1185,8 +1177,7 @@ ; CHECK-P10-LE: # %bb.0: # %entry ; CHECK-P10-LE-NEXT: lis r4, -15264 ; CHECK-P10-LE-NEXT: and r3, r3, r4 -; CHECK-P10-LE-NEXT: pli r4, 999990000 -; CHECK-P10-LE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-LE-NEXT: extsb r3, r3 ; CHECK-P10-LE-NEXT: blr ; @@ -1194,8 +1185,7 @@ ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: lis r4, -15264 ; CHECK-P10-BE-NEXT: and r3, r3, r4 -; CHECK-P10-BE-NEXT: pli r4, 999990003 -; CHECK-P10-BE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plbz r3, 999990003(r3), 0 ; CHECK-P10-BE-NEXT: extsb r3, r3 ; CHECK-P10-BE-NEXT: blr ; @@ -1538,15 +1528,13 @@ define dso_local signext i8 @ld_align32_int8_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LE-LABEL: ld_align32_int8_t_uint64_t: ; CHECK-P10-LE: # %bb.0: # %entry -; CHECK-P10-LE-NEXT: pli r4, 99999000 -; CHECK-P10-LE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-LE-NEXT: extsb r3, r3 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_align32_int8_t_uint64_t: ; CHECK-P10-BE: # %bb.0: # %entry -; CHECK-P10-BE-NEXT: pli r4, 99999007 -; CHECK-P10-BE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plbz r3, 99999007(r3), 0 ; CHECK-P10-BE-NEXT: extsb r3, r3 ; CHECK-P10-BE-NEXT: blr ; @@ -1777,8 +1765,7 @@ ; CHECK-P10-LE: # %bb.0: # %entry ; CHECK-P10-LE-NEXT: lis r4, -15264 ; CHECK-P10-LE-NEXT: and r3, r3, r4 -; CHECK-P10-LE-NEXT: pli r4, 999990000 -; CHECK-P10-LE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-LE-NEXT: extsb r3, r3 ; CHECK-P10-LE-NEXT: blr ; @@ -1786,8 +1773,7 @@ ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: lis r4, -15264 ; CHECK-P10-BE-NEXT: and r3, r3, r4 -; CHECK-P10-BE-NEXT: pli r4, 999990007 -; CHECK-P10-BE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plbz r3, 999990007(r3), 0 ; CHECK-P10-BE-NEXT: extsb r3, r3 ; CHECK-P10-BE-NEXT: blr ; @@ -2122,8 +2108,7 @@ define dso_local signext i8 @ld_align32_int8_t_float(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int8_t_float: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: extsw r3, r3 @@ -2274,8 +2259,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: extsw r3, r3 @@ -2476,8 +2460,7 @@ define dso_local signext i8 @ld_align32_int8_t_double(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_int8_t_double: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: extsw r3, r3 @@ -2628,8 +2611,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: extsw r3, r3 @@ -2821,8 +2803,7 @@ define dso_local zeroext i8 @ld_align32_uint8_t_uint8_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint8_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: ld_align32_uint8_t_uint8_t: @@ -2960,8 +2941,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lbzx r3, r3, r4 +; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint8_t: @@ -3178,14 +3158,12 @@ define dso_local zeroext i8 @ld_align32_uint8_t_uint16_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LE-LABEL: ld_align32_uint8_t_uint16_t: ; CHECK-P10-LE: # %bb.0: # %entry -; CHECK-P10-LE-NEXT: pli r4, 99999000 -; CHECK-P10-LE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_align32_uint8_t_uint16_t: ; CHECK-P10-BE: # %bb.0: # %entry -; CHECK-P10-BE-NEXT: pli r4, 99999001 -; CHECK-P10-BE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plbz r3, 99999001(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_align32_uint8_t_uint16_t: @@ -3456,16 +3434,14 @@ ; CHECK-P10-LE: # %bb.0: # %entry ; CHECK-P10-LE-NEXT: lis r4, -15264 ; CHECK-P10-LE-NEXT: and r3, r3, r4 -; CHECK-P10-LE-NEXT: pli r4, 999990000 -; CHECK-P10-LE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint8_t_uint16_t: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: lis r4, -15264 ; CHECK-P10-BE-NEXT: and r3, r3, r4 -; CHECK-P10-BE-NEXT: pli r4, 999990001 -; CHECK-P10-BE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plbz r3, 999990001(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint8_t_uint16_t: @@ -3904,14 +3880,12 @@ define dso_local zeroext i8 @ld_align32_uint8_t_uint32_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LE-LABEL: ld_align32_uint8_t_uint32_t: ; CHECK-P10-LE: # %bb.0: # %entry -; CHECK-P10-LE-NEXT: pli r4, 99999000 -; CHECK-P10-LE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_align32_uint8_t_uint32_t: ; CHECK-P10-BE: # %bb.0: # %entry -; CHECK-P10-BE-NEXT: pli r4, 99999003 -; CHECK-P10-BE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plbz r3, 99999003(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_align32_uint8_t_uint32_t: @@ -4182,16 +4156,14 @@ ; CHECK-P10-LE: # %bb.0: # %entry ; CHECK-P10-LE-NEXT: lis r4, -15264 ; CHECK-P10-LE-NEXT: and r3, r3, r4 -; CHECK-P10-LE-NEXT: pli r4, 999990000 -; CHECK-P10-LE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint8_t_uint32_t: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: lis r4, -15264 ; CHECK-P10-BE-NEXT: and r3, r3, r4 -; CHECK-P10-BE-NEXT: pli r4, 999990003 -; CHECK-P10-BE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plbz r3, 999990003(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint8_t_uint32_t: @@ -4630,14 +4602,12 @@ define dso_local zeroext i8 @ld_align32_uint8_t_uint64_t(i8* nocapture readonly %ptr) { ; CHECK-P10-LE-LABEL: ld_align32_uint8_t_uint64_t: ; CHECK-P10-LE: # %bb.0: # %entry -; CHECK-P10-LE-NEXT: pli r4, 99999000 -; CHECK-P10-LE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plbz r3, 99999000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_align32_uint8_t_uint64_t: ; CHECK-P10-BE: # %bb.0: # %entry -; CHECK-P10-BE-NEXT: pli r4, 99999007 -; CHECK-P10-BE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plbz r3, 99999007(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_align32_uint8_t_uint64_t: @@ -4908,16 +4878,14 @@ ; CHECK-P10-LE: # %bb.0: # %entry ; CHECK-P10-LE-NEXT: lis r4, -15264 ; CHECK-P10-LE-NEXT: and r3, r3, r4 -; CHECK-P10-LE-NEXT: pli r4, 999990000 -; CHECK-P10-LE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-LE-NEXT: plbz r3, 999990000(r3), 0 ; CHECK-P10-LE-NEXT: blr ; ; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint8_t_uint64_t: ; CHECK-P10-BE: # %bb.0: # %entry ; CHECK-P10-BE-NEXT: lis r4, -15264 ; CHECK-P10-BE-NEXT: and r3, r3, r4 -; CHECK-P10-BE-NEXT: pli r4, 999990007 -; CHECK-P10-BE-NEXT: lbzx r3, r3, r4 +; CHECK-P10-BE-NEXT: plbz r3, 999990007(r3), 0 ; CHECK-P10-BE-NEXT: blr ; ; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint8_t_uint64_t: @@ -5352,8 +5320,7 @@ define dso_local zeroext i8 @ld_align32_uint8_t_float(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint8_t_float: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 @@ -5536,8 +5503,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfsx f0, r3, r4 +; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 @@ -5803,8 +5769,7 @@ define dso_local zeroext i8 @ld_align32_uint8_t_double(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_uint8_t_double: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 @@ -5987,8 +5952,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lfdx f0, r3, r4 +; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: xscvdpsxws f0, f0 ; CHECK-P10-NEXT: mffprwz r3, f0 ; CHECK-P10-NEXT: clrldi r3, r3, 32 @@ -6245,8 +6209,7 @@ define dso_local void @st_align32_uint8_t_uint8_t(i8* nocapture %ptr, i8 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint8_t_uint8_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint8_t: @@ -6360,8 +6323,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stbx r4, r3, r5 +; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint8_t: @@ -6517,8 +6479,7 @@ define dso_local void @st_align32_uint8_t_uint16_t(i8* nocapture %ptr, i8 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint8_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint16_t: @@ -6642,8 +6603,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint16_t: @@ -6805,8 +6765,7 @@ define dso_local void @st_align32_uint8_t_uint32_t(i8* nocapture %ptr, i8 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint8_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint32_t: @@ -6930,8 +6889,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint32_t: @@ -7093,8 +7051,7 @@ define dso_local void @st_align32_uint8_t_uint64_t(i8* nocapture %ptr, i8 zeroext %str) { ; CHECK-P10-LABEL: st_align32_uint8_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_uint8_t_uint64_t: @@ -7218,8 +7175,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint64_t: @@ -7386,9 +7342,8 @@ ; CHECK-P10-LABEL: st_align32_uint8_t_float: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwz f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvuxdsp f0, f0 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_uint8_t_float: @@ -7565,10 +7520,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwz f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvuxdsp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_float: @@ -7776,9 +7730,8 @@ ; CHECK-P10-LABEL: st_align32_uint8_t_double: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwz f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvuxddp f0, f0 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_uint8_t_double: @@ -7955,10 +7908,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwz f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvuxddp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_double: @@ -8161,8 +8113,7 @@ define dso_local void @st_align32_int8_t_uint16_t(i8* nocapture %ptr, i8 signext %str) { ; CHECK-P10-LABEL: st_align32_int8_t_uint16_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_int8_t_uint16_t: @@ -8286,8 +8237,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: sthx r4, r3, r5 +; CHECK-P10-NEXT: psth r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint16_t: @@ -8449,8 +8399,7 @@ define dso_local void @st_align32_int8_t_uint32_t(i8* nocapture %ptr, i8 signext %str) { ; CHECK-P10-LABEL: st_align32_int8_t_uint32_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_int8_t_uint32_t: @@ -8574,8 +8523,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stwx r4, r3, r5 +; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint32_t: @@ -8737,8 +8685,7 @@ define dso_local void @st_align32_int8_t_uint64_t(i8* nocapture %ptr, i8 signext %str) { ; CHECK-P10-LABEL: st_align32_int8_t_uint64_t: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r5, 99999000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-PREP10-LABEL: st_align32_int8_t_uint64_t: @@ -8862,8 +8809,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r5, -15264 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: pli r5, 999990000 -; CHECK-P10-NEXT: stdx r4, r3, r5 +; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint64_t: @@ -9030,9 +8976,8 @@ ; CHECK-P10-LABEL: st_align32_int8_t_float: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwa f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvsxdsp f0, f0 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_int8_t_float: @@ -9209,10 +9154,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwa f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvsxdsp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfsx f0, r3, r4 +; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_float: @@ -9420,9 +9364,8 @@ ; CHECK-P10-LABEL: st_align32_int8_t_double: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwa f0, r4 -; CHECK-P10-NEXT: pli r4, 99999000 ; CHECK-P10-NEXT: xscvsxddp f0, f0 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_int8_t_double: @@ -9599,10 +9542,9 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: mtfprwa f0, r4 ; CHECK-P10-NEXT: lis r5, -15264 -; CHECK-P10-NEXT: pli r4, 999990000 ; CHECK-P10-NEXT: xscvsxddp f0, f0 ; CHECK-P10-NEXT: and r3, r3, r5 -; CHECK-P10-NEXT: stfdx f0, r3, r4 +; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_int8_t_double: diff --git a/llvm/test/CodeGen/PowerPC/vec_insert_elt.ll b/llvm/test/CodeGen/PowerPC/vec_insert_elt.ll --- a/llvm/test/CodeGen/PowerPC/vec_insert_elt.ll +++ b/llvm/test/CodeGen/PowerPC/vec_insert_elt.ll @@ -680,15 +680,13 @@ define <2 x double> @testDoubleImm4(<2 x double> %a, i32* %b) { ; CHECK-LABEL: testDoubleImm4: ; CHECK: # %bb.0: # %entry -; CHECK-NEXT: lis r3, 4 -; CHECK-NEXT: lfdx f0, r5, r3 +; CHECK-NEXT: plfd f0, 262144(r5), 0 ; CHECK-NEXT: xxmrghd v2, v2, vs0 ; CHECK-NEXT: blr ; ; CHECK-BE-LABEL: testDoubleImm4: ; CHECK-BE: # %bb.0: # %entry -; CHECK-BE-NEXT: lis r3, 4 -; CHECK-BE-NEXT: lfdx f0, r5, r3 +; CHECK-BE-NEXT: plfd f0, 262144(r5), 0 ; CHECK-BE-NEXT: xxpermdi v2, vs0, v2, 1 ; CHECK-BE-NEXT: blr ; diff --git a/llvm/test/CodeGen/PowerPC/vector-ldst.ll b/llvm/test/CodeGen/PowerPC/vector-ldst.ll --- a/llvm/test/CodeGen/PowerPC/vector-ldst.ll +++ b/llvm/test/CodeGen/PowerPC/vector-ldst.ll @@ -42,11 +42,16 @@ ; Function Attrs: norecurse nounwind readonly uwtable willreturn define dso_local <16 x i8> @ld_unalign16_vector(i8* nocapture readonly %ptr) { -; CHECK-LABEL: ld_unalign16_vector: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: li r4, 1 -; CHECK-NEXT: lxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_unalign16_vector: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: plxv v2, 1(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-P9-LABEL: ld_unalign16_vector: +; CHECK-P9: # %bb.0: # %entry +; CHECK-P9-NEXT: li r4, 1 +; CHECK-P9-NEXT: lxvx v2, r3, r4 +; CHECK-P9-NEXT: blr ; ; CHECK-P8-LE-LABEL: ld_unalign16_vector: ; CHECK-P8-LE: # %bb.0: # %entry @@ -68,11 +73,16 @@ ; Function Attrs: norecurse nounwind readonly uwtable willreturn define dso_local <16 x i8> @ld_align16_vector(i8* nocapture readonly %ptr) { -; CHECK-LABEL: ld_align16_vector: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: li r4, 8 -; CHECK-NEXT: lxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_align16_vector: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: plxv v2, 8(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-P9-LABEL: ld_align16_vector: +; CHECK-P9: # %bb.0: # %entry +; CHECK-P9-NEXT: li r4, 8 +; CHECK-P9-NEXT: lxvx v2, r3, r4 +; CHECK-P9-NEXT: blr ; ; CHECK-P8-LE-LABEL: ld_align16_vector: ; CHECK-P8-LE: # %bb.0: # %entry @@ -96,8 +106,7 @@ define dso_local <16 x i8> @ld_unalign32_vector(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_unalign32_vector: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lxvx v2, r3, r4 +; CHECK-P10-NEXT: plxv v2, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_unalign32_vector: @@ -131,8 +140,7 @@ define dso_local <16 x i8> @ld_align32_vector(i8* nocapture readonly %ptr) { ; CHECK-P10-LABEL: ld_align32_vector: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: lxvx v2, r3, r4 +; CHECK-P10-NEXT: plxv v2, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_align32_vector: @@ -350,12 +358,18 @@ ; Function Attrs: norecurse nounwind readonly uwtable willreturn define dso_local <16 x i8> @ld_disjoint_unalign16_vector(i64 %ptr) { -; CHECK-LABEL: ld_disjoint_unalign16_vector: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: rldicr r3, r3, 0, 51 -; CHECK-NEXT: li r4, 6 -; CHECK-NEXT: lxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_disjoint_unalign16_vector: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P10-NEXT: plxv v2, 6(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-P9-LABEL: ld_disjoint_unalign16_vector: +; CHECK-P9: # %bb.0: # %entry +; CHECK-P9-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P9-NEXT: li r4, 6 +; CHECK-P9-NEXT: lxvx v2, r3, r4 +; CHECK-P9-NEXT: blr ; ; CHECK-P8-LE-LABEL: ld_disjoint_unalign16_vector: ; CHECK-P8-LE: # %bb.0: # %entry @@ -380,12 +394,18 @@ ; Function Attrs: norecurse nounwind readonly uwtable willreturn define dso_local <16 x i8> @ld_disjoint_align16_vector(i64 %ptr) { -; CHECK-LABEL: ld_disjoint_align16_vector: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: rldicr r3, r3, 0, 51 -; CHECK-NEXT: li r4, 24 -; CHECK-NEXT: lxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: ld_disjoint_align16_vector: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P10-NEXT: plxv v2, 24(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-P9-LABEL: ld_disjoint_align16_vector: +; CHECK-P9: # %bb.0: # %entry +; CHECK-P9-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P9-NEXT: li r4, 24 +; CHECK-P9-NEXT: lxvx v2, r3, r4 +; CHECK-P9-NEXT: blr ; ; CHECK-P8-LE-LABEL: ld_disjoint_align16_vector: ; CHECK-P8-LE: # %bb.0: # %entry @@ -442,8 +462,7 @@ ; CHECK-P10-LABEL: ld_disjoint_unalign32_vector: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: lxvx v2, r3, r4 +; CHECK-P10-NEXT: plxv v2, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_unalign32_vector: @@ -483,8 +502,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: lxvx v2, r3, r4 +; CHECK-P10-NEXT: plxv v2, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: ld_disjoint_align32_vector: @@ -875,11 +893,16 @@ ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly define dso_local void @st_unalign16_vector(i8* nocapture %ptr, <16 x i8> %str) { -; CHECK-LABEL: st_unalign16_vector: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: li r4, 1 -; CHECK-NEXT: stxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: st_unalign16_vector: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: pstxv v2, 1(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-P9-LABEL: st_unalign16_vector: +; CHECK-P9: # %bb.0: # %entry +; CHECK-P9-NEXT: li r4, 1 +; CHECK-P9-NEXT: stxvx v2, r3, r4 +; CHECK-P9-NEXT: blr ; ; CHECK-P8-LE-LABEL: st_unalign16_vector: ; CHECK-P8-LE: # %bb.0: # %entry @@ -901,11 +924,16 @@ ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly define dso_local void @st_align16_vector(i8* nocapture %ptr, <16 x i8> %str) { -; CHECK-LABEL: st_align16_vector: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: li r4, 8 -; CHECK-NEXT: stxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: st_align16_vector: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: pstxv v2, 8(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-P9-LABEL: st_align16_vector: +; CHECK-P9: # %bb.0: # %entry +; CHECK-P9-NEXT: li r4, 8 +; CHECK-P9-NEXT: stxvx v2, r3, r4 +; CHECK-P9-NEXT: blr ; ; CHECK-P8-LE-LABEL: st_align16_vector: ; CHECK-P8-LE: # %bb.0: # %entry @@ -929,8 +957,7 @@ define dso_local void @st_unalign32_vector(i8* nocapture %ptr, <16 x i8> %str) { ; CHECK-P10-LABEL: st_unalign32_vector: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: stxvx v2, r3, r4 +; CHECK-P10-NEXT: pstxv v2, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_unalign32_vector: @@ -964,8 +991,7 @@ define dso_local void @st_align32_vector(i8* nocapture %ptr, <16 x i8> %str) { ; CHECK-P10-LABEL: st_align32_vector: ; CHECK-P10: # %bb.0: # %entry -; CHECK-P10-NEXT: pli r4, 99999000 -; CHECK-P10-NEXT: stxvx v2, r3, r4 +; CHECK-P10-NEXT: pstxv v2, 99999000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_align32_vector: @@ -1183,12 +1209,18 @@ ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly define dso_local void @st_disjoint_unalign16_vector(i64 %ptr, <16 x i8> %str) { -; CHECK-LABEL: st_disjoint_unalign16_vector: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: rldicr r3, r3, 0, 51 -; CHECK-NEXT: li r4, 6 -; CHECK-NEXT: stxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: st_disjoint_unalign16_vector: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P10-NEXT: pstxv v2, 6(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-P9-LABEL: st_disjoint_unalign16_vector: +; CHECK-P9: # %bb.0: # %entry +; CHECK-P9-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P9-NEXT: li r4, 6 +; CHECK-P9-NEXT: stxvx v2, r3, r4 +; CHECK-P9-NEXT: blr ; ; CHECK-P8-LE-LABEL: st_disjoint_unalign16_vector: ; CHECK-P8-LE: # %bb.0: # %entry @@ -1213,12 +1245,18 @@ ; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly define dso_local void @st_disjoint_align16_vector(i64 %ptr, <16 x i8> %str) { -; CHECK-LABEL: st_disjoint_align16_vector: -; CHECK: # %bb.0: # %entry -; CHECK-NEXT: rldicr r3, r3, 0, 51 -; CHECK-NEXT: li r4, 24 -; CHECK-NEXT: stxvx v2, r3, r4 -; CHECK-NEXT: blr +; CHECK-P10-LABEL: st_disjoint_align16_vector: +; CHECK-P10: # %bb.0: # %entry +; CHECK-P10-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P10-NEXT: pstxv v2, 24(r3), 0 +; CHECK-P10-NEXT: blr +; +; CHECK-P9-LABEL: st_disjoint_align16_vector: +; CHECK-P9: # %bb.0: # %entry +; CHECK-P9-NEXT: rldicr r3, r3, 0, 51 +; CHECK-P9-NEXT: li r4, 24 +; CHECK-P9-NEXT: stxvx v2, r3, r4 +; CHECK-P9-NEXT: blr ; ; CHECK-P8-LE-LABEL: st_disjoint_align16_vector: ; CHECK-P8-LE: # %bb.0: # %entry @@ -1275,8 +1313,7 @@ ; CHECK-P10-LABEL: st_disjoint_unalign32_vector: ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: rldicr r3, r3, 0, 43 -; CHECK-P10-NEXT: pli r4, 99999 -; CHECK-P10-NEXT: stxvx v2, r3, r4 +; CHECK-P10-NEXT: pstxv v2, 99999(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_unalign32_vector: @@ -1316,8 +1353,7 @@ ; CHECK-P10: # %bb.0: # %entry ; CHECK-P10-NEXT: lis r4, -15264 ; CHECK-P10-NEXT: and r3, r3, r4 -; CHECK-P10-NEXT: pli r4, 999990000 -; CHECK-P10-NEXT: stxvx v2, r3, r4 +; CHECK-P10-NEXT: pstxv v2, 999990000(r3), 0 ; CHECK-P10-NEXT: blr ; ; CHECK-P9-LABEL: st_disjoint_align32_vector: