Index: lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
===================================================================
--- lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
+++ lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
@@ -980,6 +980,25 @@
       insn->opcode == 0xE3)
     attrMask ^= ATTR_ADSIZE;
 
+  /*
+   * CALL/JMP 64-bit mode fix to ignore opcode size prefix when disassembling
+   * and consume all 4 bytes of the immediate/displacement instead;
+   * NOTE: intel spec states CALL rel16/JMP rel16  is Not Supported in 64-bit mode
+   */
+
+  if (insn->mode == MODE_64BIT && insn->opcodeType == ONEBYTE && isPrefixAtLocation(insn, 0x66, insn->necessaryPrefixLocation)){
+    switch (insn->opcode){
+    case 0xE8:
+      attrMask ^= ATTR_OPSIZE;
+      break;
+    case 0xE9:
+      attrMask ^= ATTR_OPSIZE;
+      insn->immediateSize = 4;
+      insn->displacementSize = 4;
+      break;
+    }
+  }
+
   if (getIDWithAttrMask(&instructionID, insn, attrMask))
     return -1;
 
Index: test/MC/Disassembler/X86/x86-64.txt
===================================================================
--- test/MC/Disassembler/X86/x86-64.txt
+++ test/MC/Disassembler/X86/x86-64.txt
@@ -301,3 +301,18 @@
 
 # CHECK: movq %rax, 1515870810
 0x67, 0x48 0xa3 0x5a 0x5a 0x5a 0x5a
+
+# CHECK: callq -32769
+0x66 0xe8 0xff 0x7f 0xff 0xff
+
+# CHECK: callq -32769
+0x66 0x66 0x48 0xe8 0xff 0x7f 0xff 0xff
+
+# CHECK: jmp -32769
+0xe9 0xff 0x7f 0xff 0xff
+
+# CHECK: jmp -32769
+0x66 0xe9 0xff 0x7f 0xff 0xff
+
+# CHECK: jmp -32769
+0x66 0x66 0x48 0xe9 0xff 0x7f 0xff 0xff