[libc] Set the ES bit when raising FP exceptions on x86

[michaelrj]

Summary

This change brings the synchronization of raised exceptions in line with
"Intel 64 and IA-32 Architectures Software Developer's Manual, Vol 1"
sections 8.6 and 8.7.

[sivachandra]

libc/utils/FPUtil/x86_64/FEnv.h

199

Add a comment here explaining that this functions returns a bit map of all enabled exceptions.

202

We usually try to be formal in multi-line comments. So, I would suggest a wording like this:

// The exceptions are enabled if the bit is zero (unmasked), 
// so that is why the negation before the & operation.

[michaelrj]

documentation changes

libc/utils/FPUtil/x86_64/FEnv.h

struct ExceptionFlags {
   static constexpr uint16_t Invalid = 0x1;
   static constexpr uint16_t Denormal = 0x2; // This flag is not used
   static constexpr uint16_t DivByZero = 0x4;
   static constexpr uint16_t Overflow = 0x8;
   static constexpr uint16_t Underflow = 0x10;
   static constexpr uint16_t Inexact = 0x20;
 };
 
+static constexpr uint16_t ExceptionSummaryStatusBit = 0x80;
+
 // The exception control bits occupy six bits, one bit for each exception.
 // In the x87 control word, they occupy the first 6 bits. In the MXCSR
 // register, they occupy bits 7 to 12.
 static constexpr uint16_t X87ExceptionControlBitPosition = 0;
 static constexpr uint16_t MXCSRExceptionContolBitPoistion = 7;
 
 // Exception flags are individual bits in the corresponding registers.
 // So, we just OR the bit values to get the full set of exceptions.

 static inline int testExcept(int excepts) {
   uint16_t statusValue = internal::getStatusValueForExcept(excepts);
   // Check both x87 status word and MXCSR.
   return internal::exceptionStatusToMacro(
       (statusValue & internal::getX87StatusWord()) |
       (statusValue & internal::getMXCSR()));
 }
 
+// This function returns a bitmap of which exceptions selected are enabled.
+static inline int isEnabled(int excepts) {
+  uint16_t x87CW = internal::getX87ControlWord();
+  return excepts & (~x87CW);
+  // The exceptions are enabled if the bit is zero (unmasked),
+  // so that is why the negation before the & operation.
+}
+
 static inline int raiseExcept(int excepts) {
   uint16_t statusValue = internal::getStatusValueForExcept(excepts);
 
   // We set the status flag for exception one at a time and call the
   // fwait instruction to actually get the processor to raise the
   // exception by calling the exception handler. This scheme is per
   // the description in in "8.6 X87 FPU EXCEPTION SYNCHRONIZATION"
   // of the "Intel 64 and IA-32 Architectures Software Developer's
   // Manual, Vol 1".
 
   // FPU status word is read for each exception seperately as the
   // exception handler can potentially write to it (typically to clear
   // the corresponding exception flag). By reading it separately, we
   // ensure that the writes by the exception handler are maintained
   // when raising the next exception.
 
   if (statusValue & internal::ExceptionFlags::Invalid) {
     internal::X87State state;
     internal::getX87State(state);
     state.StatusWord |= internal::ExceptionFlags::Invalid;
+    if (isEnabled(internal::ExceptionFlags::Invalid)) {
+      state.StatusWord |= internal::ExceptionSummaryStatusBit;
+    }
     internal::writeX87State(state);
     internal::fwait();
   }
   if (statusValue & internal::ExceptionFlags::DivByZero) {
     internal::X87State state;
     internal::getX87State(state);
     state.StatusWord |= internal::ExceptionFlags::DivByZero;
+    if (isEnabled(internal::ExceptionFlags::DivByZero)) {
+      state.StatusWord |= internal::ExceptionSummaryStatusBit;
+    }
     internal::writeX87State(state);
     internal::fwait();
   }
   if (statusValue & internal::ExceptionFlags::Overflow) {
     internal::X87State state;
     internal::getX87State(state);
     state.StatusWord |= internal::ExceptionFlags::Overflow;
+    if (isEnabled(internal::ExceptionFlags::Overflow)) {
+      state.StatusWord |= internal::ExceptionSummaryStatusBit;
+    }
     internal::writeX87State(state);
     internal::fwait();
   }
   if (statusValue & internal::ExceptionFlags::Underflow) {
     internal::X87State state;
     internal::getX87State(state);
     state.StatusWord |= internal::ExceptionFlags::Underflow;
+    if (isEnabled(internal::ExceptionFlags::Underflow)) {
+      state.StatusWord |= internal::ExceptionSummaryStatusBit;
+    }
     internal::writeX87State(state);
     internal::fwait();
   }
   if (statusValue & internal::ExceptionFlags::Inexact) {
     internal::X87State state;
     internal::getX87State(state);
     state.StatusWord |= internal::ExceptionFlags::Inexact;
+    if (isEnabled(internal::ExceptionFlags::Inexact)) {
+      state.StatusWord |= internal::ExceptionSummaryStatusBit;
+    }
     internal::writeX87State(state);
     internal::fwait();
   }
 
   // There is no special synchronization scheme available to
   // raise SEE exceptions. So, we will ignore that for now.
   // Just plain writing to the MXCSR register does not guarantee
   // the exception handler will be called.