diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -6270,9 +6270,6 @@
                                .Options.EnableAIXExtendedAltivecABI)
     report_fatal_error("the default Altivec AIX ABI is not yet supported");
 
-  if (ValVT == MVT::f128)
-    report_fatal_error("f128 is unimplemented on AIX.");
-
   if (ArgFlags.isNest())
     report_fatal_error("Nest arguments are unimplemented.");
 
@@ -6383,6 +6380,7 @@
 
     return false;
   }
+  case MVT::f128:
   case MVT::v4f32:
   case MVT::v4i32:
   case MVT::v8i16:
@@ -6422,6 +6420,7 @@
     return &PPC::F4RCRegClass;
   case MVT::f64:
     return &PPC::F8RCRegClass;
+  case MVT::f128:
   case MVT::v4f32:
   case MVT::v4i32:
   case MVT::v8i16:
diff --git a/llvm/test/CodeGen/PowerPC/f128-arith.ll b/llvm/test/CodeGen/PowerPC/f128-arith.ll
--- a/llvm/test/CodeGen/PowerPC/f128-arith.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-arith.ll
@@ -4,6 +4,8 @@
 ; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \
 ; RUN:   -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s -enable-soft-fp128 | FileCheck %s \
 ; RUN:   -check-prefix=CHECK-P8
+; RUN: llc -mcpu=pwr9 -mtriple=powerpc-ibm-aix-xcoff -verify-machineinstrs -vec-extabi \
+; RUN:   < %s | FileCheck %s -check-prefix=CHECK-P9-AIX
 
 ; Function Attrs: norecurse nounwind
 define dso_local void @qpAdd(fp128* nocapture readonly %a, fp128* nocapture %res) {
@@ -34,6 +36,13 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpAdd:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xsaddqp 2, 2, 2
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %add = fadd fp128 %0, %0
@@ -70,6 +79,13 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpSub:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xssubqp 2, 2, 2
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %sub = fsub fp128 %0, %0
@@ -106,6 +122,13 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpMul:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xsmulqp 2, 2, 2
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %mul = fmul fp128 %0, %0
@@ -142,6 +165,13 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpDiv:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xsdivqp 2, 2, 2
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %div = fdiv fp128 %0, %0
@@ -165,6 +195,14 @@
 ; CHECK-P8-NEXT:    addi r3, r4, 8
 ; CHECK-P8-NEXT:    stvx v2, 0, r3
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: testLdNSt:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    addi 3, 3, 4
+; CHECK-P9-AIX-NEXT:    addi 4, 4, 8
+; CHECK-P9-AIX-NEXT:    lxvx 0, 0, 3
+; CHECK-P9-AIX-NEXT:    stxvx 0, 0, 4
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %add.ptr = getelementptr inbounds i8, i8* %PtrC, i64 4
   %0 = bitcast i8* %add.ptr to fp128*
@@ -203,6 +241,13 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpSqrt:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xssqrtqp 2, 2
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.sqrt.f128(fp128 %0)
@@ -236,6 +281,14 @@
 ; CHECK-P8-NEXT:    lvx v2, 0, r4
 ; CHECK-P8-NEXT:    stvx v2, 0, r5
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpCpsgn:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    lxv 35, 0(4)
+; CHECK-P9-AIX-NEXT:    xscpsgnqp 2, 3, 2
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(5)
+; CHECK-P9-AIX-NEXT:    blr
                      fp128* nocapture %res) {
 entry:
   %0 = load fp128, fp128* %a, align 16
@@ -266,6 +319,13 @@
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    stvx v2, 0, r4
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpAbs:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xsabsqp 2, 2
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.fabs.f128(fp128 %0)
@@ -300,6 +360,13 @@
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    stvx v2, 0, r4
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpNAbs:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xsnabsqp 2, 2
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.fabs.f128(fp128 %0)
@@ -328,6 +395,13 @@
 ; CHECK-P8-NEXT:    lvx v2, 0, r3
 ; CHECK-P8-NEXT:    stvx v2, 0, r4
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpNeg:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xsnegqp 2, 2
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %sub = fsub fp128 0xL00000000000000008000000000000000, %0
@@ -366,6 +440,19 @@
 ; CHECK-P8-NEXT:    ld r0, 16(r1)
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qp_sin:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    bl .sinf128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.sin.f128(fp128 %0)
@@ -403,6 +490,19 @@
 ; CHECK-P8-NEXT:    ld r0, 16(r1)
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qp_cos:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    bl .cosf128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.cos.f128(fp128 %0)
@@ -440,6 +540,19 @@
 ; CHECK-P8-NEXT:    ld r0, 16(r1)
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qp_log:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    bl .logf128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.log.f128(fp128 %0)
@@ -477,6 +590,19 @@
 ; CHECK-P8-NEXT:    ld r0, 16(r1)
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qp_log10:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    bl .log10f128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.log10.f128(fp128 %0)
@@ -514,6 +640,19 @@
 ; CHECK-P8-NEXT:    ld r0, 16(r1)
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qp_log2:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    bl .log2f128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.log2.f128(fp128 %0)
@@ -553,6 +692,20 @@
 ; CHECK-P8-NEXT:    ld r0, 16(r1)
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qp_minnum:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    lxv 35, 0(4)
+; CHECK-P9-AIX-NEXT:    bl .fminf128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
                         fp128* nocapture readonly %b) {
 entry:
   %0 = load fp128, fp128* %a, align 16
@@ -594,6 +747,20 @@
 ; CHECK-P8-NEXT:    ld r0, 16(r1)
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qp_maxnum:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    lxv 35, 0(4)
+; CHECK-P9-AIX-NEXT:    bl .fmaxf128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
                         fp128* nocapture readonly %b) {
 entry:
   %0 = load fp128, fp128* %a, align 16
@@ -635,6 +802,20 @@
 ; CHECK-P8-NEXT:    ld r0, 16(r1)
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qp_pow:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    lxv 35, 0(4)
+; CHECK-P9-AIX-NEXT:    bl .powf128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
                      fp128* nocapture readonly %b) {
 entry:
   %0 = load fp128, fp128* %a, align 16
@@ -674,6 +855,19 @@
 ; CHECK-P8-NEXT:    ld r0, 16(r1)
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qp_exp:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    bl .expf128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.exp.f128(fp128 %0)
@@ -711,6 +905,19 @@
 ; CHECK-P8-NEXT:    ld r0, 16(r1)
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qp_exp2:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    bl .exp2f128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.exp2.f128(fp128 %0)
@@ -761,6 +968,24 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qp_powi:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    lwz 3, 0(4)
+; CHECK-P9-AIX-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; CHECK-P9-AIX-NEXT:    mr 30, 5
+; CHECK-P9-AIX-NEXT:    bl .__powikf2[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(30)
+; CHECK-P9-AIX-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
                      fp128* nocapture %res) {
 entry:
   %0 = load fp128, fp128* %a, align 16
@@ -814,6 +1039,22 @@
 ; CHECK-P8-NEXT:    ld r0, 16(r1)
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qp_frem:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lwz 3, L..C0(2)
+; CHECK-P9-AIX-NEXT:    lxvx 34, 0, 3
+; CHECK-P9-AIX-NEXT:    lwz 3, L..C1(2)
+; CHECK-P9-AIX-NEXT:    lxvx 35, 0, 3
+; CHECK-P9-AIX-NEXT:    bl .fmodf128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* @a, align 16
   %1 = load fp128, fp128* @b, align 16
@@ -848,6 +1089,13 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpCeil:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xsrqpi 1, 2, 2, 2
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.ceil.f128(fp128 %0)
@@ -883,6 +1131,13 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpFloor:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xsrqpi 1, 2, 2, 3
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.floor.f128(fp128 %0)
@@ -918,6 +1173,13 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpTrunc:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xsrqpi 1, 2, 2, 1
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.trunc.f128(fp128 %0)
@@ -953,6 +1215,13 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpRound:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xsrqpi 0, 2, 2, 0
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.round.f128(fp128 %0)
@@ -1001,6 +1270,23 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpLRound:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; CHECK-P9-AIX-NEXT:    mr 30, 4
+; CHECK-P9-AIX-NEXT:    bl .lroundf128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    stw 3, 0(30)
+; CHECK-P9-AIX-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call i32 @llvm.lround.f128(fp128 %0)
@@ -1049,6 +1335,24 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpLLRound:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; CHECK-P9-AIX-NEXT:    mr 30, 4
+; CHECK-P9-AIX-NEXT:    bl .llroundf128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    stw 4, 4(30)
+; CHECK-P9-AIX-NEXT:    stw 3, 0(30)
+; CHECK-P9-AIX-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call i64 @llvm.llround.f128(fp128 %0)
@@ -1084,6 +1388,13 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpRint:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xsrqpix 0, 2, 2, 3
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.rint.f128(fp128 %0)
@@ -1132,6 +1443,23 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpLRint:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; CHECK-P9-AIX-NEXT:    mr 30, 4
+; CHECK-P9-AIX-NEXT:    bl .lrintf128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    stw 3, 0(30)
+; CHECK-P9-AIX-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call i32 @llvm.lrint.f128(fp128 %0)
@@ -1180,6 +1508,24 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpLLRint:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    mflr 0
+; CHECK-P9-AIX-NEXT:    stw 0, 8(1)
+; CHECK-P9-AIX-NEXT:    stwu 1, -64(1)
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    stw 30, 56(1) # 4-byte Folded Spill
+; CHECK-P9-AIX-NEXT:    mr 30, 4
+; CHECK-P9-AIX-NEXT:    bl .llrintf128[PR]
+; CHECK-P9-AIX-NEXT:    nop
+; CHECK-P9-AIX-NEXT:    stw 4, 4(30)
+; CHECK-P9-AIX-NEXT:    stw 3, 0(30)
+; CHECK-P9-AIX-NEXT:    lwz 30, 56(1) # 4-byte Folded Reload
+; CHECK-P9-AIX-NEXT:    addi 1, 1, 64
+; CHECK-P9-AIX-NEXT:    lwz 0, 8(1)
+; CHECK-P9-AIX-NEXT:    mtlr 0
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call i64 @llvm.llrint.f128(fp128 %0)
@@ -1215,6 +1561,13 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpNearByInt:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    xsrqpi 0, 2, 2, 3
+; CHECK-P9-AIX-NEXT:    stxv 34, 0(4)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = tail call fp128 @llvm.nearbyint.f128(fp128 %0)
@@ -1254,6 +1607,15 @@
 ; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-P8-NEXT:    mtlr r0
 ; CHECK-P8-NEXT:    blr
+;
+; CHECK-P9-AIX-LABEL: qpFMA:
+; CHECK-P9-AIX:       # %bb.0: # %entry
+; CHECK-P9-AIX-NEXT:    lxv 34, 0(3)
+; CHECK-P9-AIX-NEXT:    lxv 35, 0(4)
+; CHECK-P9-AIX-NEXT:    lxv 36, 0(5)
+; CHECK-P9-AIX-NEXT:    xsmaddqp 4, 2, 3
+; CHECK-P9-AIX-NEXT:    stxv 36, 0(6)
+; CHECK-P9-AIX-NEXT:    blr
 entry:
   %0 = load fp128, fp128* %a, align 16
   %1 = load fp128, fp128* %b, align 16