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Differential D94291

[VE][NFC] Clean ISel patterns for LSV and LVS
ClosedPublic

Authored by kaz7 on Jan 8 2021, 3:01 AM.

Details

Reviewers
simoll
k-ishizaka
Commits
rG99c84af1a25a: [VE][NFC] Clean ISel patterns for LSV and LVS
Summary

Clean ISel patterns for LSV and LVS before upstream more hand-written
ISel patterns.

Diff Detail

Event Timeline

kaz7 created this revision.Jan 8 2021, 3:01 AM
Herald added a subscriber: hiraditya. · View Herald TranscriptJan 8 2021, 3:01 AM
kaz7 requested review of this revision.Jan 8 2021, 3:01 AM
Herald added a subscriber: llvm-commits. · View Herald TranscriptJan 8 2021, 3:01 AM
Harbormaster completed remote builds in B84439: Diff 315329.Jan 8 2021, 3:42 AM
simoll accepted this revision.Jan 8 2021, 4:13 AM
This revision is now accepted and ready to land.Jan 8 2021, 4:13 AM
Closed by commit rG99c84af1a25a: [VE][NFC] Clean ISel patterns for LSV and LVS (authored by kaz7). · Explain WhyJan 8 2021, 4:48 AM
This revision was automatically updated to reflect the committed changes.
kaz7 added a commit: rG99c84af1a25a: [VE][NFC] Clean ISel patterns for LSV and LVS.

Revision Contents

PathSize
llvm/
lib/
Target/
VE/
24 lines

Diff 315345

llvm/lib/Target/VE/VEInstrIntrinsicVL.td

// Pattern Matchings for VEL Intrinsics /// Pattern Matchings for VEL intrinsic instructions.
// Define intrinsics written by hand /// Intrinsic patterns written by hand.
// SVOB pattern. // SVOB pattern.
def : Pat<(int_ve_vl_svob), (SVOB)>; def : Pat<(int_ve_vl_svob), (SVOB)>;
// The lsv and lvs patterns // LSV patterns.
def : Pat<(int_ve_vl_lsv_vvss v256f64:$pt, i32:$sy, i64:$sz), def : Pat<(int_ve_vl_lsv_vvss v256f64:$pt, i32:$sy, i64:$sz),
(LSVrr_v (INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy, sub_i32), (LSVrr_v (i2l i32:$sy), i64:$sz, v256f64:$pt)>;
i64:$sz, v256f64:$pt)>;
// LVS patterns.
def : Pat<(int_ve_vl_lvsl_svs v256f64:$vx, i32:$sy), def : Pat<(int_ve_vl_lvsl_svs v256f64:$vx, i32:$sy),
(LVSvr v256f64:$vx, (LVSvr v256f64:$vx, (i2l i32:$sy))>;
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy, sub_i32))>;
def : Pat<(int_ve_vl_lvsd_svs v256f64:$vx, i32:$sy), def : Pat<(int_ve_vl_lvsd_svs v256f64:$vx, i32:$sy),
(LVSvr v256f64:$vx, (LVSvr v256f64:$vx, (i2l i32:$sy))>;
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy, sub_i32))>;
def : Pat<(int_ve_vl_lvss_svs v256f64:$vx, i32:$sy), def : Pat<(int_ve_vl_lvss_svs v256f64:$vx, i32:$sy),
(EXTRACT_SUBREG (LVSvr v256f64:$vx, (l2f (LVSvr v256f64:$vx, (i2l i32:$sy)))>;
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy,
sub_i32)),
sub_f32)>;
// Define intrinsics automatically generated /// Intrinsic patterns automatically generated.
include "VEInstrIntrinsicVL.gen.td" include "VEInstrIntrinsicVL.gen.td"