diff --git a/llvm/test/CodeGen/MIR/RISCV/aliases-v.mir b/llvm/test/CodeGen/MIR/RISCV/aliases-v.mir new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/MIR/RISCV/aliases-v.mir @@ -0,0 +1,59 @@ +# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +# RUN: llc -mtriple riscv32 -mattr=+experimental-v -start-after riscv-expand-pseudo -o - %s | FileCheck %s +# RUN: llc -mtriple riscv64 -mattr=+experimental-v -start-after riscv-expand-pseudo -o - %s | FileCheck %s +# FIXME: These should all use the 'vnot' alias despite not having masks +--- | + + define void @vnot_mask_1() { + ; CHECK-LABEL: vnot_mask_1: + ; CHECK: # %bb.0: + ; CHECK-NEXT: vnot.v v25, v25, v0.t + ret void + } + define void @vnot_mask_2() { + ; CHECK-LABEL: vnot_mask_2: + ; CHECK: # %bb.0: + ; CHECK-NEXT: vnot.v v1, v25, v0.t + ret void + } + define void @vnot_no_mask_1() { + ; CHECK-LABEL: vnot_no_mask_1: + ; CHECK: # %bb.0: + ; CHECK-NEXT: vxor.vi v25, v25, -1 + ret void + } + define void @vnot_no_mask_2() { + ; CHECK-LABEL: vnot_no_mask_2: + ; CHECK: # %bb.0: + ; CHECK-NEXT: vxor.vi v1, v25, -1 + ret void + } +... +--- +name: vnot_mask_1 +body: | + bb.0: + liveins: $v0, $v25 + $v25 = VXOR_VI killed $v25, -1, $v0, implicit $vtype, implicit $vl +... +--- +name: vnot_mask_2 +body: | + bb.0: + liveins: $v0, $v25 + $v1 = VXOR_VI killed $v25, -1, $v0, implicit $vtype, implicit $vl +... +--- +name: vnot_no_mask_1 +body: | + bb.0: + liveins: $v0, $v25 + $v25 = VXOR_VI killed $v25, -1, $noreg, implicit $vtype, implicit $vl +... +--- +name: vnot_no_mask_2 +body: | + bb.0: + liveins: $v0, $v25 + $v1 = VXOR_VI killed $v25, -1, $noreg, implicit $vtype, implicit $vl +... diff --git a/llvm/test/CodeGen/MIR/RISCV/lit.local.cfg b/llvm/test/CodeGen/MIR/RISCV/lit.local.cfg new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/MIR/RISCV/lit.local.cfg @@ -0,0 +1,2 @@ +if not 'RISCV' in config.root.targets: + config.unsupported = True