diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
--- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
+++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
@@ -1245,6 +1245,10 @@
 OperandMatchResultTy PPCAsmParser::tryParseRegister(unsigned &RegNo,
                                                     SMLoc &StartLoc,
                                                     SMLoc &EndLoc) {
+  // CFI directives may have registers with and without a '%' prefix.
+  if (getLexer().getKind() == AsmToken::Percent)
+    getParser().Lex(); // Eat the '%'.
+
   const AsmToken &Tok = getParser().getTok();
   StartLoc = Tok.getLoc();
   EndLoc = Tok.getEndLoc();
diff --git a/llvm/test/MC/PowerPC/cfi-register-directive-parse.s b/llvm/test/MC/PowerPC/cfi-register-directive-parse.s
new file mode 100644
--- /dev/null
+++ b/llvm/test/MC/PowerPC/cfi-register-directive-parse.s
@@ -0,0 +1,19 @@
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown %s 2>&1 | FileCheck %s
+
+# Test that CFI directives can handle registers with a '%' prefix.
+
+# CHECK-LABEL:	__test1
+# CHECK:	.cfi_startproc
+# CHECK-NEXT:   mflr	12
+# CHECK-NEXT:   .cfi_register lr, r12
+# CHECK-NEXT:   blr
+# CHECK-NEXT:   .cfi_endproc
+
+	.text
+	.globl __test1
+__test1:
+	.cfi_startproc
+	mflr %r12
+	.cfi_register lr,%r12
+	blr
+	.cfi_endproc