[lldb] Use translated full ftag values

[mgorny]

Summary

Translate between abridged and full ftag values in order to expose
the latter in the gdb-remote protocol while the former are used by
FXSAVE/XSAVE... This matches the gdb behavior.

[mgorny]

I'll port to other platforms once we agree on the approach.

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

535

@labath, any suggestion what kind of test to use here? Maybe against &m_xstate->fxsave.ftag address?

[labath]

Looks reasonable to me.

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

535

You mean, like, how to detect that we're dealing with the ftag register?

This approach seems reasonable to me..

lldb/source/Plugins/Process/Utility/RegisterContext_x86.h

386

This is probably complex enough to deserve creating a cpp file (and a header comment explaining the high-level purpose of the function).

386

Also, probably ArrayRef<MMSReg> instead of the raw pointer.

lldb/unittests/Process/Utility/RegisterContextTest.cpp

32

Add const, for good measure (I see that will result in additional const qualifications in a bunch of places.

[mgorny]

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

535

This = checking register number like in the code (in which I suppose we'd have to move distinguishing amd64/i386 to ctor like first_fpr? Or checking for actual pointer as I suggested in the comment?

[mgorny]

Move the functions into a new file, add comment, use llvm::ArrayRef.

[mgorny]

Port NetBSD plugin.

[labath]

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

535

I originally meant the register number approach, but I see what you mean now.

I think that going off of the address is perfectly fine...

[mgorny]

Updated Linux to use pointer comparison and FreeBSD. It's ready for review now, though I'd use a better suggestion for FreeBSD.

[labath]

Looks good. Some minor questions inline.

lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp

521

if you make data a void*, then you can remove the reinterpret_cast two lines below.

526

reuse data from above

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

537

Is this really needed? I would have hoped that just passing m_xstate->fxsave.stmm would be enough and that the c array constructor of ArrayRef would do the right thing...

lldb/unittests/Process/Utility/RegisterContextTest.cpp

56

add SCOPED_TRACE macro to make it clear which test case failed, when it fails. You can use llvm::enumerate to produce sequence numbers for the test cases...

[mgorny]

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

537

Indeed. I have missed that ArrayRef can figure the size of a C-style array out.

[mgorny]

Simplified FreeBSD & Linux code as @labath suggested. Also added the scope thingy to tests.

[mgorny]

Declare MMSRegComp type explicitly to avoid warnings:

In file included from /home/mgorny/llvm-project/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextLinux_x86_64.cpp:11:
In file included from /home/mgorny/llvm-project/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.h:12:
/home/mgorny/llvm-project/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContext_x86.h:247:5: warning: anonymous types declared in an anonymous union are an extension [-Wnested-anon-types]
    struct {
    ^
1 warning generated.

[labath]

ship it

[goncharov]

Hi @mgorny! http://lab.llvm.org:8011/#/builders/68/builds/2298 build failed. Could you please fix the test?

[mgorny]

In D91504#2405504, @goncharov wrote:

Hi @mgorny! http://lab.llvm.org:8011/#/builders/68/builds/2298 build failed. Could you please fix the test?

I'm sorry about that. I'll look into it.

[mgorny]

Update TestRegisters.py.

[mgorny]

Does this change to TestRegister.py look good? It makes the test pass for me (and seems logically correct).

[labath]

Well... I think that will make the test fail on mac, as debugserver hasn't been updated.

This test comes from D12592, and is actually serves a very similar purpose to the test you just wrote. Normally, I would say we don't need both of them, but since we still have debugserver with the old behavior, and your new test is consistent with how we've (you've) been writing other register tests, maybe we could just slap @skipUnlessDarwin on TestRegisters.py, and put some comments (on both tests) that explain the situation and cross-reference each other (?)

[mgorny]

In D91504#2407397, @labath wrote:

Well... I think that will make the test fail on mac, as debugserver hasn't been updated.

This test comes from D12592, and is actually serves a very similar purpose to the test you just wrote. Normally, I would say we don't need both of them, but since we still have debugserver with the old behavior, and your new test is consistent with how we've (you've) been writing other register tests, maybe we could just slap @skipUnlessDarwin on TestRegisters.py, and put some comments (on both tests) that explain the situation and cross-reference each other (?)

I could do that. I suppose it'd also be reasonably easy to make the Python test support both platforms with an if.

[mgorny]

Skipped python test on non-Darwin, xfailed shell test on Darwin, added respective comments.

lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp

NativeRegisterContextFreeBSD_x86_64::ReadRegister(const RegisterInfo *reg_info,
   enum RegSetKind set = opt_set.getValue();
   error = ReadRegisterSet(set);
   if (error.Fail())
     return error;
 
   switch (set) {
   case GPRegSet:
   case FPRegSet:
-  case DBRegSet:
-    reg_value.SetBytes(GetOffsetRegSetData(set, reg_info->byte_offset),
-                       reg_info->byte_size, endian::InlHostByteOrder());
+  case DBRegSet: {
+    void *data = GetOffsetRegSetData(set, reg_info->byte_offset);
+    FXSAVE *fpr = reinterpret_cast<FXSAVE *>(m_fpr.data());
+    if (data == &fpr->ftag) // ftag
+      reg_value.SetUInt16(
+          AbridgedToFullTagWord(fpr->ftag, fpr->fstat, fpr->stmm));
+    else
+      reg_value.SetBytes(data, reg_info->byte_size, endian::InlHostByteOrder());
     break;
+  }
   case YMMRegSet: {
     llvm::Optional<YMMSplitPtr> ymm_reg = GetYMMSplitReg(reg);
     if (!ymm_reg) {
       error.SetErrorStringWithFormat(
           "register \"%s\" not supported by CPU/kernel", reg_info->name);
     } else {
       YMMReg ymm = XStateToYMM(ymm_reg->xmm, ymm_reg->ymm_hi);
       reg_value.SetBytes(ymm.bytes, reg_info->byte_size,
Status NativeRegisterContextFreeBSD_x86_64::WriteRegister(
   enum RegSetKind set = opt_set.getValue();
   error = ReadRegisterSet(set);
   if (error.Fail())
     return error;
 
   switch (set) {
   case GPRegSet:
   case FPRegSet:
-  case DBRegSet:
-    ::memcpy(GetOffsetRegSetData(set, reg_info->byte_offset),
-             reg_value.GetBytes(), reg_value.GetByteSize());
+  case DBRegSet: {
+    void *data = GetOffsetRegSetData(set, reg_info->byte_offset);
+    FXSAVE *fpr = reinterpret_cast<FXSAVE *>(m_fpr.data());
+    if (data == &fpr->ftag) // ftag
+      fpr->ftag = FullToAbridgedTagWord(reg_value.GetAsUInt16());
+    else
+      ::memcpy(data, reg_value.GetBytes(), reg_value.GetByteSize());
     break;
+  }
   case YMMRegSet: {
     llvm::Optional<YMMSplitPtr> ymm_reg = GetYMMSplitReg(reg);
     if (!ymm_reg) {
       error.SetErrorStringWithFormat(
           "register \"%s\" not supported by CPU/kernel", reg_info->name);
     } else {
       YMMReg ymm;
       ::memcpy(ymm.bytes, reg_value.GetBytes(), reg_value.GetByteSize());

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_x86_64.cpp

NativeRegisterContextLinux_x86_64::ReadRegister(const RegisterInfo *reg_info,
   // structure.
 
   // Since, FPR structure is also one of the member of UserArea structure.
   // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) -
   // byte_offset(fctrl wrt UserArea)
   assert((reg_info->byte_offset - m_fctrl_offset_in_userarea) < sizeof(FPR));
   uint8_t *src = (uint8_t *)m_xstate.get() + reg_info->byte_offset -
                  m_fctrl_offset_in_userarea;
+
+  if (src == reinterpret_cast<uint8_t *>(&m_xstate->fxsave.ftag)) {
+    reg_value.SetUInt16(AbridgedToFullTagWord(
+        m_xstate->fxsave.ftag, m_xstate->fxsave.fstat, m_xstate->fxsave.stmm));
+    return error;
+  }
+
   switch (reg_info->byte_size) {
   case 1:
     reg_value.SetUInt8(*(uint8_t *)src);
     break;
   case 2:
     reg_value.SetUInt16(*(uint16_t *)src);
     break;
   case 4:
if (reg_info->encoding == lldb::eEncodingVector) {
 
       // Since, FPR structure is also one of the member of UserArea structure.
       // byte_offset(fpu wrt FPR) = byte_offset(fpu wrt UserArea) -
       // byte_offset(fctrl wrt UserArea)
       assert((reg_info->byte_offset - m_fctrl_offset_in_userarea) <
              sizeof(FPR));
       uint8_t *dst = (uint8_t *)m_xstate.get() + reg_info->byte_offset -
                      m_fctrl_offset_in_userarea;
+
+      if (dst == reinterpret_cast<uint8_t *>(&m_xstate->fxsave.ftag))
+        m_xstate->fxsave.ftag = FullToAbridgedTagWord(reg_value.GetAsUInt16());
+      else {
         switch (reg_info->byte_size) {
         case 1:
           *(uint8_t *)dst = reg_value.GetAsUInt8();
           break;
         case 2:
           *(uint16_t *)dst = reg_value.GetAsUInt16();
           break;
         case 4:
           *(uint32_t *)dst = reg_value.GetAsUInt32();
           break;
         case 8:
           *(uint64_t *)dst = reg_value.GetAsUInt64();
           break;
         default:
           assert(false && "Unhandled data size.");
           return Status("unhandled register data size %" PRIu32,
                         reg_info->byte_size);
         }
       }
+    }
 
     Status error = WriteFPR();
     if (error.Fail())
       return error;
 
     if (IsAVX(reg_index)) {
       if (!CopyYMMtoXSTATE(reg_index, GetByteOrder()))
         return Status("CopyYMMtoXSTATE() failed");

lldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp

case lldb_es_x86_64:
     break;
 #endif
   case lldb_fctrl_x86_64:
     reg_value = (uint16_t)m_xstate.xs_fxsave.fx_cw;
     break;
   case lldb_fstat_x86_64:
     reg_value = (uint16_t)m_xstate.xs_fxsave.fx_sw;
     break;
-  case lldb_ftag_x86_64:
-    reg_value = (uint16_t)m_xstate.xs_fxsave.fx_tw;
+  case lldb_ftag_x86_64: {
+    llvm::ArrayRef<MMSReg> st_regs{
+        reinterpret_cast<MMSReg *>(m_xstate.xs_fxsave.fx_87_ac), 8};
+    reg_value = (uint16_t)AbridgedToFullTagWord(
+        m_xstate.xs_fxsave.fx_tw, m_xstate.xs_fxsave.fx_sw, st_regs);
     break;
+  }
   case lldb_fop_x86_64:
     reg_value = (uint64_t)m_xstate.xs_fxsave.fx_opcode;
     break;
   case lldb_fiseg_x86_64:
     reg_value = (uint32_t)m_xstate.xs_fxsave.fx_ip.fa_32.fa_seg;
     break;
   case lldb_fioff_x86_64:
     reg_value = (uint32_t)m_xstate.xs_fxsave.fx_ip.fa_32.fa_off;

 #endif
   case lldb_fctrl_x86_64:
     m_xstate.xs_fxsave.fx_cw = reg_value.GetAsUInt16();
     break;
   case lldb_fstat_x86_64:
     m_xstate.xs_fxsave.fx_sw = reg_value.GetAsUInt16();
     break;
   case lldb_ftag_x86_64:
-    m_xstate.xs_fxsave.fx_tw = reg_value.GetAsUInt16();
+    m_xstate.xs_fxsave.fx_tw = FullToAbridgedTagWord(reg_value.GetAsUInt16());
     break;
   case lldb_fop_x86_64:
     m_xstate.xs_fxsave.fx_opcode = reg_value.GetAsUInt16();
     break;
   case lldb_fiseg_x86_64:
     m_xstate.xs_fxsave.fx_ip.fa_32.fa_seg = reg_value.GetAsUInt32();
     break;
   case lldb_fioff_x86_64:

lldb/source/Plugins/Process/Utility/CMakeLists.txt

 add_lldb_library(lldbPluginProcessUtility
   AuxVector.cpp
   DynamicRegisterInfo.cpp
   FreeBSDSignals.cpp
   GDBRemoteSignals.cpp
   HistoryThread.cpp
   HistoryUnwind.cpp
   InferiorCallPOSIX.cpp
   LinuxProcMaps.cpp
   LinuxSignals.cpp
   MipsLinuxSignals.cpp
   NativeRegisterContextRegisterInfo.cpp
   NativeRegisterContextWatchpoint_x86.cpp
   NetBSDSignals.cpp
+  RegisterContext_x86.cpp
   RegisterContextDarwin_arm.cpp
   RegisterContextDarwin_arm64.cpp
   RegisterContextDarwin_i386.cpp
   RegisterContextDarwin_x86_64.cpp
   RegisterContextDummy.cpp
   RegisterContextFreeBSD_i386.cpp
   RegisterContextFreeBSD_mips64.cpp
   RegisterContextFreeBSD_powerpc.cpp

lldb/source/Plugins/Process/Utility/RegisterContext_x86.h

 //===-- RegisterContext_x86.h -----------------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXT_X86_H
 #define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXT_X86_H
 
 #include <cstddef>
 #include <cstdint>
 
+#include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/BitmaskEnum.h"
 #include "llvm/Support/Compiler.h"
 
 namespace lldb_private {
 // i386 ehframe, dwarf regnums
 
 // Register numbers seen in eh_frame (eRegisterKindEHFrame) on i386 systems
 // (non-Darwin)
enum {
   // dwarf_k4_x86_64,
   // dwarf_k5_x86_64,
   // dwarf_k6_x86_64,
   // dwarf_k7_x86_64,
 };
 
 // Generic floating-point registers
 
+LLVM_PACKED_START
+struct MMSRegComp {
+  uint64_t mantissa;
+  uint16_t sign_exp;
+};
+
 struct MMSReg {
+  union {
     uint8_t bytes[10];
+    MMSRegComp comp;
+  };
   uint8_t pad[6];
 };
+LLVM_PACKED_END
+
+static_assert(sizeof(MMSRegComp) == 10, "MMSRegComp is not 10 bytes of size");
+static_assert(sizeof(MMSReg) == 16, "MMSReg is not 16 bytes of size");
 
 struct XMMReg {
   uint8_t bytes[16]; // 128-bits for each XMM register
 };
 
 // i387_fxsave_struct
 struct FXSAVE {
   uint16_t fctrl;     // FPU Control Word (fcw)

 }
 
 // Convenience function to copy YMM register data into XSAVE-style output.
 inline void YMMToXState(const YMMReg& input, void* xmm_bytes, void* ymmh_bytes) {
   ::memcpy(xmm_bytes, input.bytes, sizeof(XMMReg));
   ::memcpy(ymmh_bytes, input.bytes + sizeof(XMMReg), sizeof(YMMHReg));
 }
 
+uint16_t AbridgedToFullTagWord(uint8_t abridged_tw, uint16_t sw,
+                               llvm::ArrayRef<MMSReg> st_regs);
+uint8_t FullToAbridgedTagWord(uint16_t tw);
+
 } // namespace lldb_private
 
 #endif

lldb/source/Plugins/Process/Utility/RegisterContext_x86.cpp

+//===-- RegisterContext_x86.cpp ---------------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "RegisterContext_x86.h"
+
+using namespace lldb_private;
+
+// Convert the 8-bit abridged FPU Tag Word (as found in FXSAVE) to the full
+// 16-bit FPU Tag Word (as found in FSAVE, and used by gdb protocol).  This
+// requires knowing the values of the ST(i) registers and the FPU Status Word.
+uint16_t lldb_private::AbridgedToFullTagWord(uint8_t abridged_tw, uint16_t sw,
+                                             llvm::ArrayRef<MMSReg> st_regs) {
+  // Tag word is using internal FPU register numbering rather than ST(i).
+  // Mapping to ST(i): i = FPU regno - TOP (Status Word, bits 11:13).
+  // Here we start with FPU reg 7 and go down.
+  int st = 7 - ((sw >> 11) & 7);
+  uint16_t tw = 0;
+  for (uint8_t mask = 0x80; mask != 0; mask >>= 1) {
+    tw <<= 2;
+    if (abridged_tw & mask) {
+      // The register is non-empty, so we need to check the value of ST(i).
+      uint16_t exp =
+          st_regs[st].comp.sign_exp & 0x7fff; // Discard the sign bit.
+      if (exp == 0) {
+        if (st_regs[st].comp.mantissa == 0)
+          tw |= 1; // Zero
+        else
+          tw |= 2; // Denormal
+      } else if (exp == 0x7fff)
+        tw |= 2; // Infinity or NaN
+      // 0 if normal number
+    } else
+      tw |= 3; // Empty register
+
+    // Rotate ST down.
+    st = (st - 1) & 7;
+  }
+
+  return tw;
+}
+
+// Convert the 16-bit FPU Tag Word to the abridged 8-bit value, to be written
+// into FXSAVE.
+uint8_t lldb_private::FullToAbridgedTagWord(uint16_t tw) {
+  uint8_t abridged_tw = 0;
+  for (uint16_t mask = 0xc000; mask != 0; mask >>= 2) {
+    abridged_tw <<= 1;
+    // full TW uses 11 for empty registers, aTW uses 0
+    if ((tw & mask) != mask)
+      abridged_tw |= 1;
+  }
+  return abridged_tw;
+}

lldb/test/Shell/Register/x86-64-fp-read.test

 print (void*)($pc-3)
 # CHECK: (void *) $0 = [[FDIV:0x[0-9a-f]*]]
 print &zero
 # CHECK: (uint32_t *) $1 = [[ZERO:0x[0-9a-f]*]]
 
 register read --all
 # CHECK-DAG: fctrl = 0x037b
 # CHECK-DAG: fstat = 0x8084
-# TODO: the following value is incorrect, it's a bug in the way
-# FXSAVE/XSAVE is interpreted
-# CHECK-DAG: ftag = 0x007f
+# CHECK-DAG: ftag = 0xea58
 # CHECK-DAG: fop = 0x0033
 # CHECK-DAG: fip = [[FDIV]]
 # CHECK-DAG: fdp = [[ZERO]]
 
 # CHECK-DAG: st{{(mm)?}}0 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x40}
 # CHECK-DAG: st{{(mm)?}}1 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x3f 0x00 0x00}
 # CHECK-DAG: st{{(mm)?}}2 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
 # CHECK-DAG: st{{(mm)?}}3 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80}

lldb/test/Shell/Register/x86-64-fp-write.test

 # XFAIL: system-windows
 # XFAIL: system-darwin
 # REQUIRES: native && target-x86_64
 # RUN: %clangxx_host %p/Inputs/x86-fp-write.cpp -o %t
 # RUN: %lldb -b -s %s %t | FileCheck %s
 process launch
 
 register write fctrl 0x037b
 register write fstat 0x8884
 # note: this needs to enable all registers for writes to be effective
-# TODO: fix it to use proper ftag values instead of 'abridged'
-register write ftag 0x00ff
+register write ftag 0x2a58
 register write fop 0x0033
 # the exact addresses do not matter, we want just to verify FXSAVE
 # note: fxrstor64 apparently truncates this to 48 bits, and sign extends
 #       the highest bits, so let's keep the value safely below
 register write fip 0x0000056789abcdef
 register write fdp 0x00000a9876543210
 
 register write st0 "{0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x40}"

lldb/test/Shell/Register/x86-fp-read.test

 # XFAIL: system-windows
 # REQUIRES: native && target-x86
 # RUN: %clangxx_host -g %p/Inputs/x86-fp-read.cpp -o %t
 # RUN: %lldb -b -s %s %t | FileCheck %s
 process launch
 # CHECK: Process {{.*}} stopped
 
 # fdiv (%rbx) gets encoded into 2 bytes, int3 into 1 byte
 print (void*)($pc-3)
 # CHECK: (void *) $0 = [[FDIV:0x[0-9a-f]*]]
 print &zero
 # CHECK: (uint32_t *) $1 = [[ZERO:0x[0-9a-f]*]]
 
 register read --all
 # CHECK-DAG: fctrl = 0x037b
 # CHECK-DAG: fstat = 0x8084
-# TODO: the following value is incorrect, it's a bug in the way
-# FXSAVE/XSAVE is interpreted
-# CHECK-DAG: ftag = 0x007f
+# CHECK-DAG: ftag = 0xea58
 # CHECK-DAG: fop = 0x0033
 # CHECK-DAG: fioff = [[FDIV]]
 # CHECK-DAG: fooff = [[ZERO]]
 
 # CHECK-DAG: st{{(mm)?}}0 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x40}
 # CHECK-DAG: st{{(mm)?}}1 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x3f 0x00 0x00}
 # CHECK-DAG: st{{(mm)?}}2 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
 # CHECK-DAG: st{{(mm)?}}3 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80}
 # CHECK-DAG: st{{(mm)?}}4 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0xff 0x7f}
 # CHECK-DAG: st{{(mm)?}}5 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0xff 0xff}
 # CHECK-DAG: st{{(mm)?}}6 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0xc0 0xff 0xff}
 # CHECK-DAG: st{{(mm)?}}7 = {0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
 
 process continue
 # CHECK: Process {{[0-9]+}} exited with status = 0

lldb/test/Shell/Register/x86-fp-write.test

 # XFAIL: system-windows
 # REQUIRES: native && (target-x86 || target-x86_64)
 # RUN: %clangxx_host %p/Inputs/x86-fp-write.cpp -o %t
 # RUN: %lldb -b -s %s %t | FileCheck %s
 process launch
 
 register write fctrl 0x037b
 register write fstat 0x8884
 # note: this needs to enable all registers for writes to be effective
-# TODO: fix it to use proper ftag values instead of 'abridged'
-register write ftag 0x00ff
+register write ftag 0x2a58
 register write fop 0x0033
 # the exact addresses do not matter, we want just to verify FXSAVE
 # note: segment registers are not supported on all CPUs
 register write fioff 0x89abcdef
 register write fooff 0x76543210
 
 register write st0 "{0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x80 0x00 0x40}"
 register write st1 "{0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x3f 0x00 0x00}"

lldb/unittests/Process/Utility/CMakeLists.txt

 add_lldb_unittest(ProcessUtilityTests
+  RegisterContextTest.cpp
   RegisterContextFreeBSDTest.cpp
 
   LINK_LIBS
     lldbPluginProcessUtility)

lldb/unittests/Process/Utility/RegisterContextTest.cpp

+//===-- RegisterContextTest.cpp -------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "gtest/gtest.h"
+
+#include "Plugins/Process/Utility/RegisterContext_x86.h"
+
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/Support/FormatVariadic.h"
+
+#include <array>
+
+using namespace lldb_private;
+
+struct TagWordTestVector {
+  uint16_t sw;
+  uint16_t tw;
+  uint8_t tw_abridged;
+  int st_reg_num;
+};
+
+constexpr MMSReg st_from_comp(uint64_t mantissa, uint16_t sign_exp) {
+  MMSReg ret = {};
+  ret.comp.mantissa = mantissa;
+  ret.comp.sign_exp = sign_exp;
+  return ret;
+}
+
+const std::array<MMSReg, 8> st_regs = {
+    st_from_comp(0x8000000000000000, 0x4000), // +2.0
+    st_from_comp(0x3f00000000000000, 0x0000), // 1.654785e-4932
+    st_from_comp(0x0000000000000000, 0x0000), // +0
+    st_from_comp(0x0000000000000000, 0x8000), // -0
+    st_from_comp(0x8000000000000000, 0x7fff), // +inf
+    st_from_comp(0x8000000000000000, 0xffff), // -inf
+    st_from_comp(0xc000000000000000, 0xffff), // nan
+    st_from_comp(0x8000000000000000, 0xc000), // -2.0
+};
+
+const std::array<TagWordTestVector, 8> tag_word_test_vectors{
+    TagWordTestVector{0x3800, 0x3fff, 0x80, 1},
+    TagWordTestVector{0x3000, 0x2fff, 0xc0, 2},
+    TagWordTestVector{0x2800, 0x27ff, 0xe0, 3},
+    TagWordTestVector{0x2000, 0x25ff, 0xf0, 4},
+    TagWordTestVector{0x1800, 0x25bf, 0xf8, 5},
+    TagWordTestVector{0x1000, 0x25af, 0xfc, 6},
+    TagWordTestVector{0x0800, 0x25ab, 0xfe, 7},
+    TagWordTestVector{0x0000, 0x25a8, 0xff, 8},
+};
+
+TEST(RegisterContext_x86Test, AbridgedToFullTagWord) {
+  for (const auto &x : llvm::enumerate(tag_word_test_vectors)) {
+    SCOPED_TRACE(llvm::formatv("tag_word_test_vectors[{0}]", x.index()));
+    std::array<MMSReg, 8> test_regs;
+    for (int i = 0; i < x.value().st_reg_num; ++i)
+      test_regs[i] = st_regs[x.value().st_reg_num - i - 1];
+    EXPECT_EQ(
+        AbridgedToFullTagWord(x.value().tw_abridged, x.value().sw, test_regs),
+        x.value().tw);
+  }
+}
+
+TEST(RegisterContext_x86Test, FullToAbridgedTagWord) {
+  for (const auto &x : llvm::enumerate(tag_word_test_vectors)) {
+    SCOPED_TRACE(llvm::formatv("tag_word_test_vectors[{0}]", x.index()));
+    EXPECT_EQ(FullToAbridgedTagWord(x.value().tw), x.value().tw_abridged);
+  }
+}