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[lldb] Add explicit 64-bit fip/fdp registers on x86_64
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Authored by mgorny on Nov 15 2020, 8:21 AM.

Details

Summary

The FXSAVE/XSAVE data can have two different layouts on x86_64. When
called as FXSAVE/XSAVE..., the Instruction Pointer and Address Pointer
registers are reported using a 16-bit segment identifier and a 32-bit
offset. When called as FXSAVE64/XSAVE64..., they are reported using
a complete 64-bit offsets instead.

LLDB has historically followed GDB and unconditionally used to assume
the 32-bit layout, with the slight modification of possibly
using a 32-bit segment register (i.e. extending the register into
the reserved 16 upper bits). When the underlying operating system used
FXSAVE64/XSAVE64..., the pointer was split into two halves,
with the upper half repored as the segment registers. While
reconstructing the full address was possible on the user end (and e.g.
the FPU register tests did that), it certainly was not the most
convenient option.

Introduce a two additional 'fip' and 'fdp' registers that overlap
with 'fiseg'/'fioff' and 'foseg'/'foff' respectively, and report
the complete 64-bit address.

Diff Detail

Event Timeline

mgorny created this revision.Nov 15 2020, 8:21 AM
mgorny requested review of this revision.Nov 15 2020, 8:21 AM

Tested on Linux, FreeBSD and NetBSD. I've presumed we want fip/fdp only on amd64.

lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
82–83

Note to self: remember to clang-format before committing.

lldb/source/Plugins/Process/Utility/RegisterInfos_x86_64.h
99

@labath, also, shouldn't we have overlaps set between ST and MM registers?

262

@labath, do you want me to set overlaps here like rax/eax... does? If yes, any suggestion on the style?

I like where this is going.

lldb/source/Plugins/Process/Utility/RegisterInfos_x86_64.h
262

What do you mean, exactly? I'm guessing these will have overlapping offsets in the g packet to the the offsetof computation, will they not?

Do you mean the sub-reg/value-reg lists?

lldb/test/Shell/Register/x86-64-fp-read.test
2

I expect this will fail on darwin as well.

12–13

Move this part after the fip check and add a comment to indicate its legacy/compat status?

lldb/unittests/Process/Utility/RegisterContextFreeBSDTest.cpp
84–85

I guess this isn't really true anymore?

mgorny marked 2 inline comments as done.Nov 16 2020, 4:11 AM
mgorny added inline comments.
lldb/source/Plugins/Process/Utility/RegisterInfos_x86_64.h
262

Yes, value_regs and invalidate_regs. Though I suppose this is only used with Linux GPRs, for the peek approach.

lldb/test/Shell/Register/x86-64-fp-read.test
12–13

I suppose it also makes sense to remove the fiseg/fioff logic from the 32-bit x86-fp-read.test, as it is only relevant to the FXSAVE64 approach.

mgorny updated this revision to Diff 305472.Nov 16 2020, 4:48 AM
mgorny marked an inline comment as done.

Implemented requested changes. Clang-formatted. Extended fp-write tests to cover both writing fioff/fooff and fip/fdp.

mgorny updated this revision to Diff 305498.Nov 16 2020, 6:53 AM

Fix wrong output num ($2 instead of $1) in x86-fp-read.test.

mgorny marked an inline comment as done.Nov 18 2020, 3:05 AM
mgorny added inline comments.
lldb/unittests/Process/Utility/RegisterContextFreeBSDTest.cpp
84–85

I'll update the comment to make it clear it's backwards compat thing.

mgorny updated this revision to Diff 306031.Nov 18 2020, 3:11 AM
mgorny marked an inline comment as done.

Updated the test comment.

mgorny updated this revision to Diff 306160.Nov 18 2020, 11:08 AM

Added contained/invalidate entries for FIP/FDP.

labath accepted this revision.Nov 19 2020, 12:23 AM
labath added a subscriber: omjavaid.

Looks good to me. @omjavaid, could you take a quick look at the invalidate/contained register lists?

lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
84–97

lol@diff

lldb/test/Shell/Register/x86-64-fp-read.test
12–13

Yep, sounds good.

This revision is now accepted and ready to land.Nov 19 2020, 12:23 AM

Looks good to me. @omjavaid, could you take a quick look at the invalidate/contained register lists?

These list look good. Also I like the approach of using single invalidate list for fiseg and fioff unlike AArch64 where we use separate list for S, D and V regs. Its a lot cleaner this way and serves the purpose.

This revision was automatically updated to reflect the committed changes.
Herald added a project: Restricted Project. · View Herald TranscriptNov 19 2020, 4:23 AM
shafik added a subscriber: shafik.Nov 19 2020, 4:33 PM
shafik added inline comments.
lldb/test/Shell/Register/x86-fp-write.test
2

I removed target-x86_64 in a fix this is failing on the green dragon build bot: http://lab.llvm.org:8080/green/view/LLDB/job/lldb-cmake/24969/#showFailuresLink

and I trying to get back green again.

mgorny added inline comments.Nov 20 2020, 12:40 AM
lldb/test/Shell/Register/x86-fp-write.test
2

I don't think that's the correct solution here. Unless I'm mistaken, you've only implicitly skipping it per arch, while I'm pretty sure it would fail on i386 too. It really needs xfail on Darwin like the other test, I guess. It would be helpful if you could test whether adding STi as an alias to STMMi helps. It's not exactly helpful when platforms use different names for the same thing, and I don't have a Darwin env to test (and I don't think I can easily get one legally, can I?). I'm going to try submitting a guesswork patch for somebody to test.