Index: llvm/include/llvm/Analysis/ScalarEvolution.h =================================================================== --- llvm/include/llvm/Analysis/ScalarEvolution.h +++ llvm/include/llvm/Analysis/ScalarEvolution.h @@ -1514,9 +1514,10 @@ const ConstantRange &getRangeRef(const SCEV *S, RangeSignHint Hint); /// Determines the range for the affine SCEVAddRecExpr {\p Start,+,\p Stop}. - /// Helper for \c getRange. - ConstantRange getRangeForAffineAR(const SCEV *Start, const SCEV *Stop, - const SCEV *MaxBECount, unsigned BitWidth); + /// Additionally determine which nowrap flags must hold based on range info. + std::pair + getRangeForAffineAR(const SCEV *Start, const SCEV *Stop, + const SCEV *MaxBECount, unsigned BitWidth); /// Determines the range for the affine non-self-wrapping SCEVAddRecExpr {\p /// Start,+,\p Stop}. @@ -1528,8 +1529,9 @@ /// Try to compute a range for the affine SCEVAddRecExpr {\p Start,+,\p /// Stop} by "factoring out" a ternary expression from the add recurrence. /// Helper called by \c getRange. - ConstantRange getRangeViaFactoring(const SCEV *Start, const SCEV *Stop, - const SCEV *MaxBECount, unsigned BitWidth); + std::pair + getRangeViaFactoring(const SCEV *Start, const SCEV *Stop, + const SCEV *MaxBECount, unsigned BitWidth); /// We know that there is no SCEV for the specified value. Analyze the /// expression. @@ -1879,7 +1881,7 @@ const Loop *L); /// Try to prove NSW or NUW on \p AR relying on ConstantRange manipulation. - SCEV::NoWrapFlags proveNoWrapViaConstantRanges(const SCEVAddRecExpr *AR); + void proveNoWrapViaConstantRanges(const SCEVAddRecExpr *AR); bool isMonotonicPredicateImpl(const SCEVAddRecExpr *LHS, ICmpInst::Predicate Pred, bool &Increasing); Index: llvm/lib/Analysis/ScalarEvolution.cpp =================================================================== --- llvm/lib/Analysis/ScalarEvolution.cpp +++ llvm/lib/Analysis/ScalarEvolution.cpp @@ -1454,10 +1454,8 @@ unsigned BitWidth = getTypeSizeInBits(AR->getType()); const Loop *L = AR->getLoop(); - if (!AR->hasNoUnsignedWrap()) { - auto NewFlags = proveNoWrapViaConstantRanges(AR); - const_cast(AR)->setNoWrapFlags(NewFlags); - } + if (!AR->hasNoUnsignedWrap()) + proveNoWrapViaConstantRanges(AR); // If we have special knowledge that this addrec won't overflow, // we don't need to do any further analysis. @@ -1798,10 +1796,8 @@ unsigned BitWidth = getTypeSizeInBits(AR->getType()); const Loop *L = AR->getLoop(); - if (!AR->hasNoSignedWrap()) { - auto NewFlags = proveNoWrapViaConstantRanges(AR); - const_cast(AR)->setNoWrapFlags(NewFlags); - } + if (!AR->hasNoSignedWrap()) + proveNoWrapViaConstantRanges(AR); // If we have special knowledge that this addrec won't overflow, // we don't need to do any further analysis. @@ -4247,36 +4243,13 @@ } // end anonymous namespace -SCEV::NoWrapFlags -ScalarEvolution::proveNoWrapViaConstantRanges(const SCEVAddRecExpr *AR) { +void ScalarEvolution::proveNoWrapViaConstantRanges(const SCEVAddRecExpr *AR) { if (!AR->isAffine()) - return SCEV::FlagAnyWrap; - - using OBO = OverflowingBinaryOperator; - - SCEV::NoWrapFlags Result = SCEV::FlagAnyWrap; - - if (!AR->hasNoSignedWrap()) { - ConstantRange AddRecRange = getSignedRange(AR); - ConstantRange IncRange = getSignedRange(AR->getStepRecurrence(*this)); - - auto NSWRegion = ConstantRange::makeGuaranteedNoWrapRegion( - Instruction::Add, IncRange, OBO::NoSignedWrap); - if (NSWRegion.contains(AddRecRange)) - Result = ScalarEvolution::setFlags(Result, SCEV::FlagNSW); - } - - if (!AR->hasNoUnsignedWrap()) { - ConstantRange AddRecRange = getUnsignedRange(AR); - ConstantRange IncRange = getUnsignedRange(AR->getStepRecurrence(*this)); - - auto NUWRegion = ConstantRange::makeGuaranteedNoWrapRegion( - Instruction::Add, IncRange, OBO::NoUnsignedWrap); - if (NUWRegion.contains(AddRecRange)) - Result = ScalarEvolution::setFlags(Result, SCEV::FlagNUW); - } + return; - return Result; + // NUW/NSW flags will be updated during the range calculation. + // It does not matter whether we ask for the signed or unsigned range here. + ConstantRange _ = getUnsignedRange(AR); } namespace { @@ -5520,17 +5493,20 @@ const SCEV *MaxBECount = getConstantMaxBackedgeTakenCount(AddRec->getLoop()); if (!isa(MaxBECount) && getTypeSizeInBits(MaxBECount->getType()) <= BitWidth) { - auto RangeFromAffine = getRangeForAffineAR( + std::pair Res = getRangeForAffineAR( AddRec->getStart(), AddRec->getStepRecurrence(*this), MaxBECount, BitWidth); + std::pair ResFromFactoring = + getRangeViaFactoring(AddRec->getStart(), + AddRec->getStepRecurrence(*this), MaxBECount, + BitWidth); ConservativeResult = - ConservativeResult.intersectWith(RangeFromAffine, RangeType); - - auto RangeFromFactoring = getRangeViaFactoring( - AddRec->getStart(), AddRec->getStepRecurrence(*this), MaxBECount, - BitWidth); + ConservativeResult.intersectWith(Res.first, RangeType); ConservativeResult = - ConservativeResult.intersectWith(RangeFromFactoring, RangeType); + ConservativeResult.intersectWith(ResFromFactoring.first, RangeType); + + const_cast(AddRec)->setNoWrapFlags( + setFlags(Res.second, ResFromFactoring.second)); } // Now try symbolic BE count and more powerful methods. @@ -5618,24 +5594,26 @@ return setRange(S, SignHint, std::move(ConservativeResult)); } +using RangeAndFlags = std::pair; + // Given a StartRange, Step and MaxBECount for an expression compute a range of // values that the expression can take. Initially, the expression has a value // from StartRange and then is changed by Step up to MaxBECount times. Signed // argument defines if we treat Step as signed or unsigned. -static ConstantRange getRangeForAffineARHelper(APInt Step, +static RangeAndFlags getRangeForAffineARHelper(APInt Step, const ConstantRange &StartRange, const APInt &MaxBECount, unsigned BitWidth, bool Signed) { // If either Step or MaxBECount is 0, then the expression won't change, and we // just need to return the initial range. if (Step == 0 || MaxBECount == 0) - return StartRange; + return {StartRange, (SCEV::NoWrapFlags)(SCEV::FlagNUW | SCEV::FlagNSW)}; // If we don't know anything about the initial value (i.e. StartRange is // FullRange), then we don't know anything about the final range either. // Return FullRange. if (StartRange.isFullSet()) - return ConstantRange::getFull(BitWidth); + return {ConstantRange::getFull(BitWidth), SCEV::FlagAnyWrap}; // If Step is signed and negative, then we use its absolute value, but we also // note that we're moving in the opposite direction. @@ -5651,11 +5629,15 @@ // Check if Offset is more than full span of BitWidth. If it is, the // expression is guaranteed to overflow. if (APInt::getMaxValue(StartRange.getBitWidth()).udiv(Step).ult(MaxBECount)) - return ConstantRange::getFull(BitWidth); + return {ConstantRange::getFull(BitWidth), SCEV::FlagAnyWrap}; + + // Per the above check, we know that the addrec is not self-wrapping. + SCEV::NoWrapFlags Flags = SCEV::FlagNW; // Offset is by how much the expression can change. Checks above guarantee no // overflow here. APInt Offset = Step * MaxBECount; + bool IsOffsetNonNegative = Offset.isNonNegative(); // Minimum value of the final range will match the minimal value of StartRange // if the expression is increasing and will be decreased by Offset otherwise. @@ -5663,26 +5645,37 @@ // if the expression is decreasing and will be increased by Offset otherwise. APInt StartLower = StartRange.getLower(); APInt StartUpper = StartRange.getUpper() - 1; - APInt MovedBoundary = Descending ? (StartLower - std::move(Offset)) - : (StartUpper + std::move(Offset)); + if (Descending) { + APInt MovedBoundary = StartLower - std::move(Offset); + + if (!StartRange.isSignWrappedSet() && MovedBoundary.sle(StartLower) && + IsOffsetNonNegative) + Flags = ScalarEvolution::setFlags(Flags, SCEV::FlagNSW); + + if (StartRange.contains(MovedBoundary)) + return {ConstantRange::getFull(BitWidth), Flags}; + return {ConstantRange::getNonEmpty(std::move(MovedBoundary), + std::move(StartUpper) + 1), + Flags}; + } else { + APInt MovedBoundary = StartUpper + std::move(Offset); - // It's possible that the new minimum/maximum value will fall into the initial - // range (due to wrap around). This means that the expression can take any - // value in this bitwidth, and we have to return full range. - if (StartRange.contains(MovedBoundary)) - return ConstantRange::getFull(BitWidth); + if (!StartRange.isWrappedSet() && MovedBoundary.uge(StartUpper)) + Flags = ScalarEvolution::setFlags(Flags, SCEV::FlagNUW); - APInt NewLower = - Descending ? std::move(MovedBoundary) : std::move(StartLower); - APInt NewUpper = - Descending ? std::move(StartUpper) : std::move(MovedBoundary); - NewUpper += 1; + if (!StartRange.isSignWrappedSet() && MovedBoundary.sge(StartUpper) && + IsOffsetNonNegative) + Flags = ScalarEvolution::setFlags(Flags, SCEV::FlagNSW); - // No overflow detected, return [StartLower, StartUpper + Offset + 1) range. - return ConstantRange::getNonEmpty(std::move(NewLower), std::move(NewUpper)); + if (StartRange.contains(MovedBoundary)) + return {ConstantRange::getFull(BitWidth), Flags}; + return {ConstantRange::getNonEmpty(std::move(StartLower), + std::move(MovedBoundary) + 1), + Flags}; + } } -ConstantRange ScalarEvolution::getRangeForAffineAR(const SCEV *Start, +RangeAndFlags ScalarEvolution::getRangeForAffineAR(const SCEV *Start, const SCEV *Step, const SCEV *MaxBECount, unsigned BitWidth) { @@ -5699,20 +5692,24 @@ // If Step can be both positive and negative, we need to find ranges for the // maximum absolute step values in both directions and union them. - ConstantRange SR = + RangeAndFlags SignedRes1 = getRangeForAffineARHelper(StepSRange.getSignedMin(), StartSRange, MaxBECountValue, BitWidth, /* Signed = */ true); - SR = SR.unionWith(getRangeForAffineARHelper(StepSRange.getSignedMax(), - StartSRange, MaxBECountValue, - BitWidth, /* Signed = */ true)); + RangeAndFlags SignedRes2 = + getRangeForAffineARHelper(StepSRange.getSignedMax(), StartSRange, + MaxBECountValue, BitWidth, /* Signed = */ true); + RangeAndFlags SignedRes(SignedRes1.first.unionWith(SignedRes2.first), + maskFlags(SignedRes1.second, SignedRes2.second)); // Next, consider step unsigned. - ConstantRange UR = getRangeForAffineARHelper( + RangeAndFlags UnsignedRes = getRangeForAffineARHelper( getUnsignedRangeMax(Step), getUnsignedRange(Start), MaxBECountValue, BitWidth, /* Signed = */ false); // Finally, intersect signed and unsigned ranges. - return SR.intersectWith(UR, ConstantRange::Smallest); + return {SignedRes.first.intersectWith(UnsignedRes.first, + ConstantRange::Smallest), + setFlags(SignedRes.second, UnsignedRes.second)}; } ConstantRange ScalarEvolution::getRangeForAffineNoSelfWrappingAR( @@ -5780,7 +5777,7 @@ return ConstantRange::getFull(BitWidth); } -ConstantRange ScalarEvolution::getRangeViaFactoring(const SCEV *Start, +RangeAndFlags ScalarEvolution::getRangeViaFactoring(const SCEV *Start, const SCEV *Step, const SCEV *MaxBECount, unsigned BitWidth) { @@ -5861,17 +5858,17 @@ SelectPattern StartPattern(*this, BitWidth, Start); if (!StartPattern.isRecognized()) - return ConstantRange::getFull(BitWidth); + return {ConstantRange::getFull(BitWidth), SCEV::FlagAnyWrap}; SelectPattern StepPattern(*this, BitWidth, Step); if (!StepPattern.isRecognized()) - return ConstantRange::getFull(BitWidth); + return {ConstantRange::getFull(BitWidth), SCEV::FlagAnyWrap}; if (StartPattern.Condition != StepPattern.Condition) { // We don't handle this case today; but we could, by considering four // possibilities below instead of two. I'm not sure if there are cases where // that will help over what getRange already does, though. - return ConstantRange::getFull(BitWidth); + return {ConstantRange::getFull(BitWidth), SCEV::FlagAnyWrap}; } // NB! Calling ScalarEvolution::getConstant is fine, but we should not try to @@ -5887,12 +5884,13 @@ const SCEV *FalseStart = this->getConstant(StartPattern.FalseValue); const SCEV *FalseStep = this->getConstant(StepPattern.FalseValue); - ConstantRange TrueRange = + RangeAndFlags TrueRes = this->getRangeForAffineAR(TrueStart, TrueStep, MaxBECount, BitWidth); - ConstantRange FalseRange = + RangeAndFlags FalseRes = this->getRangeForAffineAR(FalseStart, FalseStep, MaxBECount, BitWidth); - return TrueRange.unionWith(FalseRange); + return {TrueRes.first.unionWith(FalseRes.first), + maskFlags(TrueRes.second, FalseRes.second)}; } SCEV::NoWrapFlags ScalarEvolution::getNoWrapFlagsFromUB(const Value *V) { @@ -11889,6 +11887,10 @@ OS << I << '\n'; OS << " --> "; const SCEV *SV = SE.getSCEV(&I); + // AddRec nowrap flags are refined during constant range calculation. + // Do this for the SCEV dump to get more consistent results. + if (const auto *AR = dyn_cast(SV)) + SE.proveNoWrapViaConstantRanges(AR); SV->print(OS); if (!isa(SV)) { OS << " U: "; Index: llvm/test/Analysis/Delinearization/multidim_only_ivs_3d_cast.ll =================================================================== --- llvm/test/Analysis/Delinearization/multidim_only_ivs_3d_cast.ll +++ llvm/test/Analysis/Delinearization/multidim_only_ivs_3d_cast.ll @@ -11,7 +11,7 @@ ; AddRec: {{{%A,+,(8 * (zext i32 %m to i64) * (zext i32 %o to i64))}<%for.i>,+,(8 * (zext i32 %o to i64))}<%for.j>,+,8}<%for.k> ; CHECK: Base offset: %A ; CHECK: ArrayDecl[UnknownSize][(zext i32 %m to i64)][(zext i32 %o to i64)] with elements of 8 bytes. -; CHECK: ArrayRef[{0,+,1}<%for.i>][{0,+,1}<%for.j>][{0,+,1}<%for.k>] +; CHECK: ArrayRef[{0,+,1}<%for.i>][{0,+,1}<%for.j>][{0,+,1}<%for.k>] target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" Index: llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll +++ llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll @@ -11,25 +11,25 @@ ; CHECK-LABEL: Classifying expressions for: @test_00 ; CHECK: %sum1 = add i32 %phi1, %phi2 -; CHECK-NEXT: --> {14,+,3}<%loop1> +; CHECK-NEXT: --> {14,+,3}<%loop1> ; CHECK: %sum2 = add i32 %sum1, %phi3 -; CHECK-NEXT: --> {20,+,6}<%loop1> +; CHECK-NEXT: --> {20,+,6}<%loop1> ; CHECK: %sum3 = add i32 %phi4, %phi5 -; CHECK-NEXT: --> {116,+,3}<%loop2> +; CHECK-NEXT: --> {116,+,3}<%loop2> ; CHECK: %sum4 = add i32 %sum3, %phi6 -; CHECK-NEXT: --> {159,+,6}<%loop2> +; CHECK-NEXT: --> {159,+,6}<%loop2> ; CHECK: %s1 = add i32 %phi1, %phi4 -; CHECK-NEXT: --> {{{{}}73,+,1}<%loop1>,+,1}<%loop2> +; CHECK-NEXT: --> {{{{}}73,+,1}<%loop1>,+,1}<%loop2> ; CHECK: %s2 = add i32 %phi5, %phi2 -; CHECK-NEXT: --> {{{{}}57,+,2}<%loop1>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}57,+,2}<%loop1>,+,2}<%loop2> ; CHECK: %s3 = add i32 %sum1, %sum3 -; CHECK-NEXT: --> {{{{}}130,+,3}<%loop1>,+,3}<%loop2> +; CHECK-NEXT: --> {{{{}}130,+,3}<%loop1>,+,3}<%loop2> ; CHECK: %s4 = add i32 %sum4, %sum2 -; CHECK-NEXT: --> {{{{}}179,+,6}<%loop1>,+,6}<%loop2> +; CHECK-NEXT: --> {{{{}}179,+,6}<%loop1>,+,6}<%loop2> ; CHECK: %s5 = add i32 %phi3, %sum3 -; CHECK-NEXT: --> {{{{}}122,+,3}<%loop1>,+,3}<%loop2> +; CHECK-NEXT: --> {{{{}}122,+,3}<%loop1>,+,3}<%loop2> ; CHECK: %s6 = add i32 %sum2, %phi6 -; CHECK-NEXT: --> {{{{}}63,+,6}<%loop1>,+,3}<%loop2> +; CHECK-NEXT: --> {{{{}}63,+,6}<%loop1>,+,3}<%loop2> entry: br label %loop1 @@ -81,25 +81,25 @@ ; CHECK: %is1 = add i32 %sum2, %a ; CHECK-NEXT: --> {(6 + (2 * %a) + %b),+,6}<%loop1> ; CHECK: %sum3 = add i32 %phi4, %phi5 -; CHECK-NEXT: --> {116,+,3}<%loop2> +; CHECK-NEXT: --> {116,+,3}<%loop2> ; CHECK: %sum4 = add i32 %sum3, %phi6 -; CHECK-NEXT: --> {159,+,6}<%loop2> +; CHECK-NEXT: --> {159,+,6}<%loop2> ; CHECK: %is2 = add i32 %sum4, %b -; CHECK-NEXT: --> {(159 + %b),+,6}<%loop2> +; CHECK-NEXT: --> {(159 + %b),+,6}<%loop2> ; CHECK: %ec2 = add i32 %is1, %is2 -; CHECK-NEXT: --> {{{{}}(165 + (2 * %a) + (2 * %b)),+,6}<%loop1>,+,6}<%loop2> +; CHECK-NEXT: --> {{{{}}(165 + (2 * %a) + (2 * %b)),+,6}<%loop1>,+,6}<%loop2> ; CHECK: %s1 = add i32 %phi1, %is1 ; CHECK-NEXT: --> {(6 + (3 * %a) + %b),+,7}<%loop1> ; CHECK: %s2 = add i32 %is2, %phi4 ; CHECK-NEXT: --> {(222 + %b),+,7}<%loop2> ; CHECK: %s3 = add i32 %is1, %phi5 -; CHECK-NEXT: --> {{{{}}(59 + (2 * %a) + %b),+,6}<%loop1>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}(59 + (2 * %a) + %b),+,6}<%loop1>,+,2}<%loop2> ; CHECK: %s4 = add i32 %phi2, %is2 -; CHECK-NEXT: --> {{{{}}(159 + (2 * %b)),+,2}<%loop1>,+,6}<%loop2> +; CHECK-NEXT: --> {{{{}}(159 + (2 * %b)),+,2}<%loop1>,+,6}<%loop2> ; CHECK: %s5 = add i32 %is1, %is2 -; CHECK-NEXT: --> {{{{}}(165 + (2 * %a) + (2 * %b)),+,6}<%loop1>,+,6}<%loop2> +; CHECK-NEXT: --> {{{{}}(165 + (2 * %a) + (2 * %b)),+,6}<%loop1>,+,6}<%loop2> ; CHECK: %s6 = add i32 %is2, %is1 -; CHECK-NEXT: --> {{{{}}(165 + (2 * %a) + (2 * %b)),+,6}<%loop1>,+,6}<%loop2> +; CHECK-NEXT: --> {{{{}}(165 + (2 * %a) + (2 * %b)),+,6}<%loop1>,+,6}<%loop2> entry: br label %loop1 @@ -358,17 +358,17 @@ ; CHECK-LABEL: Classifying expressions for: @test_06 ; CHECK: %s1 = add i32 %phi1, %phi2 -; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> ; CHECK: %s2 = add i32 %phi2, %phi1 -; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> ; CHECK: %s3 = add i32 %phi1, %phi3 -; CHECK-NEXT: --> {{{{}}40,+,1}<%loop1>,+,3}<%loop3> +; CHECK-NEXT: --> {{{{}}40,+,1}<%loop1>,+,3}<%loop3> ; CHECK: %s4 = add i32 %phi3, %phi1 -; CHECK-NEXT: --> {{{{}}40,+,1}<%loop1>,+,3}<%loop3> +; CHECK-NEXT: --> {{{{}}40,+,1}<%loop1>,+,3}<%loop3> ; CHECK: %s5 = add i32 %phi2, %phi3 -; CHECK-NEXT: --> {{{{}}50,+,2}<%loop2>,+,3}<%loop3> +; CHECK-NEXT: --> {{{{}}50,+,2}<%loop2>,+,3}<%loop3> ; CHECK: %s6 = add i32 %phi3, %phi2 -; CHECK-NEXT: --> {{{{}}50,+,2}<%loop2>,+,3}<%loop3> +; CHECK-NEXT: --> {{{{}}50,+,2}<%loop2>,+,3}<%loop3> entry: br label %loop1 @@ -410,17 +410,17 @@ ; CHECK-LABEL: Classifying expressions for: @test_07 ; CHECK: %s1 = add i32 %phi1, %phi2 -; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> ; CHECK: %s2 = add i32 %phi2, %phi1 -; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}30,+,1}<%loop1>,+,2}<%loop2> ; CHECK: %s3 = add i32 %phi1, %phi3 -; CHECK-NEXT: --> {{{{}}40,+,3}<%loop3>,+,1}<%loop1> +; CHECK-NEXT: --> {{{{}}40,+,3}<%loop3>,+,1}<%loop1> ; CHECK: %s4 = add i32 %phi3, %phi1 -; CHECK-NEXT: --> {{{{}}40,+,3}<%loop3>,+,1}<%loop1> +; CHECK-NEXT: --> {{{{}}40,+,3}<%loop3>,+,1}<%loop1> ; CHECK: %s5 = add i32 %phi2, %phi3 -; CHECK-NEXT: --> {{{{}}50,+,3}<%loop3>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}50,+,3}<%loop3>,+,2}<%loop2> ; CHECK: %s6 = add i32 %phi3, %phi2 -; CHECK-NEXT: --> {{{{}}50,+,3}<%loop3>,+,2}<%loop2> +; CHECK-NEXT: --> {{{{}}50,+,3}<%loop3>,+,2}<%loop2> entry: br label %loop3 @@ -462,7 +462,7 @@ ; CHECK-LABEL: Classifying expressions for: @test_08 ; CHECK: %tmp11 = add i64 %iv.2.2, %iv.2.1 -; CHECK-NEXT: --> ({0,+,-1}<%loop_2> + %iv.2.1) +; CHECK-NEXT: --> ({0,+,-1}<%loop_2> + %iv.2.1) ; CHECK: %tmp12 = trunc i64 %tmp11 to i32 ; CHECK-NEXT: --> ((trunc i64 %iv.2.1 to i32) + {0,+,-1}<%loop_2>) ; CHECK: %tmp14 = mul i32 %tmp12, %tmp7 @@ -570,7 +570,7 @@ ; CHECK-LABEL: Classifying expressions for: @test_10 ; CHECK: %uncle = phi i64 [ %uncle.outer.next, %uncle.loop.backedge ], [ 0, %outer.loop ] -; CHECK-NEXT: --> {0,+,1}<%uncle.loop> +; CHECK-NEXT: --> {0,+,1}<%uncle.loop> ; CHECK: %iv1 = phi i64 [ %iv1.next, %guarded ], [ 0, %uncle.loop ] ; CHECK-NEXT: --> {0,+,1}<%loop1> ; CHECK: %iv1.trunc = trunc i64 %iv1 to i32 @@ -578,7 +578,7 @@ ; CHECK: %iv1.next = add nuw nsw i64 %iv1, 1 ; CHECK-NEXT: --> {1,+,1}<%loop1> ; CHECK: %uncle.outer.next = add i64 %uncle, 1 -; CHECK-NEXT: --> {1,+,1}<%uncle.loop> +; CHECK-NEXT: --> {1,+,1}<%uncle.loop> ; CHECK: %iv2 = phi i32 [ %iv2.next, %loop2 ], [ %param, %loop2.preheader ] ; CHECK-NEXT: --> {%param,+,1}<%loop2> ; CHECK: %iv2.next = add i32 %iv2, 1 Index: llvm/test/Analysis/ScalarEvolution/increasing-or-decreasing-iv.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/increasing-or-decreasing-iv.ll +++ llvm/test/Analysis/ScalarEvolution/increasing-or-decreasing-iv.ll @@ -12,7 +12,7 @@ %loop.iv = phi i32 [ 0, %entry ], [ %loop.iv.inc, %loop ] %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] ; CHECK: %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) +; CHECK-NEXT: --> {%start,+,%step}<%loop> U: [0,128) S: [0,128) %iv.next = add i32 %iv, %step %loop.iv.inc = add i32 %loop.iv, 1 %be.cond = icmp ne i32 %loop.iv.inc, 128 @@ -34,19 +34,19 @@ %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] ; CHECK: %iv.1 = add i32 %iv, 1 -; CHECK-NEXT: --> {(1 + %start),+,%step}<%loop> U: [1,122) S: [1,122) +; CHECK-NEXT: --> {(1 + %start),+,%step}<%loop> U: [1,122) S: [1,122) ; CHECK: %iv.2 = add i32 %iv, 2 -; CHECK-NEXT: --> {(2 + %start),+,%step}<%loop> U: [2,123) S: [2,123) +; CHECK-NEXT: --> {(2 + %start),+,%step}<%loop> U: [2,123) S: [2,123) ; CHECK: %iv.3 = add i32 %iv, 3 -; CHECK-NEXT: --> {(3 + %start),+,%step}<%loop> U: [3,124) S: [3,124) +; CHECK-NEXT: --> {(3 + %start),+,%step}<%loop> U: [3,124) S: [3,124) ; CHECK: %iv.4 = add i32 %iv, 4 -; CHECK-NEXT: --> {(4 + %start),+,%step}<%loop> U: [4,125) S: [4,125) +; CHECK-NEXT: --> {(4 + %start),+,%step}<%loop> U: [4,125) S: [4,125) ; CHECK: %iv.5 = add i32 %iv, 5 -; CHECK-NEXT: --> {(5 + %start),+,%step}<%loop> U: [5,126) S: [5,126) +; CHECK-NEXT: --> {(5 + %start),+,%step}<%loop> U: [5,126) S: [5,126) ; CHECK: %iv.6 = add i32 %iv, 6 -; CHECK-NEXT: --> {(6 + %start),+,%step}<%loop> U: [6,127) S: [6,127) +; CHECK-NEXT: --> {(6 + %start),+,%step}<%loop> U: [6,127) S: [6,127) ; CHECK: %iv.7 = add i32 %iv, 7 -; CHECK-NEXT: --> {(7 + %start),+,%step}<%loop> U: [7,128) S: [7,128) +; CHECK-NEXT: --> {(7 + %start),+,%step}<%loop> U: [7,128) S: [7,128) %iv.1 = add i32 %iv, 1 %iv.2 = add i32 %iv, 2 @@ -57,19 +57,19 @@ %iv.7 = add i32 %iv, 7 ; CHECK: %iv.m1 = sub i32 %iv, 1 -; CHECK-NEXT: --> {(-1 + %start),+,%step}<%loop> U: [-1,120) S: [-1,120) +; CHECK-NEXT: --> {(-1 + %start),+,%step}<%loop> U: [-1,120) S: [-1,120) ; CHECK: %iv.m2 = sub i32 %iv, 2 -; CHECK-NEXT: --> {(-2 + %start),+,%step}<%loop> U: [0,-1) S: [-2,119) +; CHECK-NEXT: --> {(-2 + %start),+,%step}<%loop> U: [0,-1) S: [-2,119) ; CHECK: %iv.m3 = sub i32 %iv, 3 -; CHECK-NEXT: --> {(-3 + %start),+,%step}<%loop> U: [-3,118) S: [-3,118) +; CHECK-NEXT: --> {(-3 + %start),+,%step}<%loop> U: [-3,118) S: [-3,118) ; CHECK: %iv.m4 = sub i32 %iv, 4 -; CHECK-NEXT: --> {(-4 + %start),+,%step}<%loop> U: [0,-3) S: [-4,117) +; CHECK-NEXT: --> {(-4 + %start),+,%step}<%loop> U: [0,-3) S: [-4,117) ; CHECK: %iv.m5 = sub i32 %iv, 5 -; CHECK-NEXT: --> {(-5 + %start),+,%step}<%loop> U: [-5,116) S: [-5,116) +; CHECK-NEXT: --> {(-5 + %start),+,%step}<%loop> U: [-5,116) S: [-5,116) ; CHECK: %iv.m6 = sub i32 %iv, 6 -; CHECK-NEXT: --> {(-6 + %start),+,%step}<%loop> U: [0,-1) S: [-6,115) +; CHECK-NEXT: --> {(-6 + %start),+,%step}<%loop> U: [0,-1) S: [-6,115) ; CHECK: %iv.m7 = sub i32 %iv, 7 -; CHECK-NEXT: --> {(-7 + %start),+,%step}<%loop> U: [-7,114) S: [-7,114) +; CHECK-NEXT: --> {(-7 + %start),+,%step}<%loop> U: [-7,114) S: [-7,114) %iv.m1 = sub i32 %iv, 1 %iv.m2 = sub i32 %iv, 2 @@ -129,7 +129,7 @@ %iv = phi i16 [ %start, %entry ], [ %iv.next, %loop ] %iv.zext = zext i16 %iv to i64 ; CHECK: %iv.zext = zext i16 %iv to i64 -; CHECK-NEXT: --> {(zext i16 %start to i64),+,(zext i16 %step to i64)}<%loop> U: [0,64644) S: [0,64644) +; CHECK-NEXT: --> {(zext i16 %start to i64),+,(zext i16 %step to i64)}<%loop> U: [0,64644) S: [0,64644) %iv.next = add i16 %iv, %step %loop.iv.inc = add i16 %loop.iv, 1 %be.cond = icmp ne i16 %loop.iv.inc, 128 @@ -179,7 +179,7 @@ %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] %iv.trunc = trunc i32 %iv to i16 ; CHECK: %iv.trunc = trunc i32 %iv to i16 -; CHECK-NEXT: --> {(trunc i32 %start to i16),+,(trunc i32 %step to i16)}<%loop> U: [0,128) S: [0,128) +; CHECK-NEXT: --> {(trunc i32 %start to i16),+,(trunc i32 %step to i16)}<%loop> U: [0,128) S: [0,128) %iv.next = add i32 %iv, %step %loop.iv.inc = add i16 %loop.iv, 1 @@ -201,7 +201,7 @@ %loop.iv = phi i16 [ 0, %entry ], [ %loop.iv.inc, %loop ] %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] ; CHECK: %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {%start,+,(1 + %step)}<%loop> U: [0,128) S: [0,128) +; CHECK-NEXT: --> {%start,+,(1 + %step)}<%loop> U: [0,128) S: [0,128) %step.plus.one = add i32 %step, 1 %iv.next = add i32 %iv, %step.plus.one @@ -228,16 +228,16 @@ %iv = phi i32 [ %start, %entry ], [ %iv.next, %loop ] %iv.trunc = trunc i32 %iv to i16 ; CHECK: %iv.trunc = trunc i32 %iv to i16 -; CHECK-NEXT: --> {(trunc i32 %start to i16),+,(trunc i32 %step to i16)}<%loop> U: [0,128) S: [0,128) +; CHECK-NEXT: --> {(trunc i32 %start to i16),+,(trunc i32 %step to i16)}<%loop> U: [0,128) S: [0,128) %iv.next = add i32 %iv, %step %iv.trunc.plus.one = add i16 %iv.trunc, 1 ; CHECK: %iv.trunc.plus.one = add i16 %iv.trunc, 1 -; CHECK-NEXT: --> {(1 + (trunc i32 %start to i16)),+,(trunc i32 %step to i16)}<%loop> U: [1,129) S: [1,129) +; CHECK-NEXT: --> {(1 + (trunc i32 %start to i16)),+,(trunc i32 %step to i16)}<%loop> U: [1,129) S: [1,129) %iv.trunc.plus.two = add i16 %iv.trunc, 2 ; CHECK: %iv.trunc.plus.two = add i16 %iv.trunc, 2 -; CHECK-NEXT: --> {(2 + (trunc i32 %start to i16)),+,(trunc i32 %step to i16)}<%loop> U: [2,130) S: [2,130) +; CHECK-NEXT: --> {(2 + (trunc i32 %start to i16)),+,(trunc i32 %step to i16)}<%loop> U: [2,130) S: [2,130) %loop.iv.inc = add i16 %loop.iv, 1 %be.cond = icmp ne i16 %loop.iv.inc, 128 Index: llvm/test/Analysis/ScalarEvolution/infer-prestart-no-wrap.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/infer-prestart-no-wrap.ll +++ llvm/test/Analysis/ScalarEvolution/infer-prestart-no-wrap.ll @@ -36,7 +36,7 @@ %idx.inc = add nuw i32 %idx, 1 %idx.inc.sext = zext i32 %idx.inc to i64 ; CHECK: %idx.inc.sext = zext i32 %idx.inc to i64 -; CHECK-NEXT: --> {(1 + (zext i32 %start to i64)),+,1}<%loop> +; CHECK-NEXT: --> {(1 + (zext i32 %start to i64)),+,1}<%loop> %buf.gep = getelementptr inbounds i32, i32* %buf, i32 %idx.inc %val = load i32, i32* %buf.gep Index: llvm/test/Analysis/ScalarEvolution/limit-depth.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/limit-depth.ll +++ llvm/test/Analysis/ScalarEvolution/limit-depth.ll @@ -88,7 +88,7 @@ define void @test_zext(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f) { ; CHECK-LABEL: @test_zext ; CHECK: %ze2 = zext i64 %iv2.inc to i128 -; CHECK-NEXT: --> {(1 + (zext i64 {7,+,1}<%loop> to i128)),+,1}<%loop2> +; CHECK-NEXT: --> {(1 + (zext i64 {7,+,1}<%loop> to i128)),+,1}<%loop2> entry: br label %loop Index: llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll +++ llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll @@ -415,11 +415,11 @@ ; CHECK-LABEL: 'test_guard_ult_ne' ; CHECK-NEXT: Classifying expressions for: @test_guard_ult_ne ; CHECK-NEXT: %iv = phi i64 [ %iv.next, %loop ], [ 0, %guardbb ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %idx = getelementptr inbounds i32, i32* %data, i64 %iv -; CHECK-NEXT: --> {%data,+,4}<%loop> U: full-set S: full-set Exits: (-4 + (4 * %count) + %data) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {%data,+,4}<%loop> U: full-set S: full-set Exits: (-4 + (4 * %count) + %data) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add nuw i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_ult_ne ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + %count) ; CHECK-NEXT: Loop %loop: max backedge-taken count is 3 @@ -454,11 +454,11 @@ ; CHECK-LABEL: 'test_guard_and_assume' ; CHECK-NEXT: Classifying expressions for: @test_guard_and_assume ; CHECK-NEXT: %iv = phi i64 [ %iv.next, %loop ], [ 0, %entry ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4) S: [0,4) Exits: (-1 + %count) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %idx = getelementptr inbounds i32, i32* %data, i64 %iv -; CHECK-NEXT: --> {%data,+,4}<%loop> U: full-set S: full-set Exits: (-4 + (4 * %count) + %data) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {%data,+,4}<%loop> U: full-set S: full-set Exits: (-4 + (4 * %count) + %data) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add nuw i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,5) S: [1,5) Exits: %count LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @test_guard_and_assume ; CHECK-NEXT: Loop %loop: backedge-taken count is (-1 + %count) ; CHECK-NEXT: Loop %loop: max backedge-taken count is 3 @@ -493,9 +493,9 @@ ; CHECK-NEXT: %init = phi i32 [ 2, %entry ], [ 3, %bb1 ] ; CHECK-NEXT: --> %init U: [2,4) S: [2,4) ; CHECK-NEXT: %iv = phi i32 [ %iv.next, %loop ], [ %init, %loop.ph ] -; CHECK-NEXT: --> {%init,+,1}<%loop> U: [2,11) S: [2,11) Exits: 9 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {%init,+,1}<%loop> U: [2,11) S: [2,11) Exits: 9 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i32 %iv, 1 -; CHECK-NEXT: --> {(1 + %init),+,1}<%loop> U: [3,12) S: [3,12) Exits: 10 LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {(1 + %init),+,1}<%loop> U: [3,12) S: [3,12) Exits: 10 LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @guard_pessimizes_analysis ; CHECK-NEXT: Loop %loop: backedge-taken count is (9 + (-1 * %init)) ; CHECK-NEXT: Loop %loop: max backedge-taken count is 7 Index: llvm/test/Analysis/ScalarEvolution/no-wrap-unknown-becount.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/no-wrap-unknown-becount.ll +++ llvm/test/Analysis/ScalarEvolution/no-wrap-unknown-becount.ll @@ -182,7 +182,7 @@ %iv.inc = add i32 %iv, 3 %iv.inc.zext = zext i32 %iv.inc to i64 ; CHECK: %iv.inc.zext = zext i32 %iv.inc to i64 -; CHECK-NEXT: --> {(zext i32 (3 + %start) to i64),+,3}<%loop> +; CHECK-NEXT: --> {(zext i32 (3 + %start) to i64),+,3}<%loop> %c = load volatile i1, i1* %cond br i1 %c, label %loop, label %leave Index: llvm/test/Analysis/ScalarEvolution/overflow-intrinsics.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/overflow-intrinsics.ll +++ llvm/test/Analysis/ScalarEvolution/overflow-intrinsics.ll @@ -45,7 +45,7 @@ for.body: ; preds = %entry, %cont ; CHECK: %i.04 = phi i32 [ 0, %entry ], [ %tmp2, %cont ] -; CHECK-NEXT: --> {0,+,1}<%for.body> U: [0,16) S: [0,16) +; CHECK-NEXT: --> {0,+,1}<%for.body> U: [0,16) S: [0,16) ; SCEV can prove for the above induction variable; but it does ; not bother so before it sees the sext below since it is not a 100% @@ -199,7 +199,7 @@ for.body: ; preds = %entry, %cont ; CHECK: %i.04 = phi i32 [ 0, %entry ], [ %tmp2, %cont ] -; CHECK-NEXT: --> {0,+,1}<%for.body> U: [0,16) S: [0,16) +; CHECK-NEXT: --> {0,+,1}<%for.body> U: [0,16) S: [0,16) %i.04 = phi i32 [ 0, %entry ], [ %tmp2, %cont ] %idxprom = sext i32 %i.04 to i64 @@ -230,7 +230,7 @@ for.body: ; preds = %entry, %cont ; CHECK: %i.04 = phi i32 [ 15, %entry ], [ %tmp2, %cont ] -; CHECK-NEXT: --> {15,+,-1}<%for.body> U: [0,16) S: [0,16) +; CHECK-NEXT: --> {15,+,-1}<%for.body> U: [0,16) S: [0,16) %i.04 = phi i32 [ 15, %entry ], [ %tmp2, %cont ] %idxprom = sext i32 %i.04 to i64 @@ -261,7 +261,7 @@ for.body: ; preds = %entry, %cont ; CHECK: %i.04 = phi i32 [ 15, %entry ], [ %tmp2, %cont ] -; CHECK-NEXT: --> {15,+,-1}<%for.body> U: [0,16) S: [0,16) +; CHECK-NEXT: --> {15,+,-1}<%for.body> U: [0,16) S: [0,16) %i.04 = phi i32 [ 15, %entry ], [ %tmp2, %cont ] %idxprom = sext i32 %i.04 to i64 Index: llvm/test/Analysis/ScalarEvolution/pr22641.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/pr22641.ll +++ llvm/test/Analysis/ScalarEvolution/pr22641.ll @@ -12,8 +12,8 @@ %conv2 = zext i16 %dec2 to i32 %conv = zext i16 %dec to i32 ; CHECK: %conv = zext i16 %dec to i32 -; CHECK-NEXT: --> {(zext i16 (-1 + %a) to i32),+,65535}<%body> -; CHECK-NOT: --> {(65535 + (zext i16 %a to i32)),+,65535}<%body> +; CHECK-NEXT: --> {(zext i16 (-1 + %a) to i32),+,65535}<%body> +; CHECK-NOT: --> {(65535 + (zext i16 %a to i32)),+,65535}<%body> br label %cond Index: llvm/test/Analysis/ScalarEvolution/range-signedness.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/range-signedness.ll +++ llvm/test/Analysis/ScalarEvolution/range-signedness.ll @@ -28,7 +28,7 @@ loop: %idx = phi i8 [-5, %entry ], [ %idx.inc, %loop ] ; CHECK: %idx = phi i8 [ -5, %entry ], [ %idx.inc, %loop ] -; CHECK-NEXT: --> {-5,+,1}<%loop> U: [-5,6) S: [-5,6) +; CHECK-NEXT: --> {-5,+,1}<%loop> U: [-5,6) S: [-5,6) %idx.inc = add i8 %idx, 1 Index: llvm/test/Analysis/ScalarEvolution/sext-iv-0.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/sext-iv-0.ll +++ llvm/test/Analysis/ScalarEvolution/sext-iv-0.ll @@ -14,7 +14,7 @@ bb1: ; preds = %bb1, %bb1.thread %i.0.reg2mem.0 = phi i64 [ -128, %bb1.thread ], [ %8, %bb1 ] ; [#uses=3] ; CHECK: %i.0.reg2mem.0 -; CHECK-NEXT: --> {-128,+,1}<%bb1>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: 127 +; CHECK-NEXT: --> {-128,+,1}<%bb1>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: 127 %0 = trunc i64 %i.0.reg2mem.0 to i8 ; [#uses=1] ; CHECK: %0 ; CHECK-NEXT: --> {-128,+,1}<%bb1>{{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: 127 Index: llvm/test/Analysis/ScalarEvolution/sext-iv-2.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/sext-iv-2.ll +++ llvm/test/Analysis/ScalarEvolution/sext-iv-2.ll @@ -4,7 +4,7 @@ ; CHECK: %tmp3 = sext i8 %tmp2 to i32 ; CHECK: --> (sext i8 {0,+,1}<%bb1> to i32){{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: -1 ; CHECK: %tmp4 = mul i32 %tmp3, %i.02 -; CHECK: --> ((sext i8 {0,+,1}<%bb1> to i32) * {0,+,1}<%bb>){{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: {0,+,-1}<%bb> +; CHECK: --> ((sext i8 {0,+,1}<%bb1> to i32) * {0,+,1}<%bb>){{ U: [^ ]+ S: [^ ]+}}{{ *}}Exits: {0,+,-1}<%bb> ; These sexts are not foldable. Index: llvm/test/Analysis/ScalarEvolution/solve-quadratic-i1.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/solve-quadratic-i1.ll +++ llvm/test/Analysis/ScalarEvolution/solve-quadratic-i1.ll @@ -50,7 +50,7 @@ ; CHECK-NEXT: %v1 = phi i32 [ 3, %b0 ], [ %v6, %b1 ] ; CHECK-NEXT: --> {3,+,1}<%b1> U: [3,6) S: [3,6) Exits: 5 LoopDispositions: { %b1: Computable } ; CHECK-NEXT: %v2 = trunc i32 %v1 to i16 -; CHECK-NEXT: --> {3,+,1}<%b1> U: [3,6) S: [3,6) Exits: 5 LoopDispositions: { %b1: Computable } +; CHECK-NEXT: --> {3,+,1}<%b1> U: [3,6) S: [3,6) Exits: 5 LoopDispositions: { %b1: Computable } ; CHECK-NEXT: %v3 = add i16 %v0, %v2 ; CHECK-NEXT: --> {3,+,4,+,1}<%b1> U: full-set S: full-set Exits: 12 LoopDispositions: { %b1: Computable } ; CHECK-NEXT: %v4 = and i16 %v3, 1 Index: llvm/test/Analysis/ScalarEvolution/solve-quadratic-overflow.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/solve-quadratic-overflow.ll +++ llvm/test/Analysis/ScalarEvolution/solve-quadratic-overflow.ll @@ -7,9 +7,9 @@ ; CHECK: Printing analysis 'Scalar Evolution Analysis' for function 'f0': ; CHECK-NEXT: Classifying expressions for: @f0 ; CHECK-NEXT: %v1 = phi i16 [ 0, %b0 ], [ %v2, %b1 ] -; CHECK-NEXT: --> {0,+,-1}<%b1> U: [-255,1) S: [-255,1) Exits: -255 LoopDispositions: { %b1: Computable } +; CHECK-NEXT: --> {0,+,-1}<%b1> U: [-255,1) S: [-255,1) Exits: -255 LoopDispositions: { %b1: Computable } ; CHECK-NEXT: %v2 = add i16 %v1, -1 -; CHECK-NEXT: --> {-1,+,-1}<%b1> U: [-256,0) S: [-256,0) Exits: -256 LoopDispositions: { %b1: Computable } +; CHECK-NEXT: --> {-1,+,-1}<%b1> U: [-256,0) S: [-256,0) Exits: -256 LoopDispositions: { %b1: Computable } ; CHECK-NEXT: %v3 = mul i16 %v2, %v2 ; CHECK-NEXT: --> {1,+,3,+,2}<%b1> U: full-set S: full-set Exits: 0 LoopDispositions: { %b1: Computable } ; CHECK-NEXT: %v5 = phi i16 [ %v2, %b1 ] Index: llvm/test/Analysis/ScalarEvolution/trip-count15.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/trip-count15.ll +++ llvm/test/Analysis/ScalarEvolution/trip-count15.ll @@ -8,9 +8,9 @@ ; CHECK-NEXT: %min.n = select i1 %min.cmp, i64 4096, i64 %n ; CHECK-NEXT: --> (4096 umin %n) U: [0,4097) S: [0,4097) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4098) S: [0,4098) Exits: (1 + (4096 umin %n)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4098) S: [0,4098) Exits: (1 + (4096 umin %n)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4099) S: [1,4099) Exits: (2 + (4096 umin %n)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4099) S: [1,4099) Exits: (2 + (4096 umin %n)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @umin_unsigned_check ; CHECK-NEXT: Loop %loop: backedge-taken count is (1 + (4096 umin %n)) ; CHECK-NEXT: Loop %loop: max backedge-taken count is 4097 @@ -38,9 +38,9 @@ ; CHECK-NEXT: %min.n = select i1 %min.cmp, i64 4096, i64 %n ; CHECK-NEXT: --> (4096 umin %n) U: [0,4097) S: [0,4097) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4098) S: [0,4098) Exits: (1 + (4096 umin %n)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4098) S: [0,4098) Exits: (1 + (4096 umin %n)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4099) S: [1,4099) Exits: (2 + (4096 umin %n)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4099) S: [1,4099) Exits: (2 + (4096 umin %n)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @umin_signed_check ; CHECK-NEXT: Loop %loop: backedge-taken count is (1 + (4096 umin %n)) ; CHECK-NEXT: Loop %loop: max backedge-taken count is 4097 @@ -68,9 +68,9 @@ ; CHECK-NEXT: %min.n = select i1 %min.cmp, i64 4096, i64 %n ; CHECK-NEXT: --> (4096 smin %n) U: [-9223372036854775808,4097) S: [-9223372036854775808,4097) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4098) S: [0,4098) Exits: (0 smax (1 + (4096 smin %n))) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4098) S: [0,4098) Exits: (0 smax (1 + (4096 smin %n))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4099) S: [1,4099) Exits: (1 + (0 smax (1 + (4096 smin %n)))) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4099) S: [1,4099) Exits: (1 + (0 smax (1 + (4096 smin %n)))) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: Determining loop execution counts for: @smin_signed_check ; CHECK-NEXT: Loop %loop: backedge-taken count is (0 smax (1 + (4096 smin %n))) ; CHECK-NEXT: Loop %loop: max backedge-taken count is 4097 Index: llvm/test/Analysis/ScalarEvolution/trivial-phis.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/trivial-phis.ll +++ llvm/test/Analysis/ScalarEvolution/trivial-phis.ll @@ -118,21 +118,21 @@ ; CHECK-LABEL @test3 ; CHECK: %tmp14 = phi i64 [ %tmp40, %bb39 ], [ 1, %bb8 ] -; CHECK-NEXT: --> {1,+,1}<%bb13> U: [1,9223372036854775807) S: [1,9223372036854775807) +; CHECK-NEXT: --> {1,+,1}<%bb13> U: [1,9223372036854775807) S: [1,9223372036854775807) ; CHECK-SAME: Exits: (-2 + %arg) LoopDispositions: { %bb13: Computable, %bb8: Variant, %bb17_a: Invariant, %bb27: Invariant } ; CHECK: %tmp18 = phi i64 [ %tmp20, %bb17 ], [ 0, %bb13 ] ; CHECK-NEXT: --> {0,+,1}<%bb17_a> U: [0,9223372036854775807) S: [0,9223372036854775807) ; CHECK-SAME: Exits: (-1 + %arg) LoopDispositions: { %bb17_a: Computable, %bb13: Variant, %bb8: Variant } ; CHECK: %tmp24 = phi i64 [ %tmp14, %bb13 ], [ %tmp14, %bb17 ] -; CHECK-NEXT: --> {1,+,1}<%bb13> U: [1,9223372036854775807) S: [1,9223372036854775807) +; CHECK-NEXT: --> {1,+,1}<%bb13> U: [1,9223372036854775807) S: [1,9223372036854775807) ; CHECK-SAME: Exits: (-2 + %arg) LoopDispositions: { %bb13: Computable, %bb8: Variant, %bb17_a: Invariant, %bb27: Invariant } ; CHECK: %tmp28 = phi i64 [ %tmp34, %bb27 ], [ 0, %bb23 ] ; CHECK-NEXT: --> {0,+,1}<%bb27> U: [0,9223372036854775807) S: [0,9223372036854775807) ; CHECK-SAME: Exits: (-1 + %arg) LoopDispositions: { %bb27: Computable, %bb13: Variant, %bb8: Variant } ; CHECK: %tmp38 = phi i64 [ %tmp24, %bb23 ], [ %tmp24, %bb27 ] -; CHECK-NEXT: --> {1,+,1}<%bb13> U: [1,9223372036854775807) S: [1,9223372036854775807) +; CHECK-NEXT: --> {1,+,1}<%bb13> U: [1,9223372036854775807) S: [1,9223372036854775807) ; CHECK-SAME: Exits: (-2 + %arg) LoopDispositions: { %bb13: Computable, %bb8: Variant, %bb17_a: Invariant, %bb27: Invariant } define void @test3(i64 %arg, i32* %arg1) { Index: llvm/test/Analysis/ScalarEvolution/umin-umax-folds.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/umin-umax-folds.ll +++ llvm/test/Analysis/ScalarEvolution/umin-umax-folds.ll @@ -10,9 +10,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %and = and i1 %cmp1, %cmp2 ; CHECK-NEXT: --> %and U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: Determining loop execution counts for: @umin_sext_x_zext_x @@ -45,9 +45,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %sel = select i1 %cmp1, i64 %len.zext, i64 %len.sext ; CHECK-NEXT: --> (zext i32 %len to i64) U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @ule_sext_x_zext_x @@ -80,9 +80,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: full-set S: full-set Exits: (sext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: full-set S: full-set Exits: (sext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: full-set S: full-set Exits: (1 + (sext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: full-set S: full-set Exits: (1 + (sext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %sel = select i1 %cmp1, i64 %len.zext, i64 %len.sext ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) Exits: (sext i32 %len to i64) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @uge_sext_x_zext_x @@ -115,9 +115,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %umin = select i1 %cmp1, i64 %len.zext, i64 %len.sext ; CHECK-NEXT: --> (zext i32 %len to i64) U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @ult_sext_x_zext_x @@ -150,9 +150,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: full-set S: full-set Exits: (sext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: full-set S: full-set Exits: (sext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: full-set S: full-set Exits: (1 + (sext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: full-set S: full-set Exits: (1 + (sext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %umax = select i1 %cmp1, i64 %len.zext, i64 %len.sext ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) Exits: (sext i32 %len to i64) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @ugt_sext_x_zext_x @@ -185,9 +185,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %sel = select i1 %cmp1, i64 %len.zext, i64 %len.sext ; CHECK-NEXT: --> (zext i32 %len to i64) U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @sle_sext_x_zext_x @@ -220,9 +220,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %sel = select i1 %cmp1, i64 %len.zext, i64 %len.sext ; CHECK-NEXT: --> (zext i32 %len to i64) U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @sge_sext_x_zext_x @@ -255,9 +255,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: full-set S: full-set Exits: (sext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: full-set S: full-set Exits: (sext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: full-set S: full-set Exits: (1 + (sext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: full-set S: full-set Exits: (1 + (sext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %umin = select i1 %cmp1, i64 %len.zext, i64 %len.sext ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) Exits: (sext i32 %len to i64) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @slt_sext_x_zext_x @@ -290,9 +290,9 @@ ; CHECK-NEXT: %len.sext = sext i32 %len to i64 ; CHECK-NEXT: --> (sext i32 %len to i64) U: [-2147483648,2147483648) S: [-2147483648,2147483648) ; CHECK-NEXT: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i64 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,4294967297) S: [1,4294967297) Exits: (1 + (zext i32 %len to i64)) LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %umax = select i1 %cmp1, i64 %len.zext, i64 %len.sext ; CHECK-NEXT: --> (zext i32 %len to i64) U: [0,4294967296) S: [0,4294967296) Exits: (zext i32 %len to i64) LoopDispositions: { %loop: Invariant } ; CHECK-NEXT: Determining loop execution counts for: @sgt_sext_x_zext_x Index: llvm/test/Analysis/ScalarEvolution/widenable-condition.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/widenable-condition.ll +++ llvm/test/Analysis/ScalarEvolution/widenable-condition.ll @@ -15,9 +15,9 @@ ; CHECK-LABEL: 'wc_max' ; CHECK-NEXT: Classifying expressions for: @wc_max ; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] -; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,2000) S: [0,2000) Exits: <> LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {0,+,1}<%loop> U: [0,2000) S: [0,2000) Exits: <> LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %iv.next = add i32 %iv, 1 -; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,2001) S: [1,2001) Exits: <> LoopDispositions: { %loop: Computable } +; CHECK-NEXT: --> {1,+,1}<%loop> U: [1,2001) S: [1,2001) Exits: <> LoopDispositions: { %loop: Computable } ; CHECK-NEXT: %widenable_cond3 = call i1 @llvm.experimental.widenable.condition() ; CHECK-NEXT: --> %widenable_cond3 U: full-set S: full-set Exits: <> LoopDispositions: { %loop: Variant } ; CHECK-NEXT: %exiplicit_guard_cond4 = and i1 %cond_1, %widenable_cond3 Index: llvm/test/Analysis/ScalarEvolution/zext-wrap.ll =================================================================== --- llvm/test/Analysis/ScalarEvolution/zext-wrap.ll +++ llvm/test/Analysis/ScalarEvolution/zext-wrap.ll @@ -9,7 +9,7 @@ bb.i: ; preds = %bb1.i, %bb.nph ; We should be able to find the range for this expression. ; CHECK: %l_95.0.i1 = phi i8 -; CHECK: --> {0,+,-1}<%bb.i> U: [2,1) S: [2,1){{ *}}Exits: 2 +; CHECK: --> {0,+,-1}<%bb.i> U: [2,1) S: [2,1){{ *}}Exits: 2 %l_95.0.i1 = phi i8 [ %tmp1, %bb.i ], [ 0, %entry ] Index: llvm/test/Transforms/IndVarSimplify/floating-point-iv.ll =================================================================== --- llvm/test/Transforms/IndVarSimplify/floating-point-iv.ll +++ llvm/test/Transforms/IndVarSimplify/floating-point-iv.ll @@ -150,7 +150,7 @@ ; CHECK-NEXT: [[INDVAR_CONV:%.*]] = sitofp i32 [[TMP11_INT]] to double ; CHECK-NEXT: [[TMP12]] = fadd double [[TMP10]], [[INDVAR_CONV]] ; CHECK-NEXT: [[TMP13_INT]] = add nuw nsw i32 [[TMP11_INT]], 1 -; CHECK-NEXT: [[TMP14:%.*]] = icmp slt i32 [[TMP13_INT]], 99999 +; CHECK-NEXT: [[TMP14:%.*]] = icmp ult i32 [[TMP13_INT]], 99999 ; CHECK-NEXT: br i1 [[TMP14]], label [[BB22]], label [[BB6:%.*]] ; CHECK: bb22: ; CHECK-NEXT: br i1 true, label [[BB8]], label [[BB6]] @@ -189,7 +189,7 @@ ; CHECK-NEXT: [[INDVAR_CONV:%.*]] = sitofp i32 [[TMP11_INT]] to float ; CHECK-NEXT: [[TMP12]] = fadd float [[TMP10]], [[INDVAR_CONV]] ; CHECK-NEXT: [[TMP13_INT]] = add nuw nsw i32 [[TMP11_INT]], 1 -; CHECK-NEXT: [[TMP14:%.*]] = icmp slt i32 [[TMP13_INT]], 99999 +; CHECK-NEXT: [[TMP14:%.*]] = icmp ult i32 [[TMP13_INT]], 99999 ; CHECK-NEXT: br i1 [[TMP14]], label [[BB22]], label [[BB6:%.*]] ; CHECK: bb22: ; CHECK-NEXT: br i1 true, label [[BB8]], label [[BB6]] @@ -229,7 +229,7 @@ ; CHECK-NEXT: [[INDVAR_CONV:%.*]] = sitofp i32 [[TMP11_INT]] to float ; CHECK-NEXT: [[TMP12]] = fadd float [[TMP10]], [[INDVAR_CONV]] ; CHECK-NEXT: [[TMP13_INT]] = add nuw nsw i32 [[TMP11_INT]], 1 -; CHECK-NEXT: [[TMP14:%.*]] = icmp slt i32 [[TMP13_INT]], 99999 +; CHECK-NEXT: [[TMP14:%.*]] = icmp ult i32 [[TMP13_INT]], 99999 ; CHECK-NEXT: br i1 [[TMP14]], label [[BB22]], label [[BB6:%.*]] ; CHECK: bb22: ; CHECK-NEXT: br i1 true, label [[BB8]], label [[BB6]] Index: llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll =================================================================== --- llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll +++ llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll @@ -272,59 +272,47 @@ define void @strides_different_direction(i32* noalias nocapture %A, i32* noalias nocapture readonly %B, i32* noalias nocapture readonly %C, i32 %N) #0 { ; CHECK-LABEL: @strides_different_direction( ; CHECK-NEXT: entry: -; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]] -; CHECK: vector.scevcheck: -; CHECK-NEXT: [[MUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 1, i32 430) -; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i32, i1 } [[MUL]], 0 -; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i32, i1 } [[MUL]], 1 -; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N:%.*]], [[MUL_RESULT]] -; CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[N]], [[MUL_RESULT]] -; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], [[N]] -; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP0]], [[N]] -; CHECK-NEXT: [[TMP4:%.*]] = select i1 true, i1 [[TMP2]], i1 [[TMP3]] -; CHECK-NEXT: [[TMP5:%.*]] = or i1 [[TMP4]], [[MUL_OVERFLOW]] -; CHECK-NEXT: [[TMP6:%.*]] = or i1 false, [[TMP5]] -; CHECK-NEXT: br i1 [[TMP6]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] +; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]] ; CHECK: vector.ph: ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] ; CHECK: vector.body: ; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] -; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[INDEX]], 0 -; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i32 [[TMP7]] -; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[TMP8]], i32 0 -; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32* [[TMP9]] to <4 x i32>* -; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP10]], align 4 -; CHECK-NEXT: [[TMP11:%.*]] = sub nsw i32 [[N]], [[TMP7]] -; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i32 [[TMP11]] -; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, i32* [[TMP12]], i32 0 -; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i32 -3 -; CHECK-NEXT: [[TMP15:%.*]] = bitcast i32* [[TMP14]] to <4 x i32>* -; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP15]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0 +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i32 [[TMP0]] +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, i32* [[TMP1]], i32 0 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>* +; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = sub nsw i32 [[N:%.*]], [[TMP0]] +; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[C:%.*]], i32 [[TMP4]] +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, i32* [[TMP5]], i32 0 +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, i32* [[TMP6]], i32 -3 +; CHECK-NEXT: [[TMP8:%.*]] = bitcast i32* [[TMP7]] to <4 x i32>* +; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP8]], align 4 ; CHECK-NEXT: [[REVERSE:%.*]] = shufflevector <4 x i32> [[WIDE_LOAD1]], <4 x i32> undef, <4 x i32> -; CHECK-NEXT: [[TMP16:%.*]] = add nsw <4 x i32> [[REVERSE]], [[WIDE_LOAD]] -; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[TMP7]] -; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, i32* [[TMP17]], i32 0 -; CHECK-NEXT: [[TMP19:%.*]] = bitcast i32* [[TMP18]] to <4 x i32>* -; CHECK-NEXT: store <4 x i32> [[TMP16]], <4 x i32>* [[TMP19]], align 4 +; CHECK-NEXT: [[TMP9:%.*]] = add nsw <4 x i32> [[REVERSE]], [[WIDE_LOAD]] +; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[TMP0]] +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, i32* [[TMP10]], i32 0 +; CHECK-NEXT: [[TMP12:%.*]] = bitcast i32* [[TMP11]] to <4 x i32>* +; CHECK-NEXT: store <4 x i32> [[TMP9]], <4 x i32>* [[TMP12]], align 4 ; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 4 -; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i32 [[INDEX_NEXT]], 428 -; CHECK-NEXT: br i1 [[TMP20]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP8:!llvm.loop !.*]] +; CHECK-NEXT: [[TMP13:%.*]] = icmp eq i32 [[INDEX_NEXT]], 428 +; CHECK-NEXT: br i1 [[TMP13]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP8:!llvm.loop !.*]] ; CHECK: middle.block: ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 431, 428 ; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]] ; CHECK: scalar.ph: -; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 428, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_SCEVCHECK]] ] +; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 428, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ] ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.cond.cleanup: ; CHECK-NEXT: ret void ; CHECK: for.body: ; CHECK-NEXT: [[I_09:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[ADD3:%.*]], [[FOR_BODY]] ] ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 [[I_09]] -; CHECK-NEXT: [[TMP21:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 +; CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 ; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[N]], [[I_09]] ; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[C]], i32 [[SUB]] -; CHECK-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4 -; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP21]] +; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX1]], align 4 +; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP14]] ; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[I_09]] ; CHECK-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4 ; CHECK-NEXT: [[ADD3]] = add nuw nsw i32 [[I_09]], 1 Index: llvm/test/Transforms/LoopVectorize/X86/vector_ptr_load_store.ll =================================================================== --- llvm/test/Transforms/LoopVectorize/X86/vector_ptr_load_store.ll +++ llvm/test/Transforms/LoopVectorize/X86/vector_ptr_load_store.ll @@ -117,7 +117,7 @@ ;; However, we should not take unconsecutive loads of pointers into account. ; CHECK: test_nonconsecutive_ptr_load -; CHECK: LV: The Smallest and Widest types: 16 / 16 bits. +; CHECK: LV: The Smallest and Widest types: 16 / 64 bits. define void @test_nonconsecutive_ptr_load() nounwind ssp uwtable { br label %1 Index: llvm/test/Transforms/LoopVectorize/interleaved-accesses-3.ll =================================================================== --- llvm/test/Transforms/LoopVectorize/interleaved-accesses-3.ll +++ llvm/test/Transforms/LoopVectorize/interleaved-accesses-3.ll @@ -26,6 +26,9 @@ ; CHECK-NOT: %wide.vec = load <8 x i32>, <8 x i32>* {{.*}}, align 4 ; CHECK-NOT: shufflevector <8 x i32> %wide.vec, <8 x i32> undef, <4 x i32> +; TODO: This is vectorized now, but it's not clear to me whether that's +; a miscompile or not. + define void @_Z4funcPjS_hh(i32* noalias nocapture readonly %a, i32* noalias nocapture %b, i8 zeroext %x, i8 zeroext %y) local_unnamed_addr { entry: %cmp9 = icmp eq i8 %y, 0 Index: polly/test/ScopInfo/20111108-Parameter-not-detected.ll =================================================================== --- polly/test/ScopInfo/20111108-Parameter-not-detected.ll +++ polly/test/ScopInfo/20111108-Parameter-not-detected.ll @@ -50,7 +50,7 @@ ret i32 0 } -; CHECK: p0: {0,+,1}<%for.cond> +; CHECK: p0: {0,+,1}<%for.cond> ; ; CHECK: Statements { ; CHECK-NEXT: Stmt_if_then Index: polly/test/ScopInfo/NonAffine/non_affine_conditional_surrounding_non_affine_loop.ll =================================================================== --- polly/test/ScopInfo/NonAffine/non_affine_conditional_surrounding_non_affine_loop.ll +++ polly/test/ScopInfo/NonAffine/non_affine_conditional_surrounding_non_affine_loop.ll @@ -38,7 +38,7 @@ ; INNERMOST-NEXT: Invalid Context: ; INNERMOST-NEXT: [tmp6, p_1, p_2] -> { : p_2 < p_1 and (tmp6 < 0 or tmp6 > 0) } ; INNERMOST-NEXT: p0: %tmp6 -; INNERMOST-NEXT: p1: {0,+,(sext i32 %N to i64)}<%bb3> +; INNERMOST-NEXT: p1: {0,+,(sext i32 %N to i64)}<%bb3> ; INNERMOST-NEXT: p2: {0,+,1}<%bb3> ; INNERMOST-NEXT: Arrays { ; INNERMOST-NEXT: i32 MemRef_A[*]; // Element size 4