Index: lib/CodeGen/MachineLICM.cpp
===================================================================
--- lib/CodeGen/MachineLICM.cpp
+++ lib/CodeGen/MachineLICM.cpp
@@ -251,10 +251,15 @@
     /// if there is little to no overhead moving instructions into loops.
     void SinkIntoLoop();
 
-    /// InitRegPressure - Find all virtual register references that are liveout
-    /// of the preheader to initialize the starting "register pressure". Note
-    /// this does not count live through (livein but not used) registers.
-    void InitRegPressure(MachineBasicBlock *BB);
+    /// InitRegPressure - Initialize the register pressure estimation for the
+    /// current loop.
+    void InitRegPressure();
+
+    /// InitRegPressureWithLiveOuts - Find all virtual register references that
+    /// are liveout of the preheader to initialize the starting "register
+    /// pressure". Note this does not count live through (livein but not used)
+    /// registers.
+    void InitRegPressureWithLiveOuts(MachineBasicBlock *BB);
 
     /// calcRegisterCost - Calculate the additional register pressure that the
     /// registers used in MI cause.
@@ -757,10 +762,7 @@
   if (Scopes.size() == 0)
     return;
 
-  // Compute registers which are livein into the loop headers.
-  RegSeen.clear();
-  BackTrace.clear();
-  InitRegPressure(Preheader);
+  InitRegPressure();
 
   // Now perform LICM.
   for (unsigned i = 0, e = Scopes.size(); i != e; ++i) {
@@ -836,10 +838,47 @@
   return MO.isKill() || MRI->hasOneNonDBGUse(MO.getReg());
 }
 
-/// InitRegPressure - Find all virtual register references that are liveout of
-/// the preheader to initialize the starting "register pressure". Note this
-/// does not count live through (livein but not used) registers.
-void MachineLICM::InitRegPressure(MachineBasicBlock *BB) {
+/// InitRegPressure - Initialize the register pressure estimation for the
+/// current loop.
+void MachineLICM::InitRegPressure() {
+  MachineBasicBlock *Preheader = getCurPreheader();
+  if (!Preheader)
+    return;
+
+  // Compute registers which are livein into the loop headers.
+  RegSeen.clear();
+  BackTrace.clear();
+  InitRegPressureWithLiveOuts(Preheader);
+
+  // Compute registers which are clobbered somewhere in the loop.
+  BitVector Clobbers(TRI->getNumRegs());
+  for (MachineBasicBlock *BB : CurLoop->getBlocks()) {
+    for (const MachineInstr &MI : *BB) {
+      for (const MachineOperand &MO : MI.operands()) {
+        if (MO.isRegMask())
+          Clobbers.setBitsNotInMask(MO.getRegMask());
+      }
+    }
+  }
+
+  for (unsigned i = 0, e = Clobbers.size(); i != e; ++i) {
+    if (!Clobbers.test(i) || !TRI->isPhysicalRegister(i) ||
+        !TRI->isInAllocatableClass(i))
+      continue;
+    if (MCSuperRegIterator(i, TRI).isValid())
+      continue;
+    const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(i);
+    RegClassWeight W = TRI->getRegClassWeight(RC);
+    const int *PS = TRI->getRegClassPressureSets(RC);
+    for (; *PS != -1; ++PS)
+      RegPressure[*PS] += W.RegWeight;
+  }
+}
+
+/// InitRegPressureWithLiveOuts - Find all virtual register references that are
+/// liveout of the preheader to initialize the starting "register pressure".
+/// Note this does not count live through (livein but not used) registers.
+void MachineLICM::InitRegPressureWithLiveOuts(MachineBasicBlock *BB) {
   std::fill(RegPressure.begin(), RegPressure.end(), 0);
 
   // If the preheader has only a single predecessor and it ends with a
@@ -850,7 +889,7 @@
     MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
     SmallVector<MachineOperand, 4> Cond;
     if (!TII->AnalyzeBranch(*BB, TBB, FBB, Cond, false) && Cond.empty())
-      InitRegPressure(*BB->pred_begin());
+      InitRegPressureWithLiveOuts(*BB->pred_begin());
   }
 
   for (const MachineInstr &MI : *BB)
Index: test/CodeGen/Mips/prevent-hoisting.ll
===================================================================
--- test/CodeGen/Mips/prevent-hoisting.ll
+++ test/CodeGen/Mips/prevent-hoisting.ll
@@ -17,12 +17,14 @@
 
 ; Check that at the start of a fallthrough block there is a instruction that writes to $1.
 ; CHECK-NEXT:  {{BB[0-9_#]+}}: 
-; CHECK-NEXT:      lw      $[[R1:[0-9]+]], %got(assignSE2partition)($[[R2:[0-9]+]])
+; CHECK-NEXT:      lw      ${{[0-9]+}}, %got(assignSE2partition)($[[R2:[0-9]+]])
+; CHECK-NEXT:  {{BB[0-9_#]+}}: 
 ; CHECK-NEXT:      sll $1, $[[R0:[0-9]+]], 4
 
 ; Check that identical instructions are at the start of a target block.
 ; CHECK:       [[BB0]]:
-; CHECK-NEXT:      lw      $[[R1]], %got(assignSE2partition)($[[R2]])
+; CHECK-NEXT:      lw      ${{[0-9]+}}, %got(assignSE2partition)($[[R2]])
+; CHECK-NEXT:  {{BB[0-9_#]+}}: 
 ; CHECK-NEXT:      sll $1, $[[R0]], 4
 
 
Index: test/CodeGen/X86/2008-10-27-CoalescerBug.ll
===================================================================
--- test/CodeGen/X86/2008-10-27-CoalescerBug.ll
+++ test/CodeGen/X86/2008-10-27-CoalescerBug.ll
@@ -1,10 +1,7 @@
 ; REQUIRES: asserts
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats 2>&1 | FileCheck %s
-; Now this test spills one register. But a reload in the loop is cheaper than
-; the divsd so it's a win.
+; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats 2>&1 | not grep "Number of spills inserted"
 
 define fastcc void @fourn(double* %data, i32 %isign) nounwind {
-; CHECK: fourn
 entry:
 	br label %bb
 
@@ -15,10 +12,6 @@
 	%1 = icmp sgt i32 %0, 2		; <i1> [#uses=1]
 	br i1 %1, label %bb30.loopexit, label %bb
 
-; CHECK: %bb30.loopexit
-; CHECK: divsd %xmm0
-; CHECK: movsd %xmm0, 16(%esp)
-; CHECK: %bb3
 bb3:		; preds = %bb30.loopexit, %bb25, %bb3
 	%2 = load i32, i32* null, align 4		; <i32> [#uses=1]
 	%3 = mul i32 %2, 0		; <i32> [#uses=1]
Index: test/CodeGen/X86/licm-regpressure.ll
===================================================================
--- test/CodeGen/X86/licm-regpressure.ll
+++ test/CodeGen/X86/licm-regpressure.ll
@@ -1,7 +1,4 @@
 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; This tests currently fails as MachineLICM does not compute register pressure
-; correctly. More details: llvm.org/PR23143
-; XFAIL: *
 
 ; MachineLICM should take register pressure into account.
 ; CHECK-NOT: Spill
@@ -17,18 +14,18 @@
 
 loop-body:
   %0 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 0
-  %1 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 1
-  %2 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 2
-  %3 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 3
-  %4 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 4
-  %5 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 5
-  %6 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 6
   call void @assign(i32* %0)
+  %1 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 1
   call void @assign(i32* %1)
+  %2 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 2
   call void @assign(i32* %2)
+  %3 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 3
   call void @assign(i32* %3)
+  %4 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 4
   call void @assign(i32* %4)
+  %5 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 5
   call void @assign(i32* %5)
+  %6 = getelementptr inbounds %struct.A, %struct.A* %a, i64 0, i32 6
   call void @assign(i32* %6)
   br i1 %b, label %loop-body, label %loop-exit