diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -1624,6 +1624,8 @@
   SDNodeFlags Flags;
   Flags.setNoFPExcept(N->getFlags().hasNoFPExcept());
 
+  bool HasUnsignedConv = false;
+
   // First do an SINT_TO_FP, whether the original was signed or unsigned.
   // When promoting partial word types to i32 we must honor the signedness,
   // though.
@@ -1633,12 +1635,16 @@
                       MVT::i32, Src);
     Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
                                    APInt(NVT.getSizeInBits(), 0)), dl, NVT);
+    HasUnsignedConv = TLI.isOperationLegalOrCustom(ISD::UINT_TO_FP, SrcVT);
+    unsigned ConvOp = (HasUnsignedConv && !isSigned)
+                          ? (Strict ? ISD::STRICT_UINT_TO_FP : ISD::UINT_TO_FP)
+                          : (Strict ? ISD::STRICT_SINT_TO_FP : ISD::SINT_TO_FP);
     if (Strict) {
-      Hi = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl,
-                       DAG.getVTList(NVT, MVT::Other), {Chain, Src}, Flags);
+      Hi = DAG.getNode(ConvOp, dl, DAG.getVTList(NVT, MVT::Other), {Chain, Src},
+                       Flags);
       Chain = Hi.getValue(1);
     } else
-      Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src);
+      Hi = DAG.getNode(ConvOp, dl, NVT, Src);
   } else {
     RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
     if (SrcVT.bitsLE(MVT::i64)) {
@@ -1660,7 +1666,7 @@
     GetPairElements(Tmp.first, Lo, Hi);
   }
 
-  if (isSigned) {
+  if (isSigned || HasUnsignedConv) {
     if (Strict)
       ReplaceValueWith(SDValue(N, 1), Chain);
 
diff --git a/llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll b/llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
--- a/llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
+++ b/llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
@@ -1683,68 +1683,16 @@
 define ppc_fp128 @u32_to_ppcq(i32 zeroext %m) #0 {
 ; PC64LE-LABEL: u32_to_ppcq:
 ; PC64LE:       # %bb.0: # %entry
-; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    std 30, -24(1) # 8-byte Folded Spill
-; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
-; PC64LE-NEXT:    std 0, 16(1)
-; PC64LE-NEXT:    stdu 1, -64(1)
-; PC64LE-NEXT:    mr 30, 3
-; PC64LE-NEXT:    addis 3, 2, .LCPI35_0@toc@ha
+; PC64LE-NEXT:    mtfprwz 0, 3
 ; PC64LE-NEXT:    xxlxor 2, 2, 2
-; PC64LE-NEXT:    mtfprwa 0, 30
-; PC64LE-NEXT:    lfs 3, .LCPI35_0@toc@l(3)
-; PC64LE-NEXT:    xxlxor 4, 4, 4
-; PC64LE-NEXT:    xscvsxddp 31, 0
-; PC64LE-NEXT:    fmr 1, 31
-; PC64LE-NEXT:    bl __gcc_qadd
-; PC64LE-NEXT:    nop
-; PC64LE-NEXT:    cmpwi 30, 0
-; PC64LE-NEXT:    blt 0, .LBB35_2
-; PC64LE-NEXT:  # %bb.1: # %entry
-; PC64LE-NEXT:    fmr 1, 31
-; PC64LE-NEXT:  .LBB35_2: # %entry
-; PC64LE-NEXT:    blt 0, .LBB35_4
-; PC64LE-NEXT:  # %bb.3: # %entry
-; PC64LE-NEXT:    xxlxor 2, 2, 2
-; PC64LE-NEXT:  .LBB35_4: # %entry
-; PC64LE-NEXT:    addi 1, 1, 64
-; PC64LE-NEXT:    ld 0, 16(1)
-; PC64LE-NEXT:    lfd 31, -8(1) # 8-byte Folded Reload
-; PC64LE-NEXT:    ld 30, -24(1) # 8-byte Folded Reload
-; PC64LE-NEXT:    mtlr 0
+; PC64LE-NEXT:    xscvuxddp 1, 0
 ; PC64LE-NEXT:    blr
 ;
 ; PC64LE9-LABEL: u32_to_ppcq:
 ; PC64LE9:       # %bb.0: # %entry
-; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    std 30, -24(1) # 8-byte Folded Spill
-; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
-; PC64LE9-NEXT:    std 0, 16(1)
-; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    mr 30, 3
-; PC64LE9-NEXT:    addis 3, 2, .LCPI35_0@toc@ha
+; PC64LE9-NEXT:    mtfprwz 0, 3
 ; PC64LE9-NEXT:    xxlxor 2, 2, 2
-; PC64LE9-NEXT:    mtfprwa 0, 30
-; PC64LE9-NEXT:    lfs 3, .LCPI35_0@toc@l(3)
-; PC64LE9-NEXT:    xscvsxddp 31, 0
-; PC64LE9-NEXT:    xxlxor 4, 4, 4
-; PC64LE9-NEXT:    fmr 1, 31
-; PC64LE9-NEXT:    bl __gcc_qadd
-; PC64LE9-NEXT:    nop
-; PC64LE9-NEXT:    cmpwi 30, 0
-; PC64LE9-NEXT:    blt 0, .LBB35_2
-; PC64LE9-NEXT:  # %bb.1: # %entry
-; PC64LE9-NEXT:    fmr 1, 31
-; PC64LE9-NEXT:  .LBB35_2: # %entry
-; PC64LE9-NEXT:    blt 0, .LBB35_4
-; PC64LE9-NEXT:  # %bb.3: # %entry
-; PC64LE9-NEXT:    xxlxor 2, 2, 2
-; PC64LE9-NEXT:  .LBB35_4: # %entry
-; PC64LE9-NEXT:    addi 1, 1, 64
-; PC64LE9-NEXT:    ld 0, 16(1)
-; PC64LE9-NEXT:    lfd 31, -8(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    ld 30, -24(1) # 8-byte Folded Reload
-; PC64LE9-NEXT:    mtlr 0
+; PC64LE9-NEXT:    xscvuxddp 1, 0
 ; PC64LE9-NEXT:    blr
 ;
 ; PC64-LABEL: u32_to_ppcq: