[VE] Add integer arithmetic vector instructions

[kaz7]

Summary

Add VADD/VADS/VADX/VSUB/VSBS/VSBX/VMPY/VMPS/VMPX/VMPD/VDIV/VDVS/VDVX
instructions. Also add regression tests.

[simoll]

llvm/lib/Target/VE/VEInstrVec.td

507

Shouldn't the RC register class for pv.*.up instructions be F32?

[kaz7]

Make sense. Let me check them again. Thanks.

[kaz7]

Add reason and idea.

llvm/lib/Target/VE/VEInstrVec.td

507

I remember why I use I64 here. This instruction is vector integer add instruction. I didn't use F32 here since our F32 has represented only f32 values. It doesn't represent i32 values.

However, it may be possible to assign not only f32 but also i32 to F32 register class and use F32 here. Similarly, it is also possible to assign both f32 and i32 to I32 register class too since VE has vector floating-point add instruction like "PVFADDLO".

Let me consider this.

[simoll]

llvm/lib/Target/VE/VEInstrVec.td

507

I like your idea of mapping f32/i32 to both I32 and F32. AFAIK, the mapping between types (eg i32) and registers (eg F32) only matters for isel pattern constraints (custom lowering code is not subject to those constraints).

[kaz7]

Change my mind. Stop previous plan to change.

llvm/lib/Target/VE/VEInstrVec.td

507

I like that idea too. But, I understand doing that needs a lot of work. Can we merge this one as is and try to optimize it later?

For example, it is possible to define f32 and i32 to both F32 and I32. However, it doesn't help ISel patterns at the moment. Let consider about implementing AND for higher i32 and lower i32. What kind of patterns we can to write? Pat<(i32 (and ... doesn't work. Maybe we can write Pat<(I32 (and... and Pat<(F32 (and.... I've not tried it yet. Then, we also need a lot of patterns to make it worth.

So, let me merge all vector instructions first.

[kaz7]

It looks like all of these modifications will be overwritten by internal modifications, so I'm abandoning all of vector modifications once.

llvm/lib/Target/VE/VEInstrVec.td

 let VE_VLIndex = 3 in
 multiclass VMVm<string opcStr, bits<8>opc, RegisterClass RC,
                 RegisterClass RCM> {
   defm rv : VMVmm<opcStr, opc, RC, RCM, (ins I64:$sy, RC:$vz)>;
   let cy = 0 in
   defm iv : VMVmm<opcStr, opc, RC, RCM, (ins uimm7:$sy, RC:$vz)>;
 }
 defm VMV : VMVm<"vmv", 0x9c, V64, VM>;
+
+//-----------------------------------------------------------------------------
+// Section 8.10 - Vector Fixed-Point Arithmetic Instructions
+//-----------------------------------------------------------------------------
+
+// Multiclass for generic vector calculation
+let vx = ?, hasSideEffects = 0, Uses = [VL] in
+multiclass RVbm<string opcStr, string argStr, bits<8>opc, RegisterClass RC,
+                dag dag_in, string disEnc = ""> {
+  let DisableEncoding = disEnc in
+  def "" : RV<opc, (outs RC:$vx), dag_in,
+              !strconcat(opcStr, " $vx", argStr)>;
+  let Constraints = "$vx = $base", DisableEncoding = disEnc#"$base",
+      isCodeGenOnly = 1 in
+  def _v : RV<opc, (outs RC:$vx), !con(dag_in, (ins RC:$base)),
+              !strconcat(opcStr, " $vx", argStr)>;
+}
+multiclass RVlm<string opcStr, string argStr, bits<8>opc, RegisterClass RC,
+                dag dag_in> {
+  defm "" : RVbm<opcStr, argStr, opc, RC, dag_in>;
+  let isCodeGenOnly = 1, VE_VLInUse = 1 in {
+    defm l : RVbm<opcStr, argStr, opc, RC, !con(dag_in, (ins I32:$vl)),
+                  "$vl,">;
+    defm L : RVbm<opcStr, argStr, opc, RC, !con(dag_in, (ins VLS:$vl)),
+                  "$vl,">;
+  }
+}
+multiclass RVmm<string opcStr, string argStr, bits<8>opc, RegisterClass RC,
+                RegisterClass RCM, dag dag_in> {
+  defm "" : RVlm<opcStr, argStr, opc, RC, dag_in>;
+  let m = ?, VE_VLWithMask = 1 in
+  defm m : RVlm<opcStr, argStr#", $m", opc, RC, !con(dag_in, (ins RCM:$m))>;
+}
+// Generic RV multiclass with 2 arguments.
+//   e.g. VADD, VSUB, VMPY, and etc.
+let VE_VLIndex = 3 in
+multiclass RVm<string opcStr, bits<8>opc, RegisterClass VRC, RegisterClass RC,
+               RegisterClass RCM, Operand SIMM = simm7> {
+  let cy = 0, sy = 0, vy = ?, vz = ? in
+  defm vv : RVmm<opcStr, ", $vy, $vz", opc, VRC, RCM, (ins VRC:$vy, VRC:$vz)>;
+  let cs = 1, vz = ? in
+  defm rv : RVmm<opcStr, ", $sy, $vz", opc, VRC, RCM, (ins RC:$sy, VRC:$vz)>;
+  let cs = 1, cy = 0, vz = ? in
+  defm iv : RVmm<opcStr, ", $sy, $vz", opc, VRC, RCM, (ins SIMM:$sy, VRC:$vz)>;
+}
+// Special RV multiclass with 2 arguments using cs2.
+//   e.g. VDIV, VDVS, and VDVX.
+let VE_VLIndex = 3 in
+multiclass RVDIVm<string opcStr, bits<8>opc, RegisterClass VRC,
+                  RegisterClass RC, RegisterClass RCM, Operand SIMM = simm7> {
+  let cy = 0, sy = 0, vy = ?, vz = ? in
+  defm vv : RVmm<opcStr, ", $vy, $vz", opc, VRC, RCM, (ins VRC:$vy, VRC:$vz)>;
+  let cs2 = 1, vy = ? in
+  defm vr : RVmm<opcStr, ", $vy, $sy", opc, VRC, RCM, (ins VRC:$vy, RC:$sy)>;
+  let cs2 = 1, cy = 0, vy = ? in
+  defm vi : RVmm<opcStr, ", $vy, $sy", opc, VRC, RCM, (ins VRC:$vy, SIMM:$sy)>;
+  let cs = 1, vz = ? in
+  defm rv : RVmm<opcStr, ", $sy, $vz", opc, VRC, RCM, (ins RC:$sy, VRC:$vz)>;
+  let cs = 1, cy = 0, vz = ? in
+  defm iv : RVmm<opcStr, ", $sy, $vz", opc, VRC, RCM, (ins SIMM:$sy, VRC:$vz)>;
+}
+
+// Section 8.10.1 - VADD (Vector Add)
+let cx = 0, cx2 = 0 in
+defm VADDUL : RVm<"vaddu.l", 0xc8, V64, I64, VM>;
+let cx = 0, cx2 = 1 in {
+  defm PVADDULO : RVm<"pvaddu.lo", 0xc8, V64, I32, VM>;
+  let isCodeGenOnly = 1 in
+  defm VADDUW : RVm<"vaddu.w", 0xc8, V64, I32, VM>;
+}
+let cx = 1, cx2 = 0 in
+defm PVADDUUP : RVm<"pvaddu.up", 0xc8, V64, I64, VM>;
+let cx = 1, cx2 = 1 in
+defm PVADDU : RVm<"pvaddu", 0xc8, V64, I64, VM512>;
+def : MnemonicAlias<"vaddu.w", "pvaddu.lo">;
+
+// Section 8.10.2 - VADS (Vector Add Single)
+let cx = 0, cx2 = 0 in
+defm VADDSWSX : RVm<"vadds.w.sx", 0xca, V64, I32, VM>;
+let cx = 0, cx2 = 1 in {
+  defm PVADDSLO : RVm<"pvadds.lo", 0xca, V64, I32, VM>;
+  let isCodeGenOnly = 1 in
+  defm VADDSWZX : RVm<"vadds.w.zx", 0xca, V64, I32, VM>;
+}
+let cx = 1, cx2 = 0 in
+defm PVADDSUP : RVm<"pvadds.up", 0xca, V64, I64, VM>;
+let cx = 1, cx2 = 1 in
+defm PVADDS : RVm<"pvadds", 0xca, V64, I64, VM512>;
+def : MnemonicAlias<"pvadds.lo.sx", "vadds.w.sx">;
+def : MnemonicAlias<"vadds.w.zx", "pvadds.lo">;
+def : MnemonicAlias<"vadds.w", "pvadds.lo">;
+def : MnemonicAlias<"pvadds.lo.zx", "pvadds.lo">;
+
+// Section 8.10.3 - VADX (Vector Add)
+defm VADDSL : RVm<"vadds.l", 0x8b, V64, I64, VM>;
+
+// Section 8.10.4 - VSUB (Vector Subtract)
+let cx = 0, cx2 = 0 in
+defm VSUBUL : RVm<"vsubu.l", 0xd8, V64, I64, VM>;
+let cx = 0, cx2 = 1 in {
+  defm PVSUBULO : RVm<"pvsubu.lo", 0xd8, V64, I32, VM>;
+  let isCodeGenOnly = 1 in
+  defm VSUBUW : RVm<"vsubu.w", 0xd8, V64, I32, VM>;
+}
+let cx = 1, cx2 = 0 in
+defm PVSUBUUP : RVm<"pvsubu.up", 0xd8, V64, I64, VM>;
+let cx = 1, cx2 = 1 in
+defm PVSUBU : RVm<"pvsubu", 0xd8, V64, I64, VM512>;
+def : MnemonicAlias<"vsubu.w", "pvsubu.lo">;
+
+// Section 8.10.5 - VSBS (Vector Subtract Single)
+let cx = 0, cx2 = 0 in
+defm VSUBSWSX : RVm<"vsubs.w.sx", 0xda, V64, I32, VM>;
+let cx = 0, cx2 = 1 in {
+  defm PVSUBSLO : RVm<"pvsubs.lo", 0xda, V64, I32, VM>;
+  let isCodeGenOnly = 1 in
+  defm VSUBSWZX : RVm<"vsubs.w.zx", 0xda, V64, I32, VM>;
+}
+let cx = 1, cx2 = 0 in
+defm PVSUBSUP : RVm<"pvsubs.up", 0xda, V64, I64, VM>;
+let cx = 1, cx2 = 1 in
+defm PVSUBS : RVm<"pvsubs", 0xda, V64, I64, VM512>;
+def : MnemonicAlias<"pvsubs.lo.sx", "vsubs.w.sx">;
+def : MnemonicAlias<"vsubs.w.zx", "pvsubs.lo">;
+def : MnemonicAlias<"vsubs.w", "pvsubs.lo">;
+def : MnemonicAlias<"pvsubs.lo.zx", "pvsubs.lo">;
+
+// Section 8.10.6 - VSBX (Vector Subtract)
+defm VSUBSL : RVm<"vsubs.l", 0x9b, V64, I64, VM>;
+
+// Section 8.10.7 - VMPY (Vector Multiply)
+let cx2 = 0 in
+defm VMULUL : RVm<"vmulu.l", 0xc9, V64, I64, VM>;
+let cx2 = 1 in
+defm VMULUW : RVm<"vmulu.w", 0xc9, V64, I32, VM>;
+
+// Section 8.10.8 - VMPS (Vector Multiply Single)
+let cx2 = 0 in
+defm VMULSWSX : RVm<"vmuls.w.sx", 0xcb, V64, I32, VM>;
+let cx2 = 1 in
+defm VMULSWZX : RVm<"vmuls.w.zx", 0xcb, V64, I32, VM>;
+def : MnemonicAlias<"vmuls.w", "vmuls.w.zx">;
+
+// Section 8.10.9 - VMPX (Vector Multiply)
+defm VMULSL : RVm<"vmuls.l", 0xdb, V64, I64, VM>;
+
+// Section 8.10.10 - VMPD (Vector Multiply)
+defm VMULSLW : RVm<"vmuls.l.w", 0xd9, V64, I32, VM>;
+
+// Section 8.10.11 - VDIV (Vector Divide)
+let cx2 = 0 in
+defm VDIVUL : RVDIVm<"vdivu.l", 0xe9, V64, I64, VM>;
+let cx2 = 1 in
+defm VDIVUW : RVDIVm<"vdivu.w", 0xe9, V64, I32, VM>;
+
+// Section 8.10.12 - VDVS (Vector Divide Single)
+let cx2 = 0 in
+defm VDIVSWSX : RVDIVm<"vdivs.w.sx", 0xeb, V64, I32, VM>;
+let cx2 = 1 in
+defm VDIVSWZX : RVDIVm<"vdivs.w.zx", 0xeb, V64, I32, VM>;
+def : MnemonicAlias<"vdivs.w", "vdivs.w.zx">;
+
+// Section 8.10.13 - VDVX (Vector Divide)
+defm VDIVSL : RVDIVm<"vdivs.l", 0xfb, V64, I64, VM>;

llvm/test/MC/VE/VADD.s

+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vaddu.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xc8]
+vaddu.l %v11, %s20, %v22
+
+# CHECK-INST: vaddu.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xc8]
+vaddu.l %vix, %vix, %vix
+
+# CHECK-INST: pvaddu.lo %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xc8]
+vaddu.w %vix, 22, %v22
+
+# CHECK-INST: pvaddu.lo %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xc8]
+pvaddu.lo %v11, 63, %v22, %vm11
+
+# CHECK-INST: pvaddu.up %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0xc8]
+pvaddu.up %v11, %vix, %v22, %vm11
+
+# CHECK-INST: pvaddu %v12, %v20, %v22, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0xc8]
+pvaddu %v12, %v20, %v22, %vm12

llvm/test/MC/VE/VADS.s

+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vadds.w.sx %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xca]
+vadds.w.sx %v11, %s20, %v22
+
+# CHECK-INST: vadds.w.sx %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xca]
+vadds.w.sx %vix, %vix, %vix
+
+# CHECK-INST: pvadds.lo %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xca]
+vadds.w.zx %vix, 22, %v22
+
+# CHECK-INST: pvadds.lo %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xca]
+vadds.w %vix, 22, %v22
+
+# CHECK-INST: pvadds.lo %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xca]
+pvadds.lo %v11, 63, %v22, %vm11
+
+# CHECK-INST: vadds.w.sx %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0xca]
+pvadds.lo.sx %v11, 63, %v22, %vm11
+
+# CHECK-INST: pvadds.lo %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xca]
+pvadds.lo.zx %v11, 63, %v22, %vm11
+
+# CHECK-INST: pvadds.up %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0xca]
+pvadds.up %v11, %vix, %v22, %vm11
+
+# CHECK-INST: pvadds %v12, %v20, %v22, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0xca]
+pvadds %v12, %v20, %v22, %vm12

llvm/test/MC/VE/VADX.s

+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vadds.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0x8b]
+vadds.l %v11, %s20, %v22
+
+# CHECK-INST: vadds.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0x8b]
+vadds.l %vix, %vix, %vix
+
+# CHECK-INST: vadds.l %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x20,0x8b]
+vadds.l %vix, 22, %v22
+
+# CHECK-INST: vadds.l %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0x8b]
+vadds.l %v11, 63, %v22, %vm11
+
+# CHECK-INST: vadds.l %v11, %v23, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x17,0x0b,0x00,0x00,0x0b,0x8b]
+vadds.l %v11, %v23, %v22, %vm11

llvm/test/MC/VE/VDIV.s

+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vdivu.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xe9]
+vdivu.l %v11, %s20, %v22
+
+# CHECK-INST: vdivu.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xe9]
+vdivu.l %vix, %vix, %vix
+
+# CHECK-INST: vdivu.w %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xe9]
+vdivu.w %vix, 22, %v22
+
+# CHECK-INST: vdivu.l %v11, %v22, 63, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x00,0x16,0x0b,0x00,0x3f,0x1b,0xe9]
+vdivu.l %v11, %v22, 63, %vm11
+
+# CHECK-INST: vdivu.l %v11, %vix, %s22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x00,0xff,0x0b,0x00,0x96,0x1b,0xe9]
+vdivu.l %v11, %vix, %s22, %vm11

llvm/test/MC/VE/VDVS.s

+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vdivs.w.sx %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xeb]
+vdivs.w.sx %v11, %s20, %v22
+
+# CHECK-INST: vdivs.w.sx %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xeb]
+vdivs.w.sx %vix, %vix, %vix
+
+# CHECK-INST: vdivs.w.zx %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xeb]
+vdivs.w.zx %vix, 22, %v22
+
+# CHECK-INST: vdivs.w.zx %vix, %v22, 22
+# CHECK-ENCODING: encoding: [0x00,0x00,0x16,0xff,0x00,0x16,0x50,0xeb]
+vdivs.w %vix, %v22, 22
+
+# CHECK-INST: vdivs.w.zx %v11, %v22, 63, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x00,0x16,0x0b,0x00,0x3f,0x5b,0xeb]
+vdivs.w %v11, %v22, 63, %vm11

llvm/test/MC/VE/VDVX.s

+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vdivs.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xfb]
+vdivs.l %v11, %s20, %v22
+
+# CHECK-INST: vdivs.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xfb]
+vdivs.l %vix, %vix, %vix
+
+# CHECK-INST: vdivs.l %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x20,0xfb]
+vdivs.l %vix, 22, %v22
+
+# CHECK-INST: vdivs.l %v11, %v22, 63, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x00,0x16,0x0b,0x00,0x3f,0x1b,0xfb]
+vdivs.l %v11, %v22, 63, %vm11
+
+# CHECK-INST: vdivs.l %v11, %v22, %s23, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x00,0x16,0x0b,0x00,0x97,0x1b,0xfb]
+vdivs.l %v11, %v22, %s23, %vm11

llvm/test/MC/VE/VMPD.s

+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vmuls.l.w %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xd9]
+vmuls.l.w %v11, %s20, %v22
+
+# CHECK-INST: vmuls.l.w %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xd9]
+vmuls.l.w %vix, %vix, %vix
+
+# CHECK-INST: vmuls.l.w %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x20,0xd9]
+vmuls.l.w %vix, 22, %v22
+
+# CHECK-INST: vmuls.l.w %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0xd9]
+vmuls.l.w %v11, 63, %v22, %vm11
+
+# CHECK-INST: vmuls.l.w %v11, %v23, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x17,0x0b,0x00,0x00,0x0b,0xd9]
+vmuls.l.w %v11, %v23, %v22, %vm11

llvm/test/MC/VE/VMPS.s

+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vmuls.w.sx %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xcb]
+vmuls.w.sx %v11, %s20, %v22
+
+# CHECK-INST: vmuls.w.sx %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xcb]
+vmuls.w.sx %vix, %vix, %vix
+
+# CHECK-INST: vmuls.w.zx %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xcb]
+vmuls.w.zx %vix, 22, %v22
+
+# CHECK-INST: vmuls.w.zx %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xcb]
+vmuls.w %vix, 22, %v22
+
+# CHECK-INST: vmuls.w.zx %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xcb]
+vmuls.w %v11, 63, %v22, %vm11

llvm/test/MC/VE/VMPX.s

+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vmuls.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xdb]
+vmuls.l %v11, %s20, %v22
+
+# CHECK-INST: vmuls.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xdb]
+vmuls.l %vix, %vix, %vix
+
+# CHECK-INST: vmuls.l %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x20,0xdb]
+vmuls.l %vix, 22, %v22
+
+# CHECK-INST: vmuls.l %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0xdb]
+vmuls.l %v11, 63, %v22, %vm11
+
+# CHECK-INST: vmuls.l %v11, %v23, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x17,0x0b,0x00,0x00,0x0b,0xdb]
+vmuls.l %v11, %v23, %v22, %vm11

llvm/test/MC/VE/VMPY.s

+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vmulu.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xc9]
+vmulu.l %v11, %s20, %v22
+
+# CHECK-INST: vmulu.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xc9]
+vmulu.l %vix, %vix, %vix
+
+# CHECK-INST: vmulu.w %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xc9]
+vmulu.w %vix, 22, %v22
+
+# CHECK-INST: vmulu.l %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0xc9]
+vmulu.l %v11, 63, %v22, %vm11
+
+# CHECK-INST: vmulu.l %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x0b,0xc9]
+vmulu.l %v11, %vix, %v22, %vm11

llvm/test/MC/VE/VSBS.s

+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vsubs.w.sx %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xda]
+vsubs.w.sx %v11, %s20, %v22
+
+# CHECK-INST: vsubs.w.sx %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xda]
+vsubs.w.sx %vix, %vix, %vix
+
+# CHECK-INST: pvsubs.lo %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xda]
+vsubs.w.zx %vix, 22, %v22
+
+# CHECK-INST: pvsubs.lo %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xda]
+vsubs.w %vix, 22, %v22
+
+# CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xda]
+pvsubs.lo %v11, 63, %v22, %vm11
+
+# CHECK-INST: vsubs.w.sx %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0xda]
+pvsubs.lo.sx %v11, 63, %v22, %vm11
+
+# CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xda]
+pvsubs.lo.zx %v11, 63, %v22, %vm11
+
+# CHECK-INST: pvsubs.up %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0xda]
+pvsubs.up %v11, %vix, %v22, %vm11
+
+# CHECK-INST: pvsubs %v12, %v20, %v22, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0xda]
+pvsubs %v12, %v20, %v22, %vm12

llvm/test/MC/VE/VSBX.s

+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vsubs.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0x9b]
+vsubs.l %v11, %s20, %v22
+
+# CHECK-INST: vsubs.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0x9b]
+vsubs.l %vix, %vix, %vix
+
+# CHECK-INST: vsubs.l %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x20,0x9b]
+vsubs.l %vix, 22, %v22
+
+# CHECK-INST: vsubs.l %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0x9b]
+vsubs.l %v11, 63, %v22, %vm11
+
+# CHECK-INST: vsubs.l %v11, %v23, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x17,0x0b,0x00,0x00,0x0b,0x9b]
+vsubs.l %v11, %v23, %v22, %vm11

llvm/test/MC/VE/VSUB.s

+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN:     | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vsubu.l %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xd8]
+vsubu.l %v11, %s20, %v22
+
+# CHECK-INST: vsubu.l %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xd8]
+vsubu.l %vix, %vix, %vix
+
+# CHECK-INST: pvsubu.lo %vix, 22, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xd8]
+vsubu.w %vix, 22, %v22
+
+# CHECK-INST: pvsubu.lo %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xd8]
+pvsubu.lo %v11, 63, %v22, %vm11
+
+# CHECK-INST: pvsubu.up %v11, %vix, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0xd8]
+pvsubu.up %v11, %vix, %v22, %vm11
+
+# CHECK-INST: pvsubu %v12, %v20, %v22, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0xd8]
+pvsubu %v12, %v20, %v22, %vm12