[SystemZ] Bugfix in SystemZVectorConstantInfo

[jonpa]

Summary

In order to correctly load an all-ones FP NaN value into a floating point register with a VGBM, the analyzed 32/64 FP bits must first be shifted left (into element 0 of the vector register).

SystemZVectorConstantInfo has so far relied on element replication which has bypassed the need to do this shift, but now it is clear that this must be done in order to handle NaNs.

[uweigand]

Strange that this wasn't noticed earlier. In any case, patch LGTM.

llvm/lib/Target/SystemZ/SystemZISelLowering.cpp

bool SystemZVectorConstantInfo::isVectorConstantLegal(
   // using a non-wraparound mask.
   uint64_t Middle = SplatUndefZ & ~Upper & ~Lower;
   return tryValue(SplatBitsZ | Middle);
 }
 
 SystemZVectorConstantInfo::SystemZVectorConstantInfo(APFloat FPImm) {
   IntBits = FPImm.bitcastToAPInt().zextOrSelf(128);
   isFP128 = (&FPImm.getSemantics() == &APFloat::IEEEquad());
-
-  // Find the smallest splat.
   SplatBits = FPImm.bitcastToAPInt();
   unsigned Width = SplatBits.getBitWidth();
+  IntBits <<= (SystemZ::VectorBits - Width);
+
+  // Find the smallest splat.
   while (Width > 8) {
     unsigned HalfSize = Width / 2;
     APInt HighValue = SplatBits.lshr(HalfSize).trunc(HalfSize);
     APInt LowValue = SplatBits.trunc(HalfSize);
 
     // If the two halves do not match, stop here.
     if (HighValue != LowValue || 8 > HalfSize)
       break;

llvm/test/CodeGen/SystemZ/fp-const-12.ll

-; Test loads of FP constants with VGM.
+; Test loads of FP constants with VGM and VGBM.
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
 
 define double @f1() {
 ; CHECK-LABEL: f1:
 ; CHECK: vgmg %v0, 2, 11
   ret double 1.0
 }
; CHECK: vgmf %v0, 2, 7
   ret float 0.5
 }
 
 define float @f10() {
 ; CHECK-LABEL: f10:
 ; CHECK: vgmf %v0, 2, 6
   ret float 0.125
 }
+
+define float @f11() {
+; CHECK-LABEL: f11:
+; CHECK: vgbm %v0, 61440
+  ret float 0xFFFFFFFFE0000000
+}
+
+define double @f12() {
+; CHECK-LABEL: f12:
+; CHECK: vgbm %v0, 61440
+  ret double 0xFFFFFFFF00000000
+}

llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll

 ; S390X-NEXT:    ler %f2, %f0
 ; S390X-NEXT:    aeb %f2, 0(%r1)
 ; S390X-NEXT:    larl %r1, .LCPI17_2
 ; S390X-NEXT:    aeb %f0, 0(%r1)
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_fadd_v3f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    vgbm %v0, 15
+; SZ13-NEXT:    vgbm %v0, 61440
 ; SZ13-NEXT:    vgmf %v2, 1, 1
 ; SZ13-NEXT:    vgmf %v3, 2, 8
 ; SZ13-NEXT:    lzer %f1
 ; SZ13-NEXT:    aebr %f1, %f0
 ; SZ13-NEXT:    aebr %f2, %f0
 ; SZ13-NEXT:    aebr %f3, %f0
 ; SZ13-NEXT:    vmrhf %v0, %v2, %v3
 ; SZ13-NEXT:    vrepf %v1, %v1, 0

 ; S390X-NEXT:    larl %r1, .LCPI22_2
 ; S390X-NEXT:    seb %f0, 0(%r1)
 ; S390X-NEXT:    lzer %f1
 ; S390X-NEXT:    sebr %f4, %f1
 ; S390X-NEXT:    br %r14
 ;
 ; SZ13-LABEL: constrained_vector_fsub_v3f32:
 ; SZ13:       # %bb.0: # %entry
-; SZ13-NEXT:    vgbm %v2, 15
+; SZ13-NEXT:    vgbm %v2, 61440
 ; SZ13-NEXT:    lzer %f1
 ; SZ13-NEXT:    sebr %f2, %f1
 ; SZ13-NEXT:    vgmf %v1, 1, 1
-; SZ13-NEXT:    vgbm %v3, 15
-; SZ13-NEXT:    vgbm %v0, 15
+; SZ13-NEXT:    vgbm %v3, 61440
+; SZ13-NEXT:    vgbm %v0, 61440
 ; SZ13-NEXT:    sebr %f3, %f1
 ; SZ13-NEXT:    vgmf %v1, 2, 8
 ; SZ13-NEXT:    sebr %f0, %f1
 ; SZ13-NEXT:    vmrhf %v0, %v3, %v0
 ; SZ13-NEXT:    vrepf %v1, %v2, 0
 ; SZ13-NEXT:    vmrhg %v24, %v0, %v1
 ; SZ13-NEXT:    br %r14
 entry: