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[AMDGPU] More codegen patterns for v2i16/v2f16 build_vector
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Authored by foad on Sep 21 2020, 8:44 AM.

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Summary

It's simpler to do this at codegen time than to do ad-hoc constant
folding of machine instructions in SIFoldOperands.

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foad created this revision.Sep 21 2020, 8:44 AM
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foad requested review of this revision.Sep 21 2020, 8:44 AM

All of this constant folding is really a DAG workaround

llvm/lib/Target/AMDGPU/SIInstructions.td
2051

This needs a move to materialize the constant?

2056

Ditto

foad added a comment.Sep 21 2020, 8:46 AM

The only codegen diffs I saw across several thousand graphics shaders were three instances of:

-	s_pack_ll_b32_b16 s3, s2, 0
+	s_and_b32 s3, 0xffff, s2
foad updated this revision to Diff 293190.Sep 21 2020, 8:56 AM

Add a move to materialize the constant.

Can this appear later in the codegen? It also does not cover global isel, so part in the operand folding probably needs to remain in addition to patterns.

Can this appear later in the codegen? It also does not cover global isel, so part in the operand folding probably needs to remain in addition to patterns.

It doesn't cover globalisel because build_vector patterns don't work now (and we use G_BUILD_VECTOR_TRUNC in these cases instead).

This kind of thing should not really be a problem in globalisel.

foad added a comment.Sep 21 2020, 12:21 PM

Can this appear later in the codegen?

I doubt it, and I haven't found any cases where that happens.

It also does not cover global isel, so part in the operand folding probably needs to remain in addition to patterns.

The whole point of instruction selection is to select the best instructions. I really don't think any instruction selector should rely on having this kind of folding run later.

rampitec accepted this revision.Sep 21 2020, 12:26 PM

LGTM. Looks like Matt has no concerns about Global ISel as well.

This revision is now accepted and ready to land.Sep 21 2020, 12:26 PM
This revision was automatically updated to reflect the committed changes.