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Differential D87912

[X86] Use shuffle to widen truncate of 128-bit and smaller vectors
Needs ReviewPublic

Authored by foad on Sep 18 2020, 9:04 AM.

Details

Reviewers
craig.topper
RKSimon
Summary

This uses BITCAST (and maybe CONCAT_VECTORS) and VECTOR_SHUFFLE instead
of scalarizing the vector with EXTRACT_VECTOR_ELTs and rebuilding it
with BUILD_VECTOR. This generates more efficient code in the majority of
affected test cases.

The original motivation for this was to avoid some redundant AND
instructions introduced by D87502, which were due to EXTRACT_VECTOR_ELT
sometimes being optimized to a constant, which makes it harder to
optimize away the scalarize-and-then-rebuild sequence.

Diff Detail

Event Timeline

foad created this revision.Sep 18 2020, 9:04 AM
Herald added a project: Restricted Project. · View Herald TranscriptSep 18 2020, 9:04 AM
Herald added subscribers: llvm-commits, hiraditya. · View Herald Transcript
foad requested review of this revision.Sep 18 2020, 9:04 AM
foad mentioned this in D87502: [DAGCombiner] Use known bits to fold extract_vector_elt with const index.Sep 18 2020, 9:05 AM
foad added inline comments.Sep 18 2020, 9:17 AM
llvm/test/CodeGen/X86/avx512-vec-cmp.ll
1489

Is this a regression? It's the same number of instructions but it looks like longer encoding, and it uses the constant pool. There are some similar cases in bitcast-and-setcc-512.ll where it uses shufps instead of packssdw. I haven't looked into them yet.

llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll
383

This regression (and similar ones below in this file and in bitcast-and-setcc-512.ll) are due to the recursion depth limit in ComputeNumSignBits, and the fact that the unoptimized DAG that we generate is now deeper but narrower. By contrast, scalarizing with EXTRACT_VECTOR_ELT tends to generate wide shallow DAGs.

I did try a couple of things to mitigate this, but I'm really not sure how much effort it's worth putting in to work around the arbitrary depth limit:

  1. I tried adding a special case to generate PACKSS directly instead of BITCAST+VECTOR_SHUFFLE, if the types are appropriate and enough sign bits are known
  2. I tried changing DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS to generate a VECTOR_SHUFFLE instead of "a nasty build vector" in the common case where exactly two vectors are concatenated.

Together these fixed some but not all of the psllw regressions.

Harbormaster completed remote builds in B72189: Diff 292819.Sep 18 2020, 9:48 AM
RKSimon added a comment.Sep 21 2020, 1:42 PM

Sorry, I haven't had chance to look at this yet

RKSimon added a comment.EditedSep 27 2020, 11:32 AM

I'm not convinced this should be necessary - although it does seem to show some missed opportunities in truncateVectorWithPACK because we bail if the destination vector size < 64 bits - fixing that would avoid many of ISD::TRUNCATE cases in ReplaceNodeResults

Revision Contents

Diff 292819

llvm/lib/Target/X86/X86ISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 29,858 Lines • ▼ Show 20 Lines case ISD::TRUNCATE: {
// number of elements as the widened result type. But this isn't always // number of elements as the widened result type. But this isn't always
// the best thing so do some custom legalization to avoid some cases. // the best thing so do some custom legalization to avoid some cases.
MVT WidenVT = getTypeToTransformTo(*DAG.getContext(), VT).getSimpleVT(); MVT WidenVT = getTypeToTransformTo(*DAG.getContext(), VT).getSimpleVT();
SDValue In = N->getOperand(0); SDValue In = N->getOperand(0);
EVT InVT = In.getValueType(); EVT InVT = In.getValueType();
unsigned InBits = InVT.getSizeInBits(); unsigned InBits = InVT.getSizeInBits();
if (128 % InBits == 0) { if (128 % InBits == 0) {
// 128 bit and smaller inputs should avoid truncate all together and // 128 bit and smaller inputs should avoid truncate altogether and just
// just use a build_vector that will become a shuffle. // use a shuffle.
// TODO: Widen and use a shuffle directly?
MVT InEltVT = InVT.getSimpleVT().getVectorElementType(); MVT InEltVT = InVT.getSimpleVT().getVectorElementType();
EVT EltVT = VT.getVectorElementType(); MVT EltVT = WidenVT.getVectorElementType();
unsigned WidenNumElts = WidenVT.getVectorNumElements(); // Bitcast to get the correct element type for the result.
SmallVector<SDValue, 16> Ops(WidenNumElts, DAG.getUNDEF(EltVT)); MVT TempVT = MVT::getVectorVT(EltVT, InBits / EltVT.getSizeInBits());
// Use the original element count so we don't do more scalar opts than SDValue Temp = DAG.getNode(ISD::BITCAST, dl, TempVT, In);
// necessary. // Widen to the desired result type.
unsigned MinElts = VT.getVectorNumElements(); unsigned NumConcats =
for (unsigned i=0; i < MinElts; ++i) { WidenVT.getVectorNumElements() / TempVT.getVectorNumElements();
SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, In, if (NumConcats != 1) {
DAG.getIntPtrConstant(i, dl)); SmallVector<SDValue, 8> ConcatOps(NumConcats, DAG.getUNDEF(TempVT));
Ops[i] = DAG.getNode(ISD::TRUNCATE, dl, EltVT, Val); ConcatOps[0] = Temp;
} Temp = DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, ConcatOps);
Results.push_back(DAG.getBuildVector(WidenVT, dl, Ops)); }
// Shuffle to pick out the correct elements for the result.
unsigned Scale = InEltVT.getSizeInBits() / EltVT.getSizeInBits();
SmallVector<int, 16> Mask(WidenVT.getVectorNumElements(), -1);
for (unsigned i = 0; i < InVT.getVectorNumElements(); ++i)
Lint: Pre-merge checks
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clang-tidy: warning: invalid case style for variable 'i' [readability-identifier-naming]
not useful

Lint: Pre-merge checks: clang-tidy: warning: invalid case style for variable 'i' [readability-identifier-naming]…
Mask[i] = i * Scale;
SDValue Undef = DAG.getUNDEF(Temp.getSimpleValueType());
SDValue Res = DAG.getVectorShuffle(WidenVT, dl, Temp, Undef, Mask);
Results.push_back(Res);
return; return;
} }
// With AVX512 there are some cases that can use a target specific // With AVX512 there are some cases that can use a target specific
// truncate node to go from 256/512 to less than 128 with zeros in the // truncate node to go from 256/512 to less than 128 with zeros in the
// upper elements of the 128 bit result. // upper elements of the 128 bit result.
if (Subtarget.hasAVX512() && isTypeLegal(InVT)) { if (Subtarget.hasAVX512() && isTypeLegal(InVT)) {
// We can use VTRUNC directly if for 256 bits with VLX or for any 512. // We can use VTRUNC directly if for 256 bits with VLX or for any 512.
if ((InBits == 256 && Subtarget.hasVLX()) || InBits == 512) { if ((InBits == 256 && Subtarget.hasVLX()) || InBits == 512) {
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llvm/test/CodeGen/X86/avx512-vec-cmp.ll

Show First 20 Lines • Show All 1,480 Lines • ▼ Show 20 Lines
; AVX512BW-NEXT: vucomiss %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf8,0x2e,0xc1] ; AVX512BW-NEXT: vucomiss %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf8,0x2e,0xc1]
; AVX512BW-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] ; AVX512BW-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0]
; AVX512BW-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] ; AVX512BW-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1]
; AVX512BW-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] ; AVX512BW-NEXT: orb %al, %cl ## encoding: [0x08,0xc1]
; AVX512BW-NEXT: kmovd %ecx, %k1 ## encoding: [0xc5,0xfb,0x92,0xc9] ; AVX512BW-NEXT: kmovd %ecx, %k1 ## encoding: [0xc5,0xfb,0x92,0xc9]
; AVX512BW-NEXT: kshiftlw $1, %k1, %k1 ## encoding: [0xc4,0xe3,0xf9,0x32,0xc9,0x01] ; AVX512BW-NEXT: kshiftlw $1, %k1, %k1 ## encoding: [0xc4,0xe3,0xf9,0x32,0xc9,0x01]
; AVX512BW-NEXT: korw %k1, %k0, %k0 ## encoding: [0xc5,0xfc,0x45,0xc1] ; AVX512BW-NEXT: korw %k1, %k0, %k0 ## encoding: [0xc5,0xfc,0x45,0xc1]
; AVX512BW-NEXT: vpmovm2w %k0, %zmm0 ## encoding: [0x62,0xf2,0xfe,0x48,0x28,0xc0] ; AVX512BW-NEXT: vpmovm2w %k0, %zmm0 ## encoding: [0x62,0xf2,0xfe,0x48,0x28,0xc0]
; AVX512BW-NEXT: vpacksswb %xmm0, %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0x63,0xc0] ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
foadAuthorUnsubmitted
Done
ReplyInline Actions

Is this a regression? It's the same number of instructions but it looks like longer encoding, and it uses the constant pool. There are some similar cases in bitcast-and-setcc-512.ll where it uses shufps instead of packssdw. I haven't looked into them yet.

foad: Is this a regression? It's the same number of instructions but it looks like longer encoding…
; AVX512BW-NEXT: ## encoding: [0xc4,0xe2,0x79,0x00,0x05,A,A,A,A]
; AVX512BW-NEXT: ## fixup A - offset: 5, value: LCPI68_0-4, kind: reloc_riprel_4byte
; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdb,0x05,A,A,A,A] ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 ## encoding: [0xc5,0xf9,0xdb,0x05,A,A,A,A]
; AVX512BW-NEXT: ## fixup A - offset: 4, value: LCPI68_0-4, kind: reloc_riprel_4byte ; AVX512BW-NEXT: ## fixup A - offset: 4, value: LCPI68_1-4, kind: reloc_riprel_4byte
; AVX512BW-NEXT: vpextrw $0, %xmm0, (%rsi) ## EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x15,0x06,0x00] ; AVX512BW-NEXT: vpextrw $0, %xmm0, (%rsi) ## EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x15,0x06,0x00]
; AVX512BW-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77] ; AVX512BW-NEXT: vzeroupper ## encoding: [0xc5,0xf8,0x77]
; AVX512BW-NEXT: retq ## encoding: [0xc3] ; AVX512BW-NEXT: retq ## encoding: [0xc3]
; ;
; SKX-LABEL: half_vec_compare: ; SKX-LABEL: half_vec_compare:
; SKX: ## %bb.0: ## %entry ; SKX: ## %bb.0: ## %entry
; SKX-NEXT: movzwl (%rdi), %eax ## encoding: [0x0f,0xb7,0x07] ; SKX-NEXT: movzwl (%rdi), %eax ## encoding: [0x0f,0xb7,0x07]
; SKX-NEXT: movzwl 2(%rdi), %ecx ## encoding: [0x0f,0xb7,0x4f,0x02] ; SKX-NEXT: movzwl 2(%rdi), %ecx ## encoding: [0x0f,0xb7,0x4f,0x02]
Show All 12 Lines
; SKX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0] ; SKX-NEXT: setp %al ## encoding: [0x0f,0x9a,0xc0]
; SKX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1] ; SKX-NEXT: setne %cl ## encoding: [0x0f,0x95,0xc1]
; SKX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1] ; SKX-NEXT: orb %al, %cl ## encoding: [0x08,0xc1]
; SKX-NEXT: kmovd %ecx, %k1 ## encoding: [0xc5,0xfb,0x92,0xc9] ; SKX-NEXT: kmovd %ecx, %k1 ## encoding: [0xc5,0xfb,0x92,0xc9]
; SKX-NEXT: kshiftlb $7, %k1, %k1 ## encoding: [0xc4,0xe3,0x79,0x32,0xc9,0x07] ; SKX-NEXT: kshiftlb $7, %k1, %k1 ## encoding: [0xc4,0xe3,0x79,0x32,0xc9,0x07]
; SKX-NEXT: kshiftrb $7, %k1, %k1 ## encoding: [0xc4,0xe3,0x79,0x30,0xc9,0x07] ; SKX-NEXT: kshiftrb $7, %k1, %k1 ## encoding: [0xc4,0xe3,0x79,0x30,0xc9,0x07]
; SKX-NEXT: korw %k0, %k1, %k0 ## encoding: [0xc5,0xf4,0x45,0xc0] ; SKX-NEXT: korw %k0, %k1, %k0 ## encoding: [0xc5,0xf4,0x45,0xc0]
; SKX-NEXT: vpmovm2w %k0, %xmm0 ## encoding: [0x62,0xf2,0xfe,0x08,0x28,0xc0] ; SKX-NEXT: vpmovm2w %k0, %xmm0 ## encoding: [0x62,0xf2,0xfe,0x08,0x28,0xc0]
; SKX-NEXT: vpacksswb %xmm0, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0x63,0xc0] ; SKX-NEXT: vpmovwb %xmm0, %xmm0 ## encoding: [0x62,0xf2,0x7e,0x08,0x30,0xc0]
; SKX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdb,0x05,A,A,A,A] ; SKX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc5,0xf9,0xdb,0x05,A,A,A,A]
; SKX-NEXT: ## fixup A - offset: 4, value: LCPI68_0-4, kind: reloc_riprel_4byte ; SKX-NEXT: ## fixup A - offset: 4, value: LCPI68_0-4, kind: reloc_riprel_4byte
; SKX-NEXT: vpextrw $0, %xmm0, (%rsi) ## EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x15,0x06,0x00] ; SKX-NEXT: vpextrw $0, %xmm0, (%rsi) ## EVEX TO VEX Compression encoding: [0xc4,0xe3,0x79,0x15,0x06,0x00]
; SKX-NEXT: retq ## encoding: [0xc3] ; SKX-NEXT: retq ## encoding: [0xc3]
entry: entry:
%0 = load <2 x half>, <2 x half>* %x %0 = load <2 x half>, <2 x half>* %x
%1 = fcmp une <2 x half> %0, zeroinitializer %1 = fcmp une <2 x half> %0, zeroinitializer
%2 = zext <2 x i1> %1 to <2 x i8> %2 = zext <2 x i1> %1 to <2 x i8>
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llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll

Show First 20 Lines • Show All 374 Lines • ▼ Show 20 Lines
; SSE2-SSSE3-NEXT: pcmpgtd %xmm5, %xmm7 ; SSE2-SSSE3-NEXT: pcmpgtd %xmm5, %xmm7
; SSE2-SSSE3-NEXT: pcmpgtd %xmm4, %xmm6 ; SSE2-SSSE3-NEXT: pcmpgtd %xmm4, %xmm6
; SSE2-SSSE3-NEXT: packssdw %xmm7, %xmm6 ; SSE2-SSSE3-NEXT: packssdw %xmm7, %xmm6
; SSE2-SSSE3-NEXT: por %xmm0, %xmm6 ; SSE2-SSSE3-NEXT: por %xmm0, %xmm6
; SSE2-SSSE3-NEXT: pcmpeqd {{[0-9]+}}(%rsp), %xmm9 ; SSE2-SSSE3-NEXT: pcmpeqd {{[0-9]+}}(%rsp), %xmm9
; SSE2-SSSE3-NEXT: pcmpeqd {{[0-9]+}}(%rsp), %xmm8 ; SSE2-SSSE3-NEXT: pcmpeqd {{[0-9]+}}(%rsp), %xmm8
; SSE2-SSSE3-NEXT: packssdw %xmm9, %xmm8 ; SSE2-SSSE3-NEXT: packssdw %xmm9, %xmm8
; SSE2-SSSE3-NEXT: pand %xmm6, %xmm8 ; SSE2-SSSE3-NEXT: pand %xmm6, %xmm8
; SSE2-SSSE3-NEXT: psllw $15, %xmm8
foadAuthorUnsubmitted
Done
ReplyInline Actions

This regression (and similar ones below in this file and in bitcast-and-setcc-512.ll) are due to the recursion depth limit in ComputeNumSignBits, and the fact that the unoptimized DAG that we generate is now deeper but narrower. By contrast, scalarizing with EXTRACT_VECTOR_ELT tends to generate wide shallow DAGs.

I did try a couple of things to mitigate this, but I'm really not sure how much effort it's worth putting in to work around the arbitrary depth limit:

  1. I tried adding a special case to generate PACKSS directly instead of BITCAST+VECTOR_SHUFFLE, if the types are appropriate and enough sign bits are known
  2. I tried changing DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS to generate a VECTOR_SHUFFLE instead of "a nasty build vector" in the common case where exactly two vectors are concatenated.

Together these fixed some but not all of the psllw regressions.

foad: This regression (and similar ones below in this file and in `bitcast-and-setcc-512.ll`) are due…
; SSE2-SSSE3-NEXT: packsswb %xmm8, %xmm8 ; SSE2-SSSE3-NEXT: packsswb %xmm8, %xmm8
; SSE2-SSSE3-NEXT: pmovmskb %xmm8, %eax ; SSE2-SSSE3-NEXT: pmovmskb %xmm8, %eax
; SSE2-SSSE3-NEXT: # kill: def $al killed $al killed $eax ; SSE2-SSSE3-NEXT: # kill: def $al killed $al killed $eax
; SSE2-SSSE3-NEXT: retq ; SSE2-SSSE3-NEXT: retq
; ;
; AVX1-LABEL: v8i32_or_and: ; AVX1-LABEL: v8i32_or_and:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm6 ; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm6
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; SSE2-SSSE3-NEXT: cmpunordps %xmm6, %xmm4 ; SSE2-SSSE3-NEXT: cmpunordps %xmm6, %xmm4
; SSE2-SSSE3-NEXT: orps %xmm1, %xmm4 ; SSE2-SSSE3-NEXT: orps %xmm1, %xmm4
; SSE2-SSSE3-NEXT: packssdw %xmm5, %xmm4 ; SSE2-SSSE3-NEXT: packssdw %xmm5, %xmm4
; SSE2-SSSE3-NEXT: pxor %xmm0, %xmm4 ; SSE2-SSSE3-NEXT: pxor %xmm0, %xmm4
; SSE2-SSSE3-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm9 ; SSE2-SSSE3-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm9
; SSE2-SSSE3-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm8 ; SSE2-SSSE3-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm8
; SSE2-SSSE3-NEXT: packssdw %xmm9, %xmm8 ; SSE2-SSSE3-NEXT: packssdw %xmm9, %xmm8
; SSE2-SSSE3-NEXT: pand %xmm4, %xmm8 ; SSE2-SSSE3-NEXT: pand %xmm4, %xmm8
; SSE2-SSSE3-NEXT: psllw $15, %xmm8
; SSE2-SSSE3-NEXT: packsswb %xmm8, %xmm8 ; SSE2-SSSE3-NEXT: packsswb %xmm8, %xmm8
; SSE2-SSSE3-NEXT: pmovmskb %xmm8, %eax ; SSE2-SSSE3-NEXT: pmovmskb %xmm8, %eax
; SSE2-SSSE3-NEXT: # kill: def $al killed $al killed $eax ; SSE2-SSSE3-NEXT: # kill: def $al killed $al killed $eax
; SSE2-SSSE3-NEXT: retq ; SSE2-SSSE3-NEXT: retq
; ;
; AVX12-LABEL: v8f32_xor_and: ; AVX12-LABEL: v8f32_xor_and:
; AVX12: # %bb.0: ; AVX12: # %bb.0:
; AVX12-NEXT: vcmpeq_uqps %ymm3, %ymm2, %ymm2 ; AVX12-NEXT: vcmpeq_uqps %ymm3, %ymm2, %ymm2
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llvm/test/CodeGen/X86/bitcast-and-setcc-512.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX12,AVX1 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX12,AVX1
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX12,AVX2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX12,AVX2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512BW ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512BW
define i8 @v8i64(<8 x i64> %a, <8 x i64> %b, <8 x i64> %c, <8 x i64> %d) { define i8 @v8i64(<8 x i64> %a, <8 x i64> %b, <8 x i64> %c, <8 x i64> %d) {
; SSE-LABEL: v8i64: ; SSE-LABEL: v8i64:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 ; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9 ; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm10 ; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm10
; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm11 ; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm11
; SSE-NEXT: pcmpgtq %xmm7, %xmm3 ; SSE-NEXT: pcmpgtq %xmm7, %xmm3
; SSE-NEXT: pcmpgtq %xmm6, %xmm2 ; SSE-NEXT: pcmpgtq %xmm6, %xmm2
; SSE-NEXT: packssdw %xmm3, %xmm2 ; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: pcmpgtq %xmm5, %xmm1 ; SSE-NEXT: pcmpgtq %xmm5, %xmm1
; SSE-NEXT: pcmpgtq %xmm4, %xmm0 ; SSE-NEXT: pcmpgtq %xmm4, %xmm0
; SSE-NEXT: packssdw %xmm1, %xmm0 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: packssdw %xmm2, %xmm0 ; SSE-NEXT: packssdw %xmm2, %xmm0
; SSE-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm11 ; SSE-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm11
; SSE-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm10 ; SSE-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm10
; SSE-NEXT: packssdw %xmm11, %xmm10 ; SSE-NEXT: shufps {{.*#+}} xmm10 = xmm10[0,2],xmm11[0,2]
; SSE-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm9 ; SSE-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm9
; SSE-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm8 ; SSE-NEXT: pcmpgtq {{[0-9]+}}(%rsp), %xmm8
; SSE-NEXT: packssdw %xmm9, %xmm8 ; SSE-NEXT: shufps {{.*#+}} xmm8 = xmm8[0,2],xmm9[0,2]
; SSE-NEXT: packssdw %xmm10, %xmm8 ; SSE-NEXT: packssdw %xmm10, %xmm8
; SSE-NEXT: pand %xmm0, %xmm8 ; SSE-NEXT: pand %xmm0, %xmm8
; SSE-NEXT: psllw $15, %xmm8
; SSE-NEXT: packsswb %xmm8, %xmm8 ; SSE-NEXT: packsswb %xmm8, %xmm8
; SSE-NEXT: pmovmskb %xmm8, %eax ; SSE-NEXT: pmovmskb %xmm8, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax ; SSE-NEXT: # kill: def $al killed $al killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: v8i64: ; AVX1-LABEL: v8i64:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm8 ; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm8
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; SSE-LABEL: v8f64: ; SSE-LABEL: v8f64:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm8 ; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm8
; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm9 ; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm9
; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm10 ; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm10
; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm11 ; SSE-NEXT: movapd {{[0-9]+}}(%rsp), %xmm11
; SSE-NEXT: cmpltpd %xmm3, %xmm7 ; SSE-NEXT: cmpltpd %xmm3, %xmm7
; SSE-NEXT: cmpltpd %xmm2, %xmm6 ; SSE-NEXT: cmpltpd %xmm2, %xmm6
; SSE-NEXT: packssdw %xmm7, %xmm6 ; SSE-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2],xmm7[0,2]
; SSE-NEXT: cmpltpd %xmm1, %xmm5 ; SSE-NEXT: cmpltpd %xmm1, %xmm5
; SSE-NEXT: cmpltpd %xmm0, %xmm4 ; SSE-NEXT: cmpltpd %xmm0, %xmm4
; SSE-NEXT: packssdw %xmm5, %xmm4 ; SSE-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2],xmm5[0,2]
; SSE-NEXT: packssdw %xmm6, %xmm4 ; SSE-NEXT: packssdw %xmm6, %xmm4
; SSE-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm11 ; SSE-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm11
; SSE-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm10 ; SSE-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm10
; SSE-NEXT: packssdw %xmm11, %xmm10 ; SSE-NEXT: shufps {{.*#+}} xmm10 = xmm10[0,2],xmm11[0,2]
; SSE-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm9 ; SSE-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm9
; SSE-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm8 ; SSE-NEXT: cmpltpd {{[0-9]+}}(%rsp), %xmm8
; SSE-NEXT: packssdw %xmm9, %xmm8 ; SSE-NEXT: shufps {{.*#+}} xmm8 = xmm8[0,2],xmm9[0,2]
; SSE-NEXT: packssdw %xmm10, %xmm8 ; SSE-NEXT: packssdw %xmm10, %xmm8
; SSE-NEXT: pand %xmm4, %xmm8 ; SSE-NEXT: pand %xmm4, %xmm8
; SSE-NEXT: psllw $15, %xmm8
; SSE-NEXT: packsswb %xmm8, %xmm8 ; SSE-NEXT: packsswb %xmm8, %xmm8
; SSE-NEXT: pmovmskb %xmm8, %eax ; SSE-NEXT: pmovmskb %xmm8, %eax
; SSE-NEXT: # kill: def $al killed $al killed $eax ; SSE-NEXT: # kill: def $al killed $al killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: v8f64: ; AVX1-LABEL: v8f64:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vcmpltpd %ymm5, %ymm7, %ymm5 ; AVX1-NEXT: vcmpltpd %ymm5, %ymm7, %ymm5
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; SSE-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm11 ; SSE-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm11
; SSE-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm10 ; SSE-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm10
; SSE-NEXT: packssdw %xmm11, %xmm10 ; SSE-NEXT: packssdw %xmm11, %xmm10
; SSE-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm9 ; SSE-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm9
; SSE-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm8 ; SSE-NEXT: pcmpgtd {{[0-9]+}}(%rsp), %xmm8
; SSE-NEXT: packssdw %xmm9, %xmm8 ; SSE-NEXT: packssdw %xmm9, %xmm8
; SSE-NEXT: packsswb %xmm10, %xmm8 ; SSE-NEXT: packsswb %xmm10, %xmm8
; SSE-NEXT: pand %xmm0, %xmm8 ; SSE-NEXT: pand %xmm0, %xmm8
; SSE-NEXT: psllw $7, %xmm8
; SSE-NEXT: pmovmskb %xmm8, %eax ; SSE-NEXT: pmovmskb %xmm8, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: v16i32: ; AVX1-LABEL: v16i32:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm8 ; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm8
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm9 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm9
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; SSE-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm11 ; SSE-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm11
; SSE-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm10 ; SSE-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm10
; SSE-NEXT: packssdw %xmm11, %xmm10 ; SSE-NEXT: packssdw %xmm11, %xmm10
; SSE-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm9 ; SSE-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm9
; SSE-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm8 ; SSE-NEXT: cmpltps {{[0-9]+}}(%rsp), %xmm8
; SSE-NEXT: packssdw %xmm9, %xmm8 ; SSE-NEXT: packssdw %xmm9, %xmm8
; SSE-NEXT: packsswb %xmm10, %xmm8 ; SSE-NEXT: packsswb %xmm10, %xmm8
; SSE-NEXT: pand %xmm4, %xmm8 ; SSE-NEXT: pand %xmm4, %xmm8
; SSE-NEXT: psllw $7, %xmm8
; SSE-NEXT: pmovmskb %xmm8, %eax ; SSE-NEXT: pmovmskb %xmm8, %eax
; SSE-NEXT: # kill: def $ax killed $ax killed $eax ; SSE-NEXT: # kill: def $ax killed $ax killed $eax
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX12-LABEL: v16f32: ; AVX12-LABEL: v16f32:
; AVX12: # %bb.0: ; AVX12: # %bb.0:
; AVX12-NEXT: vcmpltps %ymm1, %ymm3, %ymm1 ; AVX12-NEXT: vcmpltps %ymm1, %ymm3, %ymm1
; AVX12-NEXT: vextractf128 $1, %ymm1, %xmm3 ; AVX12-NEXT: vextractf128 $1, %ymm1, %xmm3
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llvm/test/CodeGen/X86/extract-concat.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- -mattr=sse2 | FileCheck %s --check-prefixes=SSE,SSE2 ; RUN: llc < %s -mtriple=x86_64-- -mattr=sse2 | FileCheck %s --check-prefixes=SSE,SSE2
; RUN: llc < %s -mtriple=x86_64-- -mattr=sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42 ; RUN: llc < %s -mtriple=x86_64-- -mattr=sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
; RUN: llc < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s --check-prefixes=AVX,AVX1 ; RUN: llc < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s --check-prefixes=AVX,AVX1
; RUN: llc < %s -mtriple=x86_64-- -mattr=avx2 | FileCheck %s --check-prefixes=AVX,AVX2 ; RUN: llc < %s -mtriple=x86_64-- -mattr=avx2 | FileCheck %s --check-prefixes=AVX,AVX2
; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512f | FileCheck %s --check-prefixes=AVX,AVX512F ; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512f | FileCheck %s --check-prefixes=AVX,AVX512F
define void @foo(<4 x float> %in, <4 x i8>* %out) { define void @foo(<4 x float> %in, <4 x i8>* %out) {
; SSE2-LABEL: foo: ; SSE2-LABEL: foo:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: cvttps2dq %xmm0, %xmm0 ; SSE2-NEXT: cvttps2dq %xmm0, %xmm0
; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) ; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
; SSE2-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax ; SSE2-NEXT: packuswb %xmm0, %xmm0
; SSE2-NEXT: movl -{{[0-9]+}}(%rsp), %ecx ; SSE2-NEXT: packuswb %xmm0, %xmm0
; SSE2-NEXT: shll $8, %ecx ; SSE2-NEXT: pand {{.*}}(%rip), %xmm0
; SSE2-NEXT: orl %eax, %ecx ; SSE2-NEXT: por {{.*}}(%rip), %xmm0
; SSE2-NEXT: movd %ecx, %xmm0
; SSE2-NEXT: movl $65280, %eax # imm = 0xFF00
; SSE2-NEXT: orl -{{[0-9]+}}(%rsp), %eax
; SSE2-NEXT: pinsrw $1, %eax, %xmm0
; SSE2-NEXT: movd %xmm0, (%rdi) ; SSE2-NEXT: movd %xmm0, (%rdi)
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE42-LABEL: foo: ; SSE42-LABEL: foo:
; SSE42: # %bb.0: ; SSE42: # %bb.0:
; SSE42-NEXT: cvttps2dq %xmm0, %xmm0 ; SSE42-NEXT: cvttps2dq %xmm0, %xmm0
; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,4,8],zero,xmm0[u,u,u,u,u,u,u,u,u,u,u,u] ; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,4,8,u,u,u,u,u,u,u,u,u,u,u,u,u]
; SSE42-NEXT: movl $255, %eax ; SSE42-NEXT: movl $255, %eax
; SSE42-NEXT: pinsrb $3, %eax, %xmm0 ; SSE42-NEXT: pinsrb $3, %eax, %xmm0
; SSE42-NEXT: movd %xmm0, (%rdi) ; SSE42-NEXT: movd %xmm0, (%rdi)
; SSE42-NEXT: retq ; SSE42-NEXT: retq
; ;
; AVX-LABEL: foo: ; AVX-LABEL: foo:
; AVX: # %bb.0: ; AVX: # %bb.0:
; AVX-NEXT: vcvttps2dq %xmm0, %xmm0 ; AVX-NEXT: vcvttps2dq %xmm0, %xmm0
; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8],zero,xmm0[u,u,u,u,u,u,u,u,u,u,u,u] ; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,u,u,u,u,u,u,u,u,u,u,u,u,u]
; AVX-NEXT: movl $255, %eax ; AVX-NEXT: movl $255, %eax
; AVX-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0
; AVX-NEXT: vmovd %xmm0, (%rdi) ; AVX-NEXT: vmovd %xmm0, (%rdi)
; AVX-NEXT: retq ; AVX-NEXT: retq
%t0 = fptosi <4 x float> %in to <4 x i32> %t0 = fptosi <4 x float> %in to <4 x i32>
%t1 = trunc <4 x i32> %t0 to <4 x i16> %t1 = trunc <4 x i32> %t0 to <4 x i16>
%t2 = shufflevector <4 x i16> %t1, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %t2 = shufflevector <4 x i16> %t1, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
%t3 = trunc <8 x i16> %t2 to <8 x i8> %t3 = trunc <8 x i16> %t2 to <8 x i8>
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llvm/test/CodeGen/X86/masked_store_trunc.ll

Show First 20 Lines • Show All 209 Lines • ▼ Show 20 Lines; AVX512BW-NEXT: retq
call void @llvm.masked.store.v8i32.p0v8i32(<8 x i32> %b, <8 x i32>* %p, i32 1, <8 x i1> %a) call void @llvm.masked.store.v8i32.p0v8i32(<8 x i32> %b, <8 x i32>* %p, i32 1, <8 x i1> %a)
ret void ret void
} }
define void @truncstore_v8i64_v8i16(<8 x i64> %x, <8 x i16>* %p, <8 x i32> %mask) { define void @truncstore_v8i64_v8i16(<8 x i64> %x, <8 x i16>* %p, <8 x i32> %mask) {
; SSE2-LABEL: truncstore_v8i64_v8i16: ; SSE2-LABEL: truncstore_v8i64_v8i16:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm6, %xmm6 ; SSE2-NEXT: pxor %xmm6, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm7 = xmm0[0,2,2,3,4,5,6,7] ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE2-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm1[0],xmm7[1],xmm1[1]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm7[0],xmm0[1]
; SSE2-NEXT: pcmpeqd %xmm6, %xmm5 ; SSE2-NEXT: pcmpeqd %xmm6, %xmm5
; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 ; SSE2-NEXT: pcmpeqd %xmm1, %xmm1
; SSE2-NEXT: pxor %xmm1, %xmm5 ; SSE2-NEXT: pxor %xmm1, %xmm5
; SSE2-NEXT: pcmpeqd %xmm6, %xmm4 ; SSE2-NEXT: pcmpeqd %xmm6, %xmm4
; SSE2-NEXT: pxor %xmm1, %xmm4 ; SSE2-NEXT: pxor %xmm1, %xmm4
; SSE2-NEXT: packssdw %xmm5, %xmm4 ; SSE2-NEXT: packssdw %xmm5, %xmm4
; SSE2-NEXT: packsswb %xmm4, %xmm4 ; SSE2-NEXT: packsswb %xmm4, %xmm4
; SSE2-NEXT: pmovmskb %xmm4, %eax ; SSE2-NEXT: pmovmskb %xmm4, %eax
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llvm/test/CodeGen/X86/masked_store_trunc_usat.ll

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 315 Lines • ▼ Show 20 Lines
} }
define void @truncstore_v8i64_v8i16(<8 x i64> %x, <8 x i16>* %p, <8 x i32> %mask) { define void @truncstore_v8i64_v8i16(<8 x i64> %x, <8 x i16>* %p, <8 x i32> %mask) {
; SSE2-LABEL: truncstore_v8i64_v8i16: ; SSE2-LABEL: truncstore_v8i64_v8i16:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: pxor %xmm8, %xmm8 ; SSE2-NEXT: pxor %xmm8, %xmm8
; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [65535,65535] ; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [65535,65535]
; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [9223372039002259456,9223372039002259456] ; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa %xmm2, %xmm6 ; SSE2-NEXT: movdqa %xmm1, %xmm7
; SSE2-NEXT: pxor %xmm11, %xmm6 ; SSE2-NEXT: pxor %xmm11, %xmm7
; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [9223372039002324991,9223372039002324991] ; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [9223372039002324991,9223372039002324991]
; SSE2-NEXT: movdqa %xmm10, %xmm7
; SSE2-NEXT: pcmpgtd %xmm6, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm7[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2-NEXT: pand %xmm12, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm13 = xmm7[1,1,3,3]
; SSE2-NEXT: por %xmm6, %xmm13
; SSE2-NEXT: pand %xmm13, %xmm2
; SSE2-NEXT: pandn %xmm9, %xmm13
; SSE2-NEXT: por %xmm2, %xmm13
; SSE2-NEXT: movdqa %xmm3, %xmm2
; SSE2-NEXT: pxor %xmm11, %xmm2
; SSE2-NEXT: movdqa %xmm10, %xmm6 ; SSE2-NEXT: movdqa %xmm10, %xmm6
; SSE2-NEXT: pcmpgtd %xmm2, %xmm6 ; SSE2-NEXT: pcmpgtd %xmm7, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm6[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm6[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm2 ; SSE2-NEXT: pcmpeqd %xmm10, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm2[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,3,3]
; SSE2-NEXT: pand %xmm12, %xmm7 ; SSE2-NEXT: pand %xmm12, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm6[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2-NEXT: por %xmm7, %xmm2 ; SSE2-NEXT: por %xmm7, %xmm6
; SSE2-NEXT: pand %xmm2, %xmm3 ; SSE2-NEXT: pand %xmm6, %xmm1
; SSE2-NEXT: pandn %xmm9, %xmm2 ; SSE2-NEXT: pandn %xmm9, %xmm6
; SSE2-NEXT: por %xmm3, %xmm2 ; SSE2-NEXT: por %xmm1, %xmm6
; SSE2-NEXT: movdqa %xmm0, %xmm3 ; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: pxor %xmm11, %xmm3 ; SSE2-NEXT: pxor %xmm11, %xmm1
; SSE2-NEXT: movdqa %xmm10, %xmm7
; SSE2-NEXT: pcmpgtd %xmm1, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm7[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm13 = xmm1[1,1,3,3]
; SSE2-NEXT: pand %xmm12, %xmm13
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm7[1,1,3,3]
; SSE2-NEXT: por %xmm13, %xmm1
; SSE2-NEXT: pand %xmm1, %xmm0
; SSE2-NEXT: pandn %xmm9, %xmm1
; SSE2-NEXT: por %xmm0, %xmm1
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm6[0,2]
; SSE2-NEXT: movdqa %xmm3, %xmm0
; SSE2-NEXT: pxor %xmm11, %xmm0
; SSE2-NEXT: movdqa %xmm10, %xmm6 ; SSE2-NEXT: movdqa %xmm10, %xmm6
; SSE2-NEXT: pcmpgtd %xmm3, %xmm6 ; SSE2-NEXT: pcmpgtd %xmm0, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm3 ; SSE2-NEXT: pcmpeqd %xmm10, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: pand %xmm7, %xmm3 ; SSE2-NEXT: pand %xmm7, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2-NEXT: por %xmm3, %xmm6
; SSE2-NEXT: pand %xmm6, %xmm0
; SSE2-NEXT: pandn %xmm9, %xmm6
; SSE2-NEXT: por %xmm0, %xmm6 ; SSE2-NEXT: por %xmm0, %xmm6
; SSE2-NEXT: pxor %xmm1, %xmm11 ; SSE2-NEXT: pand %xmm6, %xmm3
; SSE2-NEXT: pandn %xmm9, %xmm6
; SSE2-NEXT: por %xmm3, %xmm6
; SSE2-NEXT: pxor %xmm2, %xmm11
; SSE2-NEXT: movdqa %xmm10, %xmm0 ; SSE2-NEXT: movdqa %xmm10, %xmm0
; SSE2-NEXT: pcmpgtd %xmm11, %xmm0 ; SSE2-NEXT: pcmpgtd %xmm11, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm11 ; SSE2-NEXT: pcmpeqd %xmm10, %xmm11
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm11[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm11[1,1,3,3]
; SSE2-NEXT: pand %xmm3, %xmm7 ; SSE2-NEXT: pand %xmm3, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: por %xmm7, %xmm0 ; SSE2-NEXT: por %xmm7, %xmm0
; SSE2-NEXT: pand %xmm0, %xmm1 ; SSE2-NEXT: pand %xmm0, %xmm2
; SSE2-NEXT: pandn %xmm9, %xmm0 ; SSE2-NEXT: pandn %xmm9, %xmm0
; SSE2-NEXT: por %xmm1, %xmm0 ; SSE2-NEXT: por %xmm2, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm6[0,2]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm6[0,2,2,3] ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm1[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm0[0,1,0,2,4,5,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm13[0,2,2,3] ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; SSE2-NEXT: pcmpeqd %xmm8, %xmm5 ; SSE2-NEXT: pcmpeqd %xmm8, %xmm5
; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 ; SSE2-NEXT: pcmpeqd %xmm1, %xmm1
; SSE2-NEXT: pxor %xmm1, %xmm5 ; SSE2-NEXT: pxor %xmm1, %xmm5
; SSE2-NEXT: pcmpeqd %xmm8, %xmm4 ; SSE2-NEXT: pcmpeqd %xmm8, %xmm4
; SSE2-NEXT: pxor %xmm1, %xmm4 ; SSE2-NEXT: pxor %xmm1, %xmm4
; SSE2-NEXT: packssdw %xmm5, %xmm4 ; SSE2-NEXT: packssdw %xmm5, %xmm4
; SSE2-NEXT: packsswb %xmm4, %xmm4 ; SSE2-NEXT: packsswb %xmm4, %xmm4
; SSE2-NEXT: pmovmskb %xmm4, %eax ; SSE2-NEXT: pmovmskb %xmm4, %eax
▲ Show 20 Lines • Show All 6,966 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/psubus.ll

Show First 20 Lines • Show All 1,479 Lines • ▼ Show 20 Linesvector.ph:
ret <8 x i16> %res ret <8 x i16> %res
} }
define <8 x i16> @psubus_8i64_max(<8 x i16> %x, <8 x i64> %y) nounwind { define <8 x i16> @psubus_8i64_max(<8 x i16> %x, <8 x i64> %y) nounwind {
; SSE2-LABEL: psubus_8i64_max: ; SSE2-LABEL: psubus_8i64_max:
; SSE2: # %bb.0: # %vector.ph ; SSE2: # %bb.0: # %vector.ph
; SSE2-NEXT: pxor %xmm5, %xmm5 ; SSE2-NEXT: pxor %xmm5, %xmm5
; SSE2-NEXT: movdqa %xmm0, %xmm10 ; SSE2-NEXT: movdqa %xmm0, %xmm10
; SSE2-NEXT: punpckhwd {{.*#+}} xmm10 = xmm10[4],xmm5[4],xmm10[5],xmm5[5],xmm10[6],xmm5[6],xmm10[7],xmm5[7] ; SSE2-NEXT: punpcklwd {{.*#+}} xmm10 = xmm10[0],xmm5[0],xmm10[1],xmm5[1],xmm10[2],xmm5[2],xmm10[3],xmm5[3]
; SSE2-NEXT: movdqa %xmm10, %xmm8 ; SSE2-NEXT: movdqa %xmm10, %xmm8
; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm5[0],xmm8[1],xmm5[1] ; SSE2-NEXT: punpckhdq {{.*#+}} xmm8 = xmm8[2],xmm5[2],xmm8[3],xmm5[3]
; SSE2-NEXT: punpckhdq {{.*#+}} xmm10 = xmm10[2],xmm5[2],xmm10[3],xmm5[3] ; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm5[0],xmm10[1],xmm5[1]
; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3] ; SSE2-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7]
; SSE2-NEXT: movdqa %xmm0, %xmm9 ; SSE2-NEXT: movdqa %xmm0, %xmm9
; SSE2-NEXT: punpckldq {{.*#+}} xmm9 = xmm9[0],xmm5[0],xmm9[1],xmm5[1] ; SSE2-NEXT: punpckhdq {{.*#+}} xmm9 = xmm9[2],xmm5[2],xmm9[3],xmm5[3]
; SSE2-NEXT: punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm5[2],xmm0[3],xmm5[3] ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1]
; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [9223372039002259456,9223372039002259456] ; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa %xmm2, %xmm6 ; SSE2-NEXT: movdqa %xmm3, %xmm6
; SSE2-NEXT: pxor %xmm11, %xmm6 ; SSE2-NEXT: pxor %xmm11, %xmm6
; SSE2-NEXT: movdqa %xmm0, %xmm7 ; SSE2-NEXT: movdqa %xmm0, %xmm7
; SSE2-NEXT: por %xmm11, %xmm7 ; SSE2-NEXT: por %xmm11, %xmm7
; SSE2-NEXT: movdqa %xmm7, %xmm5 ; SSE2-NEXT: movdqa %xmm7, %xmm5
; SSE2-NEXT: pcmpgtd %xmm6, %xmm5 ; SSE2-NEXT: pcmpgtd %xmm6, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm5[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm5[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm6, %xmm7 ; SSE2-NEXT: pcmpeqd %xmm6, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,3,3]
; SSE2-NEXT: pand %xmm12, %xmm7 ; SSE2-NEXT: pand %xmm12, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm13 = xmm5[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm13 = xmm5[1,1,3,3]
; SSE2-NEXT: por %xmm7, %xmm13 ; SSE2-NEXT: por %xmm7, %xmm13
; SSE2-NEXT: pand %xmm13, %xmm0 ; SSE2-NEXT: pand %xmm13, %xmm0
; SSE2-NEXT: pandn %xmm2, %xmm13 ; SSE2-NEXT: pandn %xmm3, %xmm13
; SSE2-NEXT: por %xmm0, %xmm13 ; SSE2-NEXT: por %xmm0, %xmm13
; SSE2-NEXT: movdqa %xmm1, %xmm0 ; SSE2-NEXT: movdqa %xmm4, %xmm0
; SSE2-NEXT: pxor %xmm11, %xmm0 ; SSE2-NEXT: pxor %xmm11, %xmm0
; SSE2-NEXT: movdqa %xmm9, %xmm5 ; SSE2-NEXT: movdqa %xmm9, %xmm5
; SSE2-NEXT: por %xmm11, %xmm5 ; SSE2-NEXT: por %xmm11, %xmm5
; SSE2-NEXT: movdqa %xmm5, %xmm7 ; SSE2-NEXT: movdqa %xmm5, %xmm7
; SSE2-NEXT: pcmpgtd %xmm0, %xmm7 ; SSE2-NEXT: pcmpgtd %xmm0, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm7[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm12 = xmm7[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm0, %xmm5 ; SSE2-NEXT: pcmpeqd %xmm0, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
; SSE2-NEXT: pand %xmm12, %xmm5 ; SSE2-NEXT: pand %xmm12, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm7[1,1,3,3]
; SSE2-NEXT: por %xmm5, %xmm0 ; SSE2-NEXT: por %xmm5, %xmm0
; SSE2-NEXT: pand %xmm0, %xmm9 ; SSE2-NEXT: pand %xmm0, %xmm9
; SSE2-NEXT: pandn %xmm1, %xmm0 ; SSE2-NEXT: pandn %xmm4, %xmm0
; SSE2-NEXT: por %xmm9, %xmm0 ; SSE2-NEXT: por %xmm9, %xmm0
; SSE2-NEXT: movdqa %xmm4, %xmm5 ; SSE2-NEXT: movdqa %xmm1, %xmm5
; SSE2-NEXT: pxor %xmm11, %xmm5 ; SSE2-NEXT: pxor %xmm11, %xmm5
; SSE2-NEXT: movdqa %xmm10, %xmm7 ; SSE2-NEXT: movdqa %xmm10, %xmm7
; SSE2-NEXT: por %xmm11, %xmm7 ; SSE2-NEXT: por %xmm11, %xmm7
; SSE2-NEXT: movdqa %xmm7, %xmm6 ; SSE2-NEXT: movdqa %xmm7, %xmm6
; SSE2-NEXT: pcmpgtd %xmm5, %xmm6 ; SSE2-NEXT: pcmpgtd %xmm5, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm6[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm6[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm5, %xmm7 ; SSE2-NEXT: pcmpeqd %xmm5, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm7[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm7[1,1,3,3]
; SSE2-NEXT: pand %xmm9, %xmm5 ; SSE2-NEXT: pand %xmm9, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm6[1,1,3,3]
; SSE2-NEXT: por %xmm5, %xmm7 ; SSE2-NEXT: por %xmm5, %xmm7
; SSE2-NEXT: pand %xmm7, %xmm10 ; SSE2-NEXT: pand %xmm7, %xmm10
; SSE2-NEXT: pandn %xmm4, %xmm7 ; SSE2-NEXT: pandn %xmm1, %xmm7
; SSE2-NEXT: por %xmm10, %xmm7 ; SSE2-NEXT: por %xmm10, %xmm7
; SSE2-NEXT: movdqa %xmm3, %xmm5 ; SSE2-NEXT: movdqa %xmm2, %xmm5
; SSE2-NEXT: pxor %xmm11, %xmm5 ; SSE2-NEXT: pxor %xmm11, %xmm5
; SSE2-NEXT: por %xmm8, %xmm11 ; SSE2-NEXT: por %xmm8, %xmm11
; SSE2-NEXT: movdqa %xmm11, %xmm6 ; SSE2-NEXT: movdqa %xmm11, %xmm6
; SSE2-NEXT: pcmpgtd %xmm5, %xmm6 ; SSE2-NEXT: pcmpgtd %xmm5, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm6[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm6[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm5, %xmm11 ; SSE2-NEXT: pcmpeqd %xmm5, %xmm11
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm11[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm11[1,1,3,3]
; SSE2-NEXT: pand %xmm9, %xmm5 ; SSE2-NEXT: pand %xmm9, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSE2-NEXT: por %xmm5, %xmm6 ; SSE2-NEXT: por %xmm5, %xmm6
; SSE2-NEXT: pand %xmm6, %xmm8 ; SSE2-NEXT: pand %xmm6, %xmm8
; SSE2-NEXT: pandn %xmm3, %xmm6 ; SSE2-NEXT: pandn %xmm2, %xmm6
; SSE2-NEXT: por %xmm8, %xmm6 ; SSE2-NEXT: por %xmm8, %xmm6
; SSE2-NEXT: psubq %xmm3, %xmm6 ; SSE2-NEXT: psubq %xmm2, %xmm6
; SSE2-NEXT: psubq %xmm4, %xmm7 ; SSE2-NEXT: psubq %xmm1, %xmm7
; SSE2-NEXT: psubq %xmm1, %xmm0 ; SSE2-NEXT: shufps {{.*#+}} xmm7 = xmm7[0,2],xmm6[0,2]
; SSE2-NEXT: psubq %xmm2, %xmm13 ; SSE2-NEXT: psubq %xmm4, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm13[0,2,2,3] ; SSE2-NEXT: psubq %xmm3, %xmm13
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE2-NEXT: shufps {{.*#+}} xmm13 = xmm13[0,2],xmm0[0,2]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm13[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm7[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm0[0,2,2,3,4,5,6,7] ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm7[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSSE3-LABEL: psubus_8i64_max: ; SSSE3-LABEL: psubus_8i64_max:
; SSSE3: # %bb.0: # %vector.ph ; SSSE3: # %bb.0: # %vector.ph
; SSSE3-NEXT: movdqa {{.*#+}} xmm5 = [9223372039002259456,9223372039002259456] ; SSSE3-NEXT: movdqa {{.*#+}} xmm11 = [9223372039002259456,9223372039002259456]
; SSSE3-NEXT: movdqa %xmm2, %xmm7 ; SSSE3-NEXT: movdqa %xmm4, %xmm7
; SSSE3-NEXT: pxor %xmm5, %xmm7 ; SSSE3-NEXT: pxor %xmm11, %xmm7
; SSSE3-NEXT: movdqa {{.*#+}} xmm8 = [9223372039002324991,9223372039002324991] ; SSSE3-NEXT: movdqa {{.*#+}} xmm8 = [9223372039002324991,9223372039002324991]
; SSSE3-NEXT: movdqa %xmm8, %xmm6 ; SSSE3-NEXT: movdqa %xmm8, %xmm6
; SSSE3-NEXT: pcmpgtd %xmm7, %xmm6 ; SSSE3-NEXT: pcmpgtd %xmm7, %xmm6
; SSSE3-NEXT: pshufd {{.*#+}} xmm9 = xmm6[0,0,2,2] ; SSSE3-NEXT: pshufd {{.*#+}} xmm9 = xmm6[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm8, %xmm7 ; SSSE3-NEXT: pcmpeqd %xmm8, %xmm7
; SSSE3-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,3,3]
; SSSE3-NEXT: pand %xmm9, %xmm7 ; SSSE3-NEXT: pand %xmm9, %xmm7
; SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSSE3-NEXT: por %xmm7, %xmm6 ; SSSE3-NEXT: por %xmm7, %xmm6
; SSSE3-NEXT: movdqa {{.*#+}} xmm9 = [65535,65535] ; SSSE3-NEXT: movdqa {{.*#+}} xmm9 = [65535,65535]
; SSSE3-NEXT: pand %xmm6, %xmm2
; SSSE3-NEXT: pandn %xmm9, %xmm6
; SSSE3-NEXT: por %xmm2, %xmm6
; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,2,2,3]
; SSSE3-NEXT: pshuflw {{.*#+}} xmm10 = xmm2[0,2,2,3,4,5,6,7]
; SSSE3-NEXT: movdqa %xmm1, %xmm6
; SSSE3-NEXT: pxor %xmm5, %xmm6
; SSSE3-NEXT: movdqa %xmm8, %xmm7
; SSSE3-NEXT: pcmpgtd %xmm6, %xmm7
; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm7[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm8, %xmm6
; SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSSE3-NEXT: pand %xmm2, %xmm6
; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm7[1,1,3,3]
; SSSE3-NEXT: por %xmm6, %xmm2
; SSSE3-NEXT: pand %xmm2, %xmm1
; SSSE3-NEXT: pandn %xmm9, %xmm2
; SSSE3-NEXT: por %xmm1, %xmm2
; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm10[0],xmm1[1],xmm10[1]
; SSSE3-NEXT: movdqa %xmm4, %xmm2
; SSSE3-NEXT: pxor %xmm5, %xmm2
; SSSE3-NEXT: movdqa %xmm8, %xmm6
; SSSE3-NEXT: pcmpgtd %xmm2, %xmm6
; SSSE3-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm8, %xmm2
; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; SSSE3-NEXT: pand %xmm7, %xmm2
; SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSSE3-NEXT: por %xmm2, %xmm6
; SSSE3-NEXT: pand %xmm6, %xmm4 ; SSSE3-NEXT: pand %xmm6, %xmm4
; SSSE3-NEXT: pandn %xmm9, %xmm6 ; SSSE3-NEXT: pandn %xmm9, %xmm6
; SSSE3-NEXT: por %xmm4, %xmm6 ; SSSE3-NEXT: por %xmm4, %xmm6
; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm6[0,2,2,3] ; SSSE3-NEXT: movdqa %xmm3, %xmm4
; SSSE3-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] ; SSSE3-NEXT: pxor %xmm11, %xmm4
; SSSE3-NEXT: pxor %xmm3, %xmm5 ; SSSE3-NEXT: movdqa %xmm8, %xmm7
; SSSE3-NEXT: movdqa %xmm8, %xmm4 ; SSSE3-NEXT: pcmpgtd %xmm4, %xmm7
; SSSE3-NEXT: pcmpgtd %xmm5, %xmm4 ; SSSE3-NEXT: pshufd {{.*#+}} xmm10 = xmm7[0,0,2,2]
; SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm4[0,0,2,2] ; SSSE3-NEXT: pcmpeqd %xmm8, %xmm4
; SSSE3-NEXT: pcmpeqd %xmm8, %xmm5 ; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm4[1,1,3,3]
; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3] ; SSSE3-NEXT: pand %xmm10, %xmm5
; SSSE3-NEXT: pand %xmm6, %xmm5 ; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm7[1,1,3,3]
; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
; SSSE3-NEXT: por %xmm5, %xmm4 ; SSSE3-NEXT: por %xmm5, %xmm4
; SSSE3-NEXT: pand %xmm4, %xmm3 ; SSSE3-NEXT: pand %xmm4, %xmm3
; SSSE3-NEXT: pandn %xmm9, %xmm4 ; SSSE3-NEXT: pandn %xmm9, %xmm4
; SSSE3-NEXT: por %xmm3, %xmm4 ; SSSE3-NEXT: por %xmm3, %xmm4
; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm4[0,2,2,3] ; SSSE3-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2],xmm6[0,2]
; SSSE3-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] ; SSSE3-NEXT: movdqa {{.*#+}} xmm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; SSSE3-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1] ; SSSE3-NEXT: pshufb %xmm3, %xmm4
; SSSE3-NEXT: movsd {{.*#+}} xmm3 = xmm1[0],xmm3[1] ; SSSE3-NEXT: movdqa %xmm2, %xmm5
; SSSE3-NEXT: psubusw %xmm3, %xmm0 ; SSSE3-NEXT: pxor %xmm11, %xmm5
; SSSE3-NEXT: movdqa %xmm8, %xmm6
; SSSE3-NEXT: pcmpgtd %xmm5, %xmm6
; SSSE3-NEXT: pshufd {{.*#+}} xmm7 = xmm6[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm8, %xmm5
; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
; SSSE3-NEXT: pand %xmm7, %xmm5
; SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
; SSSE3-NEXT: por %xmm5, %xmm6
; SSSE3-NEXT: pand %xmm6, %xmm2
; SSSE3-NEXT: pandn %xmm9, %xmm6
; SSSE3-NEXT: por %xmm2, %xmm6
; SSSE3-NEXT: pxor %xmm1, %xmm11
; SSSE3-NEXT: movdqa %xmm8, %xmm2
; SSSE3-NEXT: pcmpgtd %xmm11, %xmm2
; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm2[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm8, %xmm11
; SSSE3-NEXT: pshufd {{.*#+}} xmm7 = xmm11[1,1,3,3]
; SSSE3-NEXT: pand %xmm5, %xmm7
; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; SSSE3-NEXT: por %xmm7, %xmm2
; SSSE3-NEXT: pand %xmm2, %xmm1
; SSSE3-NEXT: pandn %xmm9, %xmm2
; SSSE3-NEXT: por %xmm1, %xmm2
; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm6[0,2]
; SSSE3-NEXT: pshufb %xmm3, %xmm2
; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm4[0]
; SSSE3-NEXT: psubusw %xmm2, %xmm0
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: psubus_8i64_max: ; SSE41-LABEL: psubus_8i64_max:
; SSE41: # %bb.0: # %vector.ph ; SSE41: # %bb.0: # %vector.ph
; SSE41-NEXT: movdqa %xmm0, %xmm8 ; SSE41-NEXT: movdqa %xmm0, %xmm8
; SSE41-NEXT: movdqa {{.*#+}} xmm9 = [9223372039002259456,9223372039002259456] ; SSE41-NEXT: movdqa {{.*#+}} xmm9 = [9223372039002259456,9223372039002259456]
; SSE41-NEXT: movdqa %xmm4, %xmm0 ; SSE41-NEXT: movdqa %xmm4, %xmm0
; SSE41-NEXT: pxor %xmm9, %xmm0 ; SSE41-NEXT: pxor %xmm9, %xmm0
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llvm/test/CodeGen/X86/vec_cast.ll

Show First 20 Lines • Show All 125 Lines • ▼ Show 20 Lines
; CHECK-LIN-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; CHECK-LIN-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; CHECK-LIN-NEXT: pshufb %xmm2, %xmm1 ; CHECK-LIN-NEXT: pshufb %xmm2, %xmm1
; CHECK-LIN-NEXT: pshufb %xmm2, %xmm0 ; CHECK-LIN-NEXT: pshufb %xmm2, %xmm0
; CHECK-LIN-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-LIN-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-LIN-NEXT: retq ; CHECK-LIN-NEXT: retq
; ;
; CHECK-WIN-LABEL: g: ; CHECK-WIN-LABEL: g:
; CHECK-WIN: # %bb.0: ; CHECK-WIN: # %bb.0:
; CHECK-WIN-NEXT: movdqa (%rcx), %xmm0
; CHECK-WIN-NEXT: movdqa (%rdx), %xmm1 ; CHECK-WIN-NEXT: movdqa (%rdx), %xmm1
; CHECK-WIN-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; CHECK-WIN-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; CHECK-WIN-NEXT: pshufb %xmm2, %xmm1 ; CHECK-WIN-NEXT: pshufb %xmm2, %xmm1
; CHECK-WIN-NEXT: movdqa (%rcx), %xmm0
; CHECK-WIN-NEXT: pshufb %xmm2, %xmm0 ; CHECK-WIN-NEXT: pshufb %xmm2, %xmm0
; CHECK-WIN-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-WIN-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-WIN-NEXT: retq ; CHECK-WIN-NEXT: retq
%c = trunc <8 x i32> %a to <8 x i16> %c = trunc <8 x i32> %a to <8 x i16>
ret <8 x i16> %c ret <8 x i16> %c
} }
define <3 x i16> @h(<3 x i32> %a) nounwind { define <3 x i16> @h(<3 x i32> %a) nounwind {
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llvm/test/CodeGen/X86/vector-reduce-and-bool.ll

Show First 20 Lines • Show All 493 Lines • ▼ Show 20 Lines; AVX512VL-NEXT: retq
%a = trunc <32 x i8> %0 to <32 x i1> %a = trunc <32 x i8> %0 to <32 x i1>
%b = call i1 @llvm.experimental.vector.reduce.and.v32i1(<32 x i1> %a) %b = call i1 @llvm.experimental.vector.reduce.and.v32i1(<32 x i1> %a)
ret i1 %b ret i1 %b
} }
define i1 @trunc_v8i64_v8i1(<8 x i64>) { define i1 @trunc_v8i64_v8i1(<8 x i64>) {
; SSE2-LABEL: trunc_v8i64_v8i1: ; SSE2-LABEL: trunc_v8i64_v8i1:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,0,2,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT: psllw $15, %xmm2 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: packsswb %xmm2, %xmm2 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE2-NEXT: pmovmskb %xmm2, %eax ; SSE2-NEXT: psllw $15, %xmm0
; SSE2-NEXT: packsswb %xmm0, %xmm0
; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: cmpb $-1, %al ; SSE2-NEXT: cmpb $-1, %al
; SSE2-NEXT: sete %al ; SSE2-NEXT: sete %al
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: trunc_v8i64_v8i1: ; SSE41-LABEL: trunc_v8i64_v8i1:
; SSE41: # %bb.0: ; SSE41: # %bb.0:
; SSE41-NEXT: pxor %xmm4, %xmm4 ; SSE41-NEXT: pxor %xmm4, %xmm4
; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] ; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7]
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llvm/test/CodeGen/X86/vector-reduce-mul.ll

Show First 20 Lines • Show All 1,614 Lines • ▼ Show 20 Lines
; SSE2-LABEL: test_v8i8: ; SSE2-LABEL: test_v8i8:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1] ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
; SSE2-NEXT: pmullw %xmm0, %xmm1 ; SSE2-NEXT: pmullw %xmm0, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
; SSE2-NEXT: pmullw %xmm1, %xmm0 ; SSE2-NEXT: pmullw %xmm1, %xmm0
; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [255,255,255,255,255,255,255,255] ; SSE2-NEXT: movdqa %xmm0, %xmm1
; SSE2-NEXT: pand %xmm0, %xmm1 ; SSE2-NEXT: psrld $16, %xmm1
; SSE2-NEXT: packuswb %xmm1, %xmm1 ; SSE2-NEXT: pmullw %xmm0, %xmm1
; SSE2-NEXT: psrld $16, %xmm0 ; SSE2-NEXT: movd %xmm1, %eax
; SSE2-NEXT: pmullw %xmm1, %xmm0
; SSE2-NEXT: movd %xmm0, %eax
; SSE2-NEXT: # kill: def $al killed $al killed $eax ; SSE2-NEXT: # kill: def $al killed $al killed $eax
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: test_v8i8: ; SSE41-LABEL: test_v8i8:
; SSE41: # %bb.0: ; SSE41: # %bb.0:
; SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3] ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
; SSE41-NEXT: pmullw %xmm0, %xmm1 ; SSE41-NEXT: pmullw %xmm0, %xmm1
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llvm/test/CodeGen/X86/vector-reduce-or-bool.ll

Show First 20 Lines • Show All 480 Lines • ▼ Show 20 Lines; AVX512VL-NEXT: retq
%a = trunc <32 x i8> %0 to <32 x i1> %a = trunc <32 x i8> %0 to <32 x i1>
%b = call i1 @llvm.experimental.vector.reduce.or.v32i1(<32 x i1> %a) %b = call i1 @llvm.experimental.vector.reduce.or.v32i1(<32 x i1> %a)
ret i1 %b ret i1 %b
} }
define i1 @trunc_v8i64_v8i1(<8 x i64>) { define i1 @trunc_v8i64_v8i1(<8 x i64>) {
; SSE2-LABEL: trunc_v8i64_v8i1: ; SSE2-LABEL: trunc_v8i64_v8i1:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,0,2,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT: psllw $15, %xmm2 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: pmovmskb %xmm2, %eax ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE2-NEXT: psllw $15, %xmm0
; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: testl $43690, %eax # imm = 0xAAAA ; SSE2-NEXT: testl $43690, %eax # imm = 0xAAAA
; SSE2-NEXT: setne %al ; SSE2-NEXT: setne %al
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: trunc_v8i64_v8i1: ; SSE41-LABEL: trunc_v8i64_v8i1:
; SSE41: # %bb.0: ; SSE41: # %bb.0:
; SSE41-NEXT: pxor %xmm4, %xmm4 ; SSE41-NEXT: pxor %xmm4, %xmm4
; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] ; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7]
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llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll

Show First 20 Lines • Show All 505 Lines • ▼ Show 20 Lines; AVX512VL-NEXT: retq
%a = trunc <32 x i8> %0 to <32 x i1> %a = trunc <32 x i8> %0 to <32 x i1>
%b = call i1 @llvm.experimental.vector.reduce.xor.v32i1(<32 x i1> %a) %b = call i1 @llvm.experimental.vector.reduce.xor.v32i1(<32 x i1> %a)
ret i1 %b ret i1 %b
} }
define i1 @trunc_v8i64_v8i1(<8 x i64>) { define i1 @trunc_v8i64_v8i1(<8 x i64>) {
; SSE2-LABEL: trunc_v8i64_v8i1: ; SSE2-LABEL: trunc_v8i64_v8i1:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,1,0,2,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT: psllw $15, %xmm2 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: packsswb %xmm2, %xmm2 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE2-NEXT: pmovmskb %xmm2, %eax ; SSE2-NEXT: psllw $15, %xmm0
; SSE2-NEXT: packsswb %xmm0, %xmm0
; SSE2-NEXT: pmovmskb %xmm0, %eax
; SSE2-NEXT: testb %al, %al ; SSE2-NEXT: testb %al, %al
; SSE2-NEXT: setnp %al ; SSE2-NEXT: setnp %al
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSE41-LABEL: trunc_v8i64_v8i1: ; SSE41-LABEL: trunc_v8i64_v8i1:
; SSE41: # %bb.0: ; SSE41: # %bb.0:
; SSE41-NEXT: pxor %xmm4, %xmm4 ; SSE41-NEXT: pxor %xmm4, %xmm4
; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] ; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7]
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llvm/test/CodeGen/X86/vector-trunc-math.ll

Show First 20 Lines • Show All 55 Lines • ▼ Show 20 Lines; AVX512-NEXT: retq
%1 = add <4 x i64> %a0, %a1 %1 = add <4 x i64> %a0, %a1
%2 = trunc <4 x i64> %1 to <4 x i32> %2 = trunc <4 x i64> %1 to <4 x i32>
ret <4 x i32> %2 ret <4 x i32> %2
} }
define <8 x i16> @trunc_add_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { define <8 x i16> @trunc_add_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind {
; SSE-LABEL: trunc_add_v8i64_v8i16: ; SSE-LABEL: trunc_add_v8i64_v8i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: paddq %xmm6, %xmm2
; SSE-NEXT: paddq %xmm7, %xmm3
; SSE-NEXT: paddq %xmm4, %xmm0
; SSE-NEXT: paddq %xmm5, %xmm1 ; SSE-NEXT: paddq %xmm5, %xmm1
; SSE-NEXT: paddq %xmm4, %xmm0
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: paddq %xmm7, %xmm3
; SSE-NEXT: paddq %xmm6, %xmm2
; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: trunc_add_v8i64_v8i16: ; AVX1-LABEL: trunc_add_v8i64_v8i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm4 ; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm4
; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm0
▲ Show 20 Lines • Show All 445 Lines • ▼ Show 20 Lines; AVX512-NEXT: retq
%1 = add <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> %1 = add <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3>
%2 = trunc <4 x i64> %1 to <4 x i32> %2 = trunc <4 x i64> %1 to <4 x i32>
ret <4 x i32> %2 ret <4 x i32> %2
} }
define <8 x i16> @trunc_add_const_v8i64_v8i16(<8 x i64> %a0) nounwind { define <8 x i16> @trunc_add_const_v8i64_v8i16(<8 x i64> %a0) nounwind {
; SSE-LABEL: trunc_add_const_v8i64_v8i16: ; SSE-LABEL: trunc_add_const_v8i64_v8i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE-NEXT: paddw {{.*}}(%rip), %xmm0 ; SSE-NEXT: paddw {{.*}}(%rip), %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: trunc_add_const_v8i64_v8i16: ; AVX1-LABEL: trunc_add_const_v8i64_v8i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535] ; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535]
; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 ; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
▲ Show 20 Lines • Show All 341 Lines • ▼ Show 20 Lines; AVX512-NEXT: retq
%1 = sub <4 x i64> %a0, %a1 %1 = sub <4 x i64> %a0, %a1
%2 = trunc <4 x i64> %1 to <4 x i32> %2 = trunc <4 x i64> %1 to <4 x i32>
ret <4 x i32> %2 ret <4 x i32> %2
} }
define <8 x i16> @trunc_sub_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { define <8 x i16> @trunc_sub_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind {
; SSE-LABEL: trunc_sub_v8i64_v8i16: ; SSE-LABEL: trunc_sub_v8i64_v8i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: psubq %xmm6, %xmm2
; SSE-NEXT: psubq %xmm7, %xmm3
; SSE-NEXT: psubq %xmm4, %xmm0
; SSE-NEXT: psubq %xmm5, %xmm1 ; SSE-NEXT: psubq %xmm5, %xmm1
; SSE-NEXT: psubq %xmm4, %xmm0
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: psubq %xmm7, %xmm3
; SSE-NEXT: psubq %xmm6, %xmm2
; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: trunc_sub_v8i64_v8i16: ; AVX1-LABEL: trunc_sub_v8i64_v8i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm4 ; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm4
; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2
; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm0
▲ Show 20 Lines • Show All 413 Lines • ▼ Show 20 Lines; AVX512-NEXT: retq
%1 = sub <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> %1 = sub <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3>
%2 = trunc <4 x i64> %1 to <4 x i32> %2 = trunc <4 x i64> %1 to <4 x i32>
ret <4 x i32> %2 ret <4 x i32> %2
} }
define <8 x i16> @trunc_sub_const_v8i64_v8i16(<8 x i64> %a0) nounwind { define <8 x i16> @trunc_sub_const_v8i64_v8i16(<8 x i64> %a0) nounwind {
; SSE-LABEL: trunc_sub_const_v8i64_v8i16: ; SSE-LABEL: trunc_sub_const_v8i64_v8i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE-NEXT: psubw {{.*}}(%rip), %xmm0 ; SSE-NEXT: psubw {{.*}}(%rip), %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: trunc_sub_const_v8i64_v8i16: ; AVX1-LABEL: trunc_sub_const_v8i64_v8i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535] ; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535]
; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 ; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
▲ Show 20 Lines • Show All 400 Lines • ▼ Show 20 Lines; AVX512DQ-NEXT: retq
%1 = mul <4 x i64> %a0, %a1 %1 = mul <4 x i64> %a0, %a1
%2 = trunc <4 x i64> %1 to <4 x i32> %2 = trunc <4 x i64> %1 to <4 x i32>
ret <4 x i32> %2 ret <4 x i32> %2
} }
define <8 x i16> @trunc_mul_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { define <8 x i16> @trunc_mul_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind {
; SSE-LABEL: trunc_mul_v8i64_v8i16: ; SSE-LABEL: trunc_mul_v8i64_v8i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3] ; SSE-NEXT: shufps {{.*#+}} xmm6 = xmm6[0,2],xmm7[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm5 = xmm5[0,2,2,3,4,5,6,7] ; SSE-NEXT: pshuflw {{.*#+}} xmm6 = xmm6[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] ; SSE-NEXT: pshufhw {{.*#+}} xmm6 = xmm6[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,2,2,3,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm7[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm5 = xmm5[0,1,0,2,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm6 = xmm6[0,1,0,2,4,5,6,7] ; SSE-NEXT: shufps {{.*#+}} xmm4 = xmm4[0,2],xmm5[0,2]
; SSE-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1] ; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,2,2,3,4,5,6,7]
; SSE-NEXT: movsd {{.*#+}} xmm6 = xmm4[0],xmm6[1] ; SSE-NEXT: pshufhw {{.*#+}} xmm4 = xmm4[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE-NEXT: punpcklqdq {{.*#+}} xmm4 = xmm4[0],xmm6[0]
; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] ; SSE-NEXT: pmullw %xmm4, %xmm0
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE-NEXT: pmullw %xmm6, %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: trunc_mul_v8i64_v8i16: ; AVX1-LABEL: trunc_mul_v8i64_v8i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vmovaps {{.*#+}} ymm4 = [65535,65535,65535,65535] ; AVX1-NEXT: vmovaps {{.*#+}} ymm4 = [65535,65535,65535,65535]
; AVX1-NEXT: vandps %ymm4, %ymm3, %ymm3 ; AVX1-NEXT: vandps %ymm4, %ymm3, %ymm3
; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm5 ; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm5
; AVX1-NEXT: vpackusdw %xmm5, %xmm3, %xmm3 ; AVX1-NEXT: vpackusdw %xmm5, %xmm3, %xmm3
▲ Show 20 Lines • Show All 542 Lines • ▼ Show 20 Lines; AVX512-NEXT: retq
%1 = mul <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> %1 = mul <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3>
%2 = trunc <4 x i64> %1 to <4 x i32> %2 = trunc <4 x i64> %1 to <4 x i32>
ret <4 x i32> %2 ret <4 x i32> %2
} }
define <8 x i16> @trunc_mul_const_v8i64_v8i16(<8 x i64> %a0) nounwind { define <8 x i16> @trunc_mul_const_v8i64_v8i16(<8 x i64> %a0) nounwind {
; SSE-LABEL: trunc_mul_const_v8i64_v8i16: ; SSE-LABEL: trunc_mul_const_v8i64_v8i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE-NEXT: pmullw {{.*}}(%rip), %xmm0 ; SSE-NEXT: pmullw {{.*}}(%rip), %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: trunc_mul_const_v8i64_v8i16: ; AVX1-LABEL: trunc_mul_const_v8i64_v8i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535] ; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535]
; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 ; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
▲ Show 20 Lines • Show All 429 Lines • ▼ Show 20 Lines; AVX512-NEXT: retq
%1 = and <4 x i64> %a0, %a1 %1 = and <4 x i64> %a0, %a1
%2 = trunc <4 x i64> %1 to <4 x i32> %2 = trunc <4 x i64> %1 to <4 x i32>
ret <4 x i32> %2 ret <4 x i32> %2
} }
define <8 x i16> @trunc_and_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { define <8 x i16> @trunc_and_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind {
; SSE-LABEL: trunc_and_v8i64_v8i16: ; SSE-LABEL: trunc_and_v8i64_v8i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pand %xmm6, %xmm2 ; SSE-NEXT: andps %xmm5, %xmm1
; SSE-NEXT: pand %xmm7, %xmm3 ; SSE-NEXT: andps %xmm4, %xmm0
; SSE-NEXT: pand %xmm4, %xmm0 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: pand %xmm5, %xmm1 ; SSE-NEXT: andps %xmm7, %xmm3
; SSE-NEXT: andps %xmm6, %xmm2
; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: trunc_and_v8i64_v8i16: ; AVX1-LABEL: trunc_and_v8i64_v8i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vmovaps {{.*#+}} ymm4 = [65535,65535,65535,65535] ; AVX1-NEXT: vmovaps {{.*#+}} ymm4 = [65535,65535,65535,65535]
; AVX1-NEXT: vandps %ymm4, %ymm3, %ymm3 ; AVX1-NEXT: vandps %ymm4, %ymm3, %ymm3
; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm1 ; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm1
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
▲ Show 20 Lines • Show All 366 Lines • ▼ Show 20 Lines; AVX512-NEXT: retq
%1 = and <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> %1 = and <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3>
%2 = trunc <4 x i64> %1 to <4 x i32> %2 = trunc <4 x i64> %1 to <4 x i32>
ret <4 x i32> %2 ret <4 x i32> %2
} }
define <8 x i16> @trunc_and_const_v8i64_v8i16(<8 x i64> %a0) nounwind { define <8 x i16> @trunc_and_const_v8i64_v8i16(<8 x i64> %a0) nounwind {
; SSE-LABEL: trunc_and_const_v8i64_v8i16: ; SSE-LABEL: trunc_and_const_v8i64_v8i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] ; SSE-NEXT: pand {{.*}}(%rip), %xmm0
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE-NEXT: andpd {{.*}}(%rip), %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: trunc_and_const_v8i64_v8i16: ; AVX1-LABEL: trunc_and_const_v8i64_v8i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535] ; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535]
; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 ; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1 ; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1
▲ Show 20 Lines • Show All 338 Lines • ▼ Show 20 Lines; AVX512-NEXT: retq
%1 = xor <4 x i64> %a0, %a1 %1 = xor <4 x i64> %a0, %a1
%2 = trunc <4 x i64> %1 to <4 x i32> %2 = trunc <4 x i64> %1 to <4 x i32>
ret <4 x i32> %2 ret <4 x i32> %2
} }
define <8 x i16> @trunc_xor_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { define <8 x i16> @trunc_xor_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind {
; SSE-LABEL: trunc_xor_v8i64_v8i16: ; SSE-LABEL: trunc_xor_v8i64_v8i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pxor %xmm6, %xmm2 ; SSE-NEXT: xorps %xmm5, %xmm1
; SSE-NEXT: pxor %xmm7, %xmm3 ; SSE-NEXT: xorps %xmm4, %xmm0
; SSE-NEXT: pxor %xmm4, %xmm0 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: pxor %xmm5, %xmm1 ; SSE-NEXT: xorps %xmm7, %xmm3
; SSE-NEXT: xorps %xmm6, %xmm2
; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: trunc_xor_v8i64_v8i16: ; AVX1-LABEL: trunc_xor_v8i64_v8i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm0 ; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm0
; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1 ; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1
; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535] ; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535]
; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 ; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1
▲ Show 20 Lines • Show All 366 Lines • ▼ Show 20 Lines; AVX512-NEXT: retq
%1 = xor <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> %1 = xor <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3>
%2 = trunc <4 x i64> %1 to <4 x i32> %2 = trunc <4 x i64> %1 to <4 x i32>
ret <4 x i32> %2 ret <4 x i32> %2
} }
define <8 x i16> @trunc_xor_const_v8i64_v8i16(<8 x i64> %a0) nounwind { define <8 x i16> @trunc_xor_const_v8i64_v8i16(<8 x i64> %a0) nounwind {
; SSE-LABEL: trunc_xor_const_v8i64_v8i16: ; SSE-LABEL: trunc_xor_const_v8i64_v8i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] ; SSE-NEXT: pxor {{.*}}(%rip), %xmm0
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE-NEXT: xorpd {{.*}}(%rip), %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: trunc_xor_const_v8i64_v8i16: ; AVX1-LABEL: trunc_xor_const_v8i64_v8i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535] ; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535]
; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 ; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1 ; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1
▲ Show 20 Lines • Show All 338 Lines • ▼ Show 20 Lines; AVX512-NEXT: retq
%1 = or <4 x i64> %a0, %a1 %1 = or <4 x i64> %a0, %a1
%2 = trunc <4 x i64> %1 to <4 x i32> %2 = trunc <4 x i64> %1 to <4 x i32>
ret <4 x i32> %2 ret <4 x i32> %2
} }
define <8 x i16> @trunc_or_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { define <8 x i16> @trunc_or_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind {
; SSE-LABEL: trunc_or_v8i64_v8i16: ; SSE-LABEL: trunc_or_v8i64_v8i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: por %xmm6, %xmm2 ; SSE-NEXT: orps %xmm5, %xmm1
; SSE-NEXT: por %xmm7, %xmm3 ; SSE-NEXT: orps %xmm4, %xmm0
; SSE-NEXT: por %xmm4, %xmm0 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: por %xmm5, %xmm1 ; SSE-NEXT: orps %xmm7, %xmm3
; SSE-NEXT: orps %xmm6, %xmm2
; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm2[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: trunc_or_v8i64_v8i16: ; AVX1-LABEL: trunc_or_v8i64_v8i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 ; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0
; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm1 ; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm1
; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535] ; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535]
; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 ; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1
▲ Show 20 Lines • Show All 366 Lines • ▼ Show 20 Lines; AVX512-NEXT: retq
%1 = or <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> %1 = or <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3>
%2 = trunc <4 x i64> %1 to <4 x i32> %2 = trunc <4 x i64> %1 to <4 x i32>
ret <4 x i32> %2 ret <4 x i32> %2
} }
define <8 x i16> @trunc_or_const_v8i64_v8i16(<8 x i64> %a0) nounwind { define <8 x i16> @trunc_or_const_v8i64_v8i16(<8 x i64> %a0) nounwind {
; SSE-LABEL: trunc_or_const_v8i64_v8i16: ; SSE-LABEL: trunc_or_const_v8i64_v8i16:
; SSE: # %bb.0: ; SSE: # %bb.0:
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] ; SSE-NEXT: por {{.*}}(%rip), %xmm0
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE-NEXT: orpd {{.*}}(%rip), %xmm0
; SSE-NEXT: retq ; SSE-NEXT: retq
; ;
; AVX1-LABEL: trunc_or_const_v8i64_v8i16: ; AVX1-LABEL: trunc_or_const_v8i64_v8i16:
; AVX1: # %bb.0: ; AVX1: # %bb.0:
; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535] ; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535]
; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 ; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1 ; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1
▲ Show 20 Lines • Show All 375 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/vector-trunc-packus.ll

Show First 20 Lines • Show All 1,853 Lines • ▼ Show 20 Lines; SKX-NEXT: retq
%5 = trunc <4 x i64> %4 to <4 x i16> %5 = trunc <4 x i64> %4 to <4 x i16>
store <4 x i16> %5, <4 x i16> *%p1 store <4 x i16> %5, <4 x i16> *%p1
ret void ret void
} }
define <8 x i16> @trunc_packus_v8i64_v8i16(<8 x i64>* %p0) "min-legal-vector-width"="256" { define <8 x i16> @trunc_packus_v8i64_v8i16(<8 x i64>* %p0) "min-legal-vector-width"="256" {
; SSE2-LABEL: trunc_packus_v8i64_v8i16: ; SSE2-LABEL: trunc_packus_v8i64_v8i16:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: movdqa (%rdi), %xmm7 ; SSE2-NEXT: movdqa (%rdi), %xmm5
; SSE2-NEXT: movdqa 16(%rdi), %xmm2 ; SSE2-NEXT: movdqa 16(%rdi), %xmm9
; SSE2-NEXT: movdqa 32(%rdi), %xmm9 ; SSE2-NEXT: movdqa 32(%rdi), %xmm2
; SSE2-NEXT: movdqa 48(%rdi), %xmm6 ; SSE2-NEXT: movdqa 48(%rdi), %xmm7
; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [65535,65535] ; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [65535,65535]
; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [2147483648,2147483648] ; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [2147483648,2147483648]
; SSE2-NEXT: movdqa %xmm2, %xmm1 ; SSE2-NEXT: movdqa %xmm2, %xmm1
; SSE2-NEXT: pxor %xmm11, %xmm1 ; SSE2-NEXT: pxor %xmm11, %xmm1
; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [2147549183,2147549183] ; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [2147549183,2147549183]
; SSE2-NEXT: movdqa %xmm10, %xmm5 ; SSE2-NEXT: movdqa %xmm10, %xmm6
; SSE2-NEXT: pcmpgtd %xmm1, %xmm5 ; SSE2-NEXT: pcmpgtd %xmm1, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm5[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm6[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm1 ; SSE2-NEXT: pcmpeqd %xmm10, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]
; SSE2-NEXT: pand %xmm3, %xmm4 ; SSE2-NEXT: pand %xmm3, %xmm4
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm5[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm6[1,1,3,3]
; SSE2-NEXT: por %xmm4, %xmm1 ; SSE2-NEXT: por %xmm4, %xmm1
; SSE2-NEXT: pand %xmm1, %xmm2 ; SSE2-NEXT: pand %xmm1, %xmm2
; SSE2-NEXT: pandn %xmm8, %xmm1 ; SSE2-NEXT: pandn %xmm8, %xmm1
; SSE2-NEXT: por %xmm2, %xmm1 ; SSE2-NEXT: por %xmm2, %xmm1
; SSE2-NEXT: movdqa %xmm7, %xmm2 ; SSE2-NEXT: movdqa %xmm7, %xmm2
; SSE2-NEXT: pxor %xmm11, %xmm2 ; SSE2-NEXT: pxor %xmm11, %xmm2
; SSE2-NEXT: movdqa %xmm10, %xmm3 ; SSE2-NEXT: movdqa %xmm10, %xmm3
; SSE2-NEXT: pcmpgtd %xmm2, %xmm3 ; SSE2-NEXT: pcmpgtd %xmm2, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm2 ; SSE2-NEXT: pcmpeqd %xmm10, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm2[1,1,3,3]
; SSE2-NEXT: pand %xmm4, %xmm5 ; SSE2-NEXT: pand %xmm4, %xmm6
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[1,1,3,3]
; SSE2-NEXT: por %xmm5, %xmm2 ; SSE2-NEXT: por %xmm6, %xmm2
; SSE2-NEXT: pand %xmm2, %xmm7 ; SSE2-NEXT: pand %xmm2, %xmm7
; SSE2-NEXT: pandn %xmm8, %xmm2 ; SSE2-NEXT: pandn %xmm8, %xmm2
; SSE2-NEXT: por %xmm7, %xmm2 ; SSE2-NEXT: por %xmm7, %xmm2
; SSE2-NEXT: movdqa %xmm6, %xmm3 ; SSE2-NEXT: movdqa %xmm5, %xmm3
; SSE2-NEXT: pxor %xmm11, %xmm3 ; SSE2-NEXT: pxor %xmm11, %xmm3
; SSE2-NEXT: movdqa %xmm10, %xmm4 ; SSE2-NEXT: movdqa %xmm10, %xmm4
; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 ; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm4[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm3 ; SSE2-NEXT: pcmpeqd %xmm10, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSE2-NEXT: pand %xmm5, %xmm3 ; SSE2-NEXT: pand %xmm6, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm4[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm4[1,1,3,3]
; SSE2-NEXT: por %xmm3, %xmm7 ; SSE2-NEXT: por %xmm3, %xmm7
; SSE2-NEXT: pand %xmm7, %xmm6 ; SSE2-NEXT: pand %xmm7, %xmm5
; SSE2-NEXT: pandn %xmm8, %xmm7 ; SSE2-NEXT: pandn %xmm8, %xmm7
; SSE2-NEXT: por %xmm6, %xmm7 ; SSE2-NEXT: por %xmm5, %xmm7
; SSE2-NEXT: movdqa %xmm9, %xmm3 ; SSE2-NEXT: movdqa %xmm9, %xmm3
; SSE2-NEXT: pxor %xmm11, %xmm3 ; SSE2-NEXT: pxor %xmm11, %xmm3
; SSE2-NEXT: movdqa %xmm10, %xmm4 ; SSE2-NEXT: movdqa %xmm10, %xmm4
; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 ; SSE2-NEXT: pcmpgtd %xmm3, %xmm4
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm3 ; SSE2-NEXT: pcmpeqd %xmm10, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSE2-NEXT: pand %xmm5, %xmm3 ; SSE2-NEXT: pand %xmm5, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
; SSE2-NEXT: por %xmm3, %xmm4 ; SSE2-NEXT: por %xmm3, %xmm4
; SSE2-NEXT: pand %xmm4, %xmm9 ; SSE2-NEXT: pand %xmm4, %xmm9
; SSE2-NEXT: pandn %xmm8, %xmm4 ; SSE2-NEXT: pandn %xmm8, %xmm4
; SSE2-NEXT: por %xmm9, %xmm4 ; SSE2-NEXT: por %xmm9, %xmm4
; SSE2-NEXT: movdqa %xmm4, %xmm3 ; SSE2-NEXT: movdqa %xmm4, %xmm3
; SSE2-NEXT: pxor %xmm11, %xmm3 ; SSE2-NEXT: pxor %xmm11, %xmm3
; SSE2-NEXT: movdqa %xmm3, %xmm5 ; SSE2-NEXT: movdqa %xmm3, %xmm5
; SSE2-NEXT: pcmpgtd %xmm11, %xmm5 ; SSE2-NEXT: pcmpgtd %xmm11, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm11, %xmm3 ; SSE2-NEXT: pcmpeqd %xmm11, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSE2-NEXT: pand %xmm6, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
; SSE2-NEXT: por %xmm3, %xmm5
; SSE2-NEXT: pand %xmm4, %xmm5
; SSE2-NEXT: movdqa %xmm7, %xmm3
; SSE2-NEXT: pxor %xmm11, %xmm3
; SSE2-NEXT: movdqa %xmm3, %xmm4
; SSE2-NEXT: pcmpgtd %xmm11, %xmm4
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm4[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm11, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
; SSE2-NEXT: pand %xmm6, %xmm0 ; SSE2-NEXT: pand %xmm6, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm5[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
; SSE2-NEXT: por %xmm0, %xmm3 ; SSE2-NEXT: por %xmm0, %xmm3
; SSE2-NEXT: pand %xmm4, %xmm3 ; SSE2-NEXT: pand %xmm7, %xmm3
; SSE2-NEXT: movdqa %xmm7, %xmm0 ; SSE2-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,2],xmm5[0,2]
; SSE2-NEXT: movdqa %xmm2, %xmm0
; SSE2-NEXT: pxor %xmm11, %xmm0 ; SSE2-NEXT: pxor %xmm11, %xmm0
; SSE2-NEXT: movdqa %xmm0, %xmm4 ; SSE2-NEXT: movdqa %xmm0, %xmm4
; SSE2-NEXT: pcmpgtd %xmm11, %xmm4 ; SSE2-NEXT: pcmpgtd %xmm11, %xmm4
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm11, %xmm0 ; SSE2-NEXT: pcmpeqd %xmm11, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: pand %xmm5, %xmm0 ; SSE2-NEXT: pand %xmm5, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
; SSE2-NEXT: por %xmm0, %xmm4 ; SSE2-NEXT: por %xmm0, %xmm4
; SSE2-NEXT: pand %xmm7, %xmm4 ; SSE2-NEXT: pand %xmm2, %xmm4
; SSE2-NEXT: movdqa %xmm2, %xmm0
; SSE2-NEXT: pxor %xmm11, %xmm0
; SSE2-NEXT: movdqa %xmm0, %xmm5
; SSE2-NEXT: pcmpgtd %xmm11, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm11, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: pand %xmm6, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
; SSE2-NEXT: por %xmm0, %xmm5
; SSE2-NEXT: pand %xmm2, %xmm5
; SSE2-NEXT: movdqa %xmm1, %xmm0 ; SSE2-NEXT: movdqa %xmm1, %xmm0
; SSE2-NEXT: pxor %xmm11, %xmm0 ; SSE2-NEXT: pxor %xmm11, %xmm0
; SSE2-NEXT: movdqa %xmm0, %xmm2 ; SSE2-NEXT: movdqa %xmm0, %xmm2
; SSE2-NEXT: pcmpgtd %xmm11, %xmm2 ; SSE2-NEXT: pcmpgtd %xmm11, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm2[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm2[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm11, %xmm0 ; SSE2-NEXT: pcmpeqd %xmm11, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: pand %xmm6, %xmm0 ; SSE2-NEXT: pand %xmm5, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; SSE2-NEXT: por %xmm0, %xmm2 ; SSE2-NEXT: por %xmm0, %xmm2
; SSE2-NEXT: pand %xmm1, %xmm2 ; SSE2-NEXT: pand %xmm1, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] ; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm4[0,2]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm2[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm5[0,2,2,3] ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm3[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm4[0,2,2,3] ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm0[0,1,0,2,4,5,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSSE3-LABEL: trunc_packus_v8i64_v8i16: ; SSSE3-LABEL: trunc_packus_v8i64_v8i16:
; SSSE3: # %bb.0: ; SSSE3: # %bb.0:
; SSSE3-NEXT: movdqa (%rdi), %xmm7 ; SSSE3-NEXT: movdqa (%rdi), %xmm5
; SSSE3-NEXT: movdqa 16(%rdi), %xmm2 ; SSSE3-NEXT: movdqa 16(%rdi), %xmm9
; SSSE3-NEXT: movdqa 32(%rdi), %xmm9 ; SSSE3-NEXT: movdqa 32(%rdi), %xmm3
; SSSE3-NEXT: movdqa 48(%rdi), %xmm6 ; SSSE3-NEXT: movdqa 48(%rdi), %xmm7
; SSSE3-NEXT: movdqa {{.*#+}} xmm8 = [65535,65535] ; SSSE3-NEXT: movdqa {{.*#+}} xmm8 = [65535,65535]
; SSSE3-NEXT: movdqa {{.*#+}} xmm11 = [2147483648,2147483648] ; SSSE3-NEXT: movdqa {{.*#+}} xmm11 = [2147483648,2147483648]
; SSSE3-NEXT: movdqa %xmm2, %xmm1 ; SSSE3-NEXT: movdqa %xmm3, %xmm2
; SSSE3-NEXT: pxor %xmm11, %xmm1
; SSSE3-NEXT: movdqa {{.*#+}} xmm10 = [2147549183,2147549183]
; SSSE3-NEXT: movdqa %xmm10, %xmm5
; SSSE3-NEXT: pcmpgtd %xmm1, %xmm5
; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm5[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm10, %xmm1
; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]
; SSSE3-NEXT: pand %xmm3, %xmm4
; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm5[1,1,3,3]
; SSSE3-NEXT: por %xmm4, %xmm1
; SSSE3-NEXT: pand %xmm1, %xmm2
; SSSE3-NEXT: pandn %xmm8, %xmm1
; SSSE3-NEXT: por %xmm2, %xmm1
; SSSE3-NEXT: movdqa %xmm7, %xmm2
; SSSE3-NEXT: pxor %xmm11, %xmm2 ; SSSE3-NEXT: pxor %xmm11, %xmm2
; SSSE3-NEXT: movdqa %xmm10, %xmm3 ; SSSE3-NEXT: movdqa {{.*#+}} xmm10 = [2147549183,2147549183]
; SSSE3-NEXT: pcmpgtd %xmm2, %xmm3 ; SSSE3-NEXT: movdqa %xmm10, %xmm6
; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2] ; SSSE3-NEXT: pcmpgtd %xmm2, %xmm6
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm6[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm10, %xmm2 ; SSSE3-NEXT: pcmpeqd %xmm10, %xmm2
; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
; SSSE3-NEXT: pand %xmm4, %xmm5 ; SSSE3-NEXT: pand %xmm0, %xmm4
; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm3[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm6[1,1,3,3]
; SSSE3-NEXT: por %xmm5, %xmm2 ; SSSE3-NEXT: por %xmm4, %xmm2
; SSSE3-NEXT: pand %xmm2, %xmm7 ; SSSE3-NEXT: pand %xmm2, %xmm3
; SSSE3-NEXT: pandn %xmm8, %xmm2 ; SSSE3-NEXT: pandn %xmm8, %xmm2
; SSSE3-NEXT: por %xmm7, %xmm2 ; SSSE3-NEXT: por %xmm3, %xmm2
; SSSE3-NEXT: movdqa %xmm6, %xmm3 ; SSSE3-NEXT: movdqa %xmm7, %xmm0
; SSSE3-NEXT: pxor %xmm11, %xmm3 ; SSSE3-NEXT: pxor %xmm11, %xmm0
; SSSE3-NEXT: movdqa %xmm10, %xmm4 ; SSSE3-NEXT: movdqa %xmm10, %xmm3
; SSSE3-NEXT: pcmpgtd %xmm3, %xmm4 ; SSSE3-NEXT: pcmpgtd %xmm0, %xmm3
; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] ; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm3[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm10, %xmm3 ; SSSE3-NEXT: pcmpeqd %xmm10, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSSE3-NEXT: pand %xmm4, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSSE3-NEXT: pand %xmm5, %xmm3 ; SSSE3-NEXT: por %xmm0, %xmm3
; SSSE3-NEXT: pshufd {{.*#+}} xmm7 = xmm4[1,1,3,3] ; SSSE3-NEXT: pand %xmm3, %xmm7
; SSSE3-NEXT: por %xmm3, %xmm7 ; SSSE3-NEXT: pandn %xmm8, %xmm3
; SSSE3-NEXT: pand %xmm7, %xmm6 ; SSSE3-NEXT: por %xmm7, %xmm3
; SSSE3-NEXT: pandn %xmm8, %xmm7 ; SSSE3-NEXT: movdqa %xmm5, %xmm0
; SSSE3-NEXT: por %xmm6, %xmm7 ; SSSE3-NEXT: pxor %xmm11, %xmm0
; SSSE3-NEXT: movdqa %xmm9, %xmm3
; SSSE3-NEXT: pxor %xmm11, %xmm3
; SSSE3-NEXT: movdqa %xmm10, %xmm4 ; SSSE3-NEXT: movdqa %xmm10, %xmm4
; SSSE3-NEXT: pcmpgtd %xmm3, %xmm4 ; SSSE3-NEXT: pcmpgtd %xmm0, %xmm4
; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] ; SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm4[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm10, %xmm3 ; SSSE3-NEXT: pcmpeqd %xmm10, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSSE3-NEXT: pand %xmm5, %xmm3
; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
; SSSE3-NEXT: por %xmm3, %xmm4
; SSSE3-NEXT: pand %xmm4, %xmm9
; SSSE3-NEXT: pandn %xmm8, %xmm4
; SSSE3-NEXT: por %xmm9, %xmm4
; SSSE3-NEXT: movdqa %xmm4, %xmm3
; SSSE3-NEXT: pxor %xmm11, %xmm3
; SSSE3-NEXT: movdqa %xmm3, %xmm5
; SSSE3-NEXT: pcmpgtd %xmm11, %xmm5
; SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm11, %xmm3
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
; SSSE3-NEXT: pand %xmm6, %xmm0 ; SSSE3-NEXT: pand %xmm6, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm5[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm7 = xmm4[1,1,3,3]
; SSSE3-NEXT: por %xmm0, %xmm3 ; SSSE3-NEXT: por %xmm0, %xmm7
; SSSE3-NEXT: pand %xmm4, %xmm3 ; SSSE3-NEXT: pand %xmm7, %xmm5
; SSSE3-NEXT: movdqa %xmm7, %xmm0 ; SSSE3-NEXT: pandn %xmm8, %xmm7
; SSSE3-NEXT: por %xmm5, %xmm7
; SSSE3-NEXT: movdqa %xmm9, %xmm0
; SSSE3-NEXT: pxor %xmm11, %xmm0 ; SSSE3-NEXT: pxor %xmm11, %xmm0
; SSSE3-NEXT: movdqa %xmm0, %xmm4 ; SSSE3-NEXT: movdqa %xmm10, %xmm4
; SSSE3-NEXT: pcmpgtd %xmm11, %xmm4 ; SSSE3-NEXT: pcmpgtd %xmm0, %xmm4
; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2] ; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm11, %xmm0 ; SSSE3-NEXT: pcmpeqd %xmm10, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSSE3-NEXT: pand %xmm5, %xmm0 ; SSSE3-NEXT: pand %xmm5, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
; SSSE3-NEXT: por %xmm0, %xmm4 ; SSSE3-NEXT: por %xmm0, %xmm4
; SSSE3-NEXT: pand %xmm7, %xmm4 ; SSSE3-NEXT: pand %xmm4, %xmm9
; SSSE3-NEXT: movdqa %xmm2, %xmm0 ; SSSE3-NEXT: pandn %xmm8, %xmm4
; SSSE3-NEXT: por %xmm9, %xmm4
; SSSE3-NEXT: movdqa %xmm4, %xmm0
; SSSE3-NEXT: pxor %xmm11, %xmm0 ; SSSE3-NEXT: pxor %xmm11, %xmm0
; SSSE3-NEXT: movdqa %xmm0, %xmm5 ; SSSE3-NEXT: movdqa %xmm0, %xmm5
; SSSE3-NEXT: pcmpgtd %xmm11, %xmm5 ; SSSE3-NEXT: pcmpgtd %xmm11, %xmm5
; SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2] ; SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm11, %xmm0 ; SSSE3-NEXT: pcmpeqd %xmm11, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSSE3-NEXT: pand %xmm6, %xmm0 ; SSSE3-NEXT: pand %xmm6, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
; SSSE3-NEXT: por %xmm0, %xmm5 ; SSSE3-NEXT: por %xmm0, %xmm5
; SSSE3-NEXT: pand %xmm2, %xmm5 ; SSSE3-NEXT: pand %xmm4, %xmm5
; SSSE3-NEXT: movdqa %xmm1, %xmm0 ; SSSE3-NEXT: movdqa %xmm7, %xmm0
; SSSE3-NEXT: pxor %xmm11, %xmm0 ; SSSE3-NEXT: pxor %xmm11, %xmm0
; SSSE3-NEXT: movdqa %xmm0, %xmm2 ; SSSE3-NEXT: movdqa %xmm0, %xmm4
; SSSE3-NEXT: pcmpgtd %xmm11, %xmm2 ; SSSE3-NEXT: pcmpgtd %xmm11, %xmm4
; SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm2[0,0,2,2] ; SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm4[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm11, %xmm0 ; SSSE3-NEXT: pcmpeqd %xmm11, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
; SSSE3-NEXT: pand %xmm6, %xmm0 ; SSSE3-NEXT: pand %xmm6, %xmm1
; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
; SSSE3-NEXT: por %xmm0, %xmm2 ; SSSE3-NEXT: por %xmm1, %xmm0
; SSSE3-NEXT: pand %xmm1, %xmm2 ; SSSE3-NEXT: pand %xmm7, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm5[0,2]
; SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] ; SSSE3-NEXT: movdqa %xmm3, %xmm1
; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm5[0,2,2,3] ; SSSE3-NEXT: pxor %xmm11, %xmm1
; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSSE3-NEXT: movdqa %xmm1, %xmm4
; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; SSSE3-NEXT: pcmpgtd %xmm11, %xmm4
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm4[0,2,2,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
; SSSE3-NEXT: pshuflw {{.*#+}} xmm2 = xmm0[0,1,0,2,4,5,6,7] ; SSSE3-NEXT: pcmpeqd %xmm11, %xmm1
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7] ; SSSE3-NEXT: pand %xmm5, %xmm1
; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] ; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] ; SSSE3-NEXT: por %xmm1, %xmm4
; SSSE3-NEXT: pand %xmm3, %xmm4
; SSSE3-NEXT: movdqa %xmm2, %xmm1
; SSSE3-NEXT: pxor %xmm11, %xmm1
; SSSE3-NEXT: movdqa %xmm1, %xmm3
; SSSE3-NEXT: pcmpgtd %xmm11, %xmm3
; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm3[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm11, %xmm1
; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSSE3-NEXT: pand %xmm5, %xmm1
; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSSE3-NEXT: por %xmm1, %xmm3
; SSSE3-NEXT: pand %xmm2, %xmm3
; SSSE3-NEXT: shufps {{.*#+}} xmm3 = xmm3[0,2],xmm4[0,2]
; SSSE3-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; SSSE3-NEXT: pshufb %xmm1, %xmm3
; SSSE3-NEXT: pshufb %xmm1, %xmm0
; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm3[0]
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: trunc_packus_v8i64_v8i16: ; SSE41-LABEL: trunc_packus_v8i64_v8i16:
; SSE41: # %bb.0: ; SSE41: # %bb.0:
; SSE41-NEXT: movdqa (%rdi), %xmm10 ; SSE41-NEXT: movdqa (%rdi), %xmm10
; SSE41-NEXT: movdqa 16(%rdi), %xmm9 ; SSE41-NEXT: movdqa 16(%rdi), %xmm9
; SSE41-NEXT: movdqa 32(%rdi), %xmm3 ; SSE41-NEXT: movdqa 32(%rdi), %xmm3
; SSE41-NEXT: movdqa 48(%rdi), %xmm5 ; SSE41-NEXT: movdqa 48(%rdi), %xmm5
▲ Show 20 Lines • Show All 3,731 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/vector-trunc-usat.ll

Show First 20 Lines • Show All 1,295 Lines • ▼ Show 20 Lines; SKX-NEXT: retq
%3 = trunc <4 x i64> %2 to <4 x i16> %3 = trunc <4 x i64> %2 to <4 x i16>
store <4 x i16> %3, <4 x i16> *%p1 store <4 x i16> %3, <4 x i16> *%p1
ret void ret void
} }
define <8 x i16> @trunc_usat_v8i64_v8i16(<8 x i64>* %p0) { define <8 x i16> @trunc_usat_v8i64_v8i16(<8 x i64>* %p0) {
; SSE2-LABEL: trunc_usat_v8i64_v8i16: ; SSE2-LABEL: trunc_usat_v8i64_v8i16:
; SSE2: # %bb.0: ; SSE2: # %bb.0:
; SSE2-NEXT: movdqa (%rdi), %xmm4 ; SSE2-NEXT: movdqa (%rdi), %xmm6
; SSE2-NEXT: movdqa 16(%rdi), %xmm9 ; SSE2-NEXT: movdqa 16(%rdi), %xmm5
; SSE2-NEXT: movdqa 32(%rdi), %xmm6 ; SSE2-NEXT: movdqa 32(%rdi), %xmm9
; SSE2-NEXT: movdqa 48(%rdi), %xmm7 ; SSE2-NEXT: movdqa 48(%rdi), %xmm4
; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [65535,65535] ; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [65535,65535]
; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456] ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]
; SSE2-NEXT: movdqa %xmm6, %xmm2 ; SSE2-NEXT: movdqa %xmm5, %xmm7
; SSE2-NEXT: pxor %xmm3, %xmm2 ; SSE2-NEXT: pxor %xmm2, %xmm7
; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [9223372039002324991,9223372039002324991] ; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [9223372039002324991,9223372039002324991]
; SSE2-NEXT: movdqa %xmm10, %xmm5 ; SSE2-NEXT: movdqa %xmm1, %xmm3
; SSE2-NEXT: pcmpgtd %xmm2, %xmm5 ; SSE2-NEXT: pcmpgtd %xmm7, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm5[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm2 ; SSE2-NEXT: pcmpeqd %xmm1, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,3,3]
; SSE2-NEXT: pand %xmm0, %xmm1 ; SSE2-NEXT: pand %xmm0, %xmm7
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,3,3]
; SSE2-NEXT: por %xmm1, %xmm2 ; SSE2-NEXT: por %xmm7, %xmm0
; SSE2-NEXT: pand %xmm2, %xmm6 ; SSE2-NEXT: pand %xmm0, %xmm5
; SSE2-NEXT: pandn %xmm8, %xmm2 ; SSE2-NEXT: pandn %xmm8, %xmm0
; SSE2-NEXT: por %xmm6, %xmm2 ; SSE2-NEXT: por %xmm5, %xmm0
; SSE2-NEXT: movdqa %xmm7, %xmm0 ; SSE2-NEXT: movdqa %xmm6, %xmm3
; SSE2-NEXT: pxor %xmm3, %xmm0 ; SSE2-NEXT: pxor %xmm2, %xmm3
; SSE2-NEXT: movdqa %xmm10, %xmm1 ; SSE2-NEXT: movdqa %xmm1, %xmm5
; SSE2-NEXT: pcmpgtd %xmm0, %xmm1 ; SSE2-NEXT: pcmpgtd %xmm3, %xmm5
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm1[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm5[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm0 ; SSE2-NEXT: pcmpeqd %xmm1, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSE2-NEXT: pand %xmm5, %xmm0 ; SSE2-NEXT: pand %xmm7, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm1[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
; SSE2-NEXT: por %xmm0, %xmm6 ; SSE2-NEXT: por %xmm3, %xmm5
; SSE2-NEXT: pand %xmm6, %xmm7 ; SSE2-NEXT: pand %xmm5, %xmm6
; SSE2-NEXT: pandn %xmm8, %xmm6 ; SSE2-NEXT: pandn %xmm8, %xmm5
; SSE2-NEXT: por %xmm7, %xmm6 ; SSE2-NEXT: por %xmm6, %xmm5
; SSE2-NEXT: shufps {{.*#+}} xmm5 = xmm5[0,2],xmm0[0,2]
; SSE2-NEXT: movdqa %xmm4, %xmm0 ; SSE2-NEXT: movdqa %xmm4, %xmm0
; SSE2-NEXT: pxor %xmm3, %xmm0 ; SSE2-NEXT: pxor %xmm2, %xmm0
; SSE2-NEXT: movdqa %xmm10, %xmm1 ; SSE2-NEXT: movdqa %xmm1, %xmm3
; SSE2-NEXT: pcmpgtd %xmm0, %xmm1 ; SSE2-NEXT: pcmpgtd %xmm0, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm1[0,0,2,2] ; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm3[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm0 ; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: pand %xmm5, %xmm0 ; SSE2-NEXT: pand %xmm6, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSE2-NEXT: por %xmm0, %xmm1
; SSE2-NEXT: pand %xmm1, %xmm4
; SSE2-NEXT: pandn %xmm8, %xmm1
; SSE2-NEXT: por %xmm4, %xmm1
; SSE2-NEXT: pxor %xmm9, %xmm3
; SSE2-NEXT: movdqa %xmm10, %xmm0
; SSE2-NEXT: pcmpgtd %xmm3, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm0[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm10, %xmm3
; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSE2-NEXT: pand %xmm4, %xmm3 ; SSE2-NEXT: por %xmm0, %xmm3
; SSE2-NEXT: pand %xmm3, %xmm4
; SSE2-NEXT: pandn %xmm8, %xmm3
; SSE2-NEXT: por %xmm4, %xmm3
; SSE2-NEXT: pxor %xmm9, %xmm2
; SSE2-NEXT: movdqa %xmm1, %xmm0
; SSE2-NEXT: pcmpgtd %xmm2, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm0[0,0,2,2]
; SSE2-NEXT: pcmpeqd %xmm1, %xmm2
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3]
; SSE2-NEXT: pand %xmm4, %xmm1
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSE2-NEXT: por %xmm3, %xmm0 ; SSE2-NEXT: por %xmm1, %xmm0
; SSE2-NEXT: pand %xmm0, %xmm9 ; SSE2-NEXT: pand %xmm0, %xmm9
; SSE2-NEXT: pandn %xmm8, %xmm0 ; SSE2-NEXT: pandn %xmm8, %xmm0
; SSE2-NEXT: por %xmm9, %xmm0 ; SSE2-NEXT: por %xmm9, %xmm0
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm3[0,2]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm5[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm6[0,2,2,3] ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm0[0,1,0,2,4,5,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSSE3-LABEL: trunc_usat_v8i64_v8i16: ; SSSE3-LABEL: trunc_usat_v8i64_v8i16:
; SSSE3: # %bb.0: ; SSSE3: # %bb.0:
; SSSE3-NEXT: movdqa (%rdi), %xmm4 ; SSSE3-NEXT: movdqa (%rdi), %xmm6
; SSSE3-NEXT: movdqa 16(%rdi), %xmm9 ; SSSE3-NEXT: movdqa 16(%rdi), %xmm0
; SSSE3-NEXT: movdqa 32(%rdi), %xmm6 ; SSSE3-NEXT: movdqa 32(%rdi), %xmm9
; SSSE3-NEXT: movdqa 48(%rdi), %xmm7 ; SSSE3-NEXT: movdqa 48(%rdi), %xmm5
; SSSE3-NEXT: movdqa {{.*#+}} xmm8 = [65535,65535] ; SSSE3-NEXT: movdqa {{.*#+}} xmm8 = [65535,65535]
; SSSE3-NEXT: movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456] ; SSSE3-NEXT: movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456]
; SSSE3-NEXT: movdqa %xmm6, %xmm2 ; SSSE3-NEXT: movdqa %xmm0, %xmm7
; SSSE3-NEXT: pxor %xmm3, %xmm2 ; SSSE3-NEXT: pxor %xmm3, %xmm7
; SSSE3-NEXT: movdqa {{.*#+}} xmm10 = [9223372039002324991,9223372039002324991] ; SSSE3-NEXT: movdqa {{.*#+}} xmm10 = [9223372039002324991,9223372039002324991]
; SSSE3-NEXT: movdqa %xmm10, %xmm5 ; SSSE3-NEXT: movdqa %xmm10, %xmm4
; SSSE3-NEXT: pcmpgtd %xmm2, %xmm5 ; SSSE3-NEXT: pcmpgtd %xmm7, %xmm4
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm5[0,0,2,2] ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm4[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm10, %xmm2 ; SSSE3-NEXT: pcmpeqd %xmm10, %xmm7
; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm7 = xmm7[1,1,3,3]
; SSSE3-NEXT: pand %xmm0, %xmm1 ; SSSE3-NEXT: pand %xmm1, %xmm7
; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm5[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm4[1,1,3,3]
; SSSE3-NEXT: por %xmm1, %xmm2 ; SSSE3-NEXT: por %xmm7, %xmm1
; SSSE3-NEXT: pand %xmm2, %xmm6 ; SSSE3-NEXT: pand %xmm1, %xmm0
; SSSE3-NEXT: pandn %xmm8, %xmm2 ; SSSE3-NEXT: pandn %xmm8, %xmm1
; SSSE3-NEXT: por %xmm6, %xmm2 ; SSSE3-NEXT: por %xmm0, %xmm1
; SSSE3-NEXT: movdqa %xmm7, %xmm0 ; SSSE3-NEXT: movdqa %xmm6, %xmm0
; SSSE3-NEXT: pxor %xmm3, %xmm0
; SSSE3-NEXT: movdqa %xmm10, %xmm1
; SSSE3-NEXT: pcmpgtd %xmm0, %xmm1
; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm1[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm10, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
; SSSE3-NEXT: pand %xmm5, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm6 = xmm1[1,1,3,3]
; SSSE3-NEXT: por %xmm0, %xmm6
; SSSE3-NEXT: pand %xmm6, %xmm7
; SSSE3-NEXT: pandn %xmm8, %xmm6
; SSSE3-NEXT: por %xmm7, %xmm6
; SSSE3-NEXT: movdqa %xmm4, %xmm0
; SSSE3-NEXT: pxor %xmm3, %xmm0 ; SSSE3-NEXT: pxor %xmm3, %xmm0
; SSSE3-NEXT: movdqa %xmm10, %xmm1 ; SSSE3-NEXT: movdqa %xmm10, %xmm4
; SSSE3-NEXT: pcmpgtd %xmm0, %xmm1 ; SSSE3-NEXT: pcmpgtd %xmm0, %xmm4
; SSSE3-NEXT: pshufd {{.*#+}} xmm5 = xmm1[0,0,2,2] ; SSSE3-NEXT: pshufd {{.*#+}} xmm7 = xmm4[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm10, %xmm0 ; SSSE3-NEXT: pcmpeqd %xmm10, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
; SSSE3-NEXT: pand %xmm5, %xmm0 ; SSSE3-NEXT: pand %xmm7, %xmm2
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm4[1,1,3,3]
; SSSE3-NEXT: por %xmm2, %xmm0
; SSSE3-NEXT: pand %xmm0, %xmm6
; SSSE3-NEXT: pandn %xmm8, %xmm0
; SSSE3-NEXT: por %xmm6, %xmm0
; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSSE3-NEXT: movdqa %xmm5, %xmm1
; SSSE3-NEXT: pxor %xmm3, %xmm1
; SSSE3-NEXT: movdqa %xmm10, %xmm2
; SSSE3-NEXT: pcmpgtd %xmm1, %xmm2
; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm2[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm10, %xmm1
; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSSE3-NEXT: por %xmm0, %xmm1 ; SSSE3-NEXT: pand %xmm4, %xmm1
; SSSE3-NEXT: pand %xmm1, %xmm4 ; SSSE3-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
; SSSE3-NEXT: pandn %xmm8, %xmm1 ; SSSE3-NEXT: por %xmm1, %xmm2
; SSSE3-NEXT: por %xmm4, %xmm1 ; SSSE3-NEXT: pand %xmm2, %xmm5
; SSSE3-NEXT: pandn %xmm8, %xmm2
; SSSE3-NEXT: por %xmm5, %xmm2
; SSSE3-NEXT: pxor %xmm9, %xmm3 ; SSSE3-NEXT: pxor %xmm9, %xmm3
; SSSE3-NEXT: movdqa %xmm10, %xmm0 ; SSSE3-NEXT: movdqa %xmm10, %xmm1
; SSSE3-NEXT: pcmpgtd %xmm3, %xmm0 ; SSSE3-NEXT: pcmpgtd %xmm3, %xmm1
; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm0[0,0,2,2] ; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm1[0,0,2,2]
; SSSE3-NEXT: pcmpeqd %xmm10, %xmm3 ; SSSE3-NEXT: pcmpeqd %xmm10, %xmm3
; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
; SSSE3-NEXT: pand %xmm4, %xmm3 ; SSSE3-NEXT: pand %xmm4, %xmm3
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
; SSSE3-NEXT: por %xmm3, %xmm0 ; SSSE3-NEXT: por %xmm3, %xmm1
; SSSE3-NEXT: pand %xmm0, %xmm9 ; SSSE3-NEXT: pand %xmm1, %xmm9
; SSSE3-NEXT: pandn %xmm8, %xmm0 ; SSSE3-NEXT: pandn %xmm8, %xmm1
; SSSE3-NEXT: por %xmm9, %xmm0 ; SSSE3-NEXT: por %xmm9, %xmm1
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2]
; SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSSE3-NEXT: pshufb %xmm2, %xmm1
; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSSE3-NEXT: pshufb %xmm2, %xmm0
; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm6[0,2,2,3]
; SSSE3-NEXT: pshuflw {{.*#+}} xmm3 = xmm0[0,1,0,2,4,5,6,7]
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: trunc_usat_v8i64_v8i16: ; SSE41-LABEL: trunc_usat_v8i64_v8i16:
; SSE41: # %bb.0: ; SSE41: # %bb.0:
; SSE41-NEXT: movdqa (%rdi), %xmm7 ; SSE41-NEXT: movdqa (%rdi), %xmm7
; SSE41-NEXT: movdqa 16(%rdi), %xmm1 ; SSE41-NEXT: movdqa 16(%rdi), %xmm1
; SSE41-NEXT: movdqa 32(%rdi), %xmm8 ; SSE41-NEXT: movdqa 32(%rdi), %xmm8
; SSE41-NEXT: movdqa 48(%rdi), %xmm9 ; SSE41-NEXT: movdqa 48(%rdi), %xmm9
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llvm/test/CodeGen/X86/vector-trunc.ll

Show First 20 Lines • Show All 130 Lines • ▼ Show 20 Linesentry:
%0 = lshr <8 x i64> %a, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32> %0 = lshr <8 x i64> %a, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>
%1 = trunc <8 x i64> %0 to <8 x i32> %1 = trunc <8 x i64> %0 to <8 x i32>
ret <8 x i32> %1 ret <8 x i32> %1
} }
define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) { define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) {
; SSE2-LABEL: trunc8i64_8i16: ; SSE2-LABEL: trunc8i64_8i16:
; SSE2: # %bb.0: # %entry ; SSE2: # %bb.0: # %entry
; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSE2-NEXT: retq ; SSE2-NEXT: retq
; ;
; SSSE3-LABEL: trunc8i64_8i16: ; SSSE3-LABEL: trunc8i64_8i16:
; SSSE3: # %bb.0: # %entry ; SSSE3: # %bb.0: # %entry
; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSSE3-NEXT: movdqa {{.*#+}} xmm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSSE3-NEXT: pshufb %xmm3, %xmm2
; SSSE3-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
; SSSE3-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] ; SSSE3-NEXT: pshufb %xmm3, %xmm0
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] ; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
; SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
; SSSE3-NEXT: retq ; SSSE3-NEXT: retq
; ;
; SSE41-LABEL: trunc8i64_8i16: ; SSE41-LABEL: trunc8i64_8i16:
; SSE41: # %bb.0: # %entry ; SSE41: # %bb.0: # %entry
; SSE41-NEXT: pxor %xmm4, %xmm4 ; SSE41-NEXT: pxor %xmm4, %xmm4
; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] ; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7]
; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7] ; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7]
; SSE41-NEXT: packusdw %xmm3, %xmm2 ; SSE41-NEXT: packusdw %xmm3, %xmm2
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