Index: llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp =================================================================== --- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp +++ llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp @@ -368,7 +368,7 @@ if (IsHazard(&*I)) return WaitStates; - if (I->isInlineAsm() || I->isImplicitDef() || I->isDebugInstr()) + if (I->isInlineAsm() || I->isMetaInstruction()) continue; WaitStates += SIInstrInfo::getNumWaitStates(*I); Index: llvm/test/CodeGen/AMDGPU/hazard-recognizer-meta-insts.mir =================================================================== --- /dev/null +++ llvm/test/CodeGen/AMDGPU/hazard-recognizer-meta-insts.mir @@ -0,0 +1,41 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -march=amdgcn -mcpu=gfx906 -run-pass=post-RA-hazard-rec -o - %s | FileCheck -check-prefix=GFX9 %s + +# Make sure the kill is skipped for hazard purposes, so the nop is +# correctly inserted. + +--- + +name: global_store_dwordx4_data_hazard_kill + +body: | + bb.0: + liveins: $vgpr0_vgpr1, $vgpr2_vgpr3_vgpr4_vgpr5 + ; GFX9-LABEL: name: global_store_dwordx4_data_hazard_kill + ; GFX9: GLOBAL_STORE_DWORDX4 $vgpr0_vgpr1, $vgpr2_vgpr3_vgpr4_vgpr5, 0, 0, 0, 0, implicit $exec + ; GFX9: $vgpr2 = KILL + ; GFX9: S_NOP 0 + ; GFX9: $vgpr2 = V_MOV_B32_e32 0, implicit $exec + GLOBAL_STORE_DWORDX4 $vgpr0_vgpr1, $vgpr2_vgpr3_vgpr4_vgpr5, 0, 0, 0, 0, implicit $exec + $vgpr2 = KILL + $vgpr2 = V_MOV_B32_e32 0, implicit $exec + +... + +--- + +name: global_store_dwordx3_data_hazard_kill + +body: | + bb.0: + liveins: $vgpr0_vgpr1, $vgpr2_vgpr3_vgpr4 + ; GFX9-LABEL: name: global_store_dwordx3_data_hazard_kill + ; GFX9: GLOBAL_STORE_DWORDX3 $vgpr0_vgpr1, $vgpr2_vgpr3_vgpr4, 0, 0, 0, 0, implicit $exec + ; GFX9: $vgpr2 = KILL + ; GFX9: S_NOP 0 + ; GFX9: $vgpr2 = V_MOV_B32_e32 0, implicit $exec + GLOBAL_STORE_DWORDX3 $vgpr0_vgpr1, $vgpr2_vgpr3_vgpr4, 0, 0, 0, 0, implicit $exec + $vgpr2 = KILL + $vgpr2 = V_MOV_B32_e32 0, implicit $exec + +...