diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td --- a/llvm/lib/Target/AMDGPU/AMDGPU.td +++ b/llvm/lib/Target/AMDGPU/AMDGPU.td @@ -655,8 +655,8 @@ [FeatureFP64, FeatureLocalMemorySize32768, FeatureMIMG_R128, FeatureWavefrontSize64, FeatureSMemTimeInst, FeatureMadMacF32Insts, FeatureDsSrc2Insts, FeatureLDSBankCount32, FeatureMovrel, - FeatureTrigReducedRange, FeatureDoesNotSupportSRAMECC, - FeatureDoesNotSupportXNACK] + FeatureTrigReducedRange, FeatureDoesNotSupportXNACK, + FeatureDoesNotSupportSRAMECC] >; def FeatureSeaIslands : GCNSubtargetFeatureGeneration<"SEA_ISLANDS", @@ -665,7 +665,8 @@ FeatureWavefrontSize64, FeatureFlatAddressSpace, FeatureCIInsts, FeatureMovrel, FeatureTrigReducedRange, FeatureGFX7GFX8GFX9Insts, FeatureSMemTimeInst, FeatureMadMacF32Insts, - FeatureDsSrc2Insts, FeatureDoesNotSupportSRAMECC] + FeatureDsSrc2Insts, FeatureDoesNotSupportXNACK, + FeatureDoesNotSupportSRAMECC] >; def FeatureVolcanicIslands : GCNSubtargetFeatureGeneration<"VOLCANIC_ISLANDS", @@ -725,19 +726,16 @@ FeatureFastFMAF32, HalfRate64Ops, FeatureLDSBankCount32, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3]>; def FeatureISAVersion6_0_1 : FeatureSet< [FeatureSouthernIslands, FeatureLDSBankCount32, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3]>; def FeatureISAVersion7_0_0 : FeatureSet< [FeatureSeaIslands, FeatureLDSBankCount32, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3]>; def FeatureISAVersion7_0_1 : FeatureSet< @@ -745,26 +743,22 @@ HalfRate64Ops, FeatureLDSBankCount32, FeatureFastFMAF32, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3]>; def FeatureISAVersion7_0_2 : FeatureSet< [FeatureSeaIslands, FeatureLDSBankCount16, FeatureFastFMAF32, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3]>; def FeatureISAVersion7_0_3 : FeatureSet< [FeatureSeaIslands, FeatureLDSBankCount16, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3]>; def FeatureISAVersion7_0_4 : FeatureSet< [FeatureSeaIslands, FeatureLDSBankCount32, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3]>; def FeatureISAVersion8_0_1 : FeatureSet< @@ -781,14 +775,12 @@ FeatureLDSBankCount32, FeatureSGPRInitBug, FeatureUnpackedD16VMem, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3]>; def FeatureISAVersion8_0_3 : FeatureSet< [FeatureVolcanicIslands, FeatureLDSBankCount32, FeatureUnpackedD16VMem, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3]>; def FeatureISAVersion8_1_0 : FeatureSet< @@ -802,7 +794,6 @@ FeatureMadMixInsts, FeatureLDSBankCount32, FeatureCodeObjectV3, - FeatureDoesNotSupportXNACK, FeatureDoesNotSupportSRAMECC]>; def FeatureISAVersion9_0_2 : FeatureSet< @@ -817,7 +808,6 @@ [FeatureGFX9, FeatureLDSBankCount32, FeatureFmaMixInsts, - FeatureDoesNotSupportXNACK, FeatureDoesNotSupportSRAMECC, FeatureCodeObjectV3]>; @@ -829,7 +819,6 @@ FeatureDLInsts, FeatureDot1Insts, FeatureDot2Insts, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3]>; def FeatureISAVersion9_0_8 : FeatureSet< @@ -847,6 +836,7 @@ FeatureMAIInsts, FeaturePkFmacF16Inst, FeatureAtomicFaddInsts, + FeatureXNACK, FeatureSRAMECC, FeatureMFMAInlineLiteralBug, FeatureCodeObjectV3]>; @@ -889,7 +879,6 @@ FeatureMadMacF32Insts, FeatureDsSrc2Insts, FeatureLdsMisalignedBug, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3])>; def FeatureISAVersion10_1_1 : FeatureSet< @@ -910,7 +899,6 @@ FeatureSMemTimeInst, FeatureMadMacF32Insts, FeatureDsSrc2Insts, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3])>; def FeatureISAVersion10_1_2 : FeatureSet< @@ -932,7 +920,6 @@ FeatureMadMacF32Insts, FeatureDsSrc2Insts, FeatureLdsMisalignedBug, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3])>; def FeatureISAVersion10_3_0 : FeatureSet< @@ -947,7 +934,6 @@ FeatureDot6Insts, FeatureNSAEncoding, FeatureWavefrontSize32, - FeatureDoesNotSupportXNACK, FeatureCodeObjectV3]>; //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h --- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h @@ -288,6 +288,14 @@ LLVMTrapHandlerRegValue = 1 }; + /// Returns the current Xnack TargetIDSetting, possible options are + /// "NotSupported", "Any", "Off", and "On". + AMDGPU::IsaInfo::TargetIDSetting getXnackSetting() const; + + /// Returns the current SramEcc TargetIDSetting, possible options are + /// "NotSupported", "Any", "Off", and "On". + AMDGPU::IsaInfo::TargetIDSetting getSramEccSetting() const; + private: /// GlobalISel related APIs. std::unique_ptr CallLoweringInfo; @@ -328,6 +336,8 @@ bool EnableDS128; bool EnablePRTStrictNull; bool DumpCode; + bool SupportAnyXnackSetting; + bool SupportAnySramEccSetting; // Subtarget statically properties set by tablegen bool FP64; @@ -418,6 +428,10 @@ // See COMPUTE_TMPRING_SIZE.WAVESIZE, 13-bit field in units of 256-dword. static const unsigned MaxWaveScratchSize = (256 * 4) * ((1 << 13) - 1); + // Initialize Xnack and SramEcc settings based on subtarget support and + // requested features. + void initializeXnackAndSramEcc(StringRef FS, StringRef GPU); + public: GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS, const GCNTargetMachine &TM); @@ -708,7 +722,13 @@ } bool isXNACKEnabled() const { - return EnableXNACK; + // FIXME: XNACK should be enabled with "Any" as well as "On". We + // can then remove this function and start using getXnackSetting directly. + return getXnackSetting() == AMDGPU::IsaInfo::TargetIDSetting::On; + } + + bool supportAnyXnackSetting() const { + return SupportAnyXnackSetting; } bool isCuModeEnabled() const { @@ -764,7 +784,11 @@ } bool d16PreservesUnusedBits() const { - return hasD16LoadStore() && !isSRAMECCEnabled(); + if (!hasD16LoadStore()) + return false; + AMDGPU::IsaInfo::TargetIDSetting Setting = getSramEccSetting(); + return Setting == AMDGPU::IsaInfo::TargetIDSetting::Off || + Setting == AMDGPU::IsaInfo::TargetIDSetting::NotSupported; } bool hasD16Images() const { @@ -872,8 +896,8 @@ return HasAtomicFaddInsts; } - bool isSRAMECCEnabled() const { - return EnableSRAMECC; + bool supportAnySramEccSetting() const { + return SupportAnySramEccSetting; } bool hasNoSdstCMPX() const { diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp --- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp @@ -13,18 +13,19 @@ #include "AMDGPUSubtarget.h" #include "AMDGPU.h" -#include "AMDGPUTargetMachine.h" #include "AMDGPUCallLowering.h" #include "AMDGPUInstructionSelector.h" #include "AMDGPULegalizerInfo.h" #include "AMDGPURegisterBankInfo.h" -#include "SIMachineFunctionInfo.h" +#include "AMDGPUTargetMachine.h" #include "MCTargetDesc/AMDGPUMCTargetDesc.h" +#include "SIMachineFunctionInfo.h" +#include "Utils/AMDGPUBaseInfo.h" #include "llvm/ADT/SmallString.h" #include "llvm/CodeGen/MachineScheduler.h" -#include "llvm/MC/MCSubtargetInfo.h" -#include "llvm/IR/MDBuilder.h" #include "llvm/CodeGen/TargetFrameLowering.h" +#include "llvm/IR/MDBuilder.h" +#include "llvm/MC/MCSubtargetInfo.h" #include using namespace llvm; @@ -78,7 +79,7 @@ // unset everything else if it is disabled // Assuming ECC is enabled is the conservative default. - SmallString<256> FullFS("+promote-alloca,+load-store-opt,+enable-ds128,+sram-ecc,+xnack,"); + SmallString<256> FullFS("+promote-alloca,+load-store-opt,+enable-ds128,"); if (isAmdHsaOS()) // Turn on FlatForGlobal for HSA. FullFS += "+flat-for-global,+unaligned-buffer-access,+trap-handler,"; @@ -131,20 +132,7 @@ HasFminFmaxLegacy = getGeneration() < AMDGPUSubtarget::VOLCANIC_ISLANDS; - // Disable XNACK on targets where it is not enabled by default unless it is - // explicitly requested. - if (!FS.contains("+xnack") && DoesNotSupportXNACK && EnableXNACK) { - ToggleFeature(AMDGPU::FeatureXNACK); - EnableXNACK = false; - } - - // ECC is on by default, but turn it off if the hardware doesn't support it - // anyway. This matters for the gfx9 targets with d16 loads, but don't support - // ECC. - if (DoesNotSupportSRAMECC && EnableSRAMECC) { - ToggleFeature(AMDGPU::FeatureSRAMECC); - EnableSRAMECC = false; - } + initializeXnackAndSramEcc(FS, GPU); return *this; } @@ -201,6 +189,10 @@ EnablePRTStrictNull(false), DumpCode(false), + // Initialize with the conservative defaults. + SupportAnyXnackSetting(true), + SupportAnySramEccSetting(true), + FP64(false), GCN3Encoding(false), CIInsts(false), @@ -893,6 +885,80 @@ Mutations.push_back(std::make_unique(&InstrInfo)); } +void GCNSubtarget::initializeXnackAndSramEcc(StringRef FS, StringRef GPU) { + bool XnackOnSupportRequested = FS.contains("+xnack"); + bool SramEccOnSupportRequested = FS.contains("+sram-ecc"); + bool XnackOffSupportRequested = FS.contains("-xnack"); + bool SramEccOffSupportRequested = FS.contains("-sram-ecc"); + + // Check if support for XNACK or SRAMECC is explicitly enabled or disabled. + // In the absence of the target features we assume we must produce code that + // can run in any environment. + SupportAnyXnackSetting = + !(XnackOnSupportRequested || XnackOffSupportRequested); + SupportAnySramEccSetting = + !(SramEccOnSupportRequested || SramEccOffSupportRequested); + + if (XnackOnSupportRequested && DoesNotSupportXNACK) + errs() << "warning: Xnack On was requested for a processor that does not " + "support it!\n"; + + if (SramEccOnSupportRequested && DoesNotSupportSRAMECC) + errs() << "warning: SramEcc On was requested for a processor that does not " + "support it!\n"; + + if (XnackOffSupportRequested && DoesNotSupportXNACK) + errs() << "warning: Xnack Off was requested for a processor that does not " + "support it!\n"; + + if (SramEccOffSupportRequested && DoesNotSupportSRAMECC) + errs() << "warning: SramEcc Off was requested for a processor that does " + "not support it!\n"; + + // FIXME: These hacks are necessary to support backwards compatibility with + // the old defaults for xnack. When the new targetid feature is enabled this, + // along with the change in isXNACKEnabled can be updated to reflect the true + // intended meaning of "default" for these settings. + if (EnableXNACK) + SupportAnyXnackSetting = false; + if (GPU == "generic" || GPU == "generic-hsa") { + SupportAnySramEccSetting = true; + + // FIXME + SupportAnyXnackSetting = false; + EnableXNACK = true; + } + + LLVM_DEBUG(dbgs() << "XNACK setting for subtarget: " << getXnackSetting() + << '\n'); + LLVM_DEBUG(dbgs() << "SRAMECC setting for subtarget: " << getSramEccSetting() + << '\n'); +} + +AMDGPU::IsaInfo::TargetIDSetting GCNSubtarget::getXnackSetting() const { + if (DoesNotSupportXNACK) + return AMDGPU::IsaInfo::TargetIDSetting::NotSupported; + + if (supportAnyXnackSetting()) + return AMDGPU::IsaInfo::TargetIDSetting::Any; + + if (!EnableXNACK) + return AMDGPU::IsaInfo::TargetIDSetting::Off; + return AMDGPU::IsaInfo::TargetIDSetting::On; +} + +AMDGPU::IsaInfo::TargetIDSetting GCNSubtarget::getSramEccSetting() const { + if (DoesNotSupportSRAMECC) + return AMDGPU::IsaInfo::TargetIDSetting::NotSupported; + + if (supportAnySramEccSetting()) + return AMDGPU::IsaInfo::TargetIDSetting::Any; + + if (!EnableSRAMECC) + return AMDGPU::IsaInfo::TargetIDSetting::Off; + return AMDGPU::IsaInfo::TargetIDSetting::On; +} + const AMDGPUSubtarget &AMDGPUSubtarget::get(const MachineFunction &MF) { if (MF.getTarget().getTargetTriple().getArch() == Triple::amdgcn) return static_cast(MF.getSubtarget()); diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h @@ -19,6 +19,7 @@ #include "llvm/Support/Compiler.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/TargetParser.h" +#include "llvm/Support/raw_ostream.h" #include #include #include @@ -61,6 +62,13 @@ TRAP_NUM_SGPRS = 16 }; +enum class TargetIDSetting { + NotSupported, + Any, + Off, + On +}; + /// Streams isa version string for given subtarget \p STI into \p Stream. void streamIsaVersion(const MCSubtargetInfo *STI, raw_ostream &Stream); @@ -835,6 +843,10 @@ }; } // end namespace AMDGPU + +raw_ostream &operator<<(raw_ostream &OS, + const AMDGPU::IsaInfo::TargetIDSetting S); + } // end namespace llvm #endif // LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPUBASEINFO_H diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp --- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp +++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp @@ -1581,4 +1581,24 @@ } } // namespace AMDGPU + +raw_ostream &operator<<(raw_ostream &OS, + const AMDGPU::IsaInfo::TargetIDSetting S) { + switch (S) { + case (AMDGPU::IsaInfo::TargetIDSetting::NotSupported): + OS << "Not Supported"; + break; + case (AMDGPU::IsaInfo::TargetIDSetting::Any): + OS << "Any"; + break; + case (AMDGPU::IsaInfo::TargetIDSetting::Off): + OS << "Off"; + break; + case (AMDGPU::IsaInfo::TargetIDSetting::On): + OS << "On"; + break; + } + return OS; +} + } // namespace llvm diff --git a/llvm/test/CodeGen/AMDGPU/elf-header-flags-sram-ecc.ll b/llvm/test/CodeGen/AMDGPU/elf-header-flags-sram-ecc.ll --- a/llvm/test/CodeGen/AMDGPU/elf-header-flags-sram-ecc.ll +++ b/llvm/test/CodeGen/AMDGPU/elf-header-flags-sram-ecc.ll @@ -1,7 +1,3 @@ -; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx902 < %s | llvm-readobj --file-headers - | FileCheck --check-prefixes=NO-SRAM-ECC-GFX902 %s -; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx902 -mattr=-sram-ecc < %s | llvm-readobj --file-headers - | FileCheck --check-prefixes=NO-SRAM-ECC-GFX902 %s -; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx902 -mattr=+sram-ecc < %s | llvm-readobj --file-headers - | FileCheck --check-prefixes=SRAM-ECC-GFX902 %s - ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx906 < %s | llvm-readobj --file-headers - | FileCheck --check-prefixes=NO-SRAM-ECC-GFX906 %s ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx906 -mattr=-sram-ecc < %s | llvm-readobj --file-headers - | FileCheck --check-prefixes=NO-SRAM-ECC-GFX906 %s ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx906 -mattr=+sram-ecc < %s | llvm-readobj --file-headers - | FileCheck --check-prefixes=SRAM-ECC-GFX906 %s @@ -9,17 +5,6 @@ ; RUN: llc -filetype=obj -march=amdgcn -mcpu=gfx908 < %s | llvm-readobj -file-headers - | FileCheck --check-prefix=SRAM-ECC-GFX908 %s -; NO-SRAM-ECC-GFX902: Flags [ -; NO-SRAM-ECC-GFX902-NEXT: EF_AMDGPU_MACH_AMDGCN_GFX902 (0x2D) -; NO-SRAM-ECC-GFX902-NEXT: EF_AMDGPU_XNACK (0x100) -; NO-SRAM-ECC-GFX902-NEXT: ] - -; SRAM-ECC-GFX902: Flags [ -; SRAM-ECC-GFX902-NEXT: EF_AMDGPU_MACH_AMDGCN_GFX902 (0x2D) -; SRAM-ECC-GFX902-NEXT: EF_AMDGPU_SRAM_ECC (0x200) -; SRAM-ECC-GFX902-NEXT: EF_AMDGPU_XNACK (0x100) -; SRAM-ECC-GFX902-NEXT: ] - ; NO-SRAM-ECC-GFX906: Flags [ ; NO-SRAM-ECC-GFX906-NEXT: EF_AMDGPU_MACH_AMDGCN_GFX906 (0x2F) ; NO-SRAM-ECC-GFX906-NEXT: ] @@ -35,9 +20,10 @@ ; SRAM-ECC-XNACK-GFX906-NEXT: EF_AMDGPU_XNACK (0x100) ; SRAM-ECC-XNACK-GFX906-NEXT: ] -; SRAM-ECC-GFX908: Flags [ (0x230) +; SRAM-ECC-GFX908: Flags [ ; SRAM-ECC-GFX908: EF_AMDGPU_MACH_AMDGCN_GFX908 (0x30) -; SRAM-ECC-GFX908: EF_AMDGPU_SRAM_ECC (0x200) +; SRAM-ECC-GFX908: EF_AMDGPU_SRAM_ECC (0x200) +; SRAM-ECC-GFX908: EF_AMDGPU_XNACK (0x100) ; SRAM-ECC-GFX908: ] define amdgpu_kernel void @elf_header() { diff --git a/llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll b/llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll @@ -0,0 +1,13 @@ +; RUN: llc -march=amdgcn -mcpu=gfx700 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=NOT-SUPPORTED %s +; RUN: llc -march=amdgcn -mcpu=gfx906 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=ANY %s +; RUN: llc -march=amdgcn -mcpu=gfx908 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=ANY %s + +; REQUIRES: asserts + +; NOT-SUPPORTED: SRAMECC setting for subtarget: Not Supported +; ANY: SRAMECC setting for subtarget: Any +define void @sramecc-subtarget-feature-default() #0 { + ret void +} + +attributes #0 = { nounwind } diff --git a/llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-disabled.ll b/llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-disabled.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-disabled.ll @@ -0,0 +1,14 @@ +; RUN: llc -march=amdgcn -mcpu=gfx700 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=WARN %s +; RUN: llc -march=amdgcn -mcpu=gfx906 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=OFF %s +; RUN: llc -march=amdgcn -mcpu=gfx908 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=OFF %s + +; REQUIRES: asserts + +; WARN: warning: SramEcc Off was requested for a processor that does not support it! +; OFF: SRAMECC setting for subtarget: Off + +define void @sramecc-subtarget-feature-disabled() #0 { + ret void +} + +attributes #0 = { "target-features"="-sram-ecc" } diff --git a/llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-enabled.ll b/llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-enabled.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-enabled.ll @@ -0,0 +1,13 @@ +; RUN: llc -march=amdgcn -mcpu=gfx700 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=WARN %s +; RUN: llc -march=amdgcn -mcpu=gfx906 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=ON %s +; RUN: llc -march=amdgcn -mcpu=gfx908 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=ON %s + +; REQUIRES: asserts + +; WARN: warning: SramEcc On was requested for a processor that does not support it! +; ON: SRAMECC setting for subtarget: On +define void @sramecc-subtarget-feature-enabled() #0 { + ret void +} + +attributes #0 = { "target-features"="+sram-ecc" } diff --git a/llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-any.ll b/llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-any.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-any.ll @@ -0,0 +1,21 @@ +; RUN: llc -march=amdgcn -mcpu=gfx600 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=NOT-SUPPORTED %s +; RUN: llc -march=amdgcn -mcpu=gfx700 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=NOT-SUPPORTED %s +; RUN: llc -march=amdgcn -mcpu=gfx802 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=ANY %s +; RUN: llc -march=amdgcn -mcpu=gfx900 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=ANY %s +; RUN: llc -march=amdgcn -mcpu=gfx902 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=ON %s +; RUN: llc -march=amdgcn -mcpu=gfx1010 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=ANY %s + +; REQUIRES: asserts + +; Some subtargets have a default setting of 'On' instead of 'Any' to maintain +; backwards compatibility. This is a temporary measure until the new TargetID is +; implemented. + +; NOT-SUPPORTED: XNACK setting for subtarget: Not Supported +; ANY: XNACK setting for subtarget: Any +; ON: XNACK setting for subtarget: On +define void @xnack-subtarget-feature-any() #0 { + ret void +} + +attributes #0 = { nounwind } diff --git a/llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll b/llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=amdgcn -mcpu=gfx600 -debug-only=amdgpu-subtarget -o /dev/null %s 2>&1 | FileCheck --check-prefix=WARN %s +; RUN: llc -march=amdgcn -mcpu=gfx700 -debug-only=amdgpu-subtarget -o /dev/null %s 2>&1 | FileCheck --check-prefix=WARN %s +; RUN: llc -march=amdgcn -mcpu=gfx802 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=OFF %s +; RUN: llc -march=amdgcn -mcpu=gfx900 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=OFF %s +; RUN: llc -march=amdgcn -mcpu=gfx906 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=OFF %s +; RUN: llc -march=amdgcn -mcpu=gfx1010 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=OFF %s + +; REQUIRES: asserts + +; WARN: warning: Xnack Off was requested for a processor that does not support it! +; OFF: XNACK setting for subtarget: Off + +define void @xnack-subtarget-feature-disabled() #0 { + ret void +} + +attributes #0 = { "target-features"="-xnack" } diff --git a/llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll b/llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll new file mode 100644 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll @@ -0,0 +1,16 @@ +; RUN: llc -march=amdgcn -mcpu=gfx600 -debug-only=amdgpu-subtarget -o /dev/null %s 2>&1 | FileCheck --check-prefix=WARN %s +; RUN: llc -march=amdgcn -mcpu=gfx700 -debug-only=amdgpu-subtarget -o /dev/null %s 2>&1 | FileCheck --check-prefix=WARN %s +; RUN: llc -march=amdgcn -mcpu=gfx802 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=ON %s +; RUN: llc -march=amdgcn -mcpu=gfx900 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=ON %s +; RUN: llc -march=amdgcn -mcpu=gfx906 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=ON %s +; RUN: llc -march=amdgcn -mcpu=gfx1010 -debug-only=amdgpu-subtarget -o - %s 2>&1 | FileCheck --check-prefix=ON %s + +; REQUIRES: asserts + +; WARN: warning: Xnack On was requested for a processor that does not support it! +; ON: XNACK setting for subtarget: On +define void @xnack-subtarget-feature-enabled() #0 { + ret void +} + +attributes #0 = { "target-features"="+xnack" }