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Differential D85240

Disable hoisting MI to hotter basic blocks when using pgo
ClosedPublic

Authored by NeHuang on Aug 4 2020, 12:37 PM.

Details

Reviewers
nemanjai
stefanp
lei
Whitney
xbolva00
hfinkel
power-llvm-team
xur
davidxl
Commits
rGa4bb71b1c0d9: Disable hoisting MI to hotter basic blocks when using pgo
Summary

This is a follow up patch for https://reviews.llvm.org/D63676. With the feature enabled for pgo, we confirmed performance gain for SPEC benchmarks on PPC.

Diff Detail

Event Timeline

NeHuang created this revision.Aug 4 2020, 12:37 PM
Herald added subscribers: llvm-commits, nikic, steven.zhang and 2 others. · View Herald TranscriptAug 4 2020, 12:37 PM
NeHuang requested review of this revision.Aug 4 2020, 12:37 PM
NeHuang edited the summary of this revision. (Show Details)
Harbormaster completed remote builds in B66978: Diff 282997.Aug 4 2020, 1:11 PM
xbolva00 added reviewers: xur, davidxl.Aug 4 2020, 2:44 PM
NeHuang added a comment.Sep 11 2020, 8:52 AM

Ping.

Herald added a subscriber: wenlei. · View Herald TranscriptSep 11 2020, 8:52 AM
davidxl added a comment.Sep 11 2020, 9:09 AM

Can you share the performance data ?

NeHuang added a comment.Sep 11 2020, 10:12 AM

@davidxl We found SPEC2017 performance gain for PPC. Some experiments results available at https://reviews.llvm.org/D63676

NeHuang added a child revision: D63676: Disable hoisting MI to hotter basic blocks.Sep 11 2020, 10:20 AM
NeHuang removed a child revision: D63676: Disable hoisting MI to hotter basic blocks.
NeHuang added a parent revision: D63676: Disable hoisting MI to hotter basic blocks.
davidxl accepted this revision.Sep 14 2020, 10:41 PM

lgtm

This revision is now accepted and ready to land.Sep 14 2020, 10:41 PM
This revision was landed with ongoing or failed builds.Sep 17 2020, 12:20 PM
Closed by commit rGa4bb71b1c0d9: Disable hoisting MI to hotter basic blocks when using pgo (authored by NeHuang). · Explain Why
This revision was automatically updated to reflect the committed changes.
NeHuang added a commit: rGa4bb71b1c0d9: Disable hoisting MI to hotter basic blocks when using pgo.

Revision Contents

PathSize
llvm/
lib/
CodeGen/
2 lines
test/
CodeGen/
AArch64/
1 line
ARM/
1 line
X86/
1 line

Diff 282997

llvm/lib/CodeGen/MachineLICM.cpp

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static cl::opt<unsigned> static cl::opt<unsigned>
BlockFrequencyRatioThreshold("block-freq-ratio-threshold", BlockFrequencyRatioThreshold("block-freq-ratio-threshold",
cl::desc("Do not hoist instructions if target" cl::desc("Do not hoist instructions if target"
"block is N times hotter than the source."), "block is N times hotter than the source."),
cl::init(100), cl::Hidden); cl::init(100), cl::Hidden);
enum class UseBFI { None, PGO, All }; enum class UseBFI { None, PGO, All };
static cl::opt<UseBFI> static cl::opt<UseBFI>
Lint: Pre-merge checks
Inline Actions

clang-format: please reformat the code

-static cl::opt<UseBFI>
-DisableHoistingToHotterBlocks("disable-hoisting-to-hotter-blocks",
-                              cl::desc("Disable hoisting instructions to"
-                              " hotter blocks"),
-                              cl::init(UseBFI::PGO), cl::Hidden,
-                              cl::values(clEnumValN(UseBFI::None, "none",
-                              "disable the feature"),
-                              clEnumValN(UseBFI::PGO, "pgo",
-                              "enable the feature when using profile data"),
-                              clEnumValN(UseBFI::All, "all",

11 diff lines are omitted. See full path.

Lint: Pre-merge checks: clang-format: please reformat the code ``` -static cl::opt<UseBFI>…
DisableHoistingToHotterBlocks("disable-hoisting-to-hotter-blocks", DisableHoistingToHotterBlocks("disable-hoisting-to-hotter-blocks",
cl::desc("Disable hoisting instructions to" cl::desc("Disable hoisting instructions to"
" hotter blocks"), " hotter blocks"),
cl::init(UseBFI::None), cl::Hidden, cl::init(UseBFI::PGO), cl::Hidden,
cl::values(clEnumValN(UseBFI::None, "none", cl::values(clEnumValN(UseBFI::None, "none",
"disable the feature"), "disable the feature"),
clEnumValN(UseBFI::PGO, "pgo", clEnumValN(UseBFI::PGO, "pgo",
"enable the feature when using profile data"), "enable the feature when using profile data"),
clEnumValN(UseBFI::All, "all", clEnumValN(UseBFI::All, "all",
"enable the feature with/wo profile data"))); "enable the feature with/wo profile data")));
STATISTIC(NumHoisted, STATISTIC(NumHoisted,
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llvm/test/CodeGen/AArch64/O3-pipeline.ll

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; CHECK-NEXT: AArch64 Conditional Branch Tuning ; CHECK-NEXT: AArch64 Conditional Branch Tuning
; CHECK-NEXT: Machine Trace Metrics ; CHECK-NEXT: Machine Trace Metrics
; CHECK-NEXT: Early If-Conversion ; CHECK-NEXT: Early If-Conversion
; CHECK-NEXT: AArch64 Store Pair Suppression ; CHECK-NEXT: AArch64 Store Pair Suppression
; CHECK-NEXT: AArch64 SIMD instructions optimization pass ; CHECK-NEXT: AArch64 SIMD instructions optimization pass
; CHECK-NEXT: AArch64 Stack Tagging PreRA ; CHECK-NEXT: AArch64 Stack Tagging PreRA
; CHECK-NEXT: MachineDominator Tree Construction ; CHECK-NEXT: MachineDominator Tree Construction
; CHECK-NEXT: Machine Natural Loop Construction ; CHECK-NEXT: Machine Natural Loop Construction
; CHECK-NEXT: Machine Block Frequency Analysis
; CHECK-NEXT: Early Machine Loop Invariant Code Motion ; CHECK-NEXT: Early Machine Loop Invariant Code Motion
; CHECK-NEXT: MachineDominator Tree Construction ; CHECK-NEXT: MachineDominator Tree Construction
; CHECK-NEXT: Machine Block Frequency Analysis ; CHECK-NEXT: Machine Block Frequency Analysis
; CHECK-NEXT: Machine Common Subexpression Elimination ; CHECK-NEXT: Machine Common Subexpression Elimination
; CHECK-NEXT: MachinePostDominator Tree Construction ; CHECK-NEXT: MachinePostDominator Tree Construction
; CHECK-NEXT: Machine code sinking ; CHECK-NEXT: Machine code sinking
; CHECK-NEXT: Peephole Optimizations ; CHECK-NEXT: Peephole Optimizations
; CHECK-NEXT: Remove dead machine instructions ; CHECK-NEXT: Remove dead machine instructions
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llvm/test/CodeGen/ARM/O3-pipeline.ll

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; CHECK-NEXT: Early Tail Duplication ; CHECK-NEXT: Early Tail Duplication
; CHECK-NEXT: Optimize machine instruction PHIs ; CHECK-NEXT: Optimize machine instruction PHIs
; CHECK-NEXT: Slot index numbering ; CHECK-NEXT: Slot index numbering
; CHECK-NEXT: Merge disjoint stack slots ; CHECK-NEXT: Merge disjoint stack slots
; CHECK-NEXT: Local Stack Slot Allocation ; CHECK-NEXT: Local Stack Slot Allocation
; CHECK-NEXT: Remove dead machine instructions ; CHECK-NEXT: Remove dead machine instructions
; CHECK-NEXT: MachineDominator Tree Construction ; CHECK-NEXT: MachineDominator Tree Construction
; CHECK-NEXT: Machine Natural Loop Construction ; CHECK-NEXT: Machine Natural Loop Construction
; CHECK-NEXT: Machine Block Frequency Analysis
; CHECK-NEXT: Early Machine Loop Invariant Code Motion ; CHECK-NEXT: Early Machine Loop Invariant Code Motion
; CHECK-NEXT: MachineDominator Tree Construction ; CHECK-NEXT: MachineDominator Tree Construction
; CHECK-NEXT: Machine Block Frequency Analysis ; CHECK-NEXT: Machine Block Frequency Analysis
; CHECK-NEXT: Machine Common Subexpression Elimination ; CHECK-NEXT: Machine Common Subexpression Elimination
; CHECK-NEXT: MachinePostDominator Tree Construction ; CHECK-NEXT: MachinePostDominator Tree Construction
; CHECK-NEXT: Machine code sinking ; CHECK-NEXT: Machine code sinking
; CHECK-NEXT: Peephole Optimizations ; CHECK-NEXT: Peephole Optimizations
; CHECK-NEXT: Remove dead machine instructions ; CHECK-NEXT: Remove dead machine instructions
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llvm/test/CodeGen/X86/opt-pipeline.ll

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; CHECK-NEXT: Machine Natural Loop Construction ; CHECK-NEXT: Machine Natural Loop Construction
; CHECK-NEXT: Machine Trace Metrics ; CHECK-NEXT: Machine Trace Metrics
; CHECK-NEXT: Early If-Conversion ; CHECK-NEXT: Early If-Conversion
; CHECK-NEXT: Lazy Machine Block Frequency Analysis ; CHECK-NEXT: Lazy Machine Block Frequency Analysis
; CHECK-NEXT: Machine InstCombiner ; CHECK-NEXT: Machine InstCombiner
; CHECK-NEXT: X86 cmov Conversion ; CHECK-NEXT: X86 cmov Conversion
; CHECK-NEXT: MachineDominator Tree Construction ; CHECK-NEXT: MachineDominator Tree Construction
; CHECK-NEXT: Machine Natural Loop Construction ; CHECK-NEXT: Machine Natural Loop Construction
; CHECK-NEXT: Machine Block Frequency Analysis
; CHECK-NEXT: Early Machine Loop Invariant Code Motion ; CHECK-NEXT: Early Machine Loop Invariant Code Motion
; CHECK-NEXT: MachineDominator Tree Construction ; CHECK-NEXT: MachineDominator Tree Construction
; CHECK-NEXT: Machine Block Frequency Analysis ; CHECK-NEXT: Machine Block Frequency Analysis
; CHECK-NEXT: Machine Common Subexpression Elimination ; CHECK-NEXT: Machine Common Subexpression Elimination
; CHECK-NEXT: MachinePostDominator Tree Construction ; CHECK-NEXT: MachinePostDominator Tree Construction
; CHECK-NEXT: Machine code sinking ; CHECK-NEXT: Machine code sinking
; CHECK-NEXT: Peephole Optimizations ; CHECK-NEXT: Peephole Optimizations
; CHECK-NEXT: Remove dead machine instructions ; CHECK-NEXT: Remove dead machine instructions
▲ Show 20 Lines • Show All 97 Lines • Show Last 20 Lines