diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h @@ -166,6 +166,9 @@ return false; Type *Ty = cast(DataType)->getElementType(); + if (Ty->isPointerTy()) + return true; + if (Ty->isBFloatTy() || Ty->isHalfTy() || Ty->isFloatTy() || Ty->isDoubleTy()) return true; diff --git a/llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll b/llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll --- a/llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll +++ b/llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll @@ -188,6 +188,94 @@ ret void } +; +; Masked load store of pointer data type +; + +; Pointer of integer type + +define @masked.load.nxv2p0i8(* %vector_ptr, %mask) nounwind { +; CHECK-LABEL: masked.load.nxv2p0i8: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0] +; CHECK-NEXT: ret + %v = call @llvm.masked.load.nxv2p0i8.p0nxv2p0i8(* %vector_ptr, i32 8, %mask, undef) + ret %v +} +define @masked.load.nxv2p0i16(* %vector_ptr, %mask) nounwind { +; CHECK-LABEL: masked.load.nxv2p0i16: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0] +; CHECK-NEXT: ret + %v = call @llvm.masked.load.nxv2p0i16.p0nxv2p0i16(* %vector_ptr, i32 8, %mask, undef) + ret %v +} +define @masked.load.nxv2p0i32(* %vector_ptr, %mask) nounwind { +; CHECK-LABEL: masked.load.nxv2p0i32: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0] +; CHECK-NEXT: ret + %v = call @llvm.masked.load.nxv2p0i32.p0nxv2p0i32(* %vector_ptr, i32 8, %mask, undef) + ret %v +} +define @masked.load.nxv2p0i64(* %vector_ptr, %mask) nounwind { +; CHECK-LABEL: masked.load.nxv2p0i64: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0] +; CHECK-NEXT: ret + %v = call @llvm.masked.load.nxv2p0i64.p0nxv2p0i64(* %vector_ptr, i32 8, %mask, undef) + ret %v +} + +; Pointer of floating-point type + +define @masked.load.nxv2p0bf16(* %vector_ptr, %mask) nounwind #0 { +; CHECK-LABEL: masked.load.nxv2p0bf16: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0] +; CHECK-NEXT: ret + %v = call @llvm.masked.load.nxv2p0bf16.p0nxv2p0bf16(* %vector_ptr, i32 8, %mask, undef) + ret %v +} +define @masked.load.nxv2p0f16(* %vector_ptr, %mask) nounwind { +; CHECK-LABEL: masked.load.nxv2p0f16: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0] +; CHECK-NEXT: ret + %v = call @llvm.masked.load.nxv2p0f16.p0nxv2p0f16(* %vector_ptr, i32 8, %mask, undef) + ret %v +} +define @masked.load.nxv2p0f32(* %vector_ptr, %mask) nounwind { +; CHECK-LABEL: masked.load.nxv2p0f32: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0] +; CHECK-NEXT: ret + %v = call @llvm.masked.load.nxv2p0f32.p0nxv2p0f32(* %vector_ptr, i32 8, %mask, undef) + ret %v +} +define @masked.load.nxv2p0f64(* %vector_ptr, %mask) nounwind { +; CHECK-LABEL: masked.load.nxv2p0f64: +; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0] +; CHECK-NEXT: ret + %v = call @llvm.masked.load.nxv2p0f64.p0nxv2p0f64(* %vector_ptr, i32 8, %mask, undef) + ret %v +} + +; Pointer of array type + +define void @masked.store.nxv2p0a64i16( %data, * %vector_ptr, %mask) nounwind { +; CHECK-LABEL: masked.store.nxv2p0a64i16: +; CHECK-NEXT: st1d { z0.d }, p0, [x0] +; CHECK-NEXT: ret + call void @llvm.masked.store.nxv2p0a64i16.p0nxv2p0a64i16( %data, * %vector_ptr, i32 8, %mask) + ret void +} + +; Pointer of struct type + +%struct = type { i8*, i32 } +define void @masked.store.nxv2p0s_struct( %data, * %vector_ptr, %mask) nounwind { +; CHECK-LABEL: masked.store.nxv2p0s_struct: +; CHECK-NEXT: st1d { z0.d }, p0, [x0] +; CHECK-NEXT: ret + call void @llvm.masked.store.nxv2p0s_struct.p0nxv2p0s_struct( %data, * %vector_ptr, i32 8, %mask) + ret void +} + + declare @llvm.masked.load.nxv2i64(*, i32, , ) declare @llvm.masked.load.nxv4i32(*, i32, , ) declare @llvm.masked.load.nxv8i16(*, i32, , ) @@ -214,5 +302,19 @@ declare void @llvm.masked.store.nxv8f16(, *, i32, ) declare void @llvm.masked.store.nxv8bf16(, *, i32, ) +declare @llvm.masked.load.nxv2p0i8.p0nxv2p0i8(*, i32 immarg, , ) +declare @llvm.masked.load.nxv2p0i16.p0nxv2p0i16(*, i32 immarg, , ) +declare @llvm.masked.load.nxv2p0i32.p0nxv2p0i32(*, i32 immarg, , ) +declare @llvm.masked.load.nxv2p0i64.p0nxv2p0i64(*, i32 immarg, , ) + +declare @llvm.masked.load.nxv2p0bf16.p0nxv2p0bf16(*, i32 immarg, , ) +declare @llvm.masked.load.nxv2p0f16.p0nxv2p0f16(*, i32 immarg, , ) +declare @llvm.masked.load.nxv2p0f32.p0nxv2p0f32(*, i32 immarg, , ) +declare @llvm.masked.load.nxv2p0f64.p0nxv2p0f64(*, i32 immarg, , ) + +declare void @llvm.masked.store.nxv2p0a64i16.p0nxv2p0a64i16(, *, i32 immarg, ) + +declare void @llvm.masked.store.nxv2p0s_struct.p0nxv2p0s_struct(, *, i32 immarg, ) + ; +bf16 is required for the bfloat version. attributes #0 = { "target-features"="+sve,+bf16" }