[X86] Parse and ignore .arch directives

[MaskRay]

Summary

We parse .arch so that some .arch i386; .code32 code can assemble. It seems
that X86AsmParser does not do a good job tracking what features are needed to
assemble instructions. GNU as's x86 port supports a very wide range of .arch
operands. Ignore the operand for now.

So we simply ignore .arch for now

[MaskRay]

a

[craig.topper]

llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp

4058

I don't think the assembler's arch list matches the frontend -march list which is what parseArchX86 contains. Here's some docs for .arch https://sourceware.org/binutils/docs-2.31/as/i386_002dArch.html X86::parseArchX86 does not support i8086, i186, i286 and many others. It also looks like .arch can take features like .sse

[MaskRay]

Ignore the operand

[MaskRay]

llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp

4058

Thanks. Let's ignore the operand for now.

The newer documentation is at
https://sourceware.org/binutils/docs/as/i386_002dArch.html#i386_002dArch

I find a few allowed values by looking at gas testsuite.

[MaskRay]

Delete unused include

[craig.topper]

LGTM

llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp

private:
 
   bool ParseIntelMemoryOperandSize(unsigned &Size);
   std::unique_ptr<X86Operand>
   CreateMemForMSInlineAsm(unsigned SegReg, const MCExpr *Disp, unsigned BaseReg,
                           unsigned IndexReg, unsigned Scale, SMLoc Start,
                           SMLoc End, unsigned Size, StringRef Identifier,
                           const InlineAsmIdentifierInfo &Info);
 
+  bool parseDirectiveArch();
   bool parseDirectiveEven(SMLoc L);
   bool ParseDirectiveCode(StringRef IDVal, SMLoc L);
 
   /// CodeView FPO data directives.
   bool parseDirectiveFPOProc(SMLoc L);
   bool parseDirectiveFPOSetFrame(SMLoc L);
   bool parseDirectiveFPOPushReg(SMLoc L);
   bool parseDirectiveFPOStackAlloc(SMLoc L);

 
 bool X86AsmParser::OmitRegisterFromClobberLists(unsigned RegNo) {
   return X86MCRegisterClasses[X86::SEGMENT_REGRegClassID].contains(RegNo);
 }
 
 bool X86AsmParser::ParseDirective(AsmToken DirectiveID) {
   MCAsmParser &Parser = getParser();
   StringRef IDVal = DirectiveID.getIdentifier();
+  if (IDVal.startswith(".arch"))
+    return parseDirectiveArch();
   if (IDVal.startswith(".code"))
     return ParseDirectiveCode(IDVal, DirectiveID.getLoc());
   else if (IDVal.startswith(".att_syntax")) {
     if (getLexer().isNot(AsmToken::EndOfStatement)) {
       if (Parser.getTok().getString() == "prefix")
         Parser.Lex();
       else if (Parser.getTok().getString() == "noprefix")
         return Error(DirectiveID.getLoc(), "'.att_syntax noprefix' is not "
bool X86AsmParser::ParseDirective(AsmToken DirectiveID) {
   else if (IDVal == ".seh_savexmm")
     return parseDirectiveSEHSaveXMM(DirectiveID.getLoc());
   else if (IDVal == ".seh_pushframe")
     return parseDirectiveSEHPushFrame(DirectiveID.getLoc());
 
   return true;
 }
 
+bool X86AsmParser::parseDirectiveArch() {
+  // Ignore .arch for now.
+  getParser().parseStringToEndOfStatement();
+  return false;
+}
+
 /// parseDirectiveEven
 ///  ::= .even
 bool X86AsmParser::parseDirectiveEven(SMLoc L) {
   if (parseToken(AsmToken::EndOfStatement, "unexpected token in directive"))
     return false;
 
   const MCSection *Section = getStreamer().getCurrentSectionOnly();
   if (!Section) {

llvm/test/MC/X86/directive-arch.s

+## We currently parse but ignore .arch directives.
+# RUN: llvm-mc -triple=x86_64 %s | FileCheck /dev/null --implicit-check-not=.arch
+
+.arch i286
+.arch generic32
+
+.arch .avx512vl
+.arch .noavx512bw
+.arch .nop
+.arch .sse4.2