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Differential D84313

AMDGPU: global_atomic_csub is not always dereferenceable
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Authored by arsenm on Jul 22 2020, 5:26 AM.

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kzhuravl
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arsenm created this revision.Jul 22 2020, 5:26 AM

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LGTM

This revision is now accepted and ready to land.Jul 27 2020, 2:10 AM

8b81d0633f1ebaf1392e6509b34694de05c94de7

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Size

llvm/

lib/

Target/

AMDGPU/

SIISelLowering.cpp

1 line

Diff 279782

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

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	Show First 20 Lines • Show All 1,131 Lines • ▼ Show 20 Lines		bool SITargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
	}			}
	case Intrinsic::amdgcn_global_atomic_csub: {			case Intrinsic::amdgcn_global_atomic_csub: {
	Info.opc = ISD::INTRINSIC_W_CHAIN;			Info.opc = ISD::INTRINSIC_W_CHAIN;
	Info.memVT = MVT::getVT(CI.getType());			Info.memVT = MVT::getVT(CI.getType());
	Info.ptrVal = CI.getOperand(0);			Info.ptrVal = CI.getOperand(0);
	Info.align.reset();			Info.align.reset();
	Info.flags = MachineMemOperand::MOLoad \|			Info.flags = MachineMemOperand::MOLoad \|
	MachineMemOperand::MOStore \|			MachineMemOperand::MOStore \|
	MachineMemOperand::MODereferenceable \|
	MachineMemOperand::MOVolatile;			MachineMemOperand::MOVolatile;
	return true;			return true;
	}			}
	case Intrinsic::amdgcn_ds_gws_init:			case Intrinsic::amdgcn_ds_gws_init:
	case Intrinsic::amdgcn_ds_gws_barrier:			case Intrinsic::amdgcn_ds_gws_barrier:
	case Intrinsic::amdgcn_ds_gws_sema_v:			case Intrinsic::amdgcn_ds_gws_sema_v:
	case Intrinsic::amdgcn_ds_gws_sema_br:			case Intrinsic::amdgcn_ds_gws_sema_br:
	case Intrinsic::amdgcn_ds_gws_sema_p:			case Intrinsic::amdgcn_ds_gws_sema_p:
	▲ Show 20 Lines • Show All 10,572 Lines • Show Last 20 Lines