Index: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp =================================================================== --- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -661,6 +661,7 @@ FPToI.minScalar(1, S32); FPToI.minScalar(0, S32) + .minScalar(1, S32) .scalarize(0) .lower(); Index: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir =================================================================== --- llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir +++ llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir @@ -587,3 +587,232 @@ %1:_(<2 x s64>) = G_FPTOSI %0 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 ... + +--- +name: test_fptosi_s16_to_s64 +body: | + bb.0: + liveins: $vgpr0 + + ; SI-LABEL: name: test_fptosi_s16_to_s64 + ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) + ; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) + ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2139095040 + ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 23 + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C]] + ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32) + ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648 + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C2]] + ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 31 + ; SI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND1]], [[C3]](s32) + ; SI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[ASHR]](s32) + ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388607 + ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C4]] + ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388608 + ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[C5]] + ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[OR]](s32) + ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 127 + ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LSHR]], [[C6]] + ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C1]] + ; SI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SUB]] + ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[SUB1]](s32) + ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT]], [[SUB2]](s32) + ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C1]] + ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[LSHR1]] + ; SI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[SELECT]], [[SEXT]] + ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64) + ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT]](s64) + ; SI: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]] + ; SI: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]] + ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32) + ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 + ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C7]] + ; SI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 + ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[C8]], [[MV]] + ; SI: $vgpr0_vgpr1 = COPY [[SELECT1]](s64) + ; VI-LABEL: name: test_fptosi_s16_to_s64 + ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 + ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) + ; VI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) + ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2139095040 + ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 23 + ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C]] + ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32) + ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648 + ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C2]] + ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 31 + ; VI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND1]], [[C3]](s32) + ; VI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[ASHR]](s32) + ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388607 + ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C4]] + ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388608 + ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[C5]] + ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[OR]](s32) + ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 127 + ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LSHR]], [[C6]] + ; VI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C1]] + ; VI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SUB]] + ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[SUB1]](s32) + ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT]], [[SUB2]](s32) + ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C1]] + ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[LSHR1]] + ; VI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[SELECT]], [[SEXT]] + ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64) + ; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT]](s64) + ; VI: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]] + ; VI: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]] + ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32) + ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 + ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C7]] + ; VI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 + ; VI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[C8]], [[MV]] + ; VI: $vgpr0_vgpr1 = COPY [[SELECT1]](s64) + %0:_(s32) = COPY $vgpr0 + %1:_(s16) = G_TRUNC %0 + %2:_(s64) = G_FPTOSI %1 + $vgpr0_vgpr1 = COPY %2 +... + +--- +name: test_fptosi_v2s16_to_v2s64 +body: | + bb.0: + liveins: $vgpr0 + + ; SI-LABEL: name: test_fptosi_v2s16_to_v2s64 + ; SI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 + ; SI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32) + ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) + ; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) + ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2139095040 + ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 23 + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C1]] + ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C2]](s32) + ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648 + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C3]] + ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 31 + ; SI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND1]], [[C4]](s32) + ; SI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[ASHR]](s32) + ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388607 + ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C5]] + ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388608 + ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[C6]] + ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[OR]](s32) + ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 127 + ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LSHR1]], [[C7]] + ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] + ; SI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] + ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[SUB1]](s32) + ; SI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT]], [[SUB2]](s32) + ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C2]] + ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[LSHR2]] + ; SI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[SELECT]], [[SEXT]] + ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64) + ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT]](s64) + ; SI: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]] + ; SI: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]] + ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32) + ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 + ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C8]] + ; SI: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 + ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[C9]], [[MV]] + ; SI: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16) + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[FPEXT1]], [[C1]] + ; SI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[AND3]], [[C2]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[FPEXT1]], [[C3]] + ; SI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[AND4]], [[C4]](s32) + ; SI: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[ASHR1]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[FPEXT1]], [[C5]] + ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND5]], [[C6]] + ; SI: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[OR1]](s32) + ; SI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[LSHR3]], [[C7]] + ; SI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[SUB3]], [[C2]] + ; SI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB3]] + ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[ZEXT1]], [[SUB4]](s32) + ; SI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT1]], [[SUB5]](s32) + ; SI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB3]](s32), [[C2]] + ; SI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL1]], [[LSHR4]] + ; SI: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[SELECT2]], [[SEXT1]] + ; SI: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR1]](s64) + ; SI: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT1]](s64) + ; SI: [[USUBO2:%[0-9]+]]:_(s32), [[USUBO3:%[0-9]+]]:_(s1) = G_USUBO [[UV4]], [[UV6]] + ; SI: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s1) = G_USUBE [[UV5]], [[UV7]], [[USUBO3]] + ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO2]](s32), [[USUBE2]](s32) + ; SI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB3]](s32), [[C8]] + ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[C9]], [[MV1]] + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SELECT1]](s64), [[SELECT3]](s64) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) + ; VI-LABEL: name: test_fptosi_v2s16_to_v2s64 + ; VI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 + ; VI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) + ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32) + ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) + ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) + ; VI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) + ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2139095040 + ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 23 + ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C1]] + ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C2]](s32) + ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648 + ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C3]] + ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 31 + ; VI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND1]], [[C4]](s32) + ; VI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[ASHR]](s32) + ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388607 + ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C5]] + ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388608 + ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[C6]] + ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[OR]](s32) + ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 127 + ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LSHR1]], [[C7]] + ; VI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] + ; VI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] + ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[SUB1]](s32) + ; VI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT]], [[SUB2]](s32) + ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C2]] + ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[LSHR2]] + ; VI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[SELECT]], [[SEXT]] + ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64) + ; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT]](s64) + ; VI: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]] + ; VI: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]] + ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32) + ; VI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 + ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C8]] + ; VI: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 + ; VI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[C9]], [[MV]] + ; VI: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16) + ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[FPEXT1]], [[C1]] + ; VI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[AND3]], [[C2]](s32) + ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[FPEXT1]], [[C3]] + ; VI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[AND4]], [[C4]](s32) + ; VI: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[ASHR1]](s32) + ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[FPEXT1]], [[C5]] + ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND5]], [[C6]] + ; VI: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[OR1]](s32) + ; VI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[LSHR3]], [[C7]] + ; VI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[SUB3]], [[C2]] + ; VI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB3]] + ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[ZEXT1]], [[SUB4]](s32) + ; VI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT1]], [[SUB5]](s32) + ; VI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB3]](s32), [[C2]] + ; VI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL1]], [[LSHR4]] + ; VI: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[SELECT2]], [[SEXT1]] + ; VI: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR1]](s64) + ; VI: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT1]](s64) + ; VI: [[USUBO2:%[0-9]+]]:_(s32), [[USUBO3:%[0-9]+]]:_(s1) = G_USUBO [[UV4]], [[UV6]] + ; VI: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s1) = G_USUBE [[UV5]], [[UV7]], [[USUBO3]] + ; VI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO2]](s32), [[USUBE2]](s32) + ; VI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB3]](s32), [[C8]] + ; VI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[C9]], [[MV1]] + ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SELECT1]](s64), [[SELECT3]](s64) + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) + %0:_(<2 x s16>) = COPY $vgpr0 + %1:_(<2 x s64>) = G_FPTOSI %0 + $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 +... Index: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir =================================================================== --- llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir +++ llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir @@ -757,3 +757,402 @@ %1:_(<2 x s64>) = G_FPTOUI %0 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 ... + +--- +name: test_fptoui_s16_to_s64 +body: | + bb.0: + liveins: $vgpr0 + + ; SI-LABEL: name: test_fptoui_s16_to_s64 + ; SI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) + ; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) + ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2139095040 + ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 23 + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C]] + ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32) + ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648 + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C2]] + ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 31 + ; SI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND1]], [[C3]](s32) + ; SI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[ASHR]](s32) + ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388607 + ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C4]] + ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388608 + ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[C5]] + ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[OR]](s32) + ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 127 + ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LSHR]], [[C6]] + ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C1]] + ; SI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SUB]] + ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[SUB1]](s32) + ; SI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT]], [[SUB2]](s32) + ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C1]] + ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[LSHR1]] + ; SI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[SELECT]], [[SEXT]] + ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64) + ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT]](s64) + ; SI: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]] + ; SI: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]] + ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32) + ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 + ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C7]] + ; SI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 + ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[C8]], [[MV]] + ; SI: [[C9:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x43E0000000000000 + ; SI: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[FPEXT]], [[C9]] + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[FSUB]], [[C]] + ; SI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[AND3]], [[C1]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[FSUB]], [[C2]] + ; SI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[AND4]], [[C3]](s32) + ; SI: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[ASHR1]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[FSUB]], [[C4]] + ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND5]], [[C5]] + ; SI: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[OR1]](s32) + ; SI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[LSHR2]], [[C6]] + ; SI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[SUB3]], [[C1]] + ; SI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SUB3]] + ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[ZEXT1]], [[SUB4]](s32) + ; SI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT1]], [[SUB5]](s32) + ; SI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB3]](s32), [[C1]] + ; SI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL1]], [[LSHR3]] + ; SI: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[SELECT2]], [[SEXT1]] + ; SI: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR1]](s64) + ; SI: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT1]](s64) + ; SI: [[USUBO2:%[0-9]+]]:_(s32), [[USUBO3:%[0-9]+]]:_(s1) = G_USUBO [[UV4]], [[UV6]] + ; SI: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s1) = G_USUBE [[UV5]], [[UV7]], [[USUBO3]] + ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO2]](s32), [[USUBE2]](s32) + ; SI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB3]](s32), [[C7]] + ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[C8]], [[MV1]] + ; SI: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808 + ; SI: [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[SELECT3]], [[C10]] + ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ult), [[FPEXT]](s32), [[C9]] + ; SI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[SELECT1]], [[XOR2]] + ; SI: $vgpr0_vgpr1 = COPY [[SELECT4]](s64) + ; VI-LABEL: name: test_fptoui_s16_to_s64 + ; VI: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 + ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) + ; VI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) + ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2139095040 + ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 23 + ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C]] + ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C1]](s32) + ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648 + ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C2]] + ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 31 + ; VI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND1]], [[C3]](s32) + ; VI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[ASHR]](s32) + ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388607 + ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C4]] + ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388608 + ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[C5]] + ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[OR]](s32) + ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 127 + ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LSHR]], [[C6]] + ; VI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C1]] + ; VI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SUB]] + ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[SUB1]](s32) + ; VI: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT]], [[SUB2]](s32) + ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C1]] + ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[LSHR1]] + ; VI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[SELECT]], [[SEXT]] + ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64) + ; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT]](s64) + ; VI: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]] + ; VI: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]] + ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32) + ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 + ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C7]] + ; VI: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 + ; VI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[C8]], [[MV]] + ; VI: [[C9:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x43E0000000000000 + ; VI: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[FPEXT]], [[C9]] + ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[FSUB]], [[C]] + ; VI: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[AND3]], [[C1]](s32) + ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[FSUB]], [[C2]] + ; VI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[AND4]], [[C3]](s32) + ; VI: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[ASHR1]](s32) + ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[FSUB]], [[C4]] + ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND5]], [[C5]] + ; VI: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[OR1]](s32) + ; VI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[LSHR2]], [[C6]] + ; VI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[SUB3]], [[C1]] + ; VI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[SUB3]] + ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[ZEXT1]], [[SUB4]](s32) + ; VI: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT1]], [[SUB5]](s32) + ; VI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB3]](s32), [[C1]] + ; VI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL1]], [[LSHR3]] + ; VI: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[SELECT2]], [[SEXT1]] + ; VI: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR1]](s64) + ; VI: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT1]](s64) + ; VI: [[USUBO2:%[0-9]+]]:_(s32), [[USUBO3:%[0-9]+]]:_(s1) = G_USUBO [[UV4]], [[UV6]] + ; VI: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s1) = G_USUBE [[UV5]], [[UV7]], [[USUBO3]] + ; VI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO2]](s32), [[USUBE2]](s32) + ; VI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB3]](s32), [[C7]] + ; VI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[C8]], [[MV1]] + ; VI: [[C10:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808 + ; VI: [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[SELECT3]], [[C10]] + ; VI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ult), [[FPEXT]](s32), [[C9]] + ; VI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[SELECT1]], [[XOR2]] + ; VI: $vgpr0_vgpr1 = COPY [[SELECT4]](s64) + %0:_(s32) = COPY $vgpr0 + %1:_(s16) = G_TRUNC %0 + %2:_(s64) = G_FPTOUI %1 + $vgpr0_vgpr1 = COPY %2 +... + +--- +name: test_fptoui_v2s16_to_v2s64 +body: | + bb.0: + liveins: $vgpr0 + + ; SI-LABEL: name: test_fptoui_v2s16_to_v2s64 + ; SI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 + ; SI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) + ; SI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32) + ; SI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; SI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) + ; SI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) + ; SI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) + ; SI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2139095040 + ; SI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 23 + ; SI: [[AND:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C1]] + ; SI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C2]](s32) + ; SI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648 + ; SI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C3]] + ; SI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 31 + ; SI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND1]], [[C4]](s32) + ; SI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[ASHR]](s32) + ; SI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388607 + ; SI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C5]] + ; SI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388608 + ; SI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[C6]] + ; SI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[OR]](s32) + ; SI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 127 + ; SI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LSHR1]], [[C7]] + ; SI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] + ; SI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] + ; SI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[SUB1]](s32) + ; SI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT]], [[SUB2]](s32) + ; SI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C2]] + ; SI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[LSHR2]] + ; SI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[SELECT]], [[SEXT]] + ; SI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64) + ; SI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT]](s64) + ; SI: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]] + ; SI: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]] + ; SI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32) + ; SI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 + ; SI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C8]] + ; SI: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 + ; SI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[C9]], [[MV]] + ; SI: [[C10:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x43E0000000000000 + ; SI: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[FPEXT]], [[C10]] + ; SI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[FSUB]], [[C1]] + ; SI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[AND3]], [[C2]](s32) + ; SI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[FSUB]], [[C3]] + ; SI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[AND4]], [[C4]](s32) + ; SI: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[ASHR1]](s32) + ; SI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[FSUB]], [[C5]] + ; SI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND5]], [[C6]] + ; SI: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[OR1]](s32) + ; SI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[LSHR3]], [[C7]] + ; SI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[SUB3]], [[C2]] + ; SI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB3]] + ; SI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[ZEXT1]], [[SUB4]](s32) + ; SI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT1]], [[SUB5]](s32) + ; SI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB3]](s32), [[C2]] + ; SI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL1]], [[LSHR4]] + ; SI: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[SELECT2]], [[SEXT1]] + ; SI: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR1]](s64) + ; SI: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT1]](s64) + ; SI: [[USUBO2:%[0-9]+]]:_(s32), [[USUBO3:%[0-9]+]]:_(s1) = G_USUBO [[UV4]], [[UV6]] + ; SI: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s1) = G_USUBE [[UV5]], [[UV7]], [[USUBO3]] + ; SI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO2]](s32), [[USUBE2]](s32) + ; SI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB3]](s32), [[C8]] + ; SI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[C9]], [[MV1]] + ; SI: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808 + ; SI: [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[SELECT3]], [[C11]] + ; SI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ult), [[FPEXT]](s32), [[C10]] + ; SI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[SELECT1]], [[XOR2]] + ; SI: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16) + ; SI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[FPEXT1]], [[C1]] + ; SI: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[AND6]], [[C2]](s32) + ; SI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[FPEXT1]], [[C3]] + ; SI: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[AND7]], [[C4]](s32) + ; SI: [[SEXT2:%[0-9]+]]:_(s64) = G_SEXT [[ASHR2]](s32) + ; SI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[FPEXT1]], [[C5]] + ; SI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[C6]] + ; SI: [[ZEXT2:%[0-9]+]]:_(s64) = G_ZEXT [[OR2]](s32) + ; SI: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[LSHR5]], [[C7]] + ; SI: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[SUB6]], [[C2]] + ; SI: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB6]] + ; SI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[ZEXT2]], [[SUB7]](s32) + ; SI: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT2]], [[SUB8]](s32) + ; SI: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB6]](s32), [[C2]] + ; SI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[SHL2]], [[LSHR6]] + ; SI: [[XOR3:%[0-9]+]]:_(s64) = G_XOR [[SELECT5]], [[SEXT2]] + ; SI: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR3]](s64) + ; SI: [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT2]](s64) + ; SI: [[USUBO4:%[0-9]+]]:_(s32), [[USUBO5:%[0-9]+]]:_(s1) = G_USUBO [[UV8]], [[UV10]] + ; SI: [[USUBE4:%[0-9]+]]:_(s32), [[USUBE5:%[0-9]+]]:_(s1) = G_USUBE [[UV9]], [[UV11]], [[USUBO5]] + ; SI: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO4]](s32), [[USUBE4]](s32) + ; SI: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB6]](s32), [[C8]] + ; SI: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[C9]], [[MV2]] + ; SI: [[FSUB1:%[0-9]+]]:_(s32) = G_FSUB [[FPEXT1]], [[C10]] + ; SI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[FSUB1]], [[C1]] + ; SI: [[LSHR7:%[0-9]+]]:_(s32) = G_LSHR [[AND9]], [[C2]](s32) + ; SI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[FSUB1]], [[C3]] + ; SI: [[ASHR3:%[0-9]+]]:_(s32) = G_ASHR [[AND10]], [[C4]](s32) + ; SI: [[SEXT3:%[0-9]+]]:_(s64) = G_SEXT [[ASHR3]](s32) + ; SI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[FSUB1]], [[C5]] + ; SI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND11]], [[C6]] + ; SI: [[ZEXT3:%[0-9]+]]:_(s64) = G_ZEXT [[OR3]](s32) + ; SI: [[SUB9:%[0-9]+]]:_(s32) = G_SUB [[LSHR7]], [[C7]] + ; SI: [[SUB10:%[0-9]+]]:_(s32) = G_SUB [[SUB9]], [[C2]] + ; SI: [[SUB11:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB9]] + ; SI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[ZEXT3]], [[SUB10]](s32) + ; SI: [[LSHR8:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT3]], [[SUB11]](s32) + ; SI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB9]](s32), [[C2]] + ; SI: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[SHL3]], [[LSHR8]] + ; SI: [[XOR4:%[0-9]+]]:_(s64) = G_XOR [[SELECT7]], [[SEXT3]] + ; SI: [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR4]](s64) + ; SI: [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT3]](s64) + ; SI: [[USUBO6:%[0-9]+]]:_(s32), [[USUBO7:%[0-9]+]]:_(s1) = G_USUBO [[UV12]], [[UV14]] + ; SI: [[USUBE6:%[0-9]+]]:_(s32), [[USUBE7:%[0-9]+]]:_(s1) = G_USUBE [[UV13]], [[UV15]], [[USUBO7]] + ; SI: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO6]](s32), [[USUBE6]](s32) + ; SI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB9]](s32), [[C8]] + ; SI: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[C9]], [[MV3]] + ; SI: [[XOR5:%[0-9]+]]:_(s64) = G_XOR [[SELECT8]], [[C11]] + ; SI: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(ult), [[FPEXT1]](s32), [[C10]] + ; SI: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[FCMP1]](s1), [[SELECT6]], [[XOR5]] + ; SI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SELECT4]](s64), [[SELECT9]](s64) + ; SI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) + ; VI-LABEL: name: test_fptoui_v2s16_to_v2s64 + ; VI: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 + ; VI: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) + ; VI: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[BITCAST]](s32) + ; VI: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 + ; VI: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) + ; VI: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[LSHR]](s32) + ; VI: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) + ; VI: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2139095040 + ; VI: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 23 + ; VI: [[AND:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C1]] + ; VI: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C2]](s32) + ; VI: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648 + ; VI: [[AND1:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C3]] + ; VI: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 31 + ; VI: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[AND1]], [[C4]](s32) + ; VI: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[ASHR]](s32) + ; VI: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388607 + ; VI: [[AND2:%[0-9]+]]:_(s32) = G_AND [[FPEXT]], [[C5]] + ; VI: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388608 + ; VI: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[C6]] + ; VI: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[OR]](s32) + ; VI: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 127 + ; VI: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LSHR1]], [[C7]] + ; VI: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[SUB]], [[C2]] + ; VI: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB]] + ; VI: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ZEXT]], [[SUB1]](s32) + ; VI: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT]], [[SUB2]](s32) + ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB]](s32), [[C2]] + ; VI: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[SHL]], [[LSHR2]] + ; VI: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[SELECT]], [[SEXT]] + ; VI: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR]](s64) + ; VI: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT]](s64) + ; VI: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]] + ; VI: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]] + ; VI: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32) + ; VI: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 + ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB]](s32), [[C8]] + ; VI: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 + ; VI: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP1]](s1), [[C9]], [[MV]] + ; VI: [[C10:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x43E0000000000000 + ; VI: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[FPEXT]], [[C10]] + ; VI: [[AND3:%[0-9]+]]:_(s32) = G_AND [[FSUB]], [[C1]] + ; VI: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR [[AND3]], [[C2]](s32) + ; VI: [[AND4:%[0-9]+]]:_(s32) = G_AND [[FSUB]], [[C3]] + ; VI: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[AND4]], [[C4]](s32) + ; VI: [[SEXT1:%[0-9]+]]:_(s64) = G_SEXT [[ASHR1]](s32) + ; VI: [[AND5:%[0-9]+]]:_(s32) = G_AND [[FSUB]], [[C5]] + ; VI: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND5]], [[C6]] + ; VI: [[ZEXT1:%[0-9]+]]:_(s64) = G_ZEXT [[OR1]](s32) + ; VI: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[LSHR3]], [[C7]] + ; VI: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[SUB3]], [[C2]] + ; VI: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB3]] + ; VI: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[ZEXT1]], [[SUB4]](s32) + ; VI: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT1]], [[SUB5]](s32) + ; VI: [[ICMP2:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB3]](s32), [[C2]] + ; VI: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s1), [[SHL1]], [[LSHR4]] + ; VI: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[SELECT2]], [[SEXT1]] + ; VI: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR1]](s64) + ; VI: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT1]](s64) + ; VI: [[USUBO2:%[0-9]+]]:_(s32), [[USUBO3:%[0-9]+]]:_(s1) = G_USUBO [[UV4]], [[UV6]] + ; VI: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s1) = G_USUBE [[UV5]], [[UV7]], [[USUBO3]] + ; VI: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO2]](s32), [[USUBE2]](s32) + ; VI: [[ICMP3:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB3]](s32), [[C8]] + ; VI: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[ICMP3]](s1), [[C9]], [[MV1]] + ; VI: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 -9223372036854775808 + ; VI: [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[SELECT3]], [[C11]] + ; VI: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(ult), [[FPEXT]](s32), [[C10]] + ; VI: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[SELECT1]], [[XOR2]] + ; VI: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16) + ; VI: [[AND6:%[0-9]+]]:_(s32) = G_AND [[FPEXT1]], [[C1]] + ; VI: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR [[AND6]], [[C2]](s32) + ; VI: [[AND7:%[0-9]+]]:_(s32) = G_AND [[FPEXT1]], [[C3]] + ; VI: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[AND7]], [[C4]](s32) + ; VI: [[SEXT2:%[0-9]+]]:_(s64) = G_SEXT [[ASHR2]](s32) + ; VI: [[AND8:%[0-9]+]]:_(s32) = G_AND [[FPEXT1]], [[C5]] + ; VI: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[C6]] + ; VI: [[ZEXT2:%[0-9]+]]:_(s64) = G_ZEXT [[OR2]](s32) + ; VI: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[LSHR5]], [[C7]] + ; VI: [[SUB7:%[0-9]+]]:_(s32) = G_SUB [[SUB6]], [[C2]] + ; VI: [[SUB8:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB6]] + ; VI: [[SHL2:%[0-9]+]]:_(s64) = G_SHL [[ZEXT2]], [[SUB7]](s32) + ; VI: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT2]], [[SUB8]](s32) + ; VI: [[ICMP4:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB6]](s32), [[C2]] + ; VI: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[ICMP4]](s1), [[SHL2]], [[LSHR6]] + ; VI: [[XOR3:%[0-9]+]]:_(s64) = G_XOR [[SELECT5]], [[SEXT2]] + ; VI: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR3]](s64) + ; VI: [[UV10:%[0-9]+]]:_(s32), [[UV11:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT2]](s64) + ; VI: [[USUBO4:%[0-9]+]]:_(s32), [[USUBO5:%[0-9]+]]:_(s1) = G_USUBO [[UV8]], [[UV10]] + ; VI: [[USUBE4:%[0-9]+]]:_(s32), [[USUBE5:%[0-9]+]]:_(s1) = G_USUBE [[UV9]], [[UV11]], [[USUBO5]] + ; VI: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO4]](s32), [[USUBE4]](s32) + ; VI: [[ICMP5:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB6]](s32), [[C8]] + ; VI: [[SELECT6:%[0-9]+]]:_(s64) = G_SELECT [[ICMP5]](s1), [[C9]], [[MV2]] + ; VI: [[FSUB1:%[0-9]+]]:_(s32) = G_FSUB [[FPEXT1]], [[C10]] + ; VI: [[AND9:%[0-9]+]]:_(s32) = G_AND [[FSUB1]], [[C1]] + ; VI: [[LSHR7:%[0-9]+]]:_(s32) = G_LSHR [[AND9]], [[C2]](s32) + ; VI: [[AND10:%[0-9]+]]:_(s32) = G_AND [[FSUB1]], [[C3]] + ; VI: [[ASHR3:%[0-9]+]]:_(s32) = G_ASHR [[AND10]], [[C4]](s32) + ; VI: [[SEXT3:%[0-9]+]]:_(s64) = G_SEXT [[ASHR3]](s32) + ; VI: [[AND11:%[0-9]+]]:_(s32) = G_AND [[FSUB1]], [[C5]] + ; VI: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND11]], [[C6]] + ; VI: [[ZEXT3:%[0-9]+]]:_(s64) = G_ZEXT [[OR3]](s32) + ; VI: [[SUB9:%[0-9]+]]:_(s32) = G_SUB [[LSHR7]], [[C7]] + ; VI: [[SUB10:%[0-9]+]]:_(s32) = G_SUB [[SUB9]], [[C2]] + ; VI: [[SUB11:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[SUB9]] + ; VI: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[ZEXT3]], [[SUB10]](s32) + ; VI: [[LSHR8:%[0-9]+]]:_(s64) = G_LSHR [[ZEXT3]], [[SUB11]](s32) + ; VI: [[ICMP6:%[0-9]+]]:_(s1) = G_ICMP intpred(sgt), [[SUB9]](s32), [[C2]] + ; VI: [[SELECT7:%[0-9]+]]:_(s64) = G_SELECT [[ICMP6]](s1), [[SHL3]], [[LSHR8]] + ; VI: [[XOR4:%[0-9]+]]:_(s64) = G_XOR [[SELECT7]], [[SEXT3]] + ; VI: [[UV12:%[0-9]+]]:_(s32), [[UV13:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[XOR4]](s64) + ; VI: [[UV14:%[0-9]+]]:_(s32), [[UV15:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT3]](s64) + ; VI: [[USUBO6:%[0-9]+]]:_(s32), [[USUBO7:%[0-9]+]]:_(s1) = G_USUBO [[UV12]], [[UV14]] + ; VI: [[USUBE6:%[0-9]+]]:_(s32), [[USUBE7:%[0-9]+]]:_(s1) = G_USUBE [[UV13]], [[UV15]], [[USUBO7]] + ; VI: [[MV3:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO6]](s32), [[USUBE6]](s32) + ; VI: [[ICMP7:%[0-9]+]]:_(s1) = G_ICMP intpred(slt), [[SUB9]](s32), [[C8]] + ; VI: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[ICMP7]](s1), [[C9]], [[MV3]] + ; VI: [[XOR5:%[0-9]+]]:_(s64) = G_XOR [[SELECT8]], [[C11]] + ; VI: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(ult), [[FPEXT1]](s32), [[C10]] + ; VI: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[FCMP1]](s1), [[SELECT6]], [[XOR5]] + ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SELECT4]](s64), [[SELECT9]](s64) + ; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>) + %0:_(<2 x s16>) = COPY $vgpr0 + %1:_(<2 x s64>) = G_FPTOUI %0 + $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1 +...