Index: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td =================================================================== --- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td +++ llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td @@ -1675,8 +1675,15 @@ multiclass unpred_load { - def : Pat<(Ty (Load (am_sve_fi GPR64sp:$base, simm4s1:$offset))), - (RegImmInst (PTrue 31), GPR64sp:$base, simm4s1:$offset)>; + let AddedComplexity = 1 in { + def _imm: Pat<(Ty (Load (am_sve_indexed_s4 GPR64sp:$base, simm4s1:$offset))), + (RegImmInst (PTrue 31), GPR64sp:$base, simm4s1:$offset)>; + } + + let AddedComplexity = 2 in { + def _fi : Pat<(Ty (Load (am_sve_fi GPR64sp:$base, simm4s1:$offset))), + (RegImmInst (PTrue 31), GPR64sp:$base, simm4s1:$offset)>; + } def : Pat<(Ty (Load GPR64:$base)), (RegImmInst (PTrue 31), GPR64:$base, (i64 0))>; Index: llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll =================================================================== --- /dev/null +++ llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll @@ -0,0 +1,102 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s + +; LD1B + +define @ld1b_lower_bound(* %a) { +; CHECK-LABEL: ld1b_lower_bound: +; CHECK: // %bb.0: +; CHECK-NEXT: ptrue p0.b +; CHECK-NEXT: ld1b { z0.b }, p0/z, [x0, #-8, mul vl] +; CHECK-NEXT: ret + %base = getelementptr , * %a, i64 -8 + %load = load , * %base + ret %load +} + +define @ld1b_inbound(* %a) { +; CHECK-LABEL: ld1b_inbound: +; CHECK: // %bb.0: +; CHECK-NEXT: ptrue p0.b +; CHECK-NEXT: ld1b { z0.b }, p0/z, [x0, #2, mul vl] +; CHECK-NEXT: ret + %base = getelementptr , * %a, i64 2 + %load = load , * %base + ret %load +} + +define @ld1b_upper_bound(* %a) { +; CHECK-LABEL: ld1b_upper_bound: +; CHECK: // %bb.0: +; CHECK-NEXT: ptrue p0.b +; CHECK-NEXT: ld1b { z0.b }, p0/z, [x0, #7, mul vl] +; CHECK-NEXT: ret + %base = getelementptr , * %a, i64 7 + %load = load , * %base + ret %load +} + +define @ld1b_out_of_upper_bound(* %a) { +; CHECK-LABEL: ld1b_out_of_upper_bound: +; CHECK: // %bb.0: +; CHECK-NEXT: rdvl x8, #8 +; CHECK-NEXT: add x8, x0, x8 +; CHECK-NEXT: ptrue p0.b +; CHECK-NEXT: ld1b { z0.b }, p0/z, [x8] +; CHECK-NEXT: ret + %base = getelementptr , * %a, i64 8 + %load = load , * %base + ret %load +} + +define @ld1b_out_of_lower_bound(* %a) { +; CHECK-LABEL: ld1b_out_of_lower_bound: +; CHECK: // %bb.0: +; CHECK-NEXT: rdvl x8, #-9 +; CHECK-NEXT: add x8, x0, x8 +; CHECK-NEXT: ptrue p0.b +; CHECK-NEXT: ld1b { z0.b }, p0/z, [x8] +; CHECK-NEXT: ret + %base = getelementptr , * %a, i64 -9 + %load = load , * %base + ret %load +} + +; LD1H + +define @ld1h_inbound(* %a) { +; CHECK-LABEL: ld1h_inbound: +; CHECK: // %bb.0: +; CHECK-NEXT: ptrue p0.h +; CHECK-NEXT: ld1h { z0.h }, p0/z, [x0, #-2, mul vl] +; CHECK-NEXT: ret + %base = getelementptr , * %a, i64 -2 + %load = load , * %base + ret %load +} + +; LD1W + +define @ld1s_inbound(* %a) { +; CHECK-LABEL: ld1s_inbound: +; CHECK: // %bb.0: +; CHECK-NEXT: ptrue p0.s +; CHECK-NEXT: ld1w { z0.s }, p0/z, [x0, #4, mul vl] +; CHECK-NEXT: ret + %base = getelementptr , * %a, i64 4 + %load = load , * %base + ret %load +} + +; LD1D + +define @ld1d_inbound(* %a) { +; CHECK-LABEL: ld1d_inbound: +; CHECK: // %bb.0: +; CHECK-NEXT: ptrue p0.d +; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0, #6, mul vl] +; CHECK-NEXT: ret + %base = getelementptr , * %a, i64 6 + %load = load , * %base + ret %load +}