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[mlir] Allow vector.contract to have mixed types operands
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Authored by ThomasRaoux on Jun 17 2020, 10:26 PM.

Details

Summary

Allow lhs and rhs to have different type than accumulator/destination. Some hardware like GPUs support natively operations like uint8xuint8xuint32.

Diff Detail

Event Timeline

ThomasRaoux created this revision.Jun 17 2020, 10:26 PM
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aartbik added inline comments.Jun 18 2020, 11:05 AM
mlir/include/mlir/Dialect/Vector/VectorOps.td
44

should lhs/rhs still have same element type, at least?

145

perhaps add a mixed element type example?

mlir/test/Dialect/Vector/invalid.mlir
763

please don't remove the whole test, perhaps now test that acc/result have same type

mlir/test/Dialect/Vector/ops.mlir
179

can't we just leave this out, it seemed unused in the original method already?

ThomasRaoux marked 4 inline comments as done.
ThomasRaoux added inline comments.
mlir/include/mlir/Dialect/Vector/VectorOps.td
44

Yes that makes sense. I added back this constraint.

mlir/test/Dialect/Vector/invalid.mlir
763

I had tried to test acc/result have the same type but it would fail in the parser in a first place as it thinks the acc is used with a different type than declared. I ended up changing this to test that rhs and lhs have the same element type.

aartbik accepted this revision.Jun 18 2020, 2:29 PM
This revision is now accepted and ready to land.Jun 18 2020, 2:29 PM
This revision was automatically updated to reflect the committed changes.