Index: cmake/modules/TableGen.cmake
===================================================================
--- cmake/modules/TableGen.cmake
+++ cmake/modules/TableGen.cmake
@@ -14,14 +14,14 @@
     endif()
   endforeach()
 
-  file(GLOB local_tds "*.td")
+  file(GLOB local_tds "${CMAKE_CURRENT_LIST_DIR}/*.td")
   file(GLOB_RECURSE global_tds "${LLVM_MAIN_INCLUDE_DIR}/llvm/*.td")
 
   if (IS_ABSOLUTE ${LLVM_TARGET_DEFINITIONS})
     set(LLVM_TARGET_DEFINITIONS_ABSOLUTE ${LLVM_TARGET_DEFINITIONS})
   else()
     set(LLVM_TARGET_DEFINITIONS_ABSOLUTE
-      ${CMAKE_CURRENT_SOURCE_DIR}/${LLVM_TARGET_DEFINITIONS})
+      ${CMAKE_CURRENT_LIST_DIR}/${LLVM_TARGET_DEFINITIONS})
   endif()
   add_custom_command(OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${ofn}.tmp
     # Generate tablegen output in a temporary file.
Index: lib/Target/AArch64/CMakeLists.txt
===================================================================
--- lib/Target/AArch64/CMakeLists.txt
+++ lib/Target/AArch64/CMakeLists.txt
@@ -1,18 +1,4 @@
-set(LLVM_TARGET_DEFINITIONS AArch64.td)
-
-tablegen(LLVM AArch64GenRegisterInfo.inc -gen-register-info)
-tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
-tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter)
-tablegen(LLVM AArch64GenMCPseudoLowering.inc -gen-pseudo-lowering)
-tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
-tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
-tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
-tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
-tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
-tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget)
-tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
-add_public_tablegen_target(AArch64CommonTableGen)
+include(CMakeTblGen.txt)
 
 add_llvm_target(AArch64CodeGen
   AArch64A57FPLoadBalancing.cpp
Index: lib/Target/AArch64/CMakeTblGen.txt
===================================================================
--- /dev/null
+++ lib/Target/AArch64/CMakeTblGen.txt
@@ -0,0 +1,15 @@
+set(LLVM_TARGET_DEFINITIONS AArch64.td)
+
+tablegen(LLVM AArch64GenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter)
+tablegen(LLVM AArch64GenMCPseudoLowering.inc -gen-pseudo-lowering)
+tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
+tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
+tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
+tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
+tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget)
+tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
+add_public_tablegen_target(AArch64CommonTableGen)
Index: lib/Target/ARM/CMakeLists.txt
===================================================================
--- lib/Target/ARM/CMakeLists.txt
+++ lib/Target/ARM/CMakeLists.txt
@@ -1,17 +1,4 @@
-set(LLVM_TARGET_DEFINITIONS ARM.td)
-
-tablegen(LLVM ARMGenRegisterInfo.inc -gen-register-info)
-tablegen(LLVM ARMGenInstrInfo.inc -gen-instr-info)
-tablegen(LLVM ARMGenMCCodeEmitter.inc -gen-emitter)
-tablegen(LLVM ARMGenMCPseudoLowering.inc -gen-pseudo-lowering)
-tablegen(LLVM ARMGenAsmWriter.inc -gen-asm-writer)
-tablegen(LLVM ARMGenAsmMatcher.inc -gen-asm-matcher)
-tablegen(LLVM ARMGenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel)
-tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv)
-tablegen(LLVM ARMGenSubtargetInfo.inc -gen-subtarget)
-tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler)
-add_public_tablegen_target(ARMCommonTableGen)
+include(CMakeTblGen.txt)
 
 add_llvm_target(ARMCodeGen
   A15SDOptimizer.cpp
Index: lib/Target/ARM/CMakeTblGen.txt
===================================================================
--- /dev/null
+++ lib/Target/ARM/CMakeTblGen.txt
@@ -0,0 +1,14 @@
+set(LLVM_TARGET_DEFINITIONS ARM.td)
+
+tablegen(LLVM ARMGenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM ARMGenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM ARMGenMCCodeEmitter.inc -gen-emitter)
+tablegen(LLVM ARMGenMCPseudoLowering.inc -gen-pseudo-lowering)
+tablegen(LLVM ARMGenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM ARMGenAsmMatcher.inc -gen-asm-matcher)
+tablegen(LLVM ARMGenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM ARMGenFastISel.inc -gen-fast-isel)
+tablegen(LLVM ARMGenCallingConv.inc -gen-callingconv)
+tablegen(LLVM ARMGenSubtargetInfo.inc -gen-subtarget)
+tablegen(LLVM ARMGenDisassemblerTables.inc -gen-disassembler)
+add_public_tablegen_target(ARMCommonTableGen)
Index: lib/Target/BPF/CMakeLists.txt
===================================================================
--- lib/Target/BPF/CMakeLists.txt
+++ lib/Target/BPF/CMakeLists.txt
@@ -1,14 +1,4 @@
-set(LLVM_TARGET_DEFINITIONS BPF.td)
-
-tablegen(LLVM BPFGenRegisterInfo.inc -gen-register-info)
-tablegen(LLVM BPFGenInstrInfo.inc -gen-instr-info)
-tablegen(LLVM BPFGenAsmWriter.inc -gen-asm-writer)
-tablegen(LLVM X86GenAsmMatcher.inc -gen-asm-matcher)
-tablegen(LLVM BPFGenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM BPFGenMCCodeEmitter.inc -gen-emitter)
-tablegen(LLVM BPFGenCallingConv.inc -gen-callingconv)
-tablegen(LLVM BPFGenSubtargetInfo.inc -gen-subtarget)
-add_public_tablegen_target(BPFCommonTableGen)
+include (CMakeTblGen.txt)
 
 add_llvm_target(BPFCodeGen
   BPFAsmPrinter.cpp
Index: lib/Target/BPF/CMakeTblGen.txt
===================================================================
--- /dev/null
+++ lib/Target/BPF/CMakeTblGen.txt
@@ -0,0 +1,11 @@
+set(LLVM_TARGET_DEFINITIONS BPF.td)
+
+tablegen(LLVM BPFGenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM BPFGenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM BPFGenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM X86GenAsmMatcher.inc -gen-asm-matcher)
+tablegen(LLVM BPFGenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM BPFGenMCCodeEmitter.inc -gen-emitter)
+tablegen(LLVM BPFGenCallingConv.inc -gen-callingconv)
+tablegen(LLVM BPFGenSubtargetInfo.inc -gen-subtarget)
+add_public_tablegen_target(BPFCommonTableGen)
Index: lib/Target/CMakeLists.txt
===================================================================
--- lib/Target/CMakeLists.txt
+++ lib/Target/CMakeLists.txt
@@ -12,7 +12,22 @@
   ${LLVM_MAIN_INCLUDE_DIR}/llvm/Target
   )
 
+# Add all back-ends requested
+message("-- Adding back-ends requested to be built")
 foreach(t ${LLVM_TARGETS_TO_BUILD})
   message(STATUS "Targeting ${t}")
   add_subdirectory(${t})
 endforeach()
+
+# Include TableGen for all non-built targets
+message("-- Adding TableGen files for remaining back-ends")
+file(GLOB children RELATIVE ${CMAKE_CURRENT_LIST_DIR} ${CMAKE_CURRENT_LIST_DIR}/*)
+set(dirs "")
+foreach(child ${children})
+  if(EXISTS ${CMAKE_CURRENT_LIST_DIR}/${child}/CMakeTblGen.txt)
+      list(FIND LLVM_TARGETS_TO_BUILD ${child} in)
+      if (${in} EQUAL -1)
+        include(${child}/CMakeTblGen.txt)
+      endif()
+  endif()
+endforeach()
Index: lib/Target/Hexagon/CMakeLists.txt
===================================================================
--- lib/Target/Hexagon/CMakeLists.txt
+++ lib/Target/Hexagon/CMakeLists.txt
@@ -1,15 +1,4 @@
-set(LLVM_TARGET_DEFINITIONS Hexagon.td)
-
-tablegen(LLVM HexagonGenAsmWriter.inc -gen-asm-writer)
-tablegen(LLVM HexagonGenCallingConv.inc -gen-callingconv)
-tablegen(LLVM HexagonGenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM HexagonGenDFAPacketizer.inc -gen-dfa-packetizer)
-tablegen(LLVM HexagonGenDisassemblerTables.inc -gen-disassembler)
-tablegen(LLVM HexagonGenInstrInfo.inc -gen-instr-info)
-tablegen(LLVM HexagonGenMCCodeEmitter.inc -gen-emitter)
-tablegen(LLVM HexagonGenRegisterInfo.inc -gen-register-info)
-tablegen(LLVM HexagonGenSubtargetInfo.inc -gen-subtarget)
-add_public_tablegen_target(HexagonCommonTableGen)
+include(CMakeTblGen.txt)
 
 add_llvm_target(HexagonCodeGen
   HexagonAsmPrinter.cpp
Index: lib/Target/Hexagon/CMakeTblGen.txt
===================================================================
--- /dev/null
+++ lib/Target/Hexagon/CMakeTblGen.txt
@@ -0,0 +1,12 @@
+set(LLVM_TARGET_DEFINITIONS Hexagon.td)
+
+tablegen(LLVM HexagonGenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM HexagonGenCallingConv.inc -gen-callingconv)
+tablegen(LLVM HexagonGenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM HexagonGenDFAPacketizer.inc -gen-dfa-packetizer)
+tablegen(LLVM HexagonGenDisassemblerTables.inc -gen-disassembler)
+tablegen(LLVM HexagonGenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM HexagonGenMCCodeEmitter.inc -gen-emitter)
+tablegen(LLVM HexagonGenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM HexagonGenSubtargetInfo.inc -gen-subtarget)
+add_public_tablegen_target(HexagonCommonTableGen)
Index: lib/Target/MSP430/CMakeLists.txt
===================================================================
--- lib/Target/MSP430/CMakeLists.txt
+++ lib/Target/MSP430/CMakeLists.txt
@@ -1,12 +1,4 @@
-set(LLVM_TARGET_DEFINITIONS MSP430.td)
-
-tablegen(LLVM MSP430GenRegisterInfo.inc -gen-register-info)
-tablegen(LLVM MSP430GenInstrInfo.inc -gen-instr-info)
-tablegen(LLVM MSP430GenAsmWriter.inc -gen-asm-writer)
-tablegen(LLVM MSP430GenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM MSP430GenCallingConv.inc -gen-callingconv)
-tablegen(LLVM MSP430GenSubtargetInfo.inc -gen-subtarget)
-add_public_tablegen_target(MSP430CommonTableGen)
+include(CMakeTblGen.txt)
 
 add_llvm_target(MSP430CodeGen
   MSP430BranchSelector.cpp
Index: lib/Target/MSP430/CMakeTblGen.txt
===================================================================
--- /dev/null
+++ lib/Target/MSP430/CMakeTblGen.txt
@@ -0,0 +1,9 @@
+set(LLVM_TARGET_DEFINITIONS MSP430.td)
+
+tablegen(LLVM MSP430GenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM MSP430GenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM MSP430GenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM MSP430GenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM MSP430GenCallingConv.inc -gen-callingconv)
+tablegen(LLVM MSP430GenSubtargetInfo.inc -gen-subtarget)
+add_public_tablegen_target(MSP430CommonTableGen)
Index: lib/Target/Mips/CMakeLists.txt
===================================================================
--- lib/Target/Mips/CMakeLists.txt
+++ lib/Target/Mips/CMakeLists.txt
@@ -1,17 +1,4 @@
-set(LLVM_TARGET_DEFINITIONS Mips.td)
-
-tablegen(LLVM MipsGenRegisterInfo.inc -gen-register-info)
-tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info)
-tablegen(LLVM MipsGenDisassemblerTables.inc -gen-disassembler)
-tablegen(LLVM MipsGenMCCodeEmitter.inc -gen-emitter)
-tablegen(LLVM MipsGenAsmWriter.inc -gen-asm-writer)
-tablegen(LLVM MipsGenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM MipsGenFastISel.inc -gen-fast-isel)
-tablegen(LLVM MipsGenCallingConv.inc -gen-callingconv)
-tablegen(LLVM MipsGenSubtargetInfo.inc -gen-subtarget)
-tablegen(LLVM MipsGenAsmMatcher.inc -gen-asm-matcher)
-tablegen(LLVM MipsGenMCPseudoLowering.inc -gen-pseudo-lowering)
-add_public_tablegen_target(MipsCommonTableGen)
+include(CMakeTblGen.txt)
 
 add_llvm_target(MipsCodeGen
   Mips16FrameLowering.cpp
Index: lib/Target/Mips/CMakeTblGen.txt
===================================================================
--- /dev/null
+++ lib/Target/Mips/CMakeTblGen.txt
@@ -0,0 +1,14 @@
+set(LLVM_TARGET_DEFINITIONS Mips.td)
+
+tablegen(LLVM MipsGenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM MipsGenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM MipsGenDisassemblerTables.inc -gen-disassembler)
+tablegen(LLVM MipsGenMCCodeEmitter.inc -gen-emitter)
+tablegen(LLVM MipsGenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM MipsGenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM MipsGenFastISel.inc -gen-fast-isel)
+tablegen(LLVM MipsGenCallingConv.inc -gen-callingconv)
+tablegen(LLVM MipsGenSubtargetInfo.inc -gen-subtarget)
+tablegen(LLVM MipsGenAsmMatcher.inc -gen-asm-matcher)
+tablegen(LLVM MipsGenMCPseudoLowering.inc -gen-pseudo-lowering)
+add_public_tablegen_target(MipsCommonTableGen)
Index: lib/Target/NVPTX/CMakeLists.txt
===================================================================
--- lib/Target/NVPTX/CMakeLists.txt
+++ lib/Target/NVPTX/CMakeLists.txt
@@ -1,12 +1,4 @@
-set(LLVM_TARGET_DEFINITIONS NVPTX.td)
-
-
-tablegen(LLVM NVPTXGenRegisterInfo.inc -gen-register-info)
-tablegen(LLVM NVPTXGenInstrInfo.inc -gen-instr-info)
-tablegen(LLVM NVPTXGenAsmWriter.inc -gen-asm-writer)
-tablegen(LLVM NVPTXGenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM NVPTXGenSubtargetInfo.inc -gen-subtarget)
-add_public_tablegen_target(NVPTXCommonTableGen)
+include(CMakeTblGen.txt)
 
 set(NVPTXCodeGen_sources
   NVPTXAllocaHoisting.cpp
Index: lib/Target/NVPTX/CMakeTblGen.txt
===================================================================
--- /dev/null
+++ lib/Target/NVPTX/CMakeTblGen.txt
@@ -0,0 +1,8 @@
+set(LLVM_TARGET_DEFINITIONS NVPTX.td)
+
+tablegen(LLVM NVPTXGenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM NVPTXGenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM NVPTXGenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM NVPTXGenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM NVPTXGenSubtargetInfo.inc -gen-subtarget)
+add_public_tablegen_target(NVPTXCommonTableGen)
Index: lib/Target/PowerPC/CMakeLists.txt
===================================================================
--- lib/Target/PowerPC/CMakeLists.txt
+++ lib/Target/PowerPC/CMakeLists.txt
@@ -1,16 +1,4 @@
-set(LLVM_TARGET_DEFINITIONS PPC.td)
-
-tablegen(LLVM PPCGenAsmWriter.inc -gen-asm-writer)
-tablegen(LLVM PPCGenAsmMatcher.inc -gen-asm-matcher)
-tablegen(LLVM PPCGenDisassemblerTables.inc -gen-disassembler)
-tablegen(LLVM PPCGenMCCodeEmitter.inc -gen-emitter)
-tablegen(LLVM PPCGenRegisterInfo.inc -gen-register-info)
-tablegen(LLVM PPCGenInstrInfo.inc -gen-instr-info)
-tablegen(LLVM PPCGenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM PPCGenFastISel.inc -gen-fast-isel)
-tablegen(LLVM PPCGenCallingConv.inc -gen-callingconv)
-tablegen(LLVM PPCGenSubtargetInfo.inc -gen-subtarget)
-add_public_tablegen_target(PowerPCCommonTableGen)
+include(CMakeTblGen.txt)
 
 add_llvm_target(PowerPCCodeGen
   PPCAsmPrinter.cpp
Index: lib/Target/PowerPC/CMakeTblGen.txt
===================================================================
--- /dev/null
+++ lib/Target/PowerPC/CMakeTblGen.txt
@@ -0,0 +1,13 @@
+set(LLVM_TARGET_DEFINITIONS PPC.td)
+
+tablegen(LLVM PPCGenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM PPCGenAsmMatcher.inc -gen-asm-matcher)
+tablegen(LLVM PPCGenDisassemblerTables.inc -gen-disassembler)
+tablegen(LLVM PPCGenMCCodeEmitter.inc -gen-emitter)
+tablegen(LLVM PPCGenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM PPCGenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM PPCGenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM PPCGenFastISel.inc -gen-fast-isel)
+tablegen(LLVM PPCGenCallingConv.inc -gen-callingconv)
+tablegen(LLVM PPCGenSubtargetInfo.inc -gen-subtarget)
+add_public_tablegen_target(PowerPCCommonTableGen)
Index: lib/Target/R600/CMakeLists.txt
===================================================================
--- lib/Target/R600/CMakeLists.txt
+++ lib/Target/R600/CMakeLists.txt
@@ -1,16 +1,4 @@
-set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
-
-tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
-tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
-tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
-tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
-tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
-tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
-tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
-tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
-tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
-add_public_tablegen_target(AMDGPUCommonTableGen)
+include(CMakeTblGen.txt)
 
 add_llvm_target(R600CodeGen
   AMDILCFGStructurizer.cpp
Index: lib/Target/R600/CMakeTblGen.txt
===================================================================
--- /dev/null
+++ lib/Target/R600/CMakeTblGen.txt
@@ -0,0 +1,13 @@
+set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
+
+tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
+tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
+tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
+tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
+tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
+tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
+add_public_tablegen_target(AMDGPUCommonTableGen)
Index: lib/Target/Sparc/CMakeLists.txt
===================================================================
--- lib/Target/Sparc/CMakeLists.txt
+++ lib/Target/Sparc/CMakeLists.txt
@@ -1,15 +1,4 @@
-set(LLVM_TARGET_DEFINITIONS Sparc.td)
-
-tablegen(LLVM SparcGenRegisterInfo.inc -gen-register-info)
-tablegen(LLVM SparcGenInstrInfo.inc -gen-instr-info)
-tablegen(LLVM SparcGenDisassemblerTables.inc -gen-disassembler)
-tablegen(LLVM SparcGenMCCodeEmitter.inc -gen-emitter)
-tablegen(LLVM SparcGenAsmWriter.inc -gen-asm-writer)
-tablegen(LLVM SparcGenAsmMatcher.inc -gen-asm-matcher)
-tablegen(LLVM SparcGenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM SparcGenSubtargetInfo.inc -gen-subtarget)
-tablegen(LLVM SparcGenCallingConv.inc -gen-callingconv)
-add_public_tablegen_target(SparcCommonTableGen)
+include(CMakeTblGen.txt)
 
 add_llvm_target(SparcCodeGen
   DelaySlotFiller.cpp
Index: lib/Target/Sparc/CMakeTblGen.txt
===================================================================
--- /dev/null
+++ lib/Target/Sparc/CMakeTblGen.txt
@@ -0,0 +1,12 @@
+set(LLVM_TARGET_DEFINITIONS Sparc.td)
+
+tablegen(LLVM SparcGenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM SparcGenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM SparcGenDisassemblerTables.inc -gen-disassembler)
+tablegen(LLVM SparcGenMCCodeEmitter.inc -gen-emitter)
+tablegen(LLVM SparcGenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM SparcGenAsmMatcher.inc -gen-asm-matcher)
+tablegen(LLVM SparcGenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM SparcGenSubtargetInfo.inc -gen-subtarget)
+tablegen(LLVM SparcGenCallingConv.inc -gen-callingconv)
+add_public_tablegen_target(SparcCommonTableGen)
Index: lib/Target/SystemZ/CMakeLists.txt
===================================================================
--- lib/Target/SystemZ/CMakeLists.txt
+++ lib/Target/SystemZ/CMakeLists.txt
@@ -1,15 +1,4 @@
-set(LLVM_TARGET_DEFINITIONS SystemZ.td)
-
-tablegen(LLVM SystemZGenAsmMatcher.inc -gen-asm-matcher)
-tablegen(LLVM SystemZGenAsmWriter.inc -gen-asm-writer)
-tablegen(LLVM SystemZGenCallingConv.inc -gen-callingconv)
-tablegen(LLVM SystemZGenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM SystemZGenDisassemblerTables.inc -gen-disassembler)
-tablegen(LLVM SystemZGenMCCodeEmitter.inc -gen-emitter)
-tablegen(LLVM SystemZGenInstrInfo.inc -gen-instr-info)
-tablegen(LLVM SystemZGenRegisterInfo.inc -gen-register-info)
-tablegen(LLVM SystemZGenSubtargetInfo.inc -gen-subtarget)
-add_public_tablegen_target(SystemZCommonTableGen)
+include(CMakeTblGen.txt)
 
 add_llvm_target(SystemZCodeGen
   SystemZAsmPrinter.cpp
Index: lib/Target/SystemZ/CMakeTblGen.txt
===================================================================
--- /dev/null
+++ lib/Target/SystemZ/CMakeTblGen.txt
@@ -0,0 +1,12 @@
+set(LLVM_TARGET_DEFINITIONS SystemZ.td)
+
+tablegen(LLVM SystemZGenAsmMatcher.inc -gen-asm-matcher)
+tablegen(LLVM SystemZGenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM SystemZGenCallingConv.inc -gen-callingconv)
+tablegen(LLVM SystemZGenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM SystemZGenDisassemblerTables.inc -gen-disassembler)
+tablegen(LLVM SystemZGenMCCodeEmitter.inc -gen-emitter)
+tablegen(LLVM SystemZGenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM SystemZGenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM SystemZGenSubtargetInfo.inc -gen-subtarget)
+add_public_tablegen_target(SystemZCommonTableGen)
Index: lib/Target/X86/CMakeLists.txt
===================================================================
--- lib/Target/X86/CMakeLists.txt
+++ lib/Target/X86/CMakeLists.txt
@@ -1,16 +1,4 @@
-set(LLVM_TARGET_DEFINITIONS X86.td)
-
-tablegen(LLVM X86GenRegisterInfo.inc -gen-register-info)
-tablegen(LLVM X86GenDisassemblerTables.inc -gen-disassembler)
-tablegen(LLVM X86GenInstrInfo.inc -gen-instr-info)
-tablegen(LLVM X86GenAsmWriter.inc -gen-asm-writer)
-tablegen(LLVM X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
-tablegen(LLVM X86GenAsmMatcher.inc -gen-asm-matcher)
-tablegen(LLVM X86GenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM X86GenFastISel.inc -gen-fast-isel)
-tablegen(LLVM X86GenCallingConv.inc -gen-callingconv)
-tablegen(LLVM X86GenSubtargetInfo.inc -gen-subtarget)
-add_public_tablegen_target(X86CommonTableGen)
+include(CMakeTblGen.txt)
 
 set(sources
   X86AsmPrinter.cpp
Index: lib/Target/X86/CMakeTblGen.txt
===================================================================
--- /dev/null
+++ lib/Target/X86/CMakeTblGen.txt
@@ -0,0 +1,13 @@
+set(LLVM_TARGET_DEFINITIONS X86.td)
+
+tablegen(LLVM X86GenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM X86GenDisassemblerTables.inc -gen-disassembler)
+tablegen(LLVM X86GenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM X86GenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM X86GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
+tablegen(LLVM X86GenAsmMatcher.inc -gen-asm-matcher)
+tablegen(LLVM X86GenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM X86GenFastISel.inc -gen-fast-isel)
+tablegen(LLVM X86GenCallingConv.inc -gen-callingconv)
+tablegen(LLVM X86GenSubtargetInfo.inc -gen-subtarget)
+add_public_tablegen_target(X86CommonTableGen)
Index: lib/Target/XCore/CMakeLists.txt
===================================================================
--- lib/Target/XCore/CMakeLists.txt
+++ lib/Target/XCore/CMakeLists.txt
@@ -1,13 +1,4 @@
-set(LLVM_TARGET_DEFINITIONS XCore.td)
-
-tablegen(LLVM XCoreGenRegisterInfo.inc -gen-register-info)
-tablegen(LLVM XCoreGenInstrInfo.inc -gen-instr-info)
-tablegen(LLVM XCoreGenDisassemblerTables.inc -gen-disassembler)
-tablegen(LLVM XCoreGenAsmWriter.inc -gen-asm-writer)
-tablegen(LLVM XCoreGenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM XCoreGenCallingConv.inc -gen-callingconv)
-tablegen(LLVM XCoreGenSubtargetInfo.inc -gen-subtarget)
-add_public_tablegen_target(XCoreCommonTableGen)
+include(CMakeTblGen.txt)
 
 add_llvm_target(XCoreCodeGen
   XCoreAsmPrinter.cpp
Index: lib/Target/XCore/CMakeTblGen.txt
===================================================================
--- /dev/null
+++ lib/Target/XCore/CMakeTblGen.txt
@@ -0,0 +1,10 @@
+set(LLVM_TARGET_DEFINITIONS XCore.td)
+
+tablegen(LLVM XCoreGenRegisterInfo.inc -gen-register-info)
+tablegen(LLVM XCoreGenInstrInfo.inc -gen-instr-info)
+tablegen(LLVM XCoreGenDisassemblerTables.inc -gen-disassembler)
+tablegen(LLVM XCoreGenAsmWriter.inc -gen-asm-writer)
+tablegen(LLVM XCoreGenDAGISel.inc -gen-dag-isel)
+tablegen(LLVM XCoreGenCallingConv.inc -gen-callingconv)
+tablegen(LLVM XCoreGenSubtargetInfo.inc -gen-subtarget)
+add_public_tablegen_target(XCoreCommonTableGen)