diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
--- a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
@@ -272,6 +272,19 @@
   bool findPreIndexCandidate(MachineInstr &MI, Register &Addr, Register &Base,
                              Register &Offset);
 };
+
+class CommonTargetCombinerHelperState {
+protected:
+  GISelChangeObserver &Observer;
+  MachineIRBuilder &B;
+  CombinerHelper &Helper;
+
+public:
+  CommonTargetCombinerHelperState(GISelChangeObserver &Observer,
+                                  MachineIRBuilder &B, CombinerHelper &Helper)
+      : Observer(Observer), B(B), Helper(Helper) {}
+};
+
 } // namespace llvm
 
 #endif
diff --git a/llvm/include/llvm/Target/GlobalISel/Combine.td b/llvm/include/llvm/Target/GlobalISel/Combine.td
--- a/llvm/include/llvm/Target/GlobalISel/Combine.td
+++ b/llvm/include/llvm/Target/GlobalISel/Combine.td
@@ -42,10 +42,9 @@
   string DisableRuleOption = ?;
   // The state class to inherit from (if any). The generated helper will inherit
   // from this class and will forward arguments to its constructors.
-  string StateClass = "";
+  string StateClass = "CommonTargetCombinerHelperState";
   // Any additional arguments that should be appended to the tryCombine*().
-  list<GICombinerHelperArg> AdditionalArguments =
-      [GICombinerHelperArg<"CombinerHelper &", "Helper">];
+  list<GICombinerHelperArg> AdditionalArguments = [];
 }
 class GICombineRule<dag defs, dag match, dag apply> : GICombine {
   /// Defines the external interface of the match rule. This includes:
diff --git a/llvm/lib/Target/AArch64/AArch64Combine.td b/llvm/lib/Target/AArch64/AArch64Combine.td
--- a/llvm/lib/Target/AArch64/AArch64Combine.td
+++ b/llvm/lib/Target/AArch64/AArch64Combine.td
@@ -22,8 +22,6 @@
                                            elide_br_by_inverting_cond,
                                            fconstant_to_constant]> {
   let DisableRuleOption = "aarch64prelegalizercombiner-disable-rule";
-  let StateClass = "AArch64PreLegalizerCombinerHelperState";
-  let AdditionalArguments = [];
 }
 
 // Matchdata for combines which replace a G_SHUFFLE_VECTOR with a
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
--- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
@@ -317,8 +317,9 @@
   const auto *LI =
       MI.getParent()->getParent()->getSubtarget().getLegalizerInfo();
   CombinerHelper Helper(Observer, B, KB, MDT, LI);
-  AArch64GenPostLegalizerCombinerHelper Generated(GeneratedRuleCfg);
-  return Generated.tryCombineAll(Observer, MI, B, Helper);
+  AArch64GenPostLegalizerCombinerHelper Generated(GeneratedRuleCfg, Observer, B,
+                                                  Helper);
+  return Generated.tryCombineAll(MI);
 }
 
 #define AARCH64POSTLEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_CPP
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
--- a/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
@@ -53,15 +53,6 @@
   MI.eraseFromParent();
 }
 
-class AArch64PreLegalizerCombinerHelperState {
-protected:
-  CombinerHelper &Helper;
-
-public:
-  AArch64PreLegalizerCombinerHelperState(CombinerHelper &Helper)
-      : Helper(Helper) {}
-};
-
 #define AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS
 #include "AArch64GenPreLegalizeGICombiner.inc"
 #undef AARCH64PRELEGALIZERCOMBINERHELPER_GENCOMBINERHELPER_DEPS
@@ -94,7 +85,8 @@
                                               MachineInstr &MI,
                                               MachineIRBuilder &B) const {
   CombinerHelper Helper(Observer, B, KB, MDT);
-  AArch64GenPreLegalizerCombinerHelper Generated(GeneratedRuleCfg, Helper);
+  AArch64GenPreLegalizerCombinerHelper Generated(GeneratedRuleCfg, Observer, B,
+                                                 Helper);
 
   switch (MI.getOpcode()) {
   case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS:
@@ -114,7 +106,7 @@
     }
   }
 
-  if (Generated.tryCombineAll(Observer, MI, B))
+  if (Generated.tryCombineAll(MI))
     return true;
 
   switch (MI.getOpcode()) {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
--- a/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
@@ -253,9 +253,10 @@
                                               MachineInstr &MI,
                                               MachineIRBuilder &B) const {
   CombinerHelper Helper(Observer, B, KB, MDT);
-  AMDGPUGenPostLegalizerCombinerHelper Generated(GeneratedRuleCfg);
+  AMDGPUGenPostLegalizerCombinerHelper Generated(GeneratedRuleCfg, Observer, B,
+                                                 Helper);
 
-  if (Generated.tryCombineAll(Observer, MI, B, Helper))
+  if (Generated.tryCombineAll(MI))
     return true;
 
   switch (MI.getOpcode()) {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
--- a/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
@@ -61,9 +61,10 @@
                                               MachineInstr &MI,
                                               MachineIRBuilder &B) const {
   CombinerHelper Helper(Observer, B, KB, MDT);
-  AMDGPUGenPreLegalizerCombinerHelper Generated(GeneratedRuleCfg);
+  AMDGPUGenPreLegalizerCombinerHelper Generated(GeneratedRuleCfg, Observer, B,
+                                                Helper);
 
-  if (Generated.tryCombineAll(Observer, MI, B, Helper))
+  if (Generated.tryCombineAll(MI))
     return true;
 
   switch (MI.getOpcode()) {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
@@ -64,9 +64,10 @@
                                               MachineInstr &MI,
                                               MachineIRBuilder &B) const {
   CombinerHelper Helper(Observer, B, KB, MDT);
-  AMDGPUGenRegBankCombinerHelper Generated(GeneratedRuleCfg);
+  AMDGPUGenRegBankCombinerHelper Generated(GeneratedRuleCfg, Observer, B,
+                                           Helper);
 
-  if (Generated.tryCombineAll(Observer, MI, B, Helper))
+  if (Generated.tryCombineAll(MI))
     return true;
 
   return false;
diff --git a/llvm/utils/TableGen/GICombinerEmitter.cpp b/llvm/utils/TableGen/GICombinerEmitter.cpp
--- a/llvm/utils/TableGen/GICombinerEmitter.cpp
+++ b/llvm/utils/TableGen/GICombinerEmitter.cpp
@@ -842,8 +842,8 @@
     OS << Indent << "return false;\n";
 }
 
-static void emitAdditionalHelperMethodArguments(raw_ostream &OS,
-                                                Record *Combiner) {
+static void emitHelperMethodArguments(raw_ostream &OS, Record *Combiner) {
+  OS << "    MachineInstr &MI\n";
   for (Record *Arg : Combiner->getValueAsListOfDefs("AdditionalArguments"))
     OS << ",\n    " << Arg->getValueAsString("Type")
        << Arg->getValueAsString("Name");
@@ -923,11 +923,8 @@
     OS << StateClass << "(std::forward<Args>(args)...), ";
   OS << "RuleConfig(&RuleConfig) {}\n"
      << "\n"
-     << "  bool tryCombineAll(\n"
-     << "    GISelChangeObserver &Observer,\n"
-     << "    MachineInstr &MI,\n"
-     << "    MachineIRBuilder &B";
-  emitAdditionalHelperMethodArguments(OS, Combiner);
+     << "  bool tryCombineAll(\n";
+  emitHelperMethodArguments(OS, Combiner);
   OS << ") const;\n";
   OS << "};\n\n";
 
@@ -998,11 +995,8 @@
      << "  return true;\n"
      << "}\n\n";
 
-  OS << "bool " << getClassName() << "::tryCombineAll(\n"
-     << "    GISelChangeObserver &Observer,\n"
-     << "    MachineInstr &MI,\n"
-     << "    MachineIRBuilder &B";
-  emitAdditionalHelperMethodArguments(OS, Combiner);
+  OS << "bool " << getClassName() << "::tryCombineAll(\n";
+  emitHelperMethodArguments(OS, Combiner);
   OS << ") const {\n"
      << "  MachineBasicBlock *MBB = MI.getParent();\n"
      << "  MachineFunction *MF = MBB->getParent();\n"