Index: llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp =================================================================== --- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -2023,9 +2023,6 @@ MachineIRBuilder &MIRBuilder) { const AtomicCmpXchgInst &I = cast(U); - if (I.isWeak()) - return false; - auto &TLI = *MF->getSubtarget().getTargetLowering(); auto Flags = TLI.getAtomicMemOperandFlags(I, *DL); Index: llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll =================================================================== --- llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -1968,6 +1968,32 @@ ret i32 %value_loaded } +; Try one cmpxchg +define i32 @test_weak_atomic_cmpxchg_1(i32* %addr) { +; CHECK-LABEL: name: test_weak_atomic_cmpxchg_1 +; CHECK: bb.1.entry: +; CHECK-NEXT: successors: %bb.{{[^)]+}} +; CHECK-NEXT: liveins: $x0 +; CHECK: [[ADDR:%[0-9]+]]:_(p0) = COPY $x0 +; CHECK-NEXT: [[OLDVAL:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 +; CHECK-NEXT: [[NEWVAL:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 +; CHECK: bb.2.repeat: +; CHECK-NEXT: successors: %bb.3({{[^)]+}}), %bb.2({{[^)]+}}) +; CHECK: [[OLDVALRES:%[0-9]+]]:_(s32), [[SUCCESS:%[0-9]+]]:_(s1) = G_ATOMIC_CMPXCHG_WITH_SUCCESS [[ADDR]](p0), [[OLDVAL]], [[NEWVAL]] :: (load store monotonic monotonic 4 on %ir.addr) +; CHECK-NEXT: G_BRCOND [[SUCCESS]](s1), %bb.3 +; CHECK-NEXT: G_BR %bb.2 +; CHECK: bb.3.done: +entry: + br label %repeat +repeat: + %val_success = cmpxchg weak i32* %addr, i32 0, i32 1 monotonic monotonic + %value_loaded = extractvalue { i32, i1 } %val_success, 0 + %success = extractvalue { i32, i1 } %val_success, 1 + br i1 %success, label %done, label %repeat +done: + ret i32 %value_loaded +} + ; Try one cmpxchg with a small type and high atomic ordering. define i16 @test_atomic_cmpxchg_2(i16* %addr) { ; CHECK-LABEL: name: test_atomic_cmpxchg_2