Index: llvm/lib/Transforms/InstCombine/InstructionCombining.cpp =================================================================== --- llvm/lib/Transforms/InstCombine/InstructionCombining.cpp +++ llvm/lib/Transforms/InstCombine/InstructionCombining.cpp @@ -3743,7 +3743,7 @@ // Mark all the analyses that instcombine updates as preserved. PreservedAnalyses PA; - PA.preserveSet(); + PA.preserve(); PA.preserve(); PA.preserve(); PA.preserve(); @@ -3751,7 +3751,6 @@ } void InstructionCombiningPass::getAnalysisUsage(AnalysisUsage &AU) const { - AU.setPreservesCFG(); AU.addRequired(); AU.addRequired(); AU.addRequired(); Index: llvm/test/Other/opt-O2-pipeline.ll =================================================================== --- llvm/test/Other/opt-O2-pipeline.ll +++ llvm/test/Other/opt-O2-pipeline.ll @@ -123,6 +123,7 @@ ; CHECK-NEXT: Lazy Block Frequency Analysis ; CHECK-NEXT: Optimization Remark Emitter ; CHECK-NEXT: Combine redundant instructions +; CHECK-NEXT: Natural Loop Information ; CHECK-NEXT: Canonicalize natural loops ; CHECK-NEXT: LCSSA Verifier ; CHECK-NEXT: Loop-Closed SSA Form Pass @@ -255,6 +256,7 @@ ; CHECK-NEXT: Optimize scalar/vector ops ; CHECK-NEXT: Optimization Remark Emitter ; CHECK-NEXT: Combine redundant instructions +; CHECK-NEXT: Natural Loop Information ; CHECK-NEXT: Canonicalize natural loops ; CHECK-NEXT: LCSSA Verifier ; CHECK-NEXT: Loop-Closed SSA Form Pass @@ -266,6 +268,7 @@ ; CHECK-NEXT: Optimization Remark Emitter ; CHECK-NEXT: Combine redundant instructions ; CHECK-NEXT: Memory SSA +; CHECK-NEXT: Natural Loop Information ; CHECK-NEXT: Canonicalize natural loops ; CHECK-NEXT: LCSSA Verifier ; CHECK-NEXT: Loop-Closed SSA Form Pass Index: llvm/test/Other/opt-O3-pipeline.ll =================================================================== --- llvm/test/Other/opt-O3-pipeline.ll +++ llvm/test/Other/opt-O3-pipeline.ll @@ -128,6 +128,7 @@ ; CHECK-NEXT: Lazy Block Frequency Analysis ; CHECK-NEXT: Optimization Remark Emitter ; CHECK-NEXT: Combine redundant instructions +; CHECK-NEXT: Natural Loop Information ; CHECK-NEXT: Canonicalize natural loops ; CHECK-NEXT: LCSSA Verifier ; CHECK-NEXT: Loop-Closed SSA Form Pass @@ -260,6 +261,7 @@ ; CHECK-NEXT: Optimize scalar/vector ops ; CHECK-NEXT: Optimization Remark Emitter ; CHECK-NEXT: Combine redundant instructions +; CHECK-NEXT: Natural Loop Information ; CHECK-NEXT: Canonicalize natural loops ; CHECK-NEXT: LCSSA Verifier ; CHECK-NEXT: Loop-Closed SSA Form Pass @@ -271,6 +273,7 @@ ; CHECK-NEXT: Optimization Remark Emitter ; CHECK-NEXT: Combine redundant instructions ; CHECK-NEXT: Memory SSA +; CHECK-NEXT: Natural Loop Information ; CHECK-NEXT: Canonicalize natural loops ; CHECK-NEXT: LCSSA Verifier ; CHECK-NEXT: Loop-Closed SSA Form Pass Index: llvm/test/Other/opt-Os-pipeline.ll =================================================================== --- llvm/test/Other/opt-Os-pipeline.ll +++ llvm/test/Other/opt-Os-pipeline.ll @@ -82,6 +82,9 @@ ; CHECK-NEXT: Lazy Block Frequency Analysis ; CHECK-NEXT: Optimization Remark Emitter ; CHECK-NEXT: Combine redundant instructions +; CHECK-NEXT: Natural Loop Information +; CHECK-NEXT: Lazy Branch Probability Analysis +; CHECK-NEXT: Lazy Block Frequency Analysis ; CHECK-NEXT: Optimization Remark Emitter ; CHECK-NEXT: Tail Call Elimination ; CHECK-NEXT: Simplify the CFG @@ -109,6 +112,7 @@ ; CHECK-NEXT: Lazy Block Frequency Analysis ; CHECK-NEXT: Optimization Remark Emitter ; CHECK-NEXT: Combine redundant instructions +; CHECK-NEXT: Natural Loop Information ; CHECK-NEXT: Canonicalize natural loops ; CHECK-NEXT: LCSSA Verifier ; CHECK-NEXT: Loop-Closed SSA Form Pass @@ -241,6 +245,7 @@ ; CHECK-NEXT: Optimize scalar/vector ops ; CHECK-NEXT: Optimization Remark Emitter ; CHECK-NEXT: Combine redundant instructions +; CHECK-NEXT: Natural Loop Information ; CHECK-NEXT: Canonicalize natural loops ; CHECK-NEXT: LCSSA Verifier ; CHECK-NEXT: Loop-Closed SSA Form Pass @@ -252,6 +257,7 @@ ; CHECK-NEXT: Optimization Remark Emitter ; CHECK-NEXT: Combine redundant instructions ; CHECK-NEXT: Memory SSA +; CHECK-NEXT: Natural Loop Information ; CHECK-NEXT: Canonicalize natural loops ; CHECK-NEXT: LCSSA Verifier ; CHECK-NEXT: Loop-Closed SSA Form Pass Index: llvm/test/Other/optimization-remarks-invalidation.ll =================================================================== --- llvm/test/Other/optimization-remarks-invalidation.ll +++ llvm/test/Other/optimization-remarks-invalidation.ll @@ -10,7 +10,7 @@ ; ; Check that passes which preserve BFI don't invalidate the emitter. ; RUN: opt %s -disable-output -aa-pipeline=basic-aa 2>&1 \ -; RUN: -passes='require,instcombine,require,loop(licm)' -debug-pass-manager \ +; RUN: -passes='require,instsimplify,require,loop(licm)' -debug-pass-manager \ ; RUN: -pass-remarks=licm -pass-remarks-with-hotness \ ; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-PM-PRESERVE ; @@ -31,7 +31,7 @@ define void @hoist(i32* %array, i32* noalias %p) { ; CHECK-PM-PRESERVE: Running analysis: OptimizationRemarkEmitterAnalysis -; CHECK-PM-PRESERVE: Running pass: InstCombinePass +; CHECK-PM-PRESERVE: Running pass: InstSimplifyPass ; CHECK-PM-PRESERVE-NOT: Invalidating analysis: OptimizationRemarkEmitterAnalysis ; CHECK-PM-PRESERVE-NOT: Running analysis: OptimizationRemarkEmitterAnalysis ; CHECK-PM-PRESERVE: Running pass: LICMPass @@ -51,7 +51,8 @@ Loop: %j = phi i32 [ 0, %Entry ], [ %Next, %Loop ] - %addr = getelementptr i32, i32* %array, i32 %j + %arr = getelementptr i32, i32* %array, i32 0 + %addr = getelementptr i32, i32* %arr, i32 %j %a = load i32, i32* %addr ; CHECK: remark: /tmp/kk.c:2:20: hoisting load %b = load i32, i32* %p, !dbg !8 Index: llvm/test/Transforms/InstCombine/infinite-loop-postdom.ll =================================================================== --- /dev/null +++ llvm/test/Transforms/InstCombine/infinite-loop-postdom.ll @@ -0,0 +1,59 @@ +; RUN: opt < %s -postdomtree -analyze | FileCheck %s +; RUN: opt < %s -passes='print' 2>&1 | FileCheck %s +; RUN: opt < %s -disable-output -branch-prob -instcombine -block-freq -verify-dom-info + +; Show that Predicate Canonicalization (InstCombine) invalidates PostDomTree +; if the basic block is post-dom unreachable. +; +define void @test1(i24 %a, i24 %b) { +entry: + br label %LOOP + +LOOP: + %f = icmp uge i24 %a, %b + br i1 %f, label %B1, label %B2 + +B1: + br label %B2 + +B2: + br label %LOOP +} + +; The same as @test1 except the LOOP condition canonicalized (as by instcombine). +define void @test2(i24 %a, i24 %b) { +entry: + br label %LOOP + +LOOP: + %f = icmp ult i24 %a, %b + br i1 %f, label %B2, label %B1 + +B1: + br label %B2 + +B2: + br label %LOOP +} + +; PostDomTrees are different. + +; CHECK-LABEL: test1 +; CHECK-NEXT: =============================-------------------------------- +; CHECK-NEXT: Inorder PostDominator Tree: DFSNumbers invalid: 0 slow queries. +; CHECK-NEXT: [1] <> +; CHECK-NEXT: [2] %B2 +; CHECK-NEXT: [3] %LOOP +; CHECK-NEXT: [4] %entry +; CHECK-NEXT: [3] %B1 +; CHECK-NEXT: Roots: %B2 + +; CHECK-LABEL: test2 +; CHECK-NEXT: =============================-------------------------------- +; CHECK-NEXT: Inorder PostDominator Tree: DFSNumbers invalid: 0 slow queries. +; CHECK-NEXT: [1] <> +; CHECK-NEXT: [2] %B1 +; CHECK-NEXT: [3] %LOOP +; CHECK-NEXT: [4] %entry +; CHECK-NEXT: [4] %B2 +; CHECK-NEXT: Roots: %B1