[LLDB] Combine multiple defs of arm64 register sets

[omjavaid]

Summary

This patch aims to combine similar arm64 register set definitions defined in NativeRegisterContextLinux_arm64 and RegisterContextPOSIX_arm64.
I have implemented a register set interface out of RegisterInfoInterface class and moved arm64 register sets into RegisterInfosPOSIX_arm64 which is similar to Utility/RegisterContextLinux_* implemented by various other targets. This will help in managing register sets of new ARM64 architecture features in one place.

Built and tested on x86_64-linux-gnu, aarch64-linux-gnu and arm-linux-gnueabihf targets.

[omjavaid]

In this updated I have segregated RegisterInfoInterface and RegisterInfoAndSetInterface as two mutually exclusive interfaces. RegisterInfoPosix_arm64 is currently the only class making use of set interface but I am going to extend this once we reach a consensus. All occurrences of RegisterInfoPosix_arm64 have been updated accordingly and for the case of NativeRegisterContextLinux_arm64 RegisterInfoInterface shared pointer is casted into a RegisterInfoAndSetInterface shared pointer. Once we have this implemented for other architecture there wont be a need for having a shared pointer of RegisterInfoAndSetInterface in all variants of NativeRegisterContextLinux_*

@labath what are your thoughts on this ?

[labath]

I like this.

lldb/source/Plugins/Process/FreeBSD/FreeBSDThread.cpp

165

It would be good to merge these two switches. Then the reg(set)_interface variables would be local to each case label and it would not be so weird that we sometimes use one and sometimes the other.

lldb/source/Plugins/Process/FreeBSD/RegisterContextPOSIXProcessMonitor_arm64.h

20–21

While we're changing interfaces, let's also make this unique_ptr<RegisterInfoAndSetInterface> to document the ownership transfer. (I might also drop the concrete_frame_idx argument, as that is always zero.)

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp

71–72

The way I'd recommend dealing with this is to have a RegisterInfoPOSIX_arm64& GetRegisterInfo() const method which performs a cast on the m_register_info_interface_up pointer, and then have everything call that. If you place that method in close proximity to this constructor, then it should be clear that this operation is always safe. There's already something similar being done in e.g. NativeThreadLinux::GetProcess.

lldb/source/Plugins/Process/Utility/NativeRegisterContextRegisterInfo.h

37

With the above idea, it should no longer be needed to change this into a shared_ptr.

lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h

22–24

similar thoughts about unique_ptr and concrete_frame_idx. In fact, thinking ahead to the next patch, I think we could make this an unique_ptr<RegisterInfoPOSIX_arm64> even.

lldb/source/Plugins/Process/Utility/RegisterInfoAndSetInterface.h

25

s/virtual/override (or just omit the destructor completely)

36–38

These aren't really register *set* related, are they? Could they go on the base interface instead?

Although, THB, the way I'd handle this is by having something a ArrayRef<RegisterInfo> RegInfos() interface, and then having the callers do reg_info_interface->RegInfos()[reg_index].offset

lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h

16–17

How about we put this inside the RegisterInfoPOSIX_arm64 class, and drop RegisterSetPOSIX_ARM64 from the name. (RegisterInfoPOSIX_arm64::GPRegSet ?) (there's already something similar inside NativeRegisterContextNetBSD_x86_64).

19–27

I'm not sure what's the advantage of making this a struct vs. just splating it into the containing class. Maybe that made more sense when originally when the class was doing a lot more work, but here I'd just replace this by a list of members.

lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp

81

The reg(set)_interface and register_context switches could be merged here too in a similar way...

[omjavaid]

lldb/source/Plugins/Process/FreeBSD/FreeBSDThread.cpp

165

I have tried a couple of options but the no of different combinations involved I feel current implementation should stay untill we incrementally move remaining architectures to user RegisterInfosAndSet interface.

lldb/source/Plugins/Process/FreeBSD/RegisterContextPOSIXProcessMonitor_arm64.h

20–21

Agreed. I will update this in updated revision.

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp

71–72

yes this would be a lot cleaner than what I am doing currently. I am going to update this in next revision.

lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp

81

Here also incremental merger will be a better approach IMO.

[omjavaid]

This new revision incorporates all suggestions on previous version.

@labath What do you think? I have skipped merging switch statements and have picked all other suggestions you highlighted. If this is LGTM then i can rebase SVE patches on top of this?

[labath]

This looks great. I just have a quick question about the GPR vs GPRegSet thingy...

lldb/source/Plugins/Process/FreeBSD/FreeBSDThread.cpp

165

I like this solution.

lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp

46

move this to the initializer list

lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp

85

I'd probably just delete this comment (or merge it with the leading comment above the array definition), and then let clang-format lay this out normally...

lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h

19

Why these names? I think [GF]PRegSet would be better for two reasons:

• the same names with the same purpose already exist in NativeRegisterContextNetBSD_x86_64.h
• it seems like a better way to differentiate from the [GF]PR structs below than adding a redundant ARM64 prefix.

[omjavaid]

lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp

46

ACK.

lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp

85

Let me check what clang-format emits.

lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h

19

Indeed ARM64 is redundant now that we have these enums in RegisterInfosPOSIX_arm64 . I will fix this in updated revision.

[omjavaid]

This revision fixed issues highlighted in last review.

LGTM?

[labath]

ship it.

lldb/source/Plugins/Process/FreeBSD/FreeBSDThread.cpp

 lldb::RegisterContextSP FreeBSDThread::GetRegisterContext() {
   if (!m_reg_context_sp) {
     m_posix_thread = nullptr;
 
     RegisterInfoInterface *reg_interface = nullptr;
     const ArchSpec &target_arch = GetProcess()->GetTarget().GetArchitecture();
 
     assert(target_arch.GetTriple().getOS() == llvm::Triple::FreeBSD);
     switch (target_arch.GetMachine()) {
     case llvm::Triple::aarch64:
-      reg_interface = new RegisterInfoPOSIX_arm64(target_arch);
       break;
     case llvm::Triple::arm:
       reg_interface = new RegisterInfoPOSIX_arm(target_arch);
       break;
     case llvm::Triple::ppc:
 #ifndef __powerpc64__
       reg_interface = new RegisterContextFreeBSD_powerpc32(target_arch);
       break;
case llvm::Triple::x86_64:
       break;
     default:
       llvm_unreachable("CPU not supported");
     }
 
     switch (target_arch.GetMachine()) {
     case llvm::Triple::aarch64: {
       RegisterContextPOSIXProcessMonitor_arm64 *reg_ctx =
-          new RegisterContextPOSIXProcessMonitor_arm64(*this, 0, reg_interface);
+          new RegisterContextPOSIXProcessMonitor_arm64(
+              *this, std::make_unique<RegisterInfoPOSIX_arm64>(target_arch));
       m_posix_thread = reg_ctx;
       m_reg_context_sp.reset(reg_ctx);
       break;
     }
     case llvm::Triple::arm: {
       RegisterContextPOSIXProcessMonitor_arm *reg_ctx =
           new RegisterContextPOSIXProcessMonitor_arm(*this, 0, reg_interface);
       m_posix_thread = reg_ctx;

lldb/source/Plugins/Process/FreeBSD/RegisterContextPOSIXProcessMonitor_arm64.h

 #include "Plugins/Process/Utility/RegisterContextPOSIX_arm64.h"
 #include "RegisterContextPOSIX.h"
 
 class RegisterContextPOSIXProcessMonitor_arm64
     : public RegisterContextPOSIX_arm64,
       public POSIXBreakpointProtocol {
 public:
   RegisterContextPOSIXProcessMonitor_arm64(
-      lldb_private::Thread &thread, uint32_t concrete_frame_idx,
-      lldb_private::RegisterInfoInterface *register_info);
+      lldb_private::Thread &thread,
+      std::unique_ptr<RegisterInfoPOSIX_arm64> register_info);
 
 protected:
   bool ReadGPR();
 
   bool ReadFPR();
 
   bool WriteGPR();
 

lldb/source/Plugins/Process/FreeBSD/RegisterContextPOSIXProcessMonitor_arm64.cpp

 
 #define REG_CONTEXT_SIZE (GetGPRSize())
 
 using namespace lldb;
 using namespace lldb_private;
 
 RegisterContextPOSIXProcessMonitor_arm64::
     RegisterContextPOSIXProcessMonitor_arm64(
-        lldb_private::Thread &thread, uint32_t concrete_frame_idx,
-        lldb_private::RegisterInfoInterface *register_info)
-    : RegisterContextPOSIX_arm64(thread, concrete_frame_idx, register_info) {}
+        lldb_private::Thread &thread,
+        std::unique_ptr<RegisterInfoPOSIX_arm64> register_info)
+    : RegisterContextPOSIX_arm64(thread, std::move(register_info)) {}
 
 ProcessMonitor &RegisterContextPOSIXProcessMonitor_arm64::GetMonitor() {
   lldb::ProcessSP base = CalculateProcess();
   ProcessFreeBSD *process = static_cast<ProcessFreeBSD *>(base.get());
   return process->GetMonitor();
 }
 
 bool RegisterContextPOSIXProcessMonitor_arm64::ReadGPR() {

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux.h

protected:
   virtual Status WriteGPR();
 
   virtual Status ReadFPR();
 
   virtual Status WriteFPR();
 
   virtual void *GetGPRBuffer() = 0;
 
-  virtual size_t GetGPRSize() {
+  virtual size_t GetGPRSize() const {
     return GetRegisterInfoInterface().GetGPRSize();
   }
 
   virtual void *GetFPRBuffer() = 0;
 
   virtual size_t GetFPRSize() = 0;
 
   virtual uint32_t GetPtraceOffset(uint32_t reg_index) {

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h

 //===-- NativeRegisterContextLinux_arm64.h ---------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #if defined(__arm64__) || defined(__aarch64__)
 
 #ifndef lldb_NativeRegisterContextLinux_arm64_h
 #define lldb_NativeRegisterContextLinux_arm64_h
 
 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
-#include "Plugins/Process/Utility/lldb-arm64-register-enums.h"
+#include "Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h"
 
 namespace lldb_private {
 namespace process_linux {
 
 class NativeProcessLinux;
 
 class NativeRegisterContextLinux_arm64 : public NativeRegisterContextLinux {
 public:
protected:
 
   void *GetGPRBuffer() override { return &m_gpr_arm64; }
 
   void *GetFPRBuffer() override { return &m_fpr; }
 
   size_t GetFPRSize() override { return sizeof(m_fpr); }
 
 private:
-  struct RegInfo {
-    uint32_t num_registers;
-    uint32_t num_gpr_registers;
-    uint32_t num_fpr_registers;
-
-    uint32_t last_gpr;
-    uint32_t first_fpr;
-    uint32_t last_fpr;
-
-    uint32_t first_fpr_v;
-    uint32_t last_fpr_v;
-
-    uint32_t gpr_flags;
-  };
-
-  // based on RegisterContextDarwin_arm64.h
-  struct VReg {
-    uint8_t bytes[16];
-  };
-
-  // based on RegisterContextDarwin_arm64.h
-  struct FPU {
-    VReg v[32];
-    uint32_t fpsr;
-    uint32_t fpcr;
-  };
-
-  struct GPR {
-    uint64_t x[31];
-    uint64_t sp;
-    uint64_t pc;
-    uint64_t pstate;
-  };
-
   bool m_gpr_is_valid;
   bool m_fpu_is_valid;
 
-  GPR m_gpr_arm64; // 64-bit general purpose registers.
-  RegInfo m_reg_info;
-  FPU m_fpr; // floating-point registers including extended register sets.
+  RegisterInfoPOSIX_arm64::GPR m_gpr_arm64; // 64-bit general purpose registers.
 
+  RegisterInfoPOSIX_arm64::FPU
+      m_fpr; // floating-point registers including extended register sets.
   // Debug register info for hardware breakpoints and watchpoints management.
   struct DREG {
     lldb::addr_t address;  // Breakpoint/watchpoint address value.
     lldb::addr_t hit_addr; // Address at which last watchpoint trigger exception
                            // occurred.
     lldb::addr_t real_addr; // Address value that should cause target to stop.
     uint32_t control;       // Breakpoint/watchpoint control value.
     uint32_t refcount;      // Serves as enable/disable and reference counter.
private:
 
   bool IsFPR(unsigned reg) const;
 
   Status ReadHardwareDebugInfo();
 
   Status WriteHardwareDebugRegs(int hwbType);
 
   uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const;
+
+  RegisterInfoPOSIX_arm64 &GetRegisterInfo() const;
 };
 
 } // namespace process_linux
 } // namespace lldb_private
 
 #endif // #ifndef lldb_NativeRegisterContextLinux_arm64_h
 
 #endif // defined (__arm64__) || defined (__aarch64__)

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp

 #include "lldb/Utility/DataBufferHeap.h"
 #include "lldb/Utility/Log.h"
 #include "lldb/Utility/RegisterValue.h"
 #include "lldb/Utility/Status.h"
 
 #include "Plugins/Process/Linux/NativeProcessLinux.h"
 #include "Plugins/Process/Linux/Procfs.h"
 #include "Plugins/Process/POSIX/ProcessPOSIXLog.h"
-#include "Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h"
 
 // System includes - They have to be included after framework includes because
 // they define some macros which collide with variable names in other modules
 #include <sys/socket.h>
 // NT_PRSTATUS and NT_FPREGSET definition
 #include <elf.h>
 // user_hwdebug_state definition
 #include <asm/ptrace.h>
 
 #define REG_CONTEXT_SIZE (GetGPRSize() + GetFPRSize())
 
 using namespace lldb;
 using namespace lldb_private;
 using namespace lldb_private::process_linux;
 
-// ARM64 general purpose registers.
-static const uint32_t g_gpr_regnums_arm64[] = {
-    gpr_x0_arm64,       gpr_x1_arm64,   gpr_x2_arm64,  gpr_x3_arm64,
-    gpr_x4_arm64,       gpr_x5_arm64,   gpr_x6_arm64,  gpr_x7_arm64,
-    gpr_x8_arm64,       gpr_x9_arm64,   gpr_x10_arm64, gpr_x11_arm64,
-    gpr_x12_arm64,      gpr_x13_arm64,  gpr_x14_arm64, gpr_x15_arm64,
-    gpr_x16_arm64,      gpr_x17_arm64,  gpr_x18_arm64, gpr_x19_arm64,
-    gpr_x20_arm64,      gpr_x21_arm64,  gpr_x22_arm64, gpr_x23_arm64,
-    gpr_x24_arm64,      gpr_x25_arm64,  gpr_x26_arm64, gpr_x27_arm64,
-    gpr_x28_arm64,      gpr_fp_arm64,   gpr_lr_arm64,  gpr_sp_arm64,
-    gpr_pc_arm64,       gpr_cpsr_arm64, gpr_w0_arm64,  gpr_w1_arm64,
-    gpr_w2_arm64,       gpr_w3_arm64,   gpr_w4_arm64,  gpr_w5_arm64,
-    gpr_w6_arm64,       gpr_w7_arm64,   gpr_w8_arm64,  gpr_w9_arm64,
-    gpr_w10_arm64,      gpr_w11_arm64,  gpr_w12_arm64, gpr_w13_arm64,
-    gpr_w14_arm64,      gpr_w15_arm64,  gpr_w16_arm64, gpr_w17_arm64,
-    gpr_w18_arm64,      gpr_w19_arm64,  gpr_w20_arm64, gpr_w21_arm64,
-    gpr_w22_arm64,      gpr_w23_arm64,  gpr_w24_arm64, gpr_w25_arm64,
-    gpr_w26_arm64,      gpr_w27_arm64,  gpr_w28_arm64,
-    LLDB_INVALID_REGNUM // register sets need to end with this flag
-};
-static_assert(((sizeof g_gpr_regnums_arm64 / sizeof g_gpr_regnums_arm64[0]) -
-               1) == k_num_gpr_registers_arm64,
-              "g_gpr_regnums_arm64 has wrong number of register infos");
-
-// ARM64 floating point registers.
-static const uint32_t g_fpu_regnums_arm64[] = {
-    fpu_v0_arm64,       fpu_v1_arm64,   fpu_v2_arm64,  fpu_v3_arm64,
-    fpu_v4_arm64,       fpu_v5_arm64,   fpu_v6_arm64,  fpu_v7_arm64,
-    fpu_v8_arm64,       fpu_v9_arm64,   fpu_v10_arm64, fpu_v11_arm64,
-    fpu_v12_arm64,      fpu_v13_arm64,  fpu_v14_arm64, fpu_v15_arm64,
-    fpu_v16_arm64,      fpu_v17_arm64,  fpu_v18_arm64, fpu_v19_arm64,
-    fpu_v20_arm64,      fpu_v21_arm64,  fpu_v22_arm64, fpu_v23_arm64,
-    fpu_v24_arm64,      fpu_v25_arm64,  fpu_v26_arm64, fpu_v27_arm64,
-    fpu_v28_arm64,      fpu_v29_arm64,  fpu_v30_arm64, fpu_v31_arm64,
-    fpu_s0_arm64,       fpu_s1_arm64,   fpu_s2_arm64,  fpu_s3_arm64,
-    fpu_s4_arm64,       fpu_s5_arm64,   fpu_s6_arm64,  fpu_s7_arm64,
-    fpu_s8_arm64,       fpu_s9_arm64,   fpu_s10_arm64, fpu_s11_arm64,
-    fpu_s12_arm64,      fpu_s13_arm64,  fpu_s14_arm64, fpu_s15_arm64,
-    fpu_s16_arm64,      fpu_s17_arm64,  fpu_s18_arm64, fpu_s19_arm64,
-    fpu_s20_arm64,      fpu_s21_arm64,  fpu_s22_arm64, fpu_s23_arm64,
-    fpu_s24_arm64,      fpu_s25_arm64,  fpu_s26_arm64, fpu_s27_arm64,
-    fpu_s28_arm64,      fpu_s29_arm64,  fpu_s30_arm64, fpu_s31_arm64,
-
-    fpu_d0_arm64,       fpu_d1_arm64,   fpu_d2_arm64,  fpu_d3_arm64,
-    fpu_d4_arm64,       fpu_d5_arm64,   fpu_d6_arm64,  fpu_d7_arm64,
-    fpu_d8_arm64,       fpu_d9_arm64,   fpu_d10_arm64, fpu_d11_arm64,
-    fpu_d12_arm64,      fpu_d13_arm64,  fpu_d14_arm64, fpu_d15_arm64,
-    fpu_d16_arm64,      fpu_d17_arm64,  fpu_d18_arm64, fpu_d19_arm64,
-    fpu_d20_arm64,      fpu_d21_arm64,  fpu_d22_arm64, fpu_d23_arm64,
-    fpu_d24_arm64,      fpu_d25_arm64,  fpu_d26_arm64, fpu_d27_arm64,
-    fpu_d28_arm64,      fpu_d29_arm64,  fpu_d30_arm64, fpu_d31_arm64,
-    fpu_fpsr_arm64,     fpu_fpcr_arm64,
-    LLDB_INVALID_REGNUM // register sets need to end with this flag
-};
-static_assert(((sizeof g_fpu_regnums_arm64 / sizeof g_fpu_regnums_arm64[0]) -
-               1) == k_num_fpr_registers_arm64,
-              "g_fpu_regnums_arm64 has wrong number of register infos");
-
-namespace {
-// Number of register sets provided by this context.
-enum { k_num_register_sets = 2 };
-}
-
-// Register sets for ARM64.
-static const RegisterSet g_reg_sets_arm64[k_num_register_sets] = {
-    {"General Purpose Registers", "gpr", k_num_gpr_registers_arm64,
-     g_gpr_regnums_arm64},
-    {"Floating Point Registers", "fpu", k_num_fpr_registers_arm64,
-     g_fpu_regnums_arm64}};
-
 std::unique_ptr<NativeRegisterContextLinux>
 NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread) {
   switch (target_arch.GetMachine()) {
   case llvm::Triple::arm:
     return std::make_unique<NativeRegisterContextLinux_arm>(target_arch,
                                                              native_thread);
   case llvm::Triple::aarch64:
     return std::make_unique<NativeRegisterContextLinux_arm64>(target_arch,
                                                                native_thread);
   default:
     llvm_unreachable("have no register context for architecture");
   }
 }
 
 NativeRegisterContextLinux_arm64::NativeRegisterContextLinux_arm64(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
     : NativeRegisterContextLinux(native_thread,
                                  new RegisterInfoPOSIX_arm64(target_arch)) {
-  switch (target_arch.GetMachine()) {
-  case llvm::Triple::aarch64:
-    m_reg_info.num_registers = k_num_registers_arm64;
-    m_reg_info.num_gpr_registers = k_num_gpr_registers_arm64;
-    m_reg_info.num_fpr_registers = k_num_fpr_registers_arm64;
-    m_reg_info.last_gpr = k_last_gpr_arm64;
-    m_reg_info.first_fpr = k_first_fpr_arm64;
-    m_reg_info.last_fpr = k_last_fpr_arm64;
-    m_reg_info.first_fpr_v = fpu_v0_arm64;
-    m_reg_info.last_fpr_v = fpu_v31_arm64;
-    m_reg_info.gpr_flags = gpr_cpsr_arm64;
-    break;
-  default:
-    llvm_unreachable("Unhandled target architecture.");
-    break;
-  }
-
   ::memset(&m_fpr, 0, sizeof(m_fpr));
   ::memset(&m_gpr_arm64, 0, sizeof(m_gpr_arm64));
   ::memset(&m_hwp_regs, 0, sizeof(m_hwp_regs));
   ::memset(&m_hbr_regs, 0, sizeof(m_hbr_regs));
 
   // 16 is just a maximum value, query hardware for actual watchpoint count
   m_max_hwp_supported = 16;
   m_max_hbp_supported = 16;
   m_refresh_hwdebug_info = true;
 
   m_gpr_is_valid = false;
   m_fpu_is_valid = false;
 }
 
+RegisterInfoPOSIX_arm64 &
+NativeRegisterContextLinux_arm64::GetRegisterInfo() const {
+  return static_cast<RegisterInfoPOSIX_arm64 &>(*m_register_info_interface_up);
+}
+
 uint32_t NativeRegisterContextLinux_arm64::GetRegisterSetCount() const {
-  return k_num_register_sets;
+  return GetRegisterInfo().GetRegisterSetCount();
 }
 
 const RegisterSet *
 NativeRegisterContextLinux_arm64::GetRegisterSet(uint32_t set_index) const {
-  if (set_index < k_num_register_sets)
-    return &g_reg_sets_arm64[set_index];
-
-  return nullptr;
+  return GetRegisterInfo().GetRegisterSet(set_index);
 }
 
 uint32_t NativeRegisterContextLinux_arm64::GetUserRegisterCount() const {
   uint32_t count = 0;
-  for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index)
-    count += g_reg_sets_arm64[set_index].num_registers;
+  for (uint32_t set_index = 0; set_index < GetRegisterSetCount(); ++set_index)
+    count += GetRegisterSet(set_index)->num_registers;
   return count;
 }
 
 Status
 NativeRegisterContextLinux_arm64::ReadRegister(const RegisterInfo *reg_info,
                                                RegisterValue &reg_value) {
   Status error;
 
Status NativeRegisterContextLinux_arm64::WriteAllRegisterValues(
   error = WriteFPR();
   if (error.Fail())
     return error;
 
   return error;
 }
 
 bool NativeRegisterContextLinux_arm64::IsGPR(unsigned reg) const {
-  return reg <= m_reg_info.last_gpr; // GPR's come first.
+  if (GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
+      RegisterInfoPOSIX_arm64::GPRegSet)
+    return true;
+  return false;
 }
 
 bool NativeRegisterContextLinux_arm64::IsFPR(unsigned reg) const {
-  return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
+  if (GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
+      RegisterInfoPOSIX_arm64::FPRegSet)
+    return true;
+  return false;
 }
 
 uint32_t NativeRegisterContextLinux_arm64::NumSupportedHardwareBreakpoints() {
   Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_BREAKPOINTS));
 
   LLDB_LOGF(log, "NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
 
   Status error;

 
 void NativeRegisterContextLinux_arm64::InvalidateAllRegisters() {
   m_gpr_is_valid = false;
   m_fpu_is_valid = false;
 }
 
 uint32_t NativeRegisterContextLinux_arm64::CalculateFprOffset(
     const RegisterInfo *reg_info) const {
-  return reg_info->byte_offset -
-         GetRegisterInfoAtIndex(m_reg_info.first_fpr)->byte_offset;
+  return reg_info->byte_offset - GetGPRSize();
 }
 
 #endif // defined (__arm64__) || defined (__aarch64__)

lldb/source/Plugins/Process/Utility/NativeRegisterContextRegisterInfo.h

public:
   uint32_t GetRegisterCount() const override;
 
   uint32_t GetUserRegisterCount() const override;
 
   const RegisterInfo *GetRegisterInfoAtIndex(uint32_t reg_index) const override;
 
   const RegisterInfoInterface &GetRegisterInfoInterface() const;
 
-private:
+protected:
   std::unique_ptr<RegisterInfoInterface> m_register_info_interface_up;
 };
 }
 #endif

lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h

 //===-- RegisterContextPOSIX_arm64.h ----------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_ARM64_H
 #define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_ARM64_H
 
 #include "RegisterInfoInterface.h"
+#include "RegisterInfoPOSIX_arm64.h"
 #include "lldb-arm64-register-enums.h"
 #include "lldb/Target/RegisterContext.h"
 #include "lldb/Utility/Log.h"
 
 class ProcessMonitor;
 
 class RegisterContextPOSIX_arm64 : public lldb_private::RegisterContext {
 public:
   RegisterContextPOSIX_arm64(
-      lldb_private::Thread &thread, uint32_t concrete_frame_idx,
-      lldb_private::RegisterInfoInterface *register_info);
+      lldb_private::Thread &thread,
+      std::unique_ptr<RegisterInfoPOSIX_arm64> register_info);
 
   ~RegisterContextPOSIX_arm64() override;
 
   void Invalidate();
 
   void InvalidateAllRegisters() override;
 
   size_t GetRegisterCount() override;
 
   virtual size_t GetGPRSize();
 
   virtual unsigned GetRegisterSize(unsigned reg);
 
   virtual unsigned GetRegisterOffset(unsigned reg);
 
   const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
 
   size_t GetRegisterSetCount() override;
 
   const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
 
   const char *GetRegisterName(unsigned reg);
 
 protected:
-  struct RegInfo {
-    uint32_t num_registers;
-    uint32_t num_gpr_registers;
-    uint32_t num_fpr_registers;
-
-    uint32_t last_gpr;
-    uint32_t first_fpr;
-    uint32_t last_fpr;
-
-    uint32_t first_fpr_v;
-    uint32_t last_fpr_v;
-
-    uint32_t gpr_flags;
-  };
-
-  // based on RegisterContextDarwin_arm64.h
-  struct VReg {
-    uint8_t bytes[16];
-  };
-
-  // based on RegisterContextDarwin_arm64.h
-  struct FPU {
-    VReg v[32];
-    uint32_t fpsr;
-    uint32_t fpcr;
-  };
-
   uint64_t m_gpr_arm64[lldb_private::k_num_gpr_registers_arm64]; // 64-bit
                                                                  // general
                                                                  // purpose
                                                                  // registers.
-  RegInfo m_reg_info;
-  struct RegisterContextPOSIX_arm64::FPU
-      m_fpr; // floating-point registers including extended register sets.
-  std::unique_ptr<lldb_private::RegisterInfoInterface>
-      m_register_info_up; // Register Info Interface (FreeBSD or Linux)
 
-  // Determines if an extended register set is supported on the processor
-  // running the inferior process.
-  virtual bool IsRegisterSetAvailable(size_t set_index);
+  struct RegisterInfoPOSIX_arm64::FPU
+      m_fpr; // floating-point registers including extended register sets.
+  std::unique_ptr<RegisterInfoPOSIX_arm64> m_register_info_up;
 
   virtual const lldb_private::RegisterInfo *GetRegisterInfo();
 
   bool IsGPR(unsigned reg);
 
   bool IsFPR(unsigned reg);
 
+  size_t GetFPUSize() { return sizeof(RegisterInfoPOSIX_arm64::FPU); }
+
   virtual bool ReadGPR() = 0;
   virtual bool ReadFPR() = 0;
   virtual bool WriteGPR() = 0;
   virtual bool WriteFPR() = 0;
 };
 
 #endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_ARM64_H

lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp

 #include "lldb/Utility/Scalar.h"
 #include "llvm/Support/Compiler.h"
 
 #include "RegisterContextPOSIX_arm64.h"
 
 using namespace lldb;
 using namespace lldb_private;
 
-// ARM64 general purpose registers.
-const uint32_t g_gpr_regnums_arm64[] = {
-    gpr_x0_arm64,       gpr_x1_arm64,   gpr_x2_arm64,  gpr_x3_arm64,
-    gpr_x4_arm64,       gpr_x5_arm64,   gpr_x6_arm64,  gpr_x7_arm64,
-    gpr_x8_arm64,       gpr_x9_arm64,   gpr_x10_arm64, gpr_x11_arm64,
-    gpr_x12_arm64,      gpr_x13_arm64,  gpr_x14_arm64, gpr_x15_arm64,
-    gpr_x16_arm64,      gpr_x17_arm64,  gpr_x18_arm64, gpr_x19_arm64,
-    gpr_x20_arm64,      gpr_x21_arm64,  gpr_x22_arm64, gpr_x23_arm64,
-    gpr_x24_arm64,      gpr_x25_arm64,  gpr_x26_arm64, gpr_x27_arm64,
-    gpr_x28_arm64,      gpr_fp_arm64,   gpr_lr_arm64,  gpr_sp_arm64,
-    gpr_pc_arm64,       gpr_cpsr_arm64, gpr_w0_arm64,  gpr_w1_arm64,
-    gpr_w2_arm64,       gpr_w3_arm64,   gpr_w4_arm64,  gpr_w5_arm64,
-    gpr_w6_arm64,       gpr_w7_arm64,   gpr_w8_arm64,  gpr_w9_arm64,
-    gpr_w10_arm64,      gpr_w11_arm64,  gpr_w12_arm64, gpr_w13_arm64,
-    gpr_w14_arm64,      gpr_w15_arm64,  gpr_w16_arm64, gpr_w17_arm64,
-    gpr_w18_arm64,      gpr_w19_arm64,  gpr_w20_arm64, gpr_w21_arm64,
-    gpr_w22_arm64,      gpr_w23_arm64,  gpr_w24_arm64, gpr_w25_arm64,
-    gpr_w26_arm64,      gpr_w27_arm64,  gpr_w28_arm64,
-    LLDB_INVALID_REGNUM // register sets need to end with this flag
-};
-static_assert(((sizeof g_gpr_regnums_arm64 / sizeof g_gpr_regnums_arm64[0]) -
-               1) == k_num_gpr_registers_arm64,
-              "g_gpr_regnums_arm64 has wrong number of register infos");
-
-// ARM64 floating point registers.
-static const uint32_t g_fpu_regnums_arm64[] = {
-    fpu_v0_arm64,       fpu_v1_arm64,   fpu_v2_arm64,  fpu_v3_arm64,
-    fpu_v4_arm64,       fpu_v5_arm64,   fpu_v6_arm64,  fpu_v7_arm64,
-    fpu_v8_arm64,       fpu_v9_arm64,   fpu_v10_arm64, fpu_v11_arm64,
-    fpu_v12_arm64,      fpu_v13_arm64,  fpu_v14_arm64, fpu_v15_arm64,
-    fpu_v16_arm64,      fpu_v17_arm64,  fpu_v18_arm64, fpu_v19_arm64,
-    fpu_v20_arm64,      fpu_v21_arm64,  fpu_v22_arm64, fpu_v23_arm64,
-    fpu_v24_arm64,      fpu_v25_arm64,  fpu_v26_arm64, fpu_v27_arm64,
-    fpu_v28_arm64,      fpu_v29_arm64,  fpu_v30_arm64, fpu_v31_arm64,
-    fpu_s0_arm64,       fpu_s1_arm64,   fpu_s2_arm64,  fpu_s3_arm64,
-    fpu_s4_arm64,       fpu_s5_arm64,   fpu_s6_arm64,  fpu_s7_arm64,
-    fpu_s8_arm64,       fpu_s9_arm64,   fpu_s10_arm64, fpu_s11_arm64,
-    fpu_s12_arm64,      fpu_s13_arm64,  fpu_s14_arm64, fpu_s15_arm64,
-    fpu_s16_arm64,      fpu_s17_arm64,  fpu_s18_arm64, fpu_s19_arm64,
-    fpu_s20_arm64,      fpu_s21_arm64,  fpu_s22_arm64, fpu_s23_arm64,
-    fpu_s24_arm64,      fpu_s25_arm64,  fpu_s26_arm64, fpu_s27_arm64,
-    fpu_s28_arm64,      fpu_s29_arm64,  fpu_s30_arm64, fpu_s31_arm64,
-
-    fpu_d0_arm64,       fpu_d1_arm64,   fpu_d2_arm64,  fpu_d3_arm64,
-    fpu_d4_arm64,       fpu_d5_arm64,   fpu_d6_arm64,  fpu_d7_arm64,
-    fpu_d8_arm64,       fpu_d9_arm64,   fpu_d10_arm64, fpu_d11_arm64,
-    fpu_d12_arm64,      fpu_d13_arm64,  fpu_d14_arm64, fpu_d15_arm64,
-    fpu_d16_arm64,      fpu_d17_arm64,  fpu_d18_arm64, fpu_d19_arm64,
-    fpu_d20_arm64,      fpu_d21_arm64,  fpu_d22_arm64, fpu_d23_arm64,
-    fpu_d24_arm64,      fpu_d25_arm64,  fpu_d26_arm64, fpu_d27_arm64,
-    fpu_d28_arm64,      fpu_d29_arm64,  fpu_d30_arm64, fpu_d31_arm64,
-    fpu_fpsr_arm64,     fpu_fpcr_arm64,
-    LLDB_INVALID_REGNUM // register sets need to end with this flag
-};
-static_assert(((sizeof g_fpu_regnums_arm64 / sizeof g_fpu_regnums_arm64[0]) -
-               1) == k_num_fpr_registers_arm64,
-              "g_fpu_regnums_arm64 has wrong number of register infos");
-
-// Number of register sets provided by this context.
-enum { k_num_register_sets = 2 };
-
-// Register sets for ARM64.
-static const lldb_private::RegisterSet g_reg_sets_arm64[k_num_register_sets] = {
-    {"General Purpose Registers", "gpr", k_num_gpr_registers_arm64,
-     g_gpr_regnums_arm64},
-    {"Floating Point Registers", "fpu", k_num_fpr_registers_arm64,
-     g_fpu_regnums_arm64}};
-
 bool RegisterContextPOSIX_arm64::IsGPR(unsigned reg) {
-  return reg <= m_reg_info.last_gpr; // GPR's come first.
+  if (m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
+      RegisterInfoPOSIX_arm64::GPRegSet)
+    return true;
+  return false;
 }
 
 bool RegisterContextPOSIX_arm64::IsFPR(unsigned reg) {
-  return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr);
+  if (m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
+      RegisterInfoPOSIX_arm64::FPRegSet)
+    return true;
+  return false;
 }
 
 RegisterContextPOSIX_arm64::RegisterContextPOSIX_arm64(
-    lldb_private::Thread &thread, uint32_t concrete_frame_idx,
-    lldb_private::RegisterInfoInterface *register_info)
-    : lldb_private::RegisterContext(thread, concrete_frame_idx) {
-  m_register_info_up.reset(register_info);
-
-  switch (register_info->m_target_arch.GetMachine()) {
-  case llvm::Triple::aarch64:
-  case llvm::Triple::aarch64_32:
-    m_reg_info.num_registers = k_num_registers_arm64;
-    m_reg_info.num_gpr_registers = k_num_gpr_registers_arm64;
-    m_reg_info.num_fpr_registers = k_num_fpr_registers_arm64;
-    m_reg_info.last_gpr = k_last_gpr_arm64;
-    m_reg_info.first_fpr = k_first_fpr_arm64;
-    m_reg_info.last_fpr = k_last_fpr_arm64;
-    m_reg_info.first_fpr_v = fpu_v0_arm64;
-    m_reg_info.last_fpr_v = fpu_v31_arm64;
-    m_reg_info.gpr_flags = gpr_cpsr_arm64;
-    break;
-  default:
-    assert(false && "Unhandled target architecture.");
-    break;
-  }
+    lldb_private::Thread &thread,
+    std::unique_ptr<RegisterInfoPOSIX_arm64> register_info)
+    : lldb_private::RegisterContext(thread, 0),
+      m_register_info_up(std::move(register_info)) {
 
   ::memset(&m_fpr, 0, sizeof m_fpr);
 }
 
 RegisterContextPOSIX_arm64::~RegisterContextPOSIX_arm64() {}
 
 void RegisterContextPOSIX_arm64::Invalidate() {}
 
 void RegisterContextPOSIX_arm64::InvalidateAllRegisters() {}
 
 unsigned RegisterContextPOSIX_arm64::GetRegisterOffset(unsigned reg) {
-  assert(reg < m_reg_info.num_registers && "Invalid register number.");
-  return GetRegisterInfo()[reg].byte_offset;
+  return m_register_info_up->GetRegisterInfo()[reg].byte_offset;
 }
 
 unsigned RegisterContextPOSIX_arm64::GetRegisterSize(unsigned reg) {
-  assert(reg < m_reg_info.num_registers && "Invalid register number.");
-  return GetRegisterInfo()[reg].byte_size;
+  return m_register_info_up->GetRegisterInfo()[reg].byte_size;
 }
 
 size_t RegisterContextPOSIX_arm64::GetRegisterCount() {
-  size_t num_registers =
-      m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers;
-  return num_registers;
+  return m_register_info_up->GetRegisterCount();
 }
 
 size_t RegisterContextPOSIX_arm64::GetGPRSize() {
   return m_register_info_up->GetGPRSize();
 }
 
 const lldb_private::RegisterInfo *
 RegisterContextPOSIX_arm64::GetRegisterInfo() {
   // Commonly, this method is overridden and g_register_infos is copied and
   // specialized. So, use GetRegisterInfo() rather than g_register_infos in
   // this scope.
   return m_register_info_up->GetRegisterInfo();
 }
 
 const lldb_private::RegisterInfo *
 RegisterContextPOSIX_arm64::GetRegisterInfoAtIndex(size_t reg) {
-  if (reg < m_reg_info.num_registers)
+  if (reg < GetRegisterCount())
     return &GetRegisterInfo()[reg];
   else
     return nullptr;
 }
 
 size_t RegisterContextPOSIX_arm64::GetRegisterSetCount() {
-  size_t sets = 0;
-  for (size_t set = 0; set < k_num_register_sets; ++set) {
-    if (IsRegisterSetAvailable(set))
-      ++sets;
-  }
-
-  return sets;
-}
-
-bool RegisterContextPOSIX_arm64::IsRegisterSetAvailable(size_t set_index) {
-  return set_index < k_num_register_sets;
+  return m_register_info_up->GetRegisterSetCount();
 }
 
 const lldb_private::RegisterSet *
 RegisterContextPOSIX_arm64::GetRegisterSet(size_t set) {
-  if (IsRegisterSetAvailable(set)) {
-    switch (m_register_info_up->m_target_arch.GetMachine()) {
-    case llvm::Triple::aarch64:
-    case llvm::Triple::aarch64_32:
-      return &g_reg_sets_arm64[set];
-    default:
-      assert(false && "Unhandled target architecture.");
-      return nullptr;
-    }
-  }
-  return nullptr;
+  return m_register_info_up->GetRegisterSet(set);
 }
 
 const char *RegisterContextPOSIX_arm64::GetRegisterName(unsigned reg) {
-  assert(reg < m_reg_info.num_registers && "Invalid register offset.");
+  if (reg < GetRegisterCount())
     return GetRegisterInfo()[reg].name;
+  return nullptr;
 }

lldb/source/Plugins/Process/Utility/RegisterInfoAndSetInterface.h

+//===-- RegisterInfoAndSetInterface.h ---------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOANDSETINTERFACE_H
+#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOANDSETINTERFACE_H
+
+#include "RegisterInfoInterface.h"
+
+#include "lldb/Utility/ArchSpec.h"
+#include "lldb/lldb-private-types.h"
+#include <vector>
+
+namespace lldb_private {
+
+class RegisterInfoAndSetInterface : public RegisterInfoInterface {
+public:
+  RegisterInfoAndSetInterface(const lldb_private::ArchSpec &target_arch)
+      : RegisterInfoInterface(target_arch) {}
+
+  virtual size_t GetFPRSize() const = 0;
+
+  virtual const lldb_private::RegisterSet *
+  GetRegisterSet(size_t reg_set) const = 0;
+
+  virtual size_t GetRegisterSetCount() const = 0;
+
+  virtual size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const = 0;
+};
+} // namespace lldb_private
+
+#endif

lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h

 //===-- RegisterInfoPOSIX_arm64.h -------------------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_ARM64_H
 #define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_ARM64_H
 
-#include "RegisterInfoInterface.h"
+#include "RegisterInfoAndSetInterface.h"
 #include "lldb/Target/RegisterContext.h"
 #include "lldb/lldb-private.h"
 
-class RegisterInfoPOSIX_arm64 : public lldb_private::RegisterInfoInterface {
+class RegisterInfoPOSIX_arm64
+    : public lldb_private::RegisterInfoAndSetInterface {
 public:
+  enum { GPRegSet = 0, FPRegSet };
+
   // based on RegisterContextDarwin_arm64.h
   struct GPR {
     uint64_t x[29]; // x0-x28
     uint64_t fp;    // x29
     uint64_t lr;    // x30
     uint64_t sp;    // x31
     uint64_t pc;    // pc
     uint32_t cpsr;  // cpsr
   };
 
   // based on RegisterContextDarwin_arm64.h
   struct VReg {
     uint8_t bytes[16];
   };
 
struct DBG {
     uint64_t wcr[16];
     uint64_t mdscr_el1;
   };
 
   RegisterInfoPOSIX_arm64(const lldb_private::ArchSpec &target_arch);
 
   size_t GetGPRSize() const override;
 
+  size_t GetFPRSize() const override;
+
   const lldb_private::RegisterInfo *GetRegisterInfo() const override;
 
   uint32_t GetRegisterCount() const override;
 
+  const lldb_private::RegisterSet *
+  GetRegisterSet(size_t reg_set) const override;
+
+  size_t GetRegisterSetCount() const override;
+
+  size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override;
+
 private:
+  uint32_t num_registers;
+  uint32_t num_gpr_registers;
+  uint32_t num_fpr_registers;
+
+  uint32_t last_gpr;
+  uint32_t first_fpr;
+  uint32_t last_fpr;
+
   const lldb_private::RegisterInfo *m_register_info_p;
   uint32_t m_register_info_count;
 };
 
 #endif

lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp

GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) {
   case llvm::Triple::aarch64_32:
     return g_register_infos_arm64_le;
   default:
     assert(false && "Unhandled target architecture.");
     return nullptr;
   }
 }
 
+// Number of register sets provided by this context.
+enum {
+  k_num_gpr_registers = gpr_w28 - gpr_x0 + 1,
+  k_num_fpr_registers = fpu_fpcr - fpu_v0 + 1,
+  k_num_register_sets = 2
+};
+
+// ARM64 general purpose registers.
+static const uint32_t g_gpr_regnums_arm64[] = {
+    gpr_x0,  gpr_x1,   gpr_x2,  gpr_x3,
+    gpr_x4,  gpr_x5,   gpr_x6,  gpr_x7,
+    gpr_x8,  gpr_x9,   gpr_x10, gpr_x11,
+    gpr_x12, gpr_x13,  gpr_x14, gpr_x15,
+    gpr_x16, gpr_x17,  gpr_x18, gpr_x19,
+    gpr_x20, gpr_x21,  gpr_x22, gpr_x23,
+    gpr_x24, gpr_x25,  gpr_x26, gpr_x27,
+    gpr_x28, gpr_fp,   gpr_lr,  gpr_sp,
+    gpr_pc,  gpr_cpsr, gpr_w0,  gpr_w1,
+    gpr_w2,  gpr_w3,   gpr_w4,  gpr_w5,
+    gpr_w6,  gpr_w7,   gpr_w8,  gpr_w9,
+    gpr_w10, gpr_w11,  gpr_w12, gpr_w13,
+    gpr_w14, gpr_w15,  gpr_w16, gpr_w17,
+    gpr_w18, gpr_w19,  gpr_w20, gpr_w21,
+    gpr_w22, gpr_w23,  gpr_w24, gpr_w25,
+    gpr_w26, gpr_w27,  gpr_w28, LLDB_INVALID_REGNUM};
+
+static_assert(((sizeof g_gpr_regnums_arm64 / sizeof g_gpr_regnums_arm64[0]) -
+               1) == k_num_gpr_registers,
+              "g_gpr_regnums_arm64 has wrong number of register infos");
+
+// ARM64 floating point registers.
+static const uint32_t g_fpu_regnums_arm64[] = {
+    fpu_v0,   fpu_v1,   fpu_v2,
+    fpu_v3,   fpu_v4,   fpu_v5,
+    fpu_v6,   fpu_v7,   fpu_v8,
+    fpu_v9,   fpu_v10,  fpu_v11,
+    fpu_v12,  fpu_v13,  fpu_v14,
+    fpu_v15,  fpu_v16,  fpu_v17,
+    fpu_v18,  fpu_v19,  fpu_v20,
+    fpu_v21,  fpu_v22,  fpu_v23,
+    fpu_v24,  fpu_v25,  fpu_v26,
+    fpu_v27,  fpu_v28,  fpu_v29,
+    fpu_v30,  fpu_v31,  fpu_s0,
+    fpu_s1,   fpu_s2,   fpu_s3,
+    fpu_s4,   fpu_s5,   fpu_s6,
+    fpu_s7,   fpu_s8,   fpu_s9,
+    fpu_s10,  fpu_s11,  fpu_s12,
+    fpu_s13,  fpu_s14,  fpu_s15,
+    fpu_s16,  fpu_s17,  fpu_s18,
+    fpu_s19,  fpu_s20,  fpu_s21,
+    fpu_s22,  fpu_s23,  fpu_s24,
+    fpu_s25,  fpu_s26,  fpu_s27,
+    fpu_s28,  fpu_s29,  fpu_s30,
+    fpu_s31,  fpu_d0,   fpu_d1,
+    fpu_d2,   fpu_d3,   fpu_d4,
+    fpu_d5,   fpu_d6,   fpu_d7,
+    fpu_d8,   fpu_d9,   fpu_d10,
+    fpu_d11,  fpu_d12,  fpu_d13,
+    fpu_d14,  fpu_d15,  fpu_d16,
+    fpu_d17,  fpu_d18,  fpu_d19,
+    fpu_d20,  fpu_d21,  fpu_d22,
+    fpu_d23,  fpu_d24,  fpu_d25,
+    fpu_d26,  fpu_d27,  fpu_d28,
+    fpu_d29,  fpu_d30,  fpu_d31,
+    fpu_fpsr, fpu_fpcr, LLDB_INVALID_REGNUM};
+static_assert(((sizeof g_fpu_regnums_arm64 / sizeof g_fpu_regnums_arm64[0]) -
+               1) == k_num_fpr_registers,
+              "g_fpu_regnums_arm64 has wrong number of register infos");
+// clang-format on
+// Register sets for ARM64.
+static const lldb_private::RegisterSet g_reg_sets_arm64[k_num_register_sets] = {
+    {"General Purpose Registers", "gpr", k_num_gpr_registers,
+     g_gpr_regnums_arm64},
+    {"Floating Point Registers", "fpu", k_num_fpr_registers,
+     g_fpu_regnums_arm64}};
+
 static uint32_t
 GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) {
   switch (target_arch.GetMachine()) {
   case llvm::Triple::aarch64:
   case llvm::Triple::aarch64_32:
     return static_cast<uint32_t>(sizeof(g_register_infos_arm64_le) /
                                  sizeof(g_register_infos_arm64_le[0]));
   default:
     assert(false && "Unhandled target architecture.");
     return 0;
   }
 }
 
 RegisterInfoPOSIX_arm64::RegisterInfoPOSIX_arm64(
     const lldb_private::ArchSpec &target_arch)
-    : lldb_private::RegisterInfoInterface(target_arch),
+    : lldb_private::RegisterInfoAndSetInterface(target_arch),
       m_register_info_p(GetRegisterInfoPtr(target_arch)),
-      m_register_info_count(GetRegisterInfoCount(target_arch)) {}
+      m_register_info_count(GetRegisterInfoCount(target_arch)) {
+
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::aarch64:
+  case llvm::Triple::aarch64_32:
+    num_registers = k_num_gpr_registers + k_num_fpr_registers;
+    num_gpr_registers = k_num_gpr_registers;
+    num_fpr_registers = k_num_fpr_registers;
+    last_gpr = gpr_w28;
+    first_fpr = fpu_v0;
+    last_fpr = fpu_fpcr;
+    break;
+  default:
+    assert(false && "Unhandled target architecture.");
+    break;
+  }
+}
+
+uint32_t RegisterInfoPOSIX_arm64::GetRegisterCount() const {
+  return num_gpr_registers + num_fpr_registers;
+}
 
 size_t RegisterInfoPOSIX_arm64::GetGPRSize() const {
   return sizeof(struct RegisterInfoPOSIX_arm64::GPR);
 }
 
+size_t RegisterInfoPOSIX_arm64::GetFPRSize() const {
+  return sizeof(struct RegisterInfoPOSIX_arm64::FPU);
+}
+
 const lldb_private::RegisterInfo *
 RegisterInfoPOSIX_arm64::GetRegisterInfo() const {
   return m_register_info_p;
 }
 
-uint32_t RegisterInfoPOSIX_arm64::GetRegisterCount() const {
-  return m_register_info_count;
+size_t RegisterInfoPOSIX_arm64::GetRegisterSetCount() const {
+  return k_num_register_sets;
+}
+
+size_t RegisterInfoPOSIX_arm64::GetRegisterSetFromRegisterIndex(
+    uint32_t reg_index) const {
+  if (reg_index <= last_gpr)
+    return GPRegSet;
+  else if (reg_index <= last_fpr)
+    return FPRegSet;
+  return LLDB_INVALID_REGNUM;
+}
+
+const lldb_private::RegisterSet *
+RegisterInfoPOSIX_arm64::GetRegisterSet(size_t set_index) const {
+  if (set_index < k_num_register_sets)
+    return &g_reg_sets_arm64[set_index];
+
+  return nullptr;
 }

lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.h

 #include "Plugins/Process/elf-core/RegisterUtilities.h"
 #include "lldb/Utility/DataBufferHeap.h"
 #include "lldb/Utility/DataExtractor.h"
 
 class RegisterContextCorePOSIX_arm64 : public RegisterContextPOSIX_arm64 {
 public:
   RegisterContextCorePOSIX_arm64(
       lldb_private::Thread &thread,
-      lldb_private::RegisterInfoInterface *register_info,
+      std::unique_ptr<RegisterInfoPOSIX_arm64> register_info,
       const lldb_private::DataExtractor &gpregset,
       llvm::ArrayRef<lldb_private::CoreNote> notes);
 
   ~RegisterContextCorePOSIX_arm64() override;
 
   bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
                     lldb_private::RegisterValue &value) override;
 

lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp

 #include "lldb/Target/Thread.h"
 #include "lldb/Utility/RegisterValue.h"
 
 #include <memory>
 
 using namespace lldb_private;
 
 RegisterContextCorePOSIX_arm64::RegisterContextCorePOSIX_arm64(
-    Thread &thread, RegisterInfoInterface *register_info,
+    Thread &thread, std::unique_ptr<RegisterInfoPOSIX_arm64> register_info,
     const DataExtractor &gpregset, llvm::ArrayRef<CoreNote> notes)
-    : RegisterContextPOSIX_arm64(thread, 0, register_info) {
+    : RegisterContextPOSIX_arm64(thread, std::move(register_info)) {
   m_gpr_buffer = std::make_shared<DataBufferHeap>(gpregset.GetDataStart(),
                                                   gpregset.GetByteSize());
   m_gpr.SetData(m_gpr_buffer);
   m_gpr.SetByteOrder(gpregset.GetByteOrder());
 
   m_fpregset = getRegset(
-      notes, register_info->GetTargetArchitecture().GetTriple(), FPR_Desc);
+      notes, m_register_info_up->GetTargetArchitecture().GetTriple(), FPR_Desc);
 }
 
 RegisterContextCorePOSIX_arm64::~RegisterContextCorePOSIX_arm64() {}
 
 bool RegisterContextCorePOSIX_arm64::ReadGPR() { return true; }
 
 bool RegisterContextCorePOSIX_arm64::ReadFPR() { return false; }
 
if (offset + reg_info->byte_size <= GetGPRSize()) {
     }
   }
 
   const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
   if (reg == LLDB_INVALID_REGNUM)
     return false;
 
   offset -= GetGPRSize();
-  if (IsFPR(reg) && offset + reg_info->byte_size <= sizeof(FPU)) {
+  if (IsFPR(reg) && offset + reg_info->byte_size <= GetFPUSize()) {
     Status error;
     value.SetFromMemoryData(reg_info, m_fpregset.GetDataStart() + offset,
                             reg_info->byte_size, lldb::eByteOrderLittle, error);
     return error.Success();
   }
 
   return false;
 }

lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp

ThreadElfCore::CreateRegisterContextForFrame(StackFrame *frame) {
   if (concrete_frame_idx == 0) {
     if (m_thread_reg_ctx_sp)
       return m_thread_reg_ctx_sp;
 
     ProcessElfCore *process = static_cast<ProcessElfCore *>(GetProcess().get());
     ArchSpec arch = process->GetArchitecture();
     RegisterInfoInterface *reg_interface = nullptr;
 
     switch (arch.GetTriple().getOS()) {
     case llvm::Triple::FreeBSD: {
       switch (arch.GetMachine()) {
       case llvm::Triple::aarch64:
-        reg_interface = new RegisterInfoPOSIX_arm64(arch);
         break;
       case llvm::Triple::arm:
         reg_interface = new RegisterInfoPOSIX_arm(arch);
         break;
       case llvm::Triple::ppc:
         reg_interface = new RegisterContextFreeBSD_powerpc32(arch);
         break;
       case llvm::Triple::ppc64:
case llvm::Triple::FreeBSD: {
         break;
       }
       break;
     }
 
     case llvm::Triple::NetBSD: {
       switch (arch.GetMachine()) {
       case llvm::Triple::aarch64:
-        reg_interface = new RegisterInfoPOSIX_arm64(arch);
         break;
       case llvm::Triple::x86_64:
         reg_interface = new RegisterContextNetBSD_x86_64(arch);
         break;
       default:
         break;
       }
       break;
     }
 
     case llvm::Triple::Linux: {
       switch (arch.GetMachine()) {
       case llvm::Triple::arm:
         reg_interface = new RegisterInfoPOSIX_arm(arch);
         break;
       case llvm::Triple::aarch64:
-        reg_interface = new RegisterInfoPOSIX_arm64(arch);
         break;
       case llvm::Triple::mipsel:
       case llvm::Triple::mips:
         reg_interface = new RegisterContextLinux_mips(arch);
         break;
       case llvm::Triple::mips64el:
       case llvm::Triple::mips64:
         reg_interface = new RegisterContextLinux_mips64(arch);
case llvm::Triple::Linux: {
         break;
       }
       break;
     }
 
     case llvm::Triple::OpenBSD: {
       switch (arch.GetMachine()) {
       case llvm::Triple::aarch64:
-        reg_interface = new RegisterInfoPOSIX_arm64(arch);
         break;
       case llvm::Triple::arm:
         reg_interface = new RegisterInfoPOSIX_arm(arch);
         break;
       case llvm::Triple::x86:
         reg_interface = new RegisterContextOpenBSD_i386(arch);
         break;
       case llvm::Triple::x86_64:
         reg_interface = new RegisterContextOpenBSD_x86_64(arch);
         break;
       default:
         break;
       }
       break;
     }
 
     default:
       break;
     }
 
-    if (!reg_interface) {
+    if (!reg_interface && arch.GetMachine() != llvm::Triple::aarch64) {
       LLDB_LOGF(log, "elf-core::%s:: Architecture(%d) or OS(%d) not supported",
                 __FUNCTION__, arch.GetMachine(), arch.GetTriple().getOS());
       assert(false && "Architecture or OS not supported");
     }
 
     switch (arch.GetMachine()) {
     case llvm::Triple::aarch64:
       m_thread_reg_ctx_sp = std::make_shared<RegisterContextCorePOSIX_arm64>(
-          *this, reg_interface, m_gpregset_data, m_notes);
+          *this, std::make_unique<RegisterInfoPOSIX_arm64>(arch),
+          m_gpregset_data, m_notes);
       break;
     case llvm::Triple::arm:
       m_thread_reg_ctx_sp = std::make_shared<RegisterContextCorePOSIX_arm>(
           *this, reg_interface, m_gpregset_data, m_notes);
       break;
     case llvm::Triple::mipsel:
     case llvm::Triple::mips:
       m_thread_reg_ctx_sp = std::make_shared<RegisterContextCorePOSIX_mips64>(