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[MLIR] Fix affine loop tiling utility upper bound bug
ClosedPublic

Authored by bondhugula on Apr 20 2020, 10:01 AM.

Details

Summary

Fix intra-tile upper bound setting in a scenario where the tile size was
larger than the trip count.

Diff Detail

Event Timeline

bondhugula created this revision.Apr 20 2020, 10:01 AM

fix comment + cleanup test case

Drop white space in test case

Harbormaster completed remote builds in B53977: Diff 258781.
Harbormaster completed remote builds in B53978: Diff 258782.

Use an alternative equivalent method that is better.

andydavis1 accepted this revision.Apr 20 2020, 11:37 AM
This revision is now accepted and ready to land.Apr 20 2020, 11:37 AM
This revision was automatically updated to reflect the committed changes.