diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -960,6 +960,69 @@
 def : InstAlias<"cntlzw $rA, $rS", (CNTLZW8 g8rc:$rA, g8rc:$rS)>;
 def : InstAlias<"cntlzw. $rA, $rS", (CNTLZW8_rec g8rc:$rA, g8rc:$rS)>;
 
+def : InstAlias<"mtxer $Rx", (MTSPR8 1, g8rc:$Rx)>;
+def : InstAlias<"mfxer $Rx", (MFSPR8 g8rc:$Rx, 1)>;
+
+def : InstAlias<"mtudscr $Rx", (MTSPR8 3, g8rc:$Rx)>;
+def : InstAlias<"mfudscr $Rx", (MFSPR8 g8rc:$Rx, 3)>;
+
+def : InstAlias<"mfrtcu $Rx", (MFSPR8 g8rc:$Rx, 4)>;
+def : InstAlias<"mfrtcl $Rx", (MFSPR8 g8rc:$Rx, 5)>;
+
+def : InstAlias<"mtlr $Rx", (MTSPR8 8, g8rc:$Rx)>;
+def : InstAlias<"mflr $Rx", (MFSPR8 g8rc:$Rx, 8)>;
+
+def : InstAlias<"mtctr $Rx", (MTSPR8 9, g8rc:$Rx)>;
+def : InstAlias<"mfctr $Rx", (MFSPR8 g8rc:$Rx, 9)>;
+
+def : InstAlias<"mtuamr $Rx", (MTSPR8 13, g8rc:$Rx)>;
+def : InstAlias<"mfuamr $Rx", (MFSPR8 g8rc:$Rx, 13)>;
+
+def : InstAlias<"mtdscr $Rx", (MTSPR8 17, g8rc:$Rx)>;
+def : InstAlias<"mfdscr $Rx", (MFSPR8 g8rc:$Rx, 17)>;
+
+def : InstAlias<"mtdsisr $Rx", (MTSPR8 18, g8rc:$Rx)>;
+def : InstAlias<"mfdsisr $Rx", (MFSPR8 g8rc:$Rx, 18)>;
+
+def : InstAlias<"mtdar $Rx", (MTSPR8 19, g8rc:$Rx)>;
+def : InstAlias<"mfdar $Rx", (MFSPR8 g8rc:$Rx, 19)>;
+
+def : InstAlias<"mtdec $Rx", (MTSPR8 22, g8rc:$Rx)>;
+def : InstAlias<"mfdec $Rx", (MFSPR8 g8rc:$Rx, 22)>;
+
+def : InstAlias<"mtsdr1 $Rx", (MTSPR8 25, g8rc:$Rx)>;
+def : InstAlias<"mfsdr1 $Rx", (MFSPR8 g8rc:$Rx, 25)>;
+
+def : InstAlias<"mtsrr0 $Rx", (MTSPR8 26, g8rc:$Rx)>;
+def : InstAlias<"mfsrr0 $Rx", (MFSPR8 g8rc:$Rx, 26)>;
+
+def : InstAlias<"mtsrr1 $Rx", (MTSPR8 27, g8rc:$Rx)>;
+def : InstAlias<"mfsrr1 $Rx", (MFSPR8 g8rc:$Rx, 27)>;
+
+def : InstAlias<"mtcfar $Rx", (MTSPR8 28, g8rc:$Rx)>;
+def : InstAlias<"mfcfar $Rx", (MFSPR8 g8rc:$Rx, 28)>;
+
+def : InstAlias<"mtamr $Rx", (MTSPR8 29, g8rc:$Rx)>;
+def : InstAlias<"mfamr $Rx", (MFSPR8 g8rc:$Rx, 29)>;
+
+foreach SPRG = 0-3 in {
+  def : InstAlias<"mfsprg $RT, "#SPRG, (MFSPR8 g8rc:$RT, !add(SPRG, 272))>;
+  def : InstAlias<"mfsprg"#SPRG#" $RT", (MFSPR8 g8rc:$RT, !add(SPRG, 272))>;
+  def : InstAlias<"mfsprg "#SPRG#", $RT", (MTSPR8 !add(SPRG, 272), g8rc:$RT)>;
+  def : InstAlias<"mfsprg"#SPRG#" $RT", (MTSPR8 !add(SPRG, 272), g8rc:$RT)>;
+}
+
+def : InstAlias<"mfasr $RT", (MFSPR8 g8rc:$RT, 280)>;
+def : InstAlias<"mtasr $RT", (MTSPR8 280, g8rc:$RT)>;
+
+def : InstAlias<"mttbl $Rx", (MTSPR8 284, g8rc:$Rx)>;
+def : InstAlias<"mttbu $Rx", (MTSPR8 285, g8rc:$Rx)>;
+
+def : InstAlias<"mfpvr $RT", (MFSPR8 g8rc:$RT, 287)>;
+
+def : InstAlias<"mfspefscr $Rx", (MFSPR8 g8rc:$Rx, 512)>;
+def : InstAlias<"mtspefscr $Rx", (MTSPR8 512, g8rc:$Rx)>;
+
 //===----------------------------------------------------------------------===//
 // Load/Store instructions.
 //
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -4537,9 +4537,21 @@
 def : InstAlias<"mtxer $Rx", (MTSPR 1, gprc:$Rx)>;
 def : InstAlias<"mfxer $Rx", (MFSPR gprc:$Rx, 1)>;
 
+def : InstAlias<"mtudscr $Rx", (MTSPR 3, gprc:$Rx)>;
+def : InstAlias<"mfudscr $Rx", (MFSPR gprc:$Rx, 3)>;
+
 def : InstAlias<"mfrtcu $Rx", (MFSPR gprc:$Rx, 4)>;
 def : InstAlias<"mfrtcl $Rx", (MFSPR gprc:$Rx, 5)>;
 
+def : InstAlias<"mtlr $Rx", (MTSPR 8, gprc:$Rx)>;
+def : InstAlias<"mflr $Rx", (MFSPR gprc:$Rx, 8)>;
+
+def : InstAlias<"mtctr $Rx", (MTSPR 9, gprc:$Rx)>;
+def : InstAlias<"mfctr $Rx", (MFSPR gprc:$Rx, 9)>;
+
+def : InstAlias<"mtuamr $Rx", (MTSPR 13, gprc:$Rx)>;
+def : InstAlias<"mfuamr $Rx", (MFSPR gprc:$Rx, 13)>;
+
 def : InstAlias<"mtdscr $Rx", (MTSPR 17, gprc:$Rx)>;
 def : InstAlias<"mfdscr $Rx", (MFSPR gprc:$Rx, 17)>;
 
@@ -4626,6 +4638,9 @@
                     Requires<[IsPPC6xx]>;
 }
 
+def : InstAlias<"mtppr $RT", (MTSPR 896, gprc:$RT)>;
+def : InstAlias<"mfppr $RT", (MFSPR gprc:$RT, 896)>;
+
 def : InstAlias<"mtesr $Rx", (MTSPR 980, gprc:$Rx)>, Requires<[IsPPC4xx]>;
 def : InstAlias<"mfesr $Rx", (MFSPR gprc:$Rx, 980)>, Requires<[IsPPC4xx]>;
 
diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
--- a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
+++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ext.txt
@@ -2212,6 +2212,12 @@
 # CHECK: mfxer 2
 0x7c 0x41 0x02 0xa6
 
+# CHECK: mtudscr 2
+0x7c 0x43 0x03 0xa6
+
+# CHECK: mfudscr 2
+0x7c 0x43 0x02 0xa6
+
 # CHECK: mtlr 2
 0x7c 0x48 0x03 0xa6
 
@@ -2224,6 +2230,18 @@
 # CHECK: mfctr 2
 0x7c 0x49 0x02 0xa6
 
+# CHECK: mtuamr 2
+0x7c 0x4d 0x03 0xa6
+
+# CHECK: mfuamr 2
+0x7c 0x4d 0x02 0xa6
+
+# CHECK: mtppr 2
+0x7c 0x40 0xe3 0xa6
+
+# CHECK: mfppr 2
+0x7c 0x40 0xe2 0xa6
+
 # CHECK: nop
 0x60 0x00 0x00 0x00
 
diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-ext.s b/llvm/test/MC/PowerPC/ppc64-encoding-ext.s
--- a/llvm/test/MC/PowerPC/ppc64-encoding-ext.s
+++ b/llvm/test/MC/PowerPC/ppc64-encoding-ext.s
@@ -3419,6 +3419,12 @@
 # CHECK-BE: mfxer 2                         # encoding: [0x7c,0x41,0x02,0xa6]
 # CHECK-LE: mfxer 2                         # encoding: [0xa6,0x02,0x41,0x7c]
             mfxer 2
+# CHECK-BE: mtudscr 2                       # encoding: [0x7c,0x43,0x03,0xa6]
+# CHECK-LE: mtudscr 2                       # encoding: [0xa6,0x03,0x43,0x7c]
+            mtudscr 2
+# CHECK-BE: mfudscr 2                       # encoding: [0x7c,0x43,0x02,0xa6]
+# CHECK-LE: mfudscr 2                       # encoding: [0xa6,0x02,0x43,0x7c]
+            mfudscr 2
 # CHECK-BE: mfrtcu 2                        # encoding: [0x7c,0x44,0x02,0xa6]
 # CHECK-LE: mfrtcu 2                        # encoding: [0xa6,0x02,0x44,0x7c]
             mfrtcu 2
@@ -3497,6 +3503,18 @@
 # CHECK-BE: mfctr 2                         # encoding: [0x7c,0x49,0x02,0xa6]
 # CHECK-LE: mfctr 2                         # encoding: [0xa6,0x02,0x49,0x7c]
             mfctr 2
+# CHECK-BE: mtuamr 2                        # encoding: [0x7c,0x4d,0x03,0xa6]
+# CHECK-LE: mtuamr 2                        # encoding: [0xa6,0x03,0x4d,0x7c]
+            mtuamr 2
+# CHECK-BE: mfuamr 2                        # encoding: [0x7c,0x4d,0x02,0xa6]
+# CHECK-LE: mfuamr 2                        # encoding: [0xa6,0x02,0x4d,0x7c]
+            mfuamr 2
+# CHECK-BE: mtppr 2                         # encoding: [0x7c,0x40,0xe3,0xa6]
+# CHECK-LE: mtppr 2                         # encoding: [0xa6,0xe3,0x40,0x7c]
+            mtppr 2
+# CHECK-BE: mfppr 2                         # encoding: [0x7c,0x40,0xe2,0xa6]
+# CHECK-LE: mfppr 2                         # encoding: [0xa6,0xe2,0x40,0x7c]
+            mfppr 2
 # CHECK-BE: mfvrsave 2                      # encoding: [0x7c,0x40,0x42,0xa6]
 # CHECK-LE: mfvrsave 2                      # encoding: [0xa6,0x42,0x40,0x7c]
             mfvrsave 2