Index: llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -1728,6 +1728,14 @@
     I.setDesc(TII.get(TargetOpcode::COPY));
     return true;
   }
+  case TargetOpcode::G_STORE: {
+    Register Val = I.getOperand(0).getReg();
+    MachineInstr *ImpDef = getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, Val, MRI);
+    if (!ImpDef)
+      return false;
+    I.eraseFromParent();
+    return true;
+  }
   default:
     return false;
   }
Index: llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir
===================================================================
--- llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir
+++ llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir
@@ -36,6 +36,7 @@
   define void @store_8xi16(<8 x i16> %v, <8 x i16>* %ptr) { ret void }
   define void @store_16xi8(<16 x i8> %v, <16 x i8>* %ptr) { ret void }
 
+  define void @imp_def() { ret void }
 ...
 
 ---
@@ -550,3 +551,23 @@
     RET_ReallyLR
 
 ...
+
+---
+name:            imp_def
+legalized:       true
+regBankSelected: true
+body:             |
+  bb.0:
+    liveins: $x0, $x1
+    ; Test updater will only ever add one checkline, which will vacuously pass
+    ; since it's just the return. We need to explicitly check that there's no
+    ; store here.
+    ; CHECK-LABEL: name: imp_def
+    ; CHECK-NOT: STR
+    ; CHECK: RET_ReallyLR
+    %0:gpr(p0) = COPY $x0
+    %1:gpr(s64) = G_IMPLICIT_DEF
+    G_STORE  %1, %0 :: (store 8)
+    RET_ReallyLR
+
+...