diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp @@ -205,6 +205,11 @@ case ISD::FREEZE: Res = PromoteIntRes_FREEZE(N); break; + + case ISD::FSHL: + case ISD::FSHR: + Res = PromoteIntRes_FunnelShift(N); + break; } // If the result is null then the sub-method took care of registering it. @@ -1077,6 +1082,34 @@ return DAG.getNode(ISD::SRL, SDLoc(N), LHS.getValueType(), LHS, RHS); } +SDValue DAGTypeLegalizer::PromoteIntRes_FunnelShift(SDNode *N) { + SDValue Hi = GetPromotedInteger(N->getOperand(0)); + SDValue Lo = GetPromotedInteger(N->getOperand(1)); + SDValue Amount = GetPromotedInteger(N->getOperand(2)); + + unsigned OldBits = N->getOperand(0).getScalarValueSizeInBits(); + unsigned NewBits = Hi.getScalarValueSizeInBits(); + + // Shift Lo up to occupy the upper bits of the promoted type. + SDLoc DL(N); + EVT VT = Lo.getValueType(); + Lo = DAG.getNode(ISD::SHL, DL, VT, Lo, + DAG.getConstant(NewBits - OldBits, DL, VT)); + + // Amount has to be interpreted modulo the old bit width. + Amount = + DAG.getNode(ISD::UREM, DL, VT, Amount, DAG.getConstant(OldBits, DL, VT)); + + unsigned Opcode = N->getOpcode(); + if (Opcode == ISD::FSHR) + // Increase Amount to shift the result into the lower bits of the promoted + // type. + Amount = DAG.getNode(ISD::ADD, DL, VT, Amount, + DAG.getConstant(NewBits - OldBits, DL, VT)); + + return DAG.getNode(Opcode, DL, VT, Hi, Lo, Amount); +} + SDValue DAGTypeLegalizer::PromoteIntRes_TRUNCATE(SDNode *N) { EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); SDValue Res; diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h @@ -340,6 +340,7 @@ SDValue PromoteIntRes_FLT_ROUNDS(SDNode *N); SDValue PromoteIntRes_VECREDUCE(SDNode *N); SDValue PromoteIntRes_ABS(SDNode *N); + SDValue PromoteIntRes_FunnelShift(SDNode *N); // Integer Operand Promotion. bool PromoteIntegerOperand(SDNode *N, unsigned OpNo); diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -146,6 +146,8 @@ R = ScalarizeVecRes_BinOp(N); break; case ISD::FMA: + case ISD::FSHL: + case ISD::FSHR: R = ScalarizeVecRes_TernaryOp(N); break; @@ -941,6 +943,8 @@ SplitVecRes_BinOp(N, Lo, Hi); break; case ISD::FMA: + case ISD::FSHL: + case ISD::FSHR: SplitVecRes_TernaryOp(N, Lo, Hi); break; @@ -2841,6 +2845,8 @@ Res = WidenVecRes_Unary(N); break; case ISD::FMA: + case ISD::FSHL: + case ISD::FSHR: Res = WidenVecRes_Ternary(N); break; } diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -6219,62 +6219,9 @@ SDValue Y = getValue(I.getArgOperand(1)); SDValue Z = getValue(I.getArgOperand(2)); EVT VT = X.getValueType(); - SDValue BitWidthC = DAG.getConstant(VT.getScalarSizeInBits(), sdl, VT); - SDValue Zero = DAG.getConstant(0, sdl, VT); - SDValue ShAmt = DAG.getNode(ISD::UREM, sdl, VT, Z, BitWidthC); auto FunnelOpcode = IsFSHL ? ISD::FSHL : ISD::FSHR; - if (TLI.isOperationLegalOrCustom(FunnelOpcode, VT)) { - setValue(&I, DAG.getNode(FunnelOpcode, sdl, VT, X, Y, Z)); - return; - } - - // When X == Y, this is rotate. If the data type has a power-of-2 size, we - // avoid the select that is necessary in the general case to filter out - // the 0-shift possibility that leads to UB. - if (X == Y && isPowerOf2_32(VT.getScalarSizeInBits())) { - auto RotateOpcode = IsFSHL ? ISD::ROTL : ISD::ROTR; - if (TLI.isOperationLegalOrCustom(RotateOpcode, VT)) { - setValue(&I, DAG.getNode(RotateOpcode, sdl, VT, X, Z)); - return; - } - - // Some targets only rotate one way. Try the opposite direction. - RotateOpcode = IsFSHL ? ISD::ROTR : ISD::ROTL; - if (TLI.isOperationLegalOrCustom(RotateOpcode, VT)) { - // Negate the shift amount because it is safe to ignore the high bits. - SDValue NegShAmt = DAG.getNode(ISD::SUB, sdl, VT, Zero, Z); - setValue(&I, DAG.getNode(RotateOpcode, sdl, VT, X, NegShAmt)); - return; - } - - // fshl (rotl): (X << (Z % BW)) | (X >> ((0 - Z) % BW)) - // fshr (rotr): (X << ((0 - Z) % BW)) | (X >> (Z % BW)) - SDValue NegZ = DAG.getNode(ISD::SUB, sdl, VT, Zero, Z); - SDValue NShAmt = DAG.getNode(ISD::UREM, sdl, VT, NegZ, BitWidthC); - SDValue ShX = DAG.getNode(ISD::SHL, sdl, VT, X, IsFSHL ? ShAmt : NShAmt); - SDValue ShY = DAG.getNode(ISD::SRL, sdl, VT, X, IsFSHL ? NShAmt : ShAmt); - setValue(&I, DAG.getNode(ISD::OR, sdl, VT, ShX, ShY)); - return; - } - - // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW))) - // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW)) - SDValue InvShAmt = DAG.getNode(ISD::SUB, sdl, VT, BitWidthC, ShAmt); - SDValue ShX = DAG.getNode(ISD::SHL, sdl, VT, X, IsFSHL ? ShAmt : InvShAmt); - SDValue ShY = DAG.getNode(ISD::SRL, sdl, VT, Y, IsFSHL ? InvShAmt : ShAmt); - SDValue Or = DAG.getNode(ISD::OR, sdl, VT, ShX, ShY); - - // If (Z % BW == 0), then the opposite direction shift is shift-by-bitwidth, - // and that is undefined. We must compare and select to avoid UB. - EVT CCVT = MVT::i1; - if (VT.isVector()) - CCVT = EVT::getVectorVT(*Context, CCVT, VT.getVectorNumElements()); - - // For fshl, 0-shift returns the 1st arg (X). - // For fshr, 0-shift returns the 2nd arg (Y). - SDValue IsZeroShift = DAG.getSetCC(sdl, CCVT, ShAmt, Zero, ISD::SETEQ); - setValue(&I, DAG.getSelect(sdl, VT, IsZeroShift, IsFSHL ? X : Y, Or)); + setValue(&I, DAG.getNode(FunnelOpcode, sdl, VT, X, Y, Z)); return; } case Intrinsic::sadd_sat: { diff --git a/llvm/test/CodeGen/AArch64/funnel-shift-rot.ll b/llvm/test/CodeGen/AArch64/funnel-shift-rot.ll --- a/llvm/test/CodeGen/AArch64/funnel-shift-rot.ll +++ b/llvm/test/CodeGen/AArch64/funnel-shift-rot.ll @@ -18,9 +18,8 @@ define i8 @rotl_i8_const_shift(i8 %x) { ; CHECK-LABEL: rotl_i8_const_shift: ; CHECK: // %bb.0: -; CHECK-NEXT: ubfx w8, w0, #5, #3 -; CHECK-NEXT: bfi w8, w0, #3, #29 -; CHECK-NEXT: mov w0, w8 +; CHECK-NEXT: lsl w8, w0, #24 +; CHECK-NEXT: extr w0, w0, w8, #29 ; CHECK-NEXT: ret %f = call i8 @llvm.fshl.i8(i8 %x, i8 %x, i8 3) ret i8 %f @@ -40,13 +39,14 @@ define i16 @rotl_i16(i16 %x, i16 %z) { ; CHECK-LABEL: rotl_i16: ; CHECK: // %bb.0: -; CHECK-NEXT: neg w10, w1 -; CHECK-NEXT: and w8, w0, #0xffff -; CHECK-NEXT: and w9, w1, #0xf -; CHECK-NEXT: and w10, w10, #0xf -; CHECK-NEXT: lsl w9, w0, w9 -; CHECK-NEXT: lsr w8, w8, w10 -; CHECK-NEXT: orr w0, w9, w8 +; CHECK-NEXT: and w8, w1, #0xf +; CHECK-NEXT: lsl w9, w0, w8 +; CHECK-NEXT: ands x8, x8, #0x1f +; CHECK-NEXT: neg x8, x8 +; CHECK-NEXT: lsl w10, w0, #16 +; CHECK-NEXT: lsr w8, w10, w8 +; CHECK-NEXT: orr w8, w9, w8 +; CHECK-NEXT: csel w0, w0, w8, eq ; CHECK-NEXT: ret %f = call i16 @llvm.fshl.i16(i16 %x, i16 %x, i16 %z) ret i16 %f @@ -55,8 +55,11 @@ define i32 @rotl_i32(i32 %x, i32 %z) { ; CHECK-LABEL: rotl_i32: ; CHECK: // %bb.0: -; CHECK-NEXT: neg w8, w1 -; CHECK-NEXT: ror w0, w0, w8 +; CHECK-NEXT: mov w8, w1 +; CHECK-NEXT: ands x8, x8, #0x1f +; CHECK-NEXT: neg w8, w8 +; CHECK-NEXT: ror w8, w0, w8 +; CHECK-NEXT: csel w0, w0, w8, eq ; CHECK-NEXT: ret %f = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 %z) ret i32 %f @@ -65,8 +68,10 @@ define i64 @rotl_i64(i64 %x, i64 %z) { ; CHECK-LABEL: rotl_i64: ; CHECK: // %bb.0: -; CHECK-NEXT: neg w8, w1 -; CHECK-NEXT: ror x0, x0, x8 +; CHECK-NEXT: ands x8, x1, #0x3f +; CHECK-NEXT: neg w8, w8 +; CHECK-NEXT: ror x8, x0, x8 +; CHECK-NEXT: csel x0, x0, x8, eq ; CHECK-NEXT: ret %f = call i64 @llvm.fshl.i64(i64 %x, i64 %x, i64 %z) ret i64 %f @@ -78,13 +83,15 @@ ; CHECK-LABEL: rotl_v4i32: ; CHECK: // %bb.0: ; CHECK-NEXT: movi v2.4s, #31 -; CHECK-NEXT: neg v3.4s, v1.4s +; CHECK-NEXT: movi v3.4s, #32 ; CHECK-NEXT: and v1.16b, v1.16b, v2.16b -; CHECK-NEXT: and v2.16b, v3.16b, v2.16b -; CHECK-NEXT: neg v2.4s, v2.4s -; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s -; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s -; CHECK-NEXT: orr v0.16b, v1.16b, v0.16b +; CHECK-NEXT: sub v3.4s, v3.4s, v1.4s +; CHECK-NEXT: neg v3.4s, v3.4s +; CHECK-NEXT: ushl v2.4s, v0.4s, v1.4s +; CHECK-NEXT: ushl v3.4s, v0.4s, v3.4s +; CHECK-NEXT: orr v2.16b, v2.16b, v3.16b +; CHECK-NEXT: cmeq v1.4s, v1.4s, #0 +; CHECK-NEXT: bif v0.16b, v2.16b, v1.16b ; CHECK-NEXT: ret %f = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> %z) ret <4 x i32> %f @@ -110,9 +117,8 @@ define i8 @rotr_i8_const_shift(i8 %x) { ; CHECK-LABEL: rotr_i8_const_shift: ; CHECK: // %bb.0: -; CHECK-NEXT: ubfx w8, w0, #3, #5 -; CHECK-NEXT: bfi w8, w0, #5, #27 -; CHECK-NEXT: mov w0, w8 +; CHECK-NEXT: lsl w8, w0, #24 +; CHECK-NEXT: extr w0, w0, w8, #27 ; CHECK-NEXT: ret %f = call i8 @llvm.fshr.i8(i8 %x, i8 %x, i8 3) ret i8 %f @@ -132,13 +138,15 @@ define i16 @rotr_i16(i16 %x, i16 %z) { ; CHECK-LABEL: rotr_i16: ; CHECK: // %bb.0: -; CHECK-NEXT: and w8, w0, #0xffff -; CHECK-NEXT: and w9, w1, #0xf -; CHECK-NEXT: neg w10, w1 -; CHECK-NEXT: lsr w8, w8, w9 -; CHECK-NEXT: and w9, w10, #0xf -; CHECK-NEXT: lsl w9, w0, w9 -; CHECK-NEXT: orr w0, w9, w8 +; CHECK-NEXT: mov w8, #16 +; CHECK-NEXT: lsl w9, w0, #16 +; CHECK-NEXT: bfxil w8, w1, #0, #4 +; CHECK-NEXT: lsr w10, w9, w8 +; CHECK-NEXT: ands x8, x8, #0x1f +; CHECK-NEXT: neg x8, x8 +; CHECK-NEXT: lsl w8, w0, w8 +; CHECK-NEXT: orr w8, w8, w10 +; CHECK-NEXT: csel w0, w9, w8, eq ; CHECK-NEXT: ret %f = call i16 @llvm.fshr.i16(i16 %x, i16 %x, i16 %z) ret i16 %f @@ -168,13 +176,15 @@ ; CHECK-LABEL: rotr_v4i32: ; CHECK: // %bb.0: ; CHECK-NEXT: movi v2.4s, #31 -; CHECK-NEXT: neg v3.4s, v1.4s +; CHECK-NEXT: movi v3.4s, #32 ; CHECK-NEXT: and v1.16b, v1.16b, v2.16b -; CHECK-NEXT: and v2.16b, v3.16b, v2.16b -; CHECK-NEXT: neg v1.4s, v1.4s -; CHECK-NEXT: ushl v1.4s, v0.4s, v1.4s -; CHECK-NEXT: ushl v0.4s, v0.4s, v2.4s -; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b +; CHECK-NEXT: neg v2.4s, v1.4s +; CHECK-NEXT: sub v3.4s, v3.4s, v1.4s +; CHECK-NEXT: ushl v2.4s, v0.4s, v2.4s +; CHECK-NEXT: ushl v3.4s, v0.4s, v3.4s +; CHECK-NEXT: orr v2.16b, v3.16b, v2.16b +; CHECK-NEXT: cmeq v1.4s, v1.4s, #0 +; CHECK-NEXT: bif v0.16b, v2.16b, v1.16b ; CHECK-NEXT: ret %f = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> %z) ret <4 x i32> %f diff --git a/llvm/test/CodeGen/AArch64/funnel-shift.ll b/llvm/test/CodeGen/AArch64/funnel-shift.ll --- a/llvm/test/CodeGen/AArch64/funnel-shift.ll +++ b/llvm/test/CodeGen/AArch64/funnel-shift.ll @@ -18,11 +18,12 @@ define i32 @fshl_i32(i32 %x, i32 %y, i32 %z) { ; CHECK-LABEL: fshl_i32: ; CHECK: // %bb.0: -; CHECK-NEXT: ands w9, w2, #0x1f -; CHECK-NEXT: neg w9, w9 -; CHECK-NEXT: lsl w8, w0, w2 -; CHECK-NEXT: lsr w9, w1, w9 -; CHECK-NEXT: orr w8, w8, w9 +; CHECK-NEXT: mov w8, w2 +; CHECK-NEXT: lsl w9, w0, w8 +; CHECK-NEXT: ands x8, x8, #0x1f +; CHECK-NEXT: neg x8, x8 +; CHECK-NEXT: lsr w8, w1, w8 +; CHECK-NEXT: orr w8, w9, w8 ; CHECK-NEXT: csel w0, w0, w8, eq ; CHECK-NEXT: ret %f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %z) @@ -34,21 +35,20 @@ define i37 @fshl_i37(i37 %x, i37 %y, i37 %z) { ; CHECK-LABEL: fshl_i37: ; CHECK: // %bb.0: -; CHECK-NEXT: mov x10, #31883 -; CHECK-NEXT: movk x10, #3542, lsl #16 -; CHECK-NEXT: movk x10, #51366, lsl #32 -; CHECK-NEXT: and x9, x2, #0x1fffffffff -; CHECK-NEXT: movk x10, #56679, lsl #48 -; CHECK-NEXT: umulh x10, x9, x10 -; CHECK-NEXT: mov w11, #37 -; CHECK-NEXT: lsr x10, x10, #5 -; CHECK-NEXT: msub x9, x10, x11, x9 -; CHECK-NEXT: and x8, x1, #0x1fffffffff -; CHECK-NEXT: sub x11, x11, x9 -; CHECK-NEXT: lsl x10, x0, x9 -; CHECK-NEXT: lsr x8, x8, x11 -; CHECK-NEXT: orr x8, x10, x8 -; CHECK-NEXT: cmp x9, #0 // =0 +; CHECK-NEXT: mov x8, #31883 +; CHECK-NEXT: movk x8, #3542, lsl #16 +; CHECK-NEXT: movk x8, #51366, lsl #32 +; CHECK-NEXT: movk x8, #56679, lsl #48 +; CHECK-NEXT: umulh x8, x2, x8 +; CHECK-NEXT: mov w9, #37 +; CHECK-NEXT: ubfx x8, x8, #5, #27 +; CHECK-NEXT: msub w8, w8, w9, w2 +; CHECK-NEXT: lsl x9, x0, x8 +; CHECK-NEXT: ands x8, x8, #0x3f +; CHECK-NEXT: neg x8, x8 +; CHECK-NEXT: lsl x10, x1, #27 +; CHECK-NEXT: lsr x8, x10, x8 +; CHECK-NEXT: orr x8, x9, x8 ; CHECK-NEXT: csel x0, x0, x8, eq ; CHECK-NEXT: ret %f = call i37 @llvm.fshl.i37(i37 %x, i37 %y, i37 %z) @@ -145,11 +145,12 @@ define i32 @fshr_i32(i32 %x, i32 %y, i32 %z) { ; CHECK-LABEL: fshr_i32: ; CHECK: // %bb.0: -; CHECK-NEXT: ands w9, w2, #0x1f -; CHECK-NEXT: neg w9, w9 -; CHECK-NEXT: lsr w8, w1, w2 -; CHECK-NEXT: lsl w9, w0, w9 -; CHECK-NEXT: orr w8, w9, w8 +; CHECK-NEXT: mov w8, w2 +; CHECK-NEXT: lsr w9, w1, w8 +; CHECK-NEXT: ands x8, x8, #0x1f +; CHECK-NEXT: neg x8, x8 +; CHECK-NEXT: lsl w8, w0, w8 +; CHECK-NEXT: orr w8, w8, w9 ; CHECK-NEXT: csel w0, w1, w8, eq ; CHECK-NEXT: ret %f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %z) @@ -161,22 +162,22 @@ define i37 @fshr_i37(i37 %x, i37 %y, i37 %z) { ; CHECK-LABEL: fshr_i37: ; CHECK: // %bb.0: -; CHECK-NEXT: mov x10, #31883 -; CHECK-NEXT: movk x10, #3542, lsl #16 -; CHECK-NEXT: movk x10, #51366, lsl #32 -; CHECK-NEXT: and x9, x2, #0x1fffffffff -; CHECK-NEXT: movk x10, #56679, lsl #48 -; CHECK-NEXT: umulh x10, x9, x10 -; CHECK-NEXT: mov w11, #37 -; CHECK-NEXT: lsr x10, x10, #5 -; CHECK-NEXT: msub x9, x10, x11, x9 -; CHECK-NEXT: and x8, x1, #0x1fffffffff -; CHECK-NEXT: sub x10, x11, x9 -; CHECK-NEXT: lsr x8, x8, x9 -; CHECK-NEXT: lsl x10, x0, x10 -; CHECK-NEXT: orr x8, x10, x8 -; CHECK-NEXT: cmp x9, #0 // =0 -; CHECK-NEXT: csel x0, x1, x8, eq +; CHECK-NEXT: mov x8, #31883 +; CHECK-NEXT: movk x8, #3542, lsl #16 +; CHECK-NEXT: movk x8, #51366, lsl #32 +; CHECK-NEXT: movk x8, #56679, lsl #48 +; CHECK-NEXT: umulh x8, x2, x8 +; CHECK-NEXT: mov w9, #37 +; CHECK-NEXT: lsr x8, x8, #5 +; CHECK-NEXT: msub w8, w8, w9, w2 +; CHECK-NEXT: lsl x10, x1, #27 +; CHECK-NEXT: add w8, w8, #27 // =27 +; CHECK-NEXT: lsr x9, x10, x8 +; CHECK-NEXT: ands x8, x8, #0x3f +; CHECK-NEXT: neg x8, x8 +; CHECK-NEXT: lsl x8, x0, x8 +; CHECK-NEXT: orr x8, x8, x9 +; CHECK-NEXT: csel x0, x10, x8, eq ; CHECK-NEXT: ret %f = call i37 @llvm.fshr.i37(i37 %x, i37 %y, i37 %z) ret i37 %f diff --git a/llvm/test/CodeGen/AArch64/shift-by-signext.ll b/llvm/test/CodeGen/AArch64/shift-by-signext.ll --- a/llvm/test/CodeGen/AArch64/shift-by-signext.ll +++ b/llvm/test/CodeGen/AArch64/shift-by-signext.ll @@ -80,11 +80,12 @@ define i32 @n6_fshl(i32 %x, i32 %y, i8 %shamt) nounwind { ; CHECK-LABEL: n6_fshl: ; CHECK: // %bb.0: -; CHECK-NEXT: ands w9, w2, #0x1f -; CHECK-NEXT: neg w9, w9 -; CHECK-NEXT: lsl w8, w0, w2 -; CHECK-NEXT: lsr w9, w1, w9 -; CHECK-NEXT: orr w8, w8, w9 +; CHECK-NEXT: mov w8, w2 +; CHECK-NEXT: lsl w9, w0, w8 +; CHECK-NEXT: ands x8, x8, #0x1f +; CHECK-NEXT: neg x8, x8 +; CHECK-NEXT: lsr w8, w1, w8 +; CHECK-NEXT: orr w8, w9, w8 ; CHECK-NEXT: csel w0, w0, w8, eq ; CHECK-NEXT: ret %shamt_wide = sext i8 %shamt to i32 @@ -94,11 +95,12 @@ define i32 @n7_fshr(i32 %x, i32 %y, i8 %shamt) nounwind { ; CHECK-LABEL: n7_fshr: ; CHECK: // %bb.0: -; CHECK-NEXT: ands w9, w2, #0x1f -; CHECK-NEXT: neg w9, w9 -; CHECK-NEXT: lsr w8, w1, w2 -; CHECK-NEXT: lsl w9, w0, w9 -; CHECK-NEXT: orr w8, w9, w8 +; CHECK-NEXT: mov w8, w2 +; CHECK-NEXT: lsr w9, w1, w8 +; CHECK-NEXT: ands x8, x8, #0x1f +; CHECK-NEXT: neg x8, x8 +; CHECK-NEXT: lsl w8, w0, w8 +; CHECK-NEXT: orr w8, w8, w9 ; CHECK-NEXT: csel w0, w1, w8, eq ; CHECK-NEXT: ret %shamt_wide = sext i8 %shamt to i32 diff --git a/llvm/test/CodeGen/AMDGPU/fshl.ll b/llvm/test/CodeGen/AMDGPU/fshl.ll --- a/llvm/test/CodeGen/AMDGPU/fshl.ll +++ b/llvm/test/CodeGen/AMDGPU/fshl.ll @@ -226,23 +226,23 @@ ; R600-LABEL: fshl_v2i32: ; R600: ; %bb.0: ; %entry ; R600-NEXT: ALU 13, @4, KC0[CB0:0-32], KC1[] -; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XY, T0.X, 1 +; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1 ; R600-NEXT: CF_END ; R600-NEXT: PAD ; R600-NEXT: ALU clause starting at 4: -; R600-NEXT: AND_INT T0.W, KC0[4].X, literal.x, -; R600-NEXT: SUB_INT * T1.W, literal.y, KC0[4].X, -; R600-NEXT: 31(4.344025e-44), 32(4.484155e-44) -; R600-NEXT: AND_INT T0.Y, KC0[3].W, literal.x, -; R600-NEXT: SUB_INT T0.Z, literal.y, KC0[3].W, -; R600-NEXT: BIT_ALIGN_INT T1.W, KC0[3].X, KC0[3].Z, PS, -; R600-NEXT: SETE_INT * T0.W, PV.W, 0.0, -; R600-NEXT: 31(4.344025e-44), 32(4.484155e-44) -; R600-NEXT: CNDE_INT T1.Y, PS, PV.W, KC0[3].X, -; R600-NEXT: BIT_ALIGN_INT T0.W, KC0[2].W, KC0[3].Y, PV.Z, -; R600-NEXT: SETE_INT * T1.W, PV.Y, 0.0, -; R600-NEXT: CNDE_INT T1.X, PS, PV.W, KC0[2].W, -; R600-NEXT: LSHR * T0.X, KC0[2].Y, literal.x, +; R600-NEXT: SUB_INT * T0.W, literal.x, KC0[4].X, +; R600-NEXT: 32(4.484155e-44), 0(0.000000e+00) +; R600-NEXT: SUB_INT T0.Z, literal.x, KC0[3].W, +; R600-NEXT: BIT_ALIGN_INT * T0.W, KC0[3].X, KC0[3].Z, PV.W, +; R600-NEXT: 32(4.484155e-44), 0(0.000000e+00) +; R600-NEXT: AND_INT * T1.W, KC0[4].X, literal.x, +; R600-NEXT: 31(4.344025e-44), 0(0.000000e+00) +; R600-NEXT: CNDE_INT T0.Y, PV.W, KC0[3].X, T0.W, +; R600-NEXT: BIT_ALIGN_INT * T0.W, KC0[2].W, KC0[3].Y, T0.Z, +; R600-NEXT: AND_INT * T1.W, KC0[3].W, literal.x, +; R600-NEXT: 31(4.344025e-44), 0(0.000000e+00) +; R600-NEXT: CNDE_INT T0.X, PV.W, KC0[2].W, T0.W, +; R600-NEXT: LSHR * T1.X, KC0[2].Y, literal.x, ; R600-NEXT: 2(2.802597e-45), 0(0.000000e+00) entry: %0 = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> %x, <2 x i32> %y, <2 x i32> %z) @@ -450,36 +450,35 @@ ; ; R600-LABEL: fshl_v4i32: ; R600: ; %bb.0: ; %entry -; R600-NEXT: ALU 25, @4, KC0[CB0:0-32], KC1[] -; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 1 +; R600-NEXT: ALU 24, @4, KC0[CB0:0-32], KC1[] +; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T0.X, 1 ; R600-NEXT: CF_END ; R600-NEXT: PAD ; R600-NEXT: ALU clause starting at 4: -; R600-NEXT: SUB_INT * T0.W, literal.x, KC0[6].X, +; R600-NEXT: SUB_INT * T0.W, literal.x, KC0[5].W, +; R600-NEXT: 32(4.484155e-44), 0(0.000000e+00) +; R600-NEXT: BIT_ALIGN_INT * T0.W, KC0[3].W, KC0[4].W, PV.W, +; R600-NEXT: SUB_INT * T1.W, literal.x, KC0[6].X, ; R600-NEXT: 32(4.484155e-44), 0(0.000000e+00) -; R600-NEXT: BIT_ALIGN_INT * T0.W, KC0[4].X, KC0[5].X, PV.W, -; R600-NEXT: AND_INT * T1.W, KC0[6].X, literal.x, +; R600-NEXT: BIT_ALIGN_INT * T1.W, KC0[4].X, KC0[5].X, PV.W, +; R600-NEXT: AND_INT * T2.W, KC0[6].X, literal.x, ; R600-NEXT: 31(4.344025e-44), 0(0.000000e+00) -; R600-NEXT: AND_INT T0.X, KC0[5].Z, literal.x, -; R600-NEXT: SUB_INT T0.Y, literal.y, KC0[5].Z, -; R600-NEXT: SETE_INT T0.Z, PV.W, 0.0, -; R600-NEXT: SUB_INT T1.W, literal.y, KC0[5].W, -; R600-NEXT: AND_INT * T2.W, KC0[5].W, literal.x, -; R600-NEXT: 31(4.344025e-44), 32(4.484155e-44) -; R600-NEXT: SETE_INT T1.Z, PS, 0.0, -; R600-NEXT: BIT_ALIGN_INT * T1.W, KC0[3].W, KC0[4].W, PV.W, -; R600-NEXT: CNDE_INT * T0.W, T0.Z, T0.W, KC0[4].X, -; R600-NEXT: CNDE_INT T0.Z, T1.Z, T1.W, KC0[3].W, -; R600-NEXT: BIT_ALIGN_INT T1.W, KC0[3].Z, KC0[4].Z, T0.Y, -; R600-NEXT: SETE_INT * T2.W, T0.X, 0.0, -; R600-NEXT: CNDE_INT T0.Y, PS, PV.W, KC0[3].Z, -; R600-NEXT: AND_INT T1.W, KC0[5].Y, literal.x, -; R600-NEXT: SUB_INT * T2.W, literal.y, KC0[5].Y, -; R600-NEXT: 31(4.344025e-44), 32(4.484155e-44) -; R600-NEXT: BIT_ALIGN_INT T2.W, KC0[3].Y, KC0[4].Y, PS, -; R600-NEXT: SETE_INT * T1.W, PV.W, 0.0, -; R600-NEXT: CNDE_INT T0.X, PS, PV.W, KC0[3].Y, -; R600-NEXT: LSHR * T1.X, KC0[2].Y, literal.x, +; R600-NEXT: SUB_INT T0.Z, literal.x, KC0[5].Z, +; R600-NEXT: AND_INT T3.W, KC0[5].W, literal.y, +; R600-NEXT: CNDE_INT * T1.W, PV.W, KC0[4].X, T1.W, BS:VEC_021/SCL_122 +; R600-NEXT: 32(4.484155e-44), 31(4.344025e-44) +; R600-NEXT: CNDE_INT T1.Z, PV.W, KC0[3].W, T0.W, +; R600-NEXT: BIT_ALIGN_INT * T0.W, KC0[3].Z, KC0[4].Z, PV.Z, +; R600-NEXT: AND_INT * T2.W, KC0[5].Z, literal.x, +; R600-NEXT: 31(4.344025e-44), 0(0.000000e+00) +; R600-NEXT: CNDE_INT T1.Y, PV.W, KC0[3].Z, T0.W, +; R600-NEXT: SUB_INT * T0.W, literal.x, KC0[5].Y, +; R600-NEXT: 32(4.484155e-44), 0(0.000000e+00) +; R600-NEXT: BIT_ALIGN_INT * T0.W, KC0[3].Y, KC0[4].Y, PV.W, +; R600-NEXT: AND_INT * T2.W, KC0[5].Y, literal.x, +; R600-NEXT: 31(4.344025e-44), 0(0.000000e+00) +; R600-NEXT: CNDE_INT T1.X, PV.W, KC0[3].Y, T0.W, +; R600-NEXT: LSHR * T0.X, KC0[2].Y, literal.x, ; R600-NEXT: 2(2.802597e-45), 0(0.000000e+00) entry: %0 = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) diff --git a/llvm/test/CodeGen/AMDGPU/fshr.ll b/llvm/test/CodeGen/AMDGPU/fshr.ll --- a/llvm/test/CodeGen/AMDGPU/fshr.ll +++ b/llvm/test/CodeGen/AMDGPU/fshr.ll @@ -138,17 +138,11 @@ ; SI-NEXT: s_mov_b32 s6, -1 ; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: v_mov_b32_e32 v0, s9 -; SI-NEXT: s_and_b32 s1, s1, 31 ; SI-NEXT: v_mov_b32_e32 v1, s1 -; SI-NEXT: s_and_b32 s0, s0, 31 ; SI-NEXT: v_alignbit_b32 v1, s3, v0, v1 -; SI-NEXT: v_cmp_eq_u32_e64 vcc, s1, 0 -; SI-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc ; SI-NEXT: v_mov_b32_e32 v0, s8 ; SI-NEXT: v_mov_b32_e32 v2, s0 -; SI-NEXT: v_alignbit_b32 v2, s2, v0, v2 -; SI-NEXT: v_cmp_eq_u32_e64 vcc, s0, 0 -; SI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc +; SI-NEXT: v_alignbit_b32 v0, s2, v0, v2 ; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 ; SI-NEXT: s_endpgm ; @@ -160,17 +154,11 @@ ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x3c ; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: v_mov_b32_e32 v0, s7 -; VI-NEXT: s_and_b32 s1, s1, 31 ; VI-NEXT: v_mov_b32_e32 v1, s1 -; VI-NEXT: s_and_b32 s0, s0, 31 ; VI-NEXT: v_alignbit_b32 v1, s5, v0, v1 -; VI-NEXT: v_cmp_eq_u32_e64 vcc, s1, 0 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc ; VI-NEXT: v_mov_b32_e32 v0, s6 ; VI-NEXT: v_mov_b32_e32 v2, s0 -; VI-NEXT: v_alignbit_b32 v2, s4, v0, v2 -; VI-NEXT: v_cmp_eq_u32_e64 vcc, s0, 0 -; VI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc +; VI-NEXT: v_alignbit_b32 v0, s4, v0, v2 ; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] @@ -184,17 +172,11 @@ ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x3c ; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: v_mov_b32_e32 v0, s7 -; GFX9-NEXT: s_and_b32 s1, s1, 31 ; GFX9-NEXT: v_mov_b32_e32 v1, s1 -; GFX9-NEXT: s_and_b32 s0, s0, 31 ; GFX9-NEXT: v_alignbit_b32 v1, s5, v0, v1 -; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s1, 0 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc ; GFX9-NEXT: v_mov_b32_e32 v0, s6 ; GFX9-NEXT: v_mov_b32_e32 v2, s0 -; GFX9-NEXT: v_alignbit_b32 v2, s4, v0, v2 -; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s0, 0 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc +; GFX9-NEXT: v_alignbit_b32 v0, s4, v0, v2 ; GFX9-NEXT: v_mov_b32_e32 v2, s2 ; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off @@ -202,21 +184,15 @@ ; ; R600-LABEL: fshr_v2i32: ; R600: ; %bb.0: ; %entry -; R600-NEXT: ALU 11, @4, KC0[CB0:0-32], KC1[] +; R600-NEXT: ALU 5, @4, KC0[CB0:0-32], KC1[] ; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1 ; R600-NEXT: CF_END ; R600-NEXT: PAD ; R600-NEXT: ALU clause starting at 4: -; R600-NEXT: AND_INT * T0.W, KC0[4].X, literal.x, -; R600-NEXT: 31(4.344025e-44), 0(0.000000e+00) -; R600-NEXT: BIT_ALIGN_INT T1.W, KC0[3].X, KC0[3].Z, PV.W, -; R600-NEXT: SETE_INT * T0.W, PV.W, 0.0, -; R600-NEXT: CNDE_INT T0.Y, PS, PV.W, KC0[3].Z, -; R600-NEXT: AND_INT * T0.W, KC0[3].W, literal.x, -; R600-NEXT: 31(4.344025e-44), 0(0.000000e+00) -; R600-NEXT: BIT_ALIGN_INT T1.W, KC0[2].W, KC0[3].Y, PV.W, -; R600-NEXT: SETE_INT * T0.W, PV.W, 0.0, -; R600-NEXT: CNDE_INT T0.X, PS, PV.W, KC0[3].Y, +; R600-NEXT: MOV * T0.W, KC0[4].X, +; R600-NEXT: BIT_ALIGN_INT T0.Y, KC0[3].X, KC0[3].Z, PV.W, +; R600-NEXT: MOV * T0.W, KC0[3].W, +; R600-NEXT: BIT_ALIGN_INT * T0.X, KC0[2].W, KC0[3].Y, PV.W, ; R600-NEXT: LSHR * T1.X, KC0[2].Y, literal.x, ; R600-NEXT: 2(2.802597e-45), 0(0.000000e+00) entry: @@ -301,29 +277,17 @@ ; SI-NEXT: s_mov_b32 s6, -1 ; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: v_mov_b32_e32 v0, s15 -; SI-NEXT: s_and_b32 s3, s3, 31 ; SI-NEXT: v_mov_b32_e32 v1, s3 -; SI-NEXT: v_alignbit_b32 v1, s11, v0, v1 -; SI-NEXT: v_cmp_eq_u32_e64 vcc, s3, 0 -; SI-NEXT: s_and_b32 s2, s2, 31 -; SI-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc +; SI-NEXT: v_alignbit_b32 v3, s11, v0, v1 ; SI-NEXT: v_mov_b32_e32 v0, s14 ; SI-NEXT: v_mov_b32_e32 v1, s2 -; SI-NEXT: v_alignbit_b32 v1, s10, v0, v1 -; SI-NEXT: v_cmp_eq_u32_e64 vcc, s2, 0 -; SI-NEXT: s_and_b32 s1, s1, 31 -; SI-NEXT: v_cndmask_b32_e32 v2, v1, v0, vcc +; SI-NEXT: v_alignbit_b32 v2, s10, v0, v1 ; SI-NEXT: v_mov_b32_e32 v0, s13 ; SI-NEXT: v_mov_b32_e32 v1, s1 -; SI-NEXT: s_and_b32 s0, s0, 31 ; SI-NEXT: v_alignbit_b32 v1, s9, v0, v1 -; SI-NEXT: v_cmp_eq_u32_e64 vcc, s1, 0 -; SI-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc ; SI-NEXT: v_mov_b32_e32 v0, s12 ; SI-NEXT: v_mov_b32_e32 v4, s0 -; SI-NEXT: v_alignbit_b32 v4, s8, v0, v4 -; SI-NEXT: v_cmp_eq_u32_e64 vcc, s0, 0 -; SI-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; SI-NEXT: v_alignbit_b32 v0, s8, v0, v4 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0 ; SI-NEXT: s_endpgm ; @@ -335,29 +299,17 @@ ; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x54 ; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: v_mov_b32_e32 v0, s11 -; VI-NEXT: s_and_b32 s3, s3, 31 ; VI-NEXT: v_mov_b32_e32 v1, s3 -; VI-NEXT: v_alignbit_b32 v1, s7, v0, v1 -; VI-NEXT: v_cmp_eq_u32_e64 vcc, s3, 0 -; VI-NEXT: s_and_b32 s2, s2, 31 -; VI-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc +; VI-NEXT: v_alignbit_b32 v3, s7, v0, v1 ; VI-NEXT: v_mov_b32_e32 v0, s10 ; VI-NEXT: v_mov_b32_e32 v1, s2 -; VI-NEXT: v_alignbit_b32 v1, s6, v0, v1 -; VI-NEXT: v_cmp_eq_u32_e64 vcc, s2, 0 -; VI-NEXT: s_and_b32 s1, s1, 31 -; VI-NEXT: v_cndmask_b32_e32 v2, v1, v0, vcc +; VI-NEXT: v_alignbit_b32 v2, s6, v0, v1 ; VI-NEXT: v_mov_b32_e32 v0, s9 ; VI-NEXT: v_mov_b32_e32 v1, s1 -; VI-NEXT: s_and_b32 s0, s0, 31 ; VI-NEXT: v_alignbit_b32 v1, s5, v0, v1 -; VI-NEXT: v_cmp_eq_u32_e64 vcc, s1, 0 -; VI-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc ; VI-NEXT: v_mov_b32_e32 v0, s8 ; VI-NEXT: v_mov_b32_e32 v4, s0 -; VI-NEXT: v_alignbit_b32 v4, s4, v0, v4 -; VI-NEXT: v_cmp_eq_u32_e64 vcc, s0, 0 -; VI-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; VI-NEXT: v_alignbit_b32 v0, s4, v0, v4 ; VI-NEXT: v_mov_b32_e32 v4, s12 ; VI-NEXT: v_mov_b32_e32 v5, s13 ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] @@ -371,29 +323,17 @@ ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x54 ; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: v_mov_b32_e32 v0, s11 -; GFX9-NEXT: s_and_b32 s3, s3, 31 ; GFX9-NEXT: v_mov_b32_e32 v1, s3 -; GFX9-NEXT: v_alignbit_b32 v1, s7, v0, v1 -; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s3, 0 -; GFX9-NEXT: s_and_b32 s2, s2, 31 -; GFX9-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc +; GFX9-NEXT: v_alignbit_b32 v3, s7, v0, v1 ; GFX9-NEXT: v_mov_b32_e32 v0, s10 ; GFX9-NEXT: v_mov_b32_e32 v1, s2 -; GFX9-NEXT: v_alignbit_b32 v1, s6, v0, v1 -; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s2, 0 -; GFX9-NEXT: s_and_b32 s1, s1, 31 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v1, v0, vcc +; GFX9-NEXT: v_alignbit_b32 v2, s6, v0, v1 ; GFX9-NEXT: v_mov_b32_e32 v0, s9 ; GFX9-NEXT: v_mov_b32_e32 v1, s1 -; GFX9-NEXT: s_and_b32 s0, s0, 31 ; GFX9-NEXT: v_alignbit_b32 v1, s5, v0, v1 -; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s1, 0 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc ; GFX9-NEXT: v_mov_b32_e32 v0, s8 ; GFX9-NEXT: v_mov_b32_e32 v4, s0 -; GFX9-NEXT: v_alignbit_b32 v4, s4, v0, v4 -; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s0, 0 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc +; GFX9-NEXT: v_alignbit_b32 v0, s4, v0, v4 ; GFX9-NEXT: v_mov_b32_e32 v4, s12 ; GFX9-NEXT: v_mov_b32_e32 v5, s13 ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off @@ -401,31 +341,20 @@ ; ; R600-LABEL: fshr_v4i32: ; R600: ; %bb.0: ; %entry -; R600-NEXT: ALU 20, @4, KC0[CB0:0-32], KC1[] -; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T0.X, 1 +; R600-NEXT: ALU 9, @4, KC0[CB0:0-32], KC1[] +; R600-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 1 ; R600-NEXT: CF_END ; R600-NEXT: PAD ; R600-NEXT: ALU clause starting at 4: -; R600-NEXT: AND_INT T0.W, KC0[5].Z, literal.x, -; R600-NEXT: AND_INT * T1.W, KC0[6].X, literal.x, -; R600-NEXT: 31(4.344025e-44), 0(0.000000e+00) -; R600-NEXT: SETE_INT T0.Z, PS, 0.0, -; R600-NEXT: BIT_ALIGN_INT * T1.W, KC0[4].X, KC0[5].X, PS, -; R600-NEXT: AND_INT * T2.W, KC0[5].W, literal.x, -; R600-NEXT: 31(4.344025e-44), 0(0.000000e+00) -; R600-NEXT: SETE_INT T1.Z, PV.W, 0.0, -; R600-NEXT: BIT_ALIGN_INT * T2.W, KC0[3].W, KC0[4].W, PV.W, -; R600-NEXT: CNDE_INT * T1.W, T0.Z, T1.W, KC0[5].X, -; R600-NEXT: CNDE_INT T1.Z, T1.Z, T2.W, KC0[4].W, -; R600-NEXT: BIT_ALIGN_INT T2.W, KC0[3].Z, KC0[4].Z, T0.W, -; R600-NEXT: SETE_INT * T0.W, T0.W, 0.0, -; R600-NEXT: CNDE_INT T1.Y, PS, PV.W, KC0[4].Z, -; R600-NEXT: AND_INT * T0.W, KC0[5].Y, literal.x, -; R600-NEXT: 31(4.344025e-44), 0(0.000000e+00) -; R600-NEXT: BIT_ALIGN_INT T2.W, KC0[3].Y, KC0[4].Y, PV.W, -; R600-NEXT: SETE_INT * T0.W, PV.W, 0.0, -; R600-NEXT: CNDE_INT T1.X, PS, PV.W, KC0[4].Y, -; R600-NEXT: LSHR * T0.X, KC0[2].Y, literal.x, +; R600-NEXT: MOV * T0.W, KC0[6].X, +; R600-NEXT: BIT_ALIGN_INT * T0.W, KC0[4].X, KC0[5].X, PV.W, +; R600-NEXT: MOV * T1.W, KC0[5].W, +; R600-NEXT: BIT_ALIGN_INT * T0.Z, KC0[3].W, KC0[4].W, PV.W, +; R600-NEXT: MOV * T1.W, KC0[5].Z, +; R600-NEXT: BIT_ALIGN_INT * T0.Y, KC0[3].Z, KC0[4].Z, PV.W, +; R600-NEXT: MOV * T1.W, KC0[5].Y, +; R600-NEXT: BIT_ALIGN_INT * T0.X, KC0[3].Y, KC0[4].Y, PV.W, +; R600-NEXT: LSHR * T1.X, KC0[2].Y, literal.x, ; R600-NEXT: 2(2.802597e-45), 0(0.000000e+00) entry: %0 = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) @@ -531,14 +460,8 @@ ; GFX89-LABEL: v_fshr_v2i32: ; GFX89: ; %bb.0: ; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX89-NEXT: v_and_b32_e32 v4, 31, v4 ; GFX89-NEXT: v_alignbit_b32 v0, v0, v2, v4 -; GFX89-NEXT: v_cmp_eq_u32_e32 vcc, 0, v4 -; GFX89-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc -; GFX89-NEXT: v_and_b32_e32 v2, 31, v5 -; GFX89-NEXT: v_alignbit_b32 v1, v1, v3, v2 -; GFX89-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; GFX89-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc +; GFX89-NEXT: v_alignbit_b32 v1, v1, v3, v5 ; GFX89-NEXT: s_setpc_b64 s[30:31] ; ; R600-LABEL: v_fshr_v2i32: @@ -553,18 +476,9 @@ ; GFX89-LABEL: v_fshr_v3i32: ; GFX89: ; %bb.0: ; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX89-NEXT: v_and_b32_e32 v6, 31, v6 ; GFX89-NEXT: v_alignbit_b32 v0, v0, v3, v6 -; GFX89-NEXT: v_cmp_eq_u32_e32 vcc, 0, v6 -; GFX89-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc -; GFX89-NEXT: v_and_b32_e32 v3, 31, v7 -; GFX89-NEXT: v_alignbit_b32 v1, v1, v4, v3 -; GFX89-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 -; GFX89-NEXT: v_and_b32_e32 v3, 31, v8 -; GFX89-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc -; GFX89-NEXT: v_alignbit_b32 v2, v2, v5, v3 -; GFX89-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 -; GFX89-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc +; GFX89-NEXT: v_alignbit_b32 v1, v1, v4, v7 +; GFX89-NEXT: v_alignbit_b32 v2, v2, v5, v8 ; GFX89-NEXT: s_setpc_b64 s[30:31] ; ; R600-LABEL: v_fshr_v3i32: @@ -579,22 +493,10 @@ ; GFX89-LABEL: v_fshr_v4i32: ; GFX89: ; %bb.0: ; GFX89-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX89-NEXT: v_and_b32_e32 v8, 31, v8 ; GFX89-NEXT: v_alignbit_b32 v0, v0, v4, v8 -; GFX89-NEXT: v_cmp_eq_u32_e32 vcc, 0, v8 -; GFX89-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc -; GFX89-NEXT: v_and_b32_e32 v4, 31, v9 -; GFX89-NEXT: v_alignbit_b32 v1, v1, v5, v4 -; GFX89-NEXT: v_cmp_eq_u32_e32 vcc, 0, v4 -; GFX89-NEXT: v_and_b32_e32 v4, 31, v10 -; GFX89-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc -; GFX89-NEXT: v_alignbit_b32 v2, v2, v6, v4 -; GFX89-NEXT: v_cmp_eq_u32_e32 vcc, 0, v4 -; GFX89-NEXT: v_and_b32_e32 v4, 31, v11 -; GFX89-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc -; GFX89-NEXT: v_alignbit_b32 v3, v3, v7, v4 -; GFX89-NEXT: v_cmp_eq_u32_e32 vcc, 0, v4 -; GFX89-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc +; GFX89-NEXT: v_alignbit_b32 v1, v1, v5, v9 +; GFX89-NEXT: v_alignbit_b32 v2, v2, v6, v10 +; GFX89-NEXT: v_alignbit_b32 v3, v3, v7, v11 ; GFX89-NEXT: s_setpc_b64 s[30:31] ; ; R600-LABEL: v_fshr_v4i32: @@ -609,14 +511,9 @@ ; SI-LABEL: v_fshr_i16: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: v_and_b32_e32 v2, 15, v2 -; SI-NEXT: v_and_b32_e32 v3, 0xffff, v1 -; SI-NEXT: v_sub_i32_e32 v4, vcc, 16, v2 -; SI-NEXT: v_lshr_b32_e32 v3, v3, v2 -; SI-NEXT: v_lshl_b32_e32 v0, v0, v4 -; SI-NEXT: v_or_b32_e32 v0, v0, v3 -; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; SI-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc +; SI-NEXT: v_or_b32_e32 v2, 16, v2 +; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 +; SI-NEXT: v_alignbit_b32 v0, v0, v1, v2 ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: v_fshr_i16: @@ -655,23 +552,12 @@ ; SI-LABEL: v_fshr_v2i16: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: s_mov_b32 s4, 0xffff -; SI-NEXT: v_and_b32_e32 v5, 15, v5 -; SI-NEXT: v_and_b32_e32 v7, s4, v3 -; SI-NEXT: v_sub_i32_e32 v8, vcc, 16, v5 -; SI-NEXT: v_lshr_b32_e32 v7, v7, v5 -; SI-NEXT: v_lshl_b32_e32 v1, v1, v8 -; SI-NEXT: v_or_b32_e32 v1, v1, v7 -; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v5 -; SI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc -; SI-NEXT: v_and_b32_e32 v3, 15, v4 -; SI-NEXT: v_sub_i32_e32 v5, vcc, 16, v3 -; SI-NEXT: v_and_b32_e32 v6, s4, v2 -; SI-NEXT: v_lshr_b32_e32 v4, v6, v3 -; SI-NEXT: v_lshl_b32_e32 v0, v0, v5 -; SI-NEXT: v_or_b32_e32 v0, v0, v4 -; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 -; SI-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc +; SI-NEXT: v_or_b32_e32 v5, 16, v5 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_alignbit_b32 v1, v1, v3, v5 +; SI-NEXT: v_or_b32_e32 v3, 16, v4 +; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 +; SI-NEXT: v_alignbit_b32 v0, v0, v2, v3 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 @@ -681,25 +567,24 @@ ; VI-LABEL: v_fshr_v2i16: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: v_and_b32_e32 v3, 0xf000f, v2 -; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v1 -; VI-NEXT: v_bfe_u32 v2, v2, 16, 4 -; VI-NEXT: v_lshrrev_b16_e32 v4, v3, v1 -; VI-NEXT: v_lshrrev_b16_sdwa v6, v2, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD -; VI-NEXT: v_or_b32_e32 v4, v4, v6 -; VI-NEXT: v_sub_u16_e32 v6, 16, v2 -; VI-NEXT: v_sub_u16_e32 v7, 16, v3 -; VI-NEXT: v_lshlrev_b16_sdwa v6, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; VI-NEXT: v_lshlrev_b16_e32 v0, v7, v0 -; VI-NEXT: v_or_b32_e32 v0, v0, v6 -; VI-NEXT: v_or_b32_e32 v0, v0, v4 +; VI-NEXT: v_mov_b32_e32 v3, 15 +; VI-NEXT: v_and_b32_sdwa v3, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_sub_u16_e32 v6, 16, v3 +; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v1 +; VI-NEXT: v_lshrrev_b16_e32 v5, v3, v4 +; VI-NEXT: v_lshlrev_b16_sdwa v6, v6, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; VI-NEXT: v_or_b32_e32 v5, v6, v5 ; VI-NEXT: v_cmp_eq_u16_e32 vcc, 0, v3 -; VI-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc -; VI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 +; VI-NEXT: v_and_b32_e32 v2, 15, v2 +; VI-NEXT: v_cndmask_b32_e32 v3, v5, v4, vcc +; VI-NEXT: v_sub_u16_e32 v5, 16, v2 +; VI-NEXT: v_lshrrev_b16_e32 v4, v2, v1 +; VI-NEXT: v_lshlrev_b16_e32 v0, v5, v0 +; VI-NEXT: v_or_b32_e32 v0, v0, v4 ; VI-NEXT: v_cmp_eq_u16_e32 vcc, 0, v2 -; VI-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc -; VI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 -; VI-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD +; VI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; VI-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc +; VI-NEXT: v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: v_fshr_v2i16: @@ -733,36 +618,20 @@ ; SI-LABEL: v_fshr_v3i16: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; SI-NEXT: v_or_b32_e32 v7, 16, v7 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_alignbit_b32 v1, v1, v4, v7 +; SI-NEXT: v_or_b32_e32 v4, 16, v6 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 +; SI-NEXT: v_alignbit_b32 v0, v0, v3, v4 ; SI-NEXT: s_mov_b32 s4, 0xffff -; SI-NEXT: v_and_b32_e32 v7, 15, v7 -; SI-NEXT: v_and_b32_e32 v12, s4, v4 -; SI-NEXT: v_sub_i32_e32 v13, vcc, 16, v7 -; SI-NEXT: v_lshr_b32_e32 v12, v12, v7 -; SI-NEXT: v_lshl_b32_e32 v1, v1, v13 -; SI-NEXT: v_or_b32_e32 v1, v1, v12 -; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v7 -; SI-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc -; SI-NEXT: v_and_b32_e32 v4, 15, v6 -; SI-NEXT: v_sub_i32_e32 v7, vcc, 16, v4 -; SI-NEXT: v_and_b32_e32 v11, s4, v3 -; SI-NEXT: v_lshr_b32_e32 v6, v11, v4 -; SI-NEXT: v_lshl_b32_e32 v0, v0, v7 -; SI-NEXT: v_or_b32_e32 v0, v0, v6 -; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v4 -; SI-NEXT: v_mov_b32_e32 v9, 0xffff -; SI-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v0, v9, v0 +; SI-NEXT: v_and_b32_e32 v0, s4, v0 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 -; SI-NEXT: v_and_b32_e32 v1, 15, v8 -; SI-NEXT: v_sub_i32_e32 v4, vcc, 16, v1 -; SI-NEXT: v_and_b32_e32 v10, s4, v5 -; SI-NEXT: v_lshr_b32_e32 v3, v10, v1 -; SI-NEXT: v_lshl_b32_e32 v2, v2, v4 -; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 -; SI-NEXT: v_cndmask_b32_e32 v1, v2, v5, vcc -; SI-NEXT: v_and_b32_e32 v2, v9, v1 +; SI-NEXT: v_or_b32_e32 v1, 16, v8 +; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v5 +; SI-NEXT: v_alignbit_b32 v1, v2, v3, v1 +; SI-NEXT: v_and_b32_e32 v2, s4, v1 ; SI-NEXT: v_alignbit_b32 v1, v2, v0, 16 ; SI-NEXT: s_setpc_b64 s[30:31] ; @@ -771,29 +640,25 @@ ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: v_mov_b32_e32 v6, 15 ; VI-NEXT: v_and_b32_sdwa v6, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_sub_u16_e32 v9, 16, v6 ; VI-NEXT: v_lshrrev_b32_e32 v7, 16, v2 ; VI-NEXT: v_lshrrev_b16_e32 v8, v6, v7 -; VI-NEXT: v_sub_u16_e32 v6, 16, v6 -; VI-NEXT: v_lshlrev_b16_sdwa v6, v6, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; VI-NEXT: v_or_b32_e32 v6, v6, v8 -; VI-NEXT: v_bfe_u32 v8, v4, 16, 4 -; VI-NEXT: v_cmp_eq_u16_e32 vcc, 0, v8 -; VI-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc -; VI-NEXT: v_and_b32_e32 v7, 15, v5 -; VI-NEXT: v_lshrrev_b16_e32 v8, v7, v3 -; VI-NEXT: v_sub_u16_e32 v7, 16, v7 -; VI-NEXT: s_mov_b32 s4, 0xf000f -; VI-NEXT: v_lshlrev_b16_e32 v1, v7, v1 -; VI-NEXT: v_and_b32_e32 v5, s4, v5 -; VI-NEXT: v_or_b32_e32 v1, v1, v8 +; VI-NEXT: v_lshlrev_b16_sdwa v9, v9, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; VI-NEXT: v_or_b32_e32 v8, v9, v8 +; VI-NEXT: v_cmp_eq_u16_e32 vcc, 0, v6 +; VI-NEXT: v_and_b32_e32 v5, 15, v5 +; VI-NEXT: v_cndmask_b32_e32 v6, v8, v7, vcc +; VI-NEXT: v_sub_u16_e32 v8, 16, v5 +; VI-NEXT: v_lshrrev_b16_e32 v7, v5, v3 +; VI-NEXT: v_lshlrev_b16_e32 v1, v8, v1 +; VI-NEXT: v_or_b32_e32 v1, v1, v7 ; VI-NEXT: v_cmp_eq_u16_e32 vcc, 0, v5 ; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; VI-NEXT: v_and_b32_e32 v3, 15, v4 -; VI-NEXT: v_lshrrev_b16_e32 v5, v3, v2 -; VI-NEXT: v_sub_u16_e32 v3, 16, v3 -; VI-NEXT: v_lshlrev_b16_e32 v0, v3, v0 -; VI-NEXT: v_and_b32_e32 v3, s4, v4 -; VI-NEXT: v_or_b32_e32 v0, v0, v5 +; VI-NEXT: v_sub_u16_e32 v5, 16, v3 +; VI-NEXT: v_lshrrev_b16_e32 v4, v3, v2 +; VI-NEXT: v_lshlrev_b16_e32 v0, v5, v0 +; VI-NEXT: v_or_b32_e32 v0, v0, v4 ; VI-NEXT: v_cmp_eq_u16_e32 vcc, 0, v3 ; VI-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v6 @@ -803,36 +668,31 @@ ; GFX9-LABEL: v_fshr_v3i16: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_mov_b32_e32 v7, 15 -; GFX9-NEXT: v_and_b32_e32 v6, 15, v4 -; GFX9-NEXT: v_mov_b32_e32 v8, 0xffff -; GFX9-NEXT: v_and_b32_sdwa v7, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v6, v8, v6 -; GFX9-NEXT: v_lshl_or_b32 v6, v7, 16, v6 -; GFX9-NEXT: v_pk_lshrrev_b16 v7, v6, v2 -; GFX9-NEXT: v_pk_sub_i16 v6, 16, v6 op_sel_hi:[0,1] -; GFX9-NEXT: s_mov_b32 s6, 0xf000f -; GFX9-NEXT: v_pk_lshlrev_b16 v0, v6, v0 -; GFX9-NEXT: v_and_b32_e32 v4, s6, v4 -; GFX9-NEXT: v_or_b32_e32 v0, v0, v7 -; GFX9-NEXT: v_cmp_eq_u16_e32 vcc, 0, v4 -; GFX9-NEXT: v_mov_b32_e32 v7, 0 -; GFX9-NEXT: v_cndmask_b32_e32 v6, v0, v2, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_cmp_eq_u16_sdwa s[4:5], v4, v7 src0_sel:WORD_1 src1_sel:DWORD -; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[4:5] -; GFX9-NEXT: v_and_b32_e32 v2, 15, v5 -; GFX9-NEXT: v_and_b32_e32 v2, v8, v2 -; GFX9-NEXT: v_pk_lshrrev_b16 v4, v2, v3 -; GFX9-NEXT: v_pk_sub_i16 v2, 16, v2 -; GFX9-NEXT: v_pk_lshlrev_b16 v1, v2, v1 -; GFX9-NEXT: v_and_b32_e32 v2, s6, v5 -; GFX9-NEXT: v_cmp_eq_u16_e32 vcc, 0, v2 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v4 -; GFX9-NEXT: v_and_b32_e32 v2, v8, v6 +; GFX9-NEXT: v_mov_b32_e32 v6, 15 +; GFX9-NEXT: v_and_b32_sdwa v6, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX9-NEXT: v_sub_u16_e32 v9, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v7, 16, v2 +; GFX9-NEXT: v_lshrrev_b16_e32 v8, v6, v7 +; GFX9-NEXT: v_lshlrev_b16_sdwa v9, v9, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_or_b32_e32 v8, v9, v8 +; GFX9-NEXT: v_cmp_eq_u16_e32 vcc, 0, v6 +; GFX9-NEXT: v_and_b32_e32 v5, 15, v5 +; GFX9-NEXT: v_cndmask_b32_e32 v6, v8, v7, vcc +; GFX9-NEXT: v_sub_u16_e32 v8, 16, v5 +; GFX9-NEXT: v_lshrrev_b16_e32 v7, v5, v3 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, v8, v1 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v7 +; GFX9-NEXT: v_cmp_eq_u16_e32 vcc, 0, v5 ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v2 +; GFX9-NEXT: v_and_b32_e32 v3, 15, v4 +; GFX9-NEXT: v_sub_u16_e32 v5, 16, v3 +; GFX9-NEXT: v_lshrrev_b16_e32 v4, v3, v2 +; GFX9-NEXT: v_lshlrev_b16_e32 v0, v5, v0 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v4 +; GFX9-NEXT: v_cmp_eq_u16_e32 vcc, 0, v3 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc +; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v0 +; GFX9-NEXT: v_lshl_or_b32 v0, v6, 16, v0 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; R600-LABEL: v_fshr_v3i16: @@ -847,45 +707,24 @@ ; SI-LABEL: v_fshr_v4i16: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; SI-NEXT: v_or_b32_e32 v11, 16, v11 +; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v7 +; SI-NEXT: v_alignbit_b32 v3, v3, v7, v11 +; SI-NEXT: v_or_b32_e32 v7, 16, v10 +; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v6 +; SI-NEXT: v_alignbit_b32 v2, v2, v6, v7 ; SI-NEXT: s_mov_b32 s4, 0xffff -; SI-NEXT: v_and_b32_e32 v11, 15, v11 -; SI-NEXT: v_and_b32_e32 v16, s4, v7 -; SI-NEXT: v_sub_i32_e32 v17, vcc, 16, v11 -; SI-NEXT: v_lshr_b32_e32 v16, v16, v11 -; SI-NEXT: v_lshl_b32_e32 v3, v3, v17 -; SI-NEXT: v_or_b32_e32 v3, v3, v16 -; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v11 -; SI-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc -; SI-NEXT: v_and_b32_e32 v7, 15, v10 -; SI-NEXT: v_sub_i32_e32 v11, vcc, 16, v7 -; SI-NEXT: v_and_b32_e32 v15, s4, v6 -; SI-NEXT: v_lshr_b32_e32 v10, v15, v7 -; SI-NEXT: v_lshl_b32_e32 v2, v2, v11 -; SI-NEXT: v_or_b32_e32 v2, v2, v10 -; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v7 -; SI-NEXT: v_mov_b32_e32 v12, 0xffff -; SI-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 -; SI-NEXT: v_and_b32_e32 v2, v12, v2 +; SI-NEXT: v_and_b32_e32 v2, s4, v2 ; SI-NEXT: v_or_b32_e32 v2, v2, v3 -; SI-NEXT: v_and_b32_e32 v3, 15, v9 -; SI-NEXT: v_sub_i32_e32 v7, vcc, 16, v3 -; SI-NEXT: v_and_b32_e32 v14, s4, v5 -; SI-NEXT: v_lshr_b32_e32 v6, v14, v3 -; SI-NEXT: v_lshl_b32_e32 v1, v1, v7 -; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 -; SI-NEXT: v_or_b32_e32 v1, v1, v6 -; SI-NEXT: v_and_b32_e32 v3, 15, v8 -; SI-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc -; SI-NEXT: v_sub_i32_e32 v6, vcc, 16, v3 -; SI-NEXT: v_and_b32_e32 v13, s4, v4 -; SI-NEXT: v_lshr_b32_e32 v5, v13, v3 -; SI-NEXT: v_lshl_b32_e32 v0, v0, v6 -; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 -; SI-NEXT: v_or_b32_e32 v0, v0, v5 -; SI-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc +; SI-NEXT: v_or_b32_e32 v3, 16, v9 +; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v5 +; SI-NEXT: v_alignbit_b32 v1, v1, v5, v3 +; SI-NEXT: v_or_b32_e32 v3, 16, v8 +; SI-NEXT: v_lshlrev_b32_e32 v4, 16, v4 +; SI-NEXT: v_alignbit_b32 v0, v0, v4, v3 ; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 -; SI-NEXT: v_and_b32_e32 v0, v12, v0 +; SI-NEXT: v_and_b32_e32 v0, s4, v0 ; SI-NEXT: v_or_b32_e32 v0, v0, v1 ; SI-NEXT: v_alignbit_b32 v1, v2, v0, 16 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v2 @@ -896,38 +735,33 @@ ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: v_mov_b32_e32 v6, 15 ; VI-NEXT: v_and_b32_sdwa v7, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_sub_u16_e32 v10, 16, v7 ; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v3 ; VI-NEXT: v_lshrrev_b16_e32 v9, v7, v8 -; VI-NEXT: v_sub_u16_e32 v7, 16, v7 -; VI-NEXT: v_lshlrev_b16_sdwa v7, v7, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; VI-NEXT: v_or_b32_e32 v7, v7, v9 -; VI-NEXT: v_bfe_u32 v9, v5, 16, 4 -; VI-NEXT: v_cmp_eq_u16_e32 vcc, 0, v9 -; VI-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc +; VI-NEXT: v_lshlrev_b16_sdwa v10, v10, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; VI-NEXT: v_or_b32_e32 v9, v10, v9 +; VI-NEXT: v_cmp_eq_u16_e32 vcc, 0, v7 ; VI-NEXT: v_and_b32_sdwa v6, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; VI-NEXT: v_cndmask_b32_e32 v7, v9, v8, vcc +; VI-NEXT: v_sub_u16_e32 v10, 16, v6 ; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v2 ; VI-NEXT: v_lshrrev_b16_e32 v9, v6, v8 -; VI-NEXT: v_sub_u16_e32 v6, 16, v6 -; VI-NEXT: v_lshlrev_b16_sdwa v6, v6, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 -; VI-NEXT: v_or_b32_e32 v6, v6, v9 -; VI-NEXT: v_bfe_u32 v9, v4, 16, 4 -; VI-NEXT: v_cmp_eq_u16_e32 vcc, 0, v9 -; VI-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc -; VI-NEXT: v_and_b32_e32 v8, 15, v5 -; VI-NEXT: v_lshrrev_b16_e32 v9, v8, v3 -; VI-NEXT: v_sub_u16_e32 v8, 16, v8 -; VI-NEXT: s_mov_b32 s4, 0xf000f -; VI-NEXT: v_lshlrev_b16_e32 v1, v8, v1 -; VI-NEXT: v_and_b32_e32 v5, s4, v5 -; VI-NEXT: v_or_b32_e32 v1, v1, v9 +; VI-NEXT: v_lshlrev_b16_sdwa v10, v10, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; VI-NEXT: v_or_b32_e32 v9, v10, v9 +; VI-NEXT: v_cmp_eq_u16_e32 vcc, 0, v6 +; VI-NEXT: v_and_b32_e32 v5, 15, v5 +; VI-NEXT: v_cndmask_b32_e32 v6, v9, v8, vcc +; VI-NEXT: v_sub_u16_e32 v9, 16, v5 +; VI-NEXT: v_lshrrev_b16_e32 v8, v5, v3 +; VI-NEXT: v_lshlrev_b16_e32 v1, v9, v1 +; VI-NEXT: v_or_b32_e32 v1, v1, v8 ; VI-NEXT: v_cmp_eq_u16_e32 vcc, 0, v5 ; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; VI-NEXT: v_and_b32_e32 v3, 15, v4 -; VI-NEXT: v_lshrrev_b16_e32 v5, v3, v2 -; VI-NEXT: v_sub_u16_e32 v3, 16, v3 -; VI-NEXT: v_lshlrev_b16_e32 v0, v3, v0 -; VI-NEXT: v_and_b32_e32 v3, s4, v4 -; VI-NEXT: v_or_b32_e32 v0, v0, v5 +; VI-NEXT: v_sub_u16_e32 v5, 16, v3 +; VI-NEXT: v_lshrrev_b16_e32 v4, v3, v2 +; VI-NEXT: v_lshlrev_b16_e32 v0, v5, v0 +; VI-NEXT: v_or_b32_e32 v0, v0, v4 ; VI-NEXT: v_cmp_eq_u16_e32 vcc, 0, v3 ; VI-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v6 @@ -939,44 +773,42 @@ ; GFX9-LABEL: v_fshr_v4i16: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_mov_b32_e32 v7, 15 -; GFX9-NEXT: v_and_b32_e32 v6, 15, v5 -; GFX9-NEXT: v_mov_b32_e32 v9, 0xffff -; GFX9-NEXT: v_and_b32_sdwa v8, v5, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v6, v9, v6 -; GFX9-NEXT: v_lshl_or_b32 v6, v8, 16, v6 -; GFX9-NEXT: v_pk_lshrrev_b16 v8, v6, v3 -; GFX9-NEXT: v_pk_sub_i16 v6, 16, v6 op_sel_hi:[0,1] -; GFX9-NEXT: s_mov_b32 s6, 0xf000f -; GFX9-NEXT: v_pk_lshlrev_b16 v1, v6, v1 -; GFX9-NEXT: v_and_b32_e32 v5, s6, v5 +; GFX9-NEXT: v_mov_b32_e32 v6, 15 +; GFX9-NEXT: v_and_b32_sdwa v7, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX9-NEXT: v_sub_u16_e32 v10, 16, v7 +; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v3 +; GFX9-NEXT: v_lshrrev_b16_e32 v9, v7, v8 +; GFX9-NEXT: v_lshlrev_b16_sdwa v10, v10, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_or_b32_e32 v9, v10, v9 +; GFX9-NEXT: v_cmp_eq_u16_e32 vcc, 0, v7 +; GFX9-NEXT: v_and_b32_sdwa v6, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD +; GFX9-NEXT: v_cndmask_b32_e32 v7, v9, v8, vcc +; GFX9-NEXT: v_sub_u16_e32 v10, 16, v6 +; GFX9-NEXT: v_lshrrev_b32_e32 v8, 16, v2 +; GFX9-NEXT: v_lshrrev_b16_e32 v9, v6, v8 +; GFX9-NEXT: v_lshlrev_b16_sdwa v10, v10, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 +; GFX9-NEXT: v_or_b32_e32 v9, v10, v9 +; GFX9-NEXT: v_cmp_eq_u16_e32 vcc, 0, v6 +; GFX9-NEXT: v_and_b32_e32 v5, 15, v5 +; GFX9-NEXT: v_cndmask_b32_e32 v6, v9, v8, vcc +; GFX9-NEXT: v_sub_u16_e32 v9, 16, v5 +; GFX9-NEXT: v_lshrrev_b16_e32 v8, v5, v3 +; GFX9-NEXT: v_lshlrev_b16_e32 v1, v9, v1 ; GFX9-NEXT: v_or_b32_e32 v1, v1, v8 ; GFX9-NEXT: v_cmp_eq_u16_e32 vcc, 0, v5 -; GFX9-NEXT: v_mov_b32_e32 v8, 0 -; GFX9-NEXT: v_cndmask_b32_e32 v6, v1, v3, vcc -; GFX9-NEXT: v_cmp_eq_u16_sdwa s[4:5], v5, v8 src0_sel:WORD_1 src1_sel:DWORD -; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v1 -; GFX9-NEXT: v_lshrrev_b32_e32 v3, 16, v3 -; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[4:5] +; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX9-NEXT: v_and_b32_e32 v3, 15, v4 -; GFX9-NEXT: v_and_b32_sdwa v5, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD -; GFX9-NEXT: v_and_b32_e32 v3, v9, v3 -; GFX9-NEXT: v_lshl_or_b32 v3, v5, 16, v3 -; GFX9-NEXT: v_pk_lshrrev_b16 v5, v3, v2 -; GFX9-NEXT: v_pk_sub_i16 v3, 16, v3 op_sel_hi:[0,1] -; GFX9-NEXT: v_pk_lshlrev_b16 v0, v3, v0 -; GFX9-NEXT: v_and_b32_e32 v3, s6, v4 -; GFX9-NEXT: v_or_b32_e32 v0, v0, v5 +; GFX9-NEXT: v_sub_u16_e32 v5, 16, v3 +; GFX9-NEXT: v_lshrrev_b16_e32 v4, v3, v2 +; GFX9-NEXT: v_lshlrev_b16_e32 v0, v5, v0 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX9-NEXT: v_cmp_eq_u16_e32 vcc, 0, v3 -; GFX9-NEXT: v_cndmask_b32_e32 v4, v0, v2, vcc -; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 -; GFX9-NEXT: v_lshrrev_b32_e32 v2, 16, v2 -; GFX9-NEXT: v_cmp_eq_u16_sdwa s[4:5], v3, v8 src0_sel:WORD_1 src1_sel:DWORD -; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[4:5] -; GFX9-NEXT: v_and_b32_e32 v2, v9, v4 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v2 -; GFX9-NEXT: v_and_b32_e32 v2, v9, v6 -; GFX9-NEXT: v_lshl_or_b32 v1, v1, 16, v2 +; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc +; GFX9-NEXT: v_mov_b32_e32 v2, 0xffff +; GFX9-NEXT: v_and_b32_e32 v0, v2, v0 +; GFX9-NEXT: v_and_b32_e32 v1, v2, v1 +; GFX9-NEXT: v_lshl_or_b32 v0, v6, 16, v0 +; GFX9-NEXT: v_lshl_or_b32 v1, v7, 16, v1 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; R600-LABEL: v_fshr_v4i16: @@ -991,14 +823,13 @@ ; SI-LABEL: v_fshr_i64: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: v_and_b32_e32 v4, 63, v4 -; SI-NEXT: v_sub_i32_e32 v7, vcc, 64, v4 -; SI-NEXT: v_lshr_b64 v[5:6], v[2:3], v4 +; SI-NEXT: v_and_b32_e32 v6, 63, v4 +; SI-NEXT: v_sub_i32_e32 v7, vcc, 64, v6 +; SI-NEXT: v_lshr_b64 v[4:5], v[2:3], v6 ; SI-NEXT: v_lshl_b64 v[0:1], v[0:1], v7 -; SI-NEXT: v_or_b32_e32 v0, v0, v5 -; SI-NEXT: v_mov_b32_e32 v5, 0 -; SI-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[4:5] -; SI-NEXT: v_or_b32_e32 v1, v1, v6 +; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v6 +; SI-NEXT: v_or_b32_e32 v1, v1, v5 +; SI-NEXT: v_or_b32_e32 v0, v0, v4 ; SI-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; SI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; SI-NEXT: s_setpc_b64 s[30:31] @@ -1006,14 +837,13 @@ ; VI-LABEL: v_fshr_i64: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: v_and_b32_e32 v4, 63, v4 -; VI-NEXT: v_sub_u32_e32 v7, vcc, 64, v4 -; VI-NEXT: v_lshrrev_b64 v[5:6], v4, v[2:3] +; VI-NEXT: v_and_b32_e32 v6, 63, v4 +; VI-NEXT: v_sub_u32_e32 v7, vcc, 64, v6 +; VI-NEXT: v_lshrrev_b64 v[4:5], v6, v[2:3] ; VI-NEXT: v_lshlrev_b64 v[0:1], v7, v[0:1] -; VI-NEXT: v_or_b32_e32 v0, v0, v5 -; VI-NEXT: v_mov_b32_e32 v5, 0 -; VI-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[4:5] -; VI-NEXT: v_or_b32_e32 v1, v1, v6 +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v6 +; VI-NEXT: v_or_b32_e32 v1, v1, v5 +; VI-NEXT: v_or_b32_e32 v0, v0, v4 ; VI-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; VI-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; VI-NEXT: s_setpc_b64 s[30:31] @@ -1021,14 +851,13 @@ ; GFX9-LABEL: v_fshr_i64: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_and_b32_e32 v4, 63, v4 -; GFX9-NEXT: v_sub_u32_e32 v7, 64, v4 -; GFX9-NEXT: v_lshrrev_b64 v[5:6], v4, v[2:3] +; GFX9-NEXT: v_and_b32_e32 v6, 63, v4 +; GFX9-NEXT: v_sub_u32_e32 v7, 64, v6 +; GFX9-NEXT: v_lshrrev_b64 v[4:5], v6, v[2:3] ; GFX9-NEXT: v_lshlrev_b64 v[0:1], v7, v[0:1] -; GFX9-NEXT: v_or_b32_e32 v0, v0, v5 -; GFX9-NEXT: v_mov_b32_e32 v5, 0 -; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[4:5] -; GFX9-NEXT: v_or_b32_e32 v1, v1, v6 +; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v6 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v5 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -1045,23 +874,22 @@ ; SI-LABEL: v_fshr_v2i64: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: v_and_b32_e32 v8, 63, v8 -; SI-NEXT: v_sub_i32_e32 v9, vcc, 64, v8 -; SI-NEXT: v_lshl_b64 v[0:1], v[0:1], v9 -; SI-NEXT: v_lshr_b64 v[11:12], v[4:5], v8 -; SI-NEXT: v_mov_b32_e32 v9, 0 -; SI-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[8:9] -; SI-NEXT: v_or_b32_e32 v0, v0, v11 -; SI-NEXT: v_and_b32_e32 v8, 63, v10 +; SI-NEXT: v_and_b32_e32 v11, 63, v8 +; SI-NEXT: v_sub_i32_e32 v12, vcc, 64, v11 +; SI-NEXT: v_lshr_b64 v[8:9], v[4:5], v11 +; SI-NEXT: v_lshl_b64 v[0:1], v[0:1], v12 +; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v11 +; SI-NEXT: v_or_b32_e32 v0, v0, v8 ; SI-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc -; SI-NEXT: v_sub_i32_e64 v4, s[4:5], 64, v8 -; SI-NEXT: v_or_b32_e32 v1, v1, v12 -; SI-NEXT: v_lshr_b64 v[10:11], v[6:7], v8 -; SI-NEXT: v_lshl_b64 v[2:3], v[2:3], v4 +; SI-NEXT: v_and_b32_e32 v4, 63, v10 +; SI-NEXT: v_sub_i32_e64 v10, s[4:5], 64, v4 +; SI-NEXT: v_or_b32_e32 v1, v1, v9 +; SI-NEXT: v_lshr_b64 v[8:9], v[6:7], v4 +; SI-NEXT: v_lshl_b64 v[2:3], v[2:3], v10 ; SI-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc -; SI-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[8:9] -; SI-NEXT: v_or_b32_e32 v3, v3, v11 -; SI-NEXT: v_or_b32_e32 v2, v2, v10 +; SI-NEXT: v_or_b32_e32 v3, v3, v9 +; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v4 +; SI-NEXT: v_or_b32_e32 v2, v2, v8 ; SI-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc ; SI-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc ; SI-NEXT: s_setpc_b64 s[30:31] @@ -1069,23 +897,22 @@ ; VI-LABEL: v_fshr_v2i64: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: v_and_b32_e32 v8, 63, v8 -; VI-NEXT: v_sub_u32_e32 v9, vcc, 64, v8 -; VI-NEXT: v_lshlrev_b64 v[0:1], v9, v[0:1] -; VI-NEXT: v_lshrrev_b64 v[11:12], v8, v[4:5] -; VI-NEXT: v_mov_b32_e32 v9, 0 -; VI-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[8:9] -; VI-NEXT: v_or_b32_e32 v0, v0, v11 -; VI-NEXT: v_and_b32_e32 v8, 63, v10 +; VI-NEXT: v_and_b32_e32 v11, 63, v8 +; VI-NEXT: v_sub_u32_e32 v12, vcc, 64, v11 +; VI-NEXT: v_lshrrev_b64 v[8:9], v11, v[4:5] +; VI-NEXT: v_lshlrev_b64 v[0:1], v12, v[0:1] +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v11 +; VI-NEXT: v_or_b32_e32 v0, v0, v8 ; VI-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc -; VI-NEXT: v_sub_u32_e64 v4, s[4:5], 64, v8 -; VI-NEXT: v_or_b32_e32 v1, v1, v12 -; VI-NEXT: v_lshrrev_b64 v[10:11], v8, v[6:7] -; VI-NEXT: v_lshlrev_b64 v[2:3], v4, v[2:3] +; VI-NEXT: v_and_b32_e32 v4, 63, v10 +; VI-NEXT: v_sub_u32_e64 v10, s[4:5], 64, v4 +; VI-NEXT: v_or_b32_e32 v1, v1, v9 +; VI-NEXT: v_lshrrev_b64 v[8:9], v4, v[6:7] +; VI-NEXT: v_lshlrev_b64 v[2:3], v10, v[2:3] ; VI-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc -; VI-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[8:9] -; VI-NEXT: v_or_b32_e32 v3, v3, v11 -; VI-NEXT: v_or_b32_e32 v2, v2, v10 +; VI-NEXT: v_or_b32_e32 v3, v3, v9 +; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v4 +; VI-NEXT: v_or_b32_e32 v2, v2, v8 ; VI-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc ; VI-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc ; VI-NEXT: s_setpc_b64 s[30:31] @@ -1093,23 +920,22 @@ ; GFX9-LABEL: v_fshr_v2i64: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: v_and_b32_e32 v8, 63, v8 -; GFX9-NEXT: v_sub_u32_e32 v9, 64, v8 -; GFX9-NEXT: v_lshlrev_b64 v[0:1], v9, v[0:1] -; GFX9-NEXT: v_lshrrev_b64 v[11:12], v8, v[4:5] -; GFX9-NEXT: v_mov_b32_e32 v9, 0 -; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[8:9] -; GFX9-NEXT: v_or_b32_e32 v0, v0, v11 -; GFX9-NEXT: v_and_b32_e32 v8, 63, v10 +; GFX9-NEXT: v_and_b32_e32 v11, 63, v8 +; GFX9-NEXT: v_sub_u32_e32 v12, 64, v11 +; GFX9-NEXT: v_lshrrev_b64 v[8:9], v11, v[4:5] +; GFX9-NEXT: v_lshlrev_b64 v[0:1], v12, v[0:1] +; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v11 +; GFX9-NEXT: v_or_b32_e32 v0, v0, v8 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc -; GFX9-NEXT: v_sub_u32_e32 v4, 64, v8 -; GFX9-NEXT: v_or_b32_e32 v1, v1, v12 -; GFX9-NEXT: v_lshrrev_b64 v[10:11], v8, v[6:7] -; GFX9-NEXT: v_lshlrev_b64 v[2:3], v4, v[2:3] +; GFX9-NEXT: v_and_b32_e32 v4, 63, v10 +; GFX9-NEXT: v_sub_u32_e32 v10, 64, v4 +; GFX9-NEXT: v_or_b32_e32 v1, v1, v9 +; GFX9-NEXT: v_lshrrev_b64 v[8:9], v4, v[6:7] +; GFX9-NEXT: v_lshlrev_b64 v[2:3], v10, v[2:3] ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc -; GFX9-NEXT: v_cmp_eq_u64_e32 vcc, 0, v[8:9] -; GFX9-NEXT: v_or_b32_e32 v3, v3, v11 -; GFX9-NEXT: v_or_b32_e32 v2, v2, v10 +; GFX9-NEXT: v_or_b32_e32 v3, v3, v9 +; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v4 +; GFX9-NEXT: v_or_b32_e32 v2, v2, v8 ; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc ; GFX9-NEXT: s_setpc_b64 s[30:31] @@ -1126,60 +952,40 @@ ; SI-LABEL: v_fshr_i24: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: s_mov_b32 s4, 0xffffff -; SI-NEXT: v_and_b32_e32 v2, s4, v2 -; SI-NEXT: s_mov_b32 s5, 0xaaaaaaab -; SI-NEXT: v_mul_hi_u32 v3, v2, s5 -; SI-NEXT: v_and_b32_e32 v4, s4, v1 +; SI-NEXT: s_mov_b32 s4, 0xaaaaaaab +; SI-NEXT: v_mul_hi_u32 v3, v2, s4 +; SI-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; SI-NEXT: v_lshrrev_b32_e32 v3, 4, v3 ; SI-NEXT: v_mul_lo_u32 v3, v3, 24 ; SI-NEXT: v_sub_i32_e32 v2, vcc, v2, v3 -; SI-NEXT: v_lshr_b32_e32 v3, v4, v2 -; SI-NEXT: v_sub_i32_e32 v4, vcc, 24, v2 -; SI-NEXT: v_and_b32_e32 v4, s4, v4 -; SI-NEXT: v_lshl_b32_e32 v0, v0, v4 -; SI-NEXT: v_or_b32_e32 v0, v0, v3 -; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; SI-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc +; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v2 +; SI-NEXT: v_alignbit_b32 v0, v0, v1, v2 ; SI-NEXT: s_setpc_b64 s[30:31] ; ; VI-LABEL: v_fshr_i24: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: s_mov_b32 s4, 0xffffff -; VI-NEXT: v_and_b32_e32 v2, s4, v2 -; VI-NEXT: s_mov_b32 s5, 0xaaaaaaab -; VI-NEXT: v_mul_hi_u32 v3, v2, s5 -; VI-NEXT: v_and_b32_e32 v4, s4, v1 +; VI-NEXT: s_mov_b32 s4, 0xaaaaaaab +; VI-NEXT: v_mul_hi_u32 v3, v2, s4 +; VI-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; VI-NEXT: v_lshrrev_b32_e32 v3, 4, v3 ; VI-NEXT: v_mul_lo_u32 v3, v3, 24 ; VI-NEXT: v_sub_u32_e32 v2, vcc, v2, v3 -; VI-NEXT: v_lshrrev_b32_e32 v3, v2, v4 -; VI-NEXT: v_sub_u32_e32 v4, vcc, 24, v2 -; VI-NEXT: v_and_b32_e32 v4, s4, v4 -; VI-NEXT: v_lshlrev_b32_e32 v0, v4, v0 -; VI-NEXT: v_or_b32_e32 v0, v0, v3 -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; VI-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc +; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v2 +; VI-NEXT: v_alignbit_b32 v0, v0, v1, v2 ; VI-NEXT: s_setpc_b64 s[30:31] ; ; GFX9-LABEL: v_fshr_i24: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: s_mov_b32 s4, 0xffffff -; GFX9-NEXT: v_and_b32_e32 v2, s4, v2 -; GFX9-NEXT: s_mov_b32 s5, 0xaaaaaaab -; GFX9-NEXT: v_mul_hi_u32 v3, v2, s5 -; GFX9-NEXT: v_and_b32_e32 v4, s4, v1 +; GFX9-NEXT: s_mov_b32 s4, 0xaaaaaaab +; GFX9-NEXT: v_mul_hi_u32 v3, v2, s4 +; GFX9-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v3, 4, v3 ; GFX9-NEXT: v_mul_lo_u32 v3, v3, 24 ; GFX9-NEXT: v_sub_u32_e32 v2, v2, v3 -; GFX9-NEXT: v_lshrrev_b32_e32 v3, v2, v4 -; GFX9-NEXT: v_sub_u32_e32 v4, 24, v2 -; GFX9-NEXT: v_and_b32_e32 v4, s4, v4 -; GFX9-NEXT: v_lshl_or_b32 v0, v0, v4, v3 -; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc +; GFX9-NEXT: v_add_u32_e32 v2, 8, v2 +; GFX9-NEXT: v_alignbit_b32 v0, v0, v1, v2 ; GFX9-NEXT: s_setpc_b64 s[30:31] ; ; R600-LABEL: v_fshr_i24: @@ -1194,50 +1000,35 @@ ; SI-LABEL: v_fshr_v2i24: ; SI: ; %bb.0: ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:8 +; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 ; SI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:16 ; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:20 -; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:12 -; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 -; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:4 -; SI-NEXT: s_mov_b32 s4, 0xffffff -; SI-NEXT: s_mov_b32 s5, 0xaaaaaaab +; SI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:4 +; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:8 +; SI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:12 +; SI-NEXT: s_mov_b32 s4, 0xaaaaaaab ; SI-NEXT: v_add_i32_e32 v7, vcc, 3, v0 ; SI-NEXT: v_add_i32_e32 v8, vcc, 4, v0 ; SI-NEXT: v_add_i32_e32 v9, vcc, 5, v0 ; SI-NEXT: v_add_i32_e32 v10, vcc, 2, v0 -; SI-NEXT: s_waitcnt vmcnt(5) -; SI-NEXT: v_and_b32_e32 v14, s4, v1 ; SI-NEXT: s_waitcnt vmcnt(4) -; SI-NEXT: v_and_b32_e32 v2, s4, v2 -; SI-NEXT: v_mul_hi_u32 v12, v2, s5 +; SI-NEXT: v_mul_hi_u32 v11, v2, s4 ; SI-NEXT: s_waitcnt vmcnt(3) -; SI-NEXT: v_and_b32_e32 v3, s4, v3 -; SI-NEXT: v_mul_hi_u32 v13, v3, s5 -; SI-NEXT: s_waitcnt vmcnt(2) -; SI-NEXT: v_and_b32_e32 v11, s4, v4 +; SI-NEXT: v_mul_hi_u32 v12, v3, s4 +; SI-NEXT: s_waitcnt vmcnt(1) +; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v5 +; SI-NEXT: v_lshrrev_b32_e32 v11, 4, v11 ; SI-NEXT: v_lshrrev_b32_e32 v12, 4, v12 +; SI-NEXT: v_mul_lo_u32 v11, v11, 24 ; SI-NEXT: v_mul_lo_u32 v12, v12, 24 -; SI-NEXT: v_lshrrev_b32_e32 v13, 4, v13 -; SI-NEXT: v_mul_lo_u32 v13, v13, 24 -; SI-NEXT: v_sub_i32_e32 v2, vcc, v2, v12 -; SI-NEXT: v_lshr_b32_e32 v12, v14, v2 -; SI-NEXT: v_sub_i32_e32 v3, vcc, v3, v13 -; SI-NEXT: v_sub_i32_e32 v13, vcc, 24, v2 -; SI-NEXT: v_sub_i32_e32 v14, vcc, 24, v3 -; SI-NEXT: v_and_b32_e32 v13, s4, v13 -; SI-NEXT: s_waitcnt vmcnt(1) -; SI-NEXT: v_lshl_b32_e32 v5, v5, v13 -; SI-NEXT: v_and_b32_e32 v14, 0xffffff, v14 -; SI-NEXT: v_lshr_b32_e32 v11, v11, v3 ; SI-NEXT: s_waitcnt vmcnt(0) -; SI-NEXT: v_lshl_b32_e32 v6, v6, v14 -; SI-NEXT: v_or_b32_e32 v5, v5, v12 -; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; SI-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc -; SI-NEXT: v_or_b32_e32 v6, v6, v11 -; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 -; SI-NEXT: v_cndmask_b32_e32 v2, v6, v4, vcc +; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v6 +; SI-NEXT: v_sub_i32_e32 v2, vcc, v2, v11 +; SI-NEXT: v_sub_i32_e32 v3, vcc, v3, v12 +; SI-NEXT: v_add_i32_e32 v2, vcc, 8, v2 +; SI-NEXT: v_add_i32_e32 v3, vcc, 8, v3 +; SI-NEXT: v_alignbit_b32 v1, v1, v5, v2 +; SI-NEXT: v_alignbit_b32 v2, v4, v6, v3 ; SI-NEXT: buffer_store_byte v2, v7, s[0:3], 0 offen ; SI-NEXT: buffer_store_short v1, v0, s[0:3], 0 offen ; SI-NEXT: v_lshrrev_b32_e32 v0, 8, v2 @@ -1254,50 +1045,35 @@ ; VI-LABEL: v_fshr_v2i24: ; VI: ; %bb.0: ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:8 +; VI-NEXT: buffer_load_dword v1, off, s[0:3], s32 ; VI-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:16 ; VI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:20 -; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:12 -; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 -; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:4 -; VI-NEXT: s_mov_b32 s4, 0xffffff -; VI-NEXT: s_mov_b32 s5, 0xaaaaaaab +; VI-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:4 +; VI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:8 +; VI-NEXT: buffer_load_dword v6, off, s[0:3], s32 offset:12 +; VI-NEXT: s_mov_b32 s4, 0xaaaaaaab ; VI-NEXT: v_add_u32_e32 v7, vcc, 3, v0 ; VI-NEXT: v_add_u32_e32 v8, vcc, 4, v0 ; VI-NEXT: v_add_u32_e32 v9, vcc, 5, v0 ; VI-NEXT: v_add_u32_e32 v10, vcc, 2, v0 -; VI-NEXT: s_waitcnt vmcnt(5) -; VI-NEXT: v_and_b32_e32 v14, s4, v1 ; VI-NEXT: s_waitcnt vmcnt(4) -; VI-NEXT: v_and_b32_e32 v2, s4, v2 -; VI-NEXT: v_mul_hi_u32 v12, v2, s5 +; VI-NEXT: v_mul_hi_u32 v11, v2, s4 ; VI-NEXT: s_waitcnt vmcnt(3) -; VI-NEXT: v_and_b32_e32 v3, s4, v3 -; VI-NEXT: v_mul_hi_u32 v13, v3, s5 -; VI-NEXT: s_waitcnt vmcnt(2) -; VI-NEXT: v_and_b32_e32 v11, s4, v4 +; VI-NEXT: v_mul_hi_u32 v12, v3, s4 +; VI-NEXT: s_waitcnt vmcnt(1) +; VI-NEXT: v_lshlrev_b32_e32 v5, 8, v5 +; VI-NEXT: v_lshrrev_b32_e32 v11, 4, v11 ; VI-NEXT: v_lshrrev_b32_e32 v12, 4, v12 +; VI-NEXT: v_mul_lo_u32 v11, v11, 24 ; VI-NEXT: v_mul_lo_u32 v12, v12, 24 -; VI-NEXT: v_lshrrev_b32_e32 v13, 4, v13 -; VI-NEXT: v_mul_lo_u32 v13, v13, 24 -; VI-NEXT: v_sub_u32_e32 v2, vcc, v2, v12 -; VI-NEXT: v_lshrrev_b32_e32 v12, v2, v14 -; VI-NEXT: v_sub_u32_e32 v3, vcc, v3, v13 -; VI-NEXT: v_sub_u32_e32 v13, vcc, 24, v2 -; VI-NEXT: v_sub_u32_e32 v14, vcc, 24, v3 -; VI-NEXT: v_and_b32_e32 v13, s4, v13 -; VI-NEXT: s_waitcnt vmcnt(1) -; VI-NEXT: v_lshlrev_b32_e32 v5, v13, v5 -; VI-NEXT: v_and_b32_e32 v14, 0xffffff, v14 -; VI-NEXT: v_lshrrev_b32_e32 v11, v3, v11 ; VI-NEXT: s_waitcnt vmcnt(0) -; VI-NEXT: v_lshlrev_b32_e32 v6, v14, v6 -; VI-NEXT: v_or_b32_e32 v5, v5, v12 -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; VI-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc -; VI-NEXT: v_or_b32_e32 v6, v6, v11 -; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 -; VI-NEXT: v_cndmask_b32_e32 v2, v6, v4, vcc +; VI-NEXT: v_lshlrev_b32_e32 v6, 8, v6 +; VI-NEXT: v_sub_u32_e32 v2, vcc, v2, v11 +; VI-NEXT: v_sub_u32_e32 v3, vcc, v3, v12 +; VI-NEXT: v_add_u32_e32 v2, vcc, 8, v2 +; VI-NEXT: v_add_u32_e32 v3, vcc, 8, v3 +; VI-NEXT: v_alignbit_b32 v1, v1, v5, v2 +; VI-NEXT: v_alignbit_b32 v2, v4, v6, v3 ; VI-NEXT: buffer_store_byte v2, v7, s[0:3], 0 offen ; VI-NEXT: buffer_store_short v1, v0, s[0:3], 0 offen ; VI-NEXT: v_lshrrev_b32_e32 v0, 8, v2 @@ -1312,44 +1088,31 @@ ; GFX9-LABEL: v_fshr_v2i24: ; GFX9: ; %bb.0: ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) -; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:8 +; GFX9-NEXT: buffer_load_dword v1, off, s[0:3], s32 ; GFX9-NEXT: buffer_load_dword v2, off, s[0:3], s32 offset:16 ; GFX9-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:20 -; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:12 -; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 -; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:4 -; GFX9-NEXT: s_mov_b32 s4, 0xffffff -; GFX9-NEXT: s_mov_b32 s5, 0xaaaaaaab -; GFX9-NEXT: s_waitcnt vmcnt(5) -; GFX9-NEXT: v_and_b32_e32 v10, s4, v1 +; GFX9-NEXT: buffer_load_dword v4, off, s[0:3], s32 offset:4 +; GFX9-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:8 +; GFX9-NEXT: buffer_load_dword v8, off, s[0:3], s32 offset:12 +; GFX9-NEXT: s_mov_b32 s4, 0xaaaaaaab ; GFX9-NEXT: s_waitcnt vmcnt(4) -; GFX9-NEXT: v_and_b32_e32 v2, s4, v2 -; GFX9-NEXT: v_mul_hi_u32 v6, v2, s5 +; GFX9-NEXT: v_mul_hi_u32 v6, v2, s4 ; GFX9-NEXT: s_waitcnt vmcnt(3) -; GFX9-NEXT: v_and_b32_e32 v3, s4, v3 -; GFX9-NEXT: v_mul_hi_u32 v7, v3, s5 -; GFX9-NEXT: s_waitcnt vmcnt(2) -; GFX9-NEXT: v_and_b32_e32 v9, s4, v4 +; GFX9-NEXT: v_mul_hi_u32 v7, v3, s4 +; GFX9-NEXT: s_waitcnt vmcnt(1) +; GFX9-NEXT: v_lshlrev_b32_e32 v5, 8, v5 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 4, v6 -; GFX9-NEXT: v_mul_lo_u32 v6, v6, 24 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 4, v7 +; GFX9-NEXT: v_mul_lo_u32 v6, v6, 24 ; GFX9-NEXT: v_mul_lo_u32 v7, v7, 24 +; GFX9-NEXT: s_waitcnt vmcnt(0) +; GFX9-NEXT: v_lshlrev_b32_e32 v8, 8, v8 ; GFX9-NEXT: v_sub_u32_e32 v2, v2, v6 -; GFX9-NEXT: v_lshrrev_b32_e32 v6, v2, v10 ; GFX9-NEXT: v_sub_u32_e32 v3, v3, v7 -; GFX9-NEXT: v_sub_u32_e32 v7, 24, v2 -; GFX9-NEXT: v_sub_u32_e32 v10, 24, v3 -; GFX9-NEXT: v_and_b32_e32 v7, s4, v7 -; GFX9-NEXT: v_lshrrev_b32_e32 v9, v3, v9 -; GFX9-NEXT: v_and_b32_e32 v10, 0xffffff, v10 -; GFX9-NEXT: s_waitcnt vmcnt(1) -; GFX9-NEXT: v_lshl_or_b32 v5, v5, v7, v6 -; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2 -; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc -; GFX9-NEXT: s_waitcnt vmcnt(0) -; GFX9-NEXT: v_lshl_or_b32 v6, v8, v10, v9 -; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v3 -; GFX9-NEXT: v_cndmask_b32_e32 v2, v6, v4, vcc +; GFX9-NEXT: v_add_u32_e32 v2, 8, v2 +; GFX9-NEXT: v_add_u32_e32 v3, 8, v3 +; GFX9-NEXT: v_alignbit_b32 v1, v1, v5, v2 +; GFX9-NEXT: v_alignbit_b32 v2, v4, v8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v2 ; GFX9-NEXT: buffer_store_byte_d16_hi v2, v0, s[0:3], 0 offen offset:5 ; GFX9-NEXT: buffer_store_byte v3, v0, s[0:3], 0 offen offset:4 diff --git a/llvm/test/CodeGen/PowerPC/funnel-shift-rot.ll b/llvm/test/CodeGen/PowerPC/funnel-shift-rot.ll --- a/llvm/test/CodeGen/PowerPC/funnel-shift-rot.ll +++ b/llvm/test/CodeGen/PowerPC/funnel-shift-rot.ll @@ -40,13 +40,13 @@ define i16 @rotl_i16(i16 %x, i16 %z) { ; CHECK-LABEL: rotl_i16: ; CHECK: # %bb.0: -; CHECK-NEXT: neg 5, 4 -; CHECK-NEXT: clrlwi 6, 3, 16 -; CHECK-NEXT: rlwinm 4, 4, 0, 28, 31 -; CHECK-NEXT: clrlwi 5, 5, 28 -; CHECK-NEXT: slw 3, 3, 4 -; CHECK-NEXT: srw 4, 6, 5 -; CHECK-NEXT: or 3, 3, 4 +; CHECK-NEXT: andi. 4, 4, 15 +; CHECK-NEXT: slwi 5, 3, 16 +; CHECK-NEXT: subfic 6, 4, 32 +; CHECK-NEXT: slw 4, 3, 4 +; CHECK-NEXT: srw 5, 5, 6 +; CHECK-NEXT: or 4, 4, 5 +; CHECK-NEXT: isel 3, 3, 4, 2 ; CHECK-NEXT: blr %f = call i16 @llvm.fshl.i16(i16 %x, i16 %x, i16 %z) ret i16 %f @@ -120,13 +120,16 @@ define i16 @rotr_i16(i16 %x, i16 %z) { ; CHECK-LABEL: rotr_i16: ; CHECK: # %bb.0: -; CHECK-NEXT: neg 5, 4 -; CHECK-NEXT: clrlwi 6, 3, 16 +; CHECK-NEXT: li 5, 16 ; CHECK-NEXT: rlwinm 4, 4, 0, 28, 31 -; CHECK-NEXT: clrlwi 5, 5, 28 -; CHECK-NEXT: srw 4, 6, 4 -; CHECK-NEXT: slw 3, 3, 5 -; CHECK-NEXT: or 3, 3, 4 +; CHECK-NEXT: rlwimi 5, 4, 0, 28, 26 +; CHECK-NEXT: slwi 4, 3, 16 +; CHECK-NEXT: subfic 6, 5, 32 +; CHECK-NEXT: srw 7, 4, 5 +; CHECK-NEXT: slw 3, 3, 6 +; CHECK-NEXT: cmplwi 5, 0 +; CHECK-NEXT: or 3, 3, 7 +; CHECK-NEXT: isel 3, 4, 3, 2 ; CHECK-NEXT: blr %f = call i16 @llvm.fshr.i16(i16 %x, i16 %x, i16 %z) ret i16 %f @@ -135,8 +138,10 @@ define i32 @rotr_i32(i32 %x, i32 %z) { ; CHECK-LABEL: rotr_i32: ; CHECK: # %bb.0: -; CHECK-NEXT: neg 4, 4 -; CHECK-NEXT: rlwnm 3, 3, 4, 0, 31 +; CHECK-NEXT: subfic 5, 4, 32 +; CHECK-NEXT: andi. 4, 4, 31 +; CHECK-NEXT: rotlw 4, 3, 5 +; CHECK-NEXT: isel 3, 3, 4, 2 ; CHECK-NEXT: blr %f = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 %z) ret i32 %f @@ -145,8 +150,10 @@ define i64 @rotr_i64(i64 %x, i64 %z) { ; CHECK-LABEL: rotr_i64: ; CHECK: # %bb.0: -; CHECK-NEXT: neg 4, 4 -; CHECK-NEXT: rldcl 3, 3, 4, 0 +; CHECK-NEXT: subfic 5, 4, 64 +; CHECK-NEXT: andi. 4, 4, 63 +; CHECK-NEXT: rotld 4, 3, 5 +; CHECK-NEXT: isel 3, 3, 4, 2 ; CHECK-NEXT: blr %f = call i64 @llvm.fshr.i64(i64 %x, i64 %x, i64 %z) ret i64 %f @@ -157,9 +164,18 @@ define <4 x i32> @rotr_v4i32(<4 x i32> %x, <4 x i32> %z) { ; CHECK-LABEL: rotr_v4i32: ; CHECK: # %bb.0: -; CHECK-NEXT: xxlxor 36, 36, 36 -; CHECK-NEXT: vsubuwm 3, 4, 3 -; CHECK-NEXT: vrlw 2, 2, 3 +; CHECK-NEXT: vspltisw 4, -16 +; CHECK-NEXT: vspltisw 5, 15 +; CHECK-NEXT: addis 3, 2, .LCPI12_0@toc@ha +; CHECK-NEXT: addi 3, 3, .LCPI12_0@toc@l +; CHECK-NEXT: lvx 0, 0, 3 +; CHECK-NEXT: vsubuwm 4, 5, 4 +; CHECK-NEXT: xxlxor 37, 37, 37 +; CHECK-NEXT: xxland 36, 35, 36 +; CHECK-NEXT: vsubuwm 3, 0, 3 +; CHECK-NEXT: vcmpequw 4, 4, 5 +; CHECK-NEXT: vrlw 3, 2, 3 +; CHECK-NEXT: xxsel 34, 35, 34, 36 ; CHECK-NEXT: blr %f = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> %z) ret <4 x i32> %f diff --git a/llvm/test/CodeGen/PowerPC/funnel-shift.ll b/llvm/test/CodeGen/PowerPC/funnel-shift.ll --- a/llvm/test/CodeGen/PowerPC/funnel-shift.ll +++ b/llvm/test/CodeGen/PowerPC/funnel-shift.ll @@ -35,17 +35,17 @@ ; CHECK-LABEL: fshl_i37: ; CHECK: # %bb.0: ; CHECK-NEXT: lis 6, -8857 -; CHECK-NEXT: clrldi 5, 5, 27 +; CHECK-NEXT: sldi 4, 4, 27 ; CHECK-NEXT: ori 6, 6, 51366 -; CHECK-NEXT: clrldi 4, 4, 27 ; CHECK-NEXT: sldi 6, 6, 32 ; CHECK-NEXT: oris 6, 6, 3542 ; CHECK-NEXT: ori 6, 6, 31883 ; CHECK-NEXT: mulhdu 6, 5, 6 ; CHECK-NEXT: rldicl 6, 6, 59, 5 ; CHECK-NEXT: mulli 6, 6, 37 -; CHECK-NEXT: subf. 5, 6, 5 -; CHECK-NEXT: subfic 6, 5, 37 +; CHECK-NEXT: sub 5, 5, 6 +; CHECK-NEXT: andi. 5, 5, 63 +; CHECK-NEXT: subfic 6, 5, 64 ; CHECK-NEXT: sld 5, 3, 5 ; CHECK-NEXT: srd 4, 4, 6 ; CHECK-NEXT: or 4, 5, 4 @@ -141,7 +141,7 @@ ; CHECK-LABEL: fshr_i37: ; CHECK: # %bb.0: ; CHECK-NEXT: lis 6, -8857 -; CHECK-NEXT: clrldi 5, 5, 27 +; CHECK-NEXT: sldi 4, 4, 27 ; CHECK-NEXT: ori 6, 6, 51366 ; CHECK-NEXT: sldi 6, 6, 32 ; CHECK-NEXT: oris 6, 6, 3542 @@ -149,11 +149,12 @@ ; CHECK-NEXT: mulhdu 6, 5, 6 ; CHECK-NEXT: rldicl 6, 6, 59, 5 ; CHECK-NEXT: mulli 6, 6, 37 -; CHECK-NEXT: subf. 5, 6, 5 -; CHECK-NEXT: clrldi 6, 4, 27 -; CHECK-NEXT: subfic 7, 5, 37 -; CHECK-NEXT: srd 5, 6, 5 -; CHECK-NEXT: sld 3, 3, 7 +; CHECK-NEXT: sub 5, 5, 6 +; CHECK-NEXT: addi 5, 5, 27 +; CHECK-NEXT: andi. 5, 5, 63 +; CHECK-NEXT: subfic 6, 5, 64 +; CHECK-NEXT: srd 5, 4, 5 +; CHECK-NEXT: sld 3, 3, 6 ; CHECK-NEXT: or 3, 3, 5 ; CHECK-NEXT: isel 3, 4, 3, 2 ; CHECK-NEXT: blr diff --git a/llvm/test/CodeGen/X86/rotate_vec.ll b/llvm/test/CodeGen/X86/rotate_vec.ll --- a/llvm/test/CodeGen/X86/rotate_vec.ll +++ b/llvm/test/CodeGen/X86/rotate_vec.ll @@ -101,6 +101,7 @@ ; XOP: # %bb.0: ; XOP-NEXT: vpsravd {{.*}}(%rip), %xmm0, %xmm0 ; XOP-NEXT: vprotd $1, %xmm0, %xmm0 +; XOP-NEXT: vpsravd {{.*}}(%rip), %xmm0, %xmm0 ; XOP-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 ; XOP-NEXT: retq ; @@ -108,6 +109,7 @@ ; AVX512: # %bb.0: ; AVX512-NEXT: vpsravd {{.*}}(%rip), %xmm0, %xmm0 ; AVX512-NEXT: vprold $1, %xmm0, %xmm0 +; AVX512-NEXT: vpsravd {{.*}}(%rip), %xmm0, %xmm0 ; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 ; AVX512-NEXT: retq %1 = ashr <4 x i32> %a0, diff --git a/llvm/test/CodeGen/X86/vector-fshl-128.ll b/llvm/test/CodeGen/X86/vector-fshl-128.ll --- a/llvm/test/CodeGen/X86/vector-fshl-128.ll +++ b/llvm/test/CodeGen/X86/vector-fshl-128.ll @@ -108,17 +108,15 @@ ; ; AVX512F-LABEL: var_funnnel_v2i64: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512F-NEXT: vpsllvq %xmm2, %xmm0, %xmm3 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm4 = [64,64] ; AVX512F-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512F-NEXT: vpsrlvq %xmm4, %xmm1, %xmm1 ; AVX512F-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512F-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} -; AVX512F-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqq %xmm3, %xmm2, %xmm2 +; AVX512F-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v2i64: @@ -136,32 +134,28 @@ ; ; AVX512BW-LABEL: var_funnnel_v2i64: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512BW-NEXT: vpsllvq %xmm2, %xmm0, %xmm3 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm4 = [64,64] ; AVX512BW-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512BW-NEXT: vpsrlvq %xmm4, %xmm1, %xmm1 ; AVX512BW-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512BW-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqq %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v2i64: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpsllvq %xmm2, %xmm0, %xmm3 ; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} xmm4 = [64,64] ; AVX512VBMI2-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512VBMI2-NEXT: vpsrlvq %xmm4, %xmm1, %xmm1 ; AVX512VBMI2-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512VBMI2-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512VBMI2-NEXT: vzeroupper +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqq %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v2i64: @@ -350,7 +344,6 @@ ; ; AVX512F-LABEL: var_funnnel_v4i32: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512F-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31] ; AVX512F-NEXT: vpand %xmm3, %xmm2, %xmm2 ; AVX512F-NEXT: vpsllvd %xmm2, %xmm0, %xmm3 @@ -358,10 +351,9 @@ ; AVX512F-NEXT: vpsubd %xmm2, %xmm4, %xmm4 ; AVX512F-NEXT: vpsrlvd %xmm4, %xmm1, %xmm1 ; AVX512F-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512F-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} -; AVX512F-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2 +; AVX512F-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v4i32: @@ -379,7 +371,6 @@ ; ; AVX512BW-LABEL: var_funnnel_v4i32: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512BW-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31] ; AVX512BW-NEXT: vpand %xmm3, %xmm2, %xmm2 ; AVX512BW-NEXT: vpsllvd %xmm2, %xmm0, %xmm3 @@ -387,15 +378,13 @@ ; AVX512BW-NEXT: vpsubd %xmm2, %xmm4, %xmm4 ; AVX512BW-NEXT: vpsrlvd %xmm4, %xmm1, %xmm1 ; AVX512BW-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512BW-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v4i32: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512VBMI2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31] ; AVX512VBMI2-NEXT: vpand %xmm3, %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpsllvd %xmm2, %xmm0, %xmm3 @@ -403,10 +392,9 @@ ; AVX512VBMI2-NEXT: vpsubd %xmm2, %xmm4, %xmm4 ; AVX512VBMI2-NEXT: vpsrlvd %xmm4, %xmm1, %xmm1 ; AVX512VBMI2-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512VBMI2-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512VBMI2-NEXT: vzeroupper +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v4i32: @@ -711,9 +699,9 @@ ; AVX512BW-NEXT: vpsubw %xmm2, %xmm4, %xmm4 ; AVX512BW-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1 ; AVX512BW-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512BW-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %xmm1, %xmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqw %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; @@ -727,9 +715,9 @@ ; AVX512VBMI2-NEXT: vpsubw %xmm2, %xmm4, %xmm4 ; AVX512VBMI2-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1 ; AVX512VBMI2-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512VBMI2-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %xmm1, %xmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqw %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512VBMI2-NEXT: vzeroupper ; AVX512VBMI2-NEXT: retq ; @@ -1018,7 +1006,6 @@ ; ; AVX512BW-LABEL: var_funnnel_v16i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero,xmm2[8],zero,xmm2[9],zero,xmm2[10],zero,xmm2[11],zero,xmm2[12],zero,xmm2[13],zero,xmm2[14],zero,xmm2[15],zero @@ -1030,15 +1017,14 @@ ; AVX512BW-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1 ; AVX512BW-NEXT: vpor %ymm1, %ymm3, %ymm1 ; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 -; AVX512BW-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %xmm1, %xmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v16i8: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero,xmm2[8],zero,xmm2[9],zero,xmm2[10],zero,xmm2[11],zero,xmm2[12],zero,xmm2[13],zero,xmm2[14],zero,xmm2[15],zero @@ -1050,9 +1036,9 @@ ; AVX512VBMI2-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1 ; AVX512VBMI2-NEXT: vpor %ymm1, %ymm3, %ymm1 ; AVX512VBMI2-NEXT: vpmovwb %zmm1, %ymm1 -; AVX512VBMI2-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %xmm1, %xmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqb %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512VBMI2-NEXT: vzeroupper ; AVX512VBMI2-NEXT: retq ; @@ -1246,7 +1232,6 @@ ; ; AVX512F-LABEL: splatvar_funnnel_v2i64: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512F-NEXT: vpbroadcastq %xmm2, %xmm2 ; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512F-NEXT: vpsllq %xmm2, %xmm0, %xmm3 @@ -1254,10 +1239,9 @@ ; AVX512F-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512F-NEXT: vpsrlq %xmm4, %xmm1, %xmm1 ; AVX512F-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512F-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} -; AVX512F-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqq %xmm3, %xmm2, %xmm2 +; AVX512F-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: splatvar_funnnel_v2i64: @@ -1276,7 +1260,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v2i64: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512BW-NEXT: vpbroadcastq %xmm2, %xmm2 ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512BW-NEXT: vpsllq %xmm2, %xmm0, %xmm3 @@ -1284,15 +1267,13 @@ ; AVX512BW-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512BW-NEXT: vpsrlq %xmm4, %xmm1, %xmm1 ; AVX512BW-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512BW-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqq %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v2i64: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512VBMI2-NEXT: vpbroadcastq %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpsllq %xmm2, %xmm0, %xmm3 @@ -1300,10 +1281,9 @@ ; AVX512VBMI2-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512VBMI2-NEXT: vpsrlq %xmm4, %xmm1, %xmm1 ; AVX512VBMI2-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512VBMI2-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512VBMI2-NEXT: vzeroupper +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqq %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v2i64: @@ -1461,7 +1441,6 @@ ; ; AVX512F-LABEL: splatvar_funnnel_v4i32: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512F-NEXT: vpbroadcastd %xmm2, %xmm2 ; AVX512F-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31] ; AVX512F-NEXT: vpand %xmm3, %xmm2, %xmm2 @@ -1472,10 +1451,9 @@ ; AVX512F-NEXT: vpmovzxdq {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero ; AVX512F-NEXT: vpsrld %xmm4, %xmm1, %xmm1 ; AVX512F-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512F-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} -; AVX512F-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2 +; AVX512F-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: splatvar_funnnel_v4i32: @@ -1496,7 +1474,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v4i32: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512BW-NEXT: vpbroadcastd %xmm2, %xmm2 ; AVX512BW-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31] ; AVX512BW-NEXT: vpand %xmm3, %xmm2, %xmm2 @@ -1507,15 +1484,13 @@ ; AVX512BW-NEXT: vpmovzxdq {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero ; AVX512BW-NEXT: vpsrld %xmm4, %xmm1, %xmm1 ; AVX512BW-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512BW-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v4i32: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512VBMI2-NEXT: vpbroadcastd %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31] ; AVX512VBMI2-NEXT: vpand %xmm3, %xmm2, %xmm2 @@ -1526,10 +1501,9 @@ ; AVX512VBMI2-NEXT: vpmovzxdq {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero ; AVX512VBMI2-NEXT: vpsrld %xmm4, %xmm1, %xmm1 ; AVX512VBMI2-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512VBMI2-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512VBMI2-NEXT: vzeroupper +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v4i32: @@ -1722,7 +1696,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v8i16: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512BW-NEXT: vpbroadcastw %xmm2, %xmm2 ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero @@ -1732,15 +1705,13 @@ ; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero ; AVX512BW-NEXT: vpsrlw %xmm4, %xmm1, %xmm1 ; AVX512BW-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512BW-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqw %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v8i16: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512VBMI2-NEXT: vpbroadcastw %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero @@ -1750,10 +1721,9 @@ ; AVX512VBMI2-NEXT: vpmovzxwq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero ; AVX512VBMI2-NEXT: vpsrlw %xmm4, %xmm1, %xmm1 ; AVX512VBMI2-NEXT: vpor %xmm1, %xmm3, %xmm1 -; AVX512VBMI2-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %xmm1, %xmm0 -; AVX512VBMI2-NEXT: vzeroupper +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqw %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v8i16: @@ -1990,7 +1960,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v16i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512BW-NEXT: vpbroadcastb %xmm2, %xmm2 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 @@ -2003,15 +1972,14 @@ ; AVX512BW-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1 ; AVX512BW-NEXT: vpor %ymm1, %ymm3, %ymm1 ; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 -; AVX512BW-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %xmm1, %xmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v16i8: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 ; AVX512VBMI2-NEXT: vpbroadcastb %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 @@ -2024,9 +1992,9 @@ ; AVX512VBMI2-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1 ; AVX512VBMI2-NEXT: vpor %ymm1, %ymm3, %ymm1 ; AVX512VBMI2-NEXT: vpmovwb %zmm1, %ymm1 -; AVX512VBMI2-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %xmm1, %xmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqb %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512VBMI2-NEXT: vzeroupper ; AVX512VBMI2-NEXT: retq ; @@ -2241,15 +2209,29 @@ ; ; X32-SSE-LABEL: constant_funnnel_v2i64: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: movdqa %xmm1, %xmm2 -; X32-SSE-NEXT: psrlq $60, %xmm2 -; X32-SSE-NEXT: psrlq $50, %xmm1 -; X32-SSE-NEXT: movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1] -; X32-SSE-NEXT: movdqa %xmm0, %xmm2 -; X32-SSE-NEXT: psllq $4, %xmm2 -; X32-SSE-NEXT: psllq $14, %xmm0 -; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] -; X32-SSE-NEXT: orpd %xmm1, %xmm0 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = <4,u,14,u> +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2 +; X32-SSE-NEXT: movdqa %xmm0, %xmm3 +; X32-SSE-NEXT: psllq %xmm2, %xmm3 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[2,3,0,1] +; X32-SSE-NEXT: movdqa %xmm0, %xmm5 +; X32-SSE-NEXT: psllq %xmm4, %xmm5 +; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1] +; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [64,0,64,0] +; X32-SSE-NEXT: psubq %xmm2, %xmm3 +; X32-SSE-NEXT: movdqa %xmm1, %xmm4 +; X32-SSE-NEXT: psrlq %xmm3, %xmm4 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] +; X32-SSE-NEXT: psrlq %xmm3, %xmm1 +; X32-SSE-NEXT: movsd {{.*#+}} xmm1 = xmm4[0],xmm1[1] +; X32-SSE-NEXT: orpd %xmm5, %xmm1 +; X32-SSE-NEXT: pxor %xmm3, %xmm3 +; X32-SSE-NEXT: pcmpeqd %xmm2, %xmm3 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[1,0,3,2] +; X32-SSE-NEXT: pand %xmm3, %xmm2 +; X32-SSE-NEXT: pand %xmm2, %xmm0 +; X32-SSE-NEXT: pandn %xmm1, %xmm2 +; X32-SSE-NEXT: por %xmm2, %xmm0 ; X32-SSE-NEXT: retl %res = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %x, <2 x i64> %y, <2 x i64> ) ret <2 x i64> %res @@ -2398,7 +2380,7 @@ define <8 x i16> @constant_funnnel_v8i16(<8 x i16> %x, <8 x i16> %y) nounwind { ; SSE2-LABEL: constant_funnnel_v8i16: ; SSE2: # %bb.0: -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = +; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128] ; SSE2-NEXT: pmulhuw %xmm2, %xmm1 ; SSE2-NEXT: pmullw %xmm0, %xmm2 ; SSE2-NEXT: por %xmm1, %xmm2 @@ -2411,7 +2393,7 @@ ; ; SSE41-LABEL: constant_funnnel_v8i16: ; SSE41: # %bb.0: -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = +; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128] ; SSE41-NEXT: pmulhuw %xmm2, %xmm1 ; SSE41-NEXT: pmullw %xmm0, %xmm2 ; SSE41-NEXT: por %xmm1, %xmm2 @@ -2420,7 +2402,7 @@ ; ; AVX-LABEL: constant_funnnel_v8i16: ; AVX: # %bb.0: -; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = +; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128] ; AVX-NEXT: vpmulhuw %xmm2, %xmm1, %xmm1 ; AVX-NEXT: vpmullw %xmm2, %xmm0, %xmm2 ; AVX-NEXT: vpor %xmm1, %xmm2, %xmm1 @@ -2429,7 +2411,7 @@ ; ; AVX512F-LABEL: constant_funnnel_v8i16: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128] ; AVX512F-NEXT: vpmulhuw %xmm2, %xmm1, %xmm1 ; AVX512F-NEXT: vpmullw %xmm2, %xmm0, %xmm2 ; AVX512F-NEXT: vpor %xmm1, %xmm2, %xmm1 @@ -2438,7 +2420,7 @@ ; ; AVX512VL-LABEL: constant_funnnel_v8i16: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128] ; AVX512VL-NEXT: vpmulhuw %xmm2, %xmm1, %xmm1 ; AVX512VL-NEXT: vpmullw %xmm2, %xmm0, %xmm2 ; AVX512VL-NEXT: vpor %xmm1, %xmm2, %xmm1 @@ -2494,7 +2476,7 @@ ; ; X32-SSE-LABEL: constant_funnnel_v8i16: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [1,2,4,8,16,32,64,128] ; X32-SSE-NEXT: pmulhuw %xmm2, %xmm1 ; X32-SSE-NEXT: pmullw %xmm0, %xmm2 ; X32-SSE-NEXT: por %xmm1, %xmm2 @@ -2514,11 +2496,11 @@ ; SSE2-NEXT: pxor %xmm2, %xmm2 ; SSE2-NEXT: movdqa %xmm1, %xmm3 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15] -; SSE2-NEXT: movdqa {{.*#+}} xmm4 = +; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [1,128,64,32,16,8,4,2] ; SSE2-NEXT: pmullw %xmm4, %xmm3 ; SSE2-NEXT: psrlw $8, %xmm3 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] -; SSE2-NEXT: movdqa {{.*#+}} xmm5 = +; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [1,2,4,8,16,32,64,128] ; SSE2-NEXT: pmullw %xmm5, %xmm1 ; SSE2-NEXT: psrlw $8, %xmm1 ; SSE2-NEXT: packuswb %xmm3, %xmm1 @@ -2546,37 +2528,37 @@ ; SSE41-NEXT: pxor %xmm0, %xmm0 ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero ; SSE41-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] -; SSE41-NEXT: movdqa {{.*#+}} xmm0 = +; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [1,128,64,32,16,8,4,2] ; SSE41-NEXT: pmullw %xmm0, %xmm1 ; SSE41-NEXT: psrlw $8, %xmm1 -; SSE41-NEXT: movdqa {{.*#+}} xmm4 = +; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [1,2,4,8,16,32,64,128] ; SSE41-NEXT: pmullw %xmm4, %xmm3 ; SSE41-NEXT: psrlw $8, %xmm3 ; SSE41-NEXT: packuswb %xmm1, %xmm3 -; SSE41-NEXT: movdqa %xmm2, %xmm1 -; SSE41-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] -; SSE41-NEXT: pmullw %xmm0, %xmm1 +; SSE41-NEXT: movdqa %xmm2, %xmm5 +; SSE41-NEXT: punpckhbw {{.*#+}} xmm5 = xmm5[8],xmm0[8],xmm5[9],xmm0[9],xmm5[10],xmm0[10],xmm5[11],xmm0[11],xmm5[12],xmm0[12],xmm5[13],xmm0[13],xmm5[14],xmm0[14],xmm5[15],xmm0[15] +; SSE41-NEXT: pmullw %xmm0, %xmm5 ; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [255,255,255,255,255,255,255,255] -; SSE41-NEXT: pand %xmm0, %xmm1 -; SSE41-NEXT: pmovzxbw {{.*#+}} xmm5 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero -; SSE41-NEXT: pmullw %xmm4, %xmm5 ; SSE41-NEXT: pand %xmm0, %xmm5 -; SSE41-NEXT: packuswb %xmm1, %xmm5 -; SSE41-NEXT: por %xmm3, %xmm5 -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; SSE41-NEXT: pblendvb %xmm0, %xmm5, %xmm2 -; SSE41-NEXT: movdqa %xmm2, %xmm0 +; SSE41-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero +; SSE41-NEXT: pmullw %xmm4, %xmm1 +; SSE41-NEXT: pand %xmm0, %xmm1 +; SSE41-NEXT: packuswb %xmm5, %xmm1 +; SSE41-NEXT: por %xmm3, %xmm1 +; SSE41-NEXT: movaps {{.*#+}} xmm0 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm1 +; SSE41-NEXT: movdqa %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: constant_funnnel_v16i8: ; AVX1: # %bb.0: ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm1[8],xmm2[8],xmm1[9],xmm2[9],xmm1[10],xmm2[10],xmm1[11],xmm2[11],xmm1[12],xmm2[12],xmm1[13],xmm2[13],xmm1[14],xmm2[14],xmm1[15],xmm2[15] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = +; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [1,128,64,32,16,8,4,2] ; AVX1-NEXT: vpmullw %xmm3, %xmm2, %xmm2 ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero -; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = +; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [1,2,4,8,16,32,64,128] ; AVX1-NEXT: vpmullw %xmm4, %xmm1, %xmm1 ; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm1 ; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 @@ -2589,25 +2571,26 @@ ; AVX1-NEXT: vpand %xmm3, %xmm4, %xmm3 ; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpor %xmm1, %xmm2, %xmm1 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX1-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: constant_funnnel_v16i8: ; AVX2: # %bb.0: ; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero -; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm1, %ymm1 +; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [1,2,4,8,16,32,64,128,1,128,64,32,16,8,4,2] +; AVX2-NEXT: vpmullw %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vpsrlw $8, %ymm1, %ymm1 -; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 -; AVX2-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 -; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm2, %ymm2 +; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm3 +; AVX2-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 +; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX2-NEXT: vpmullw %ymm2, %ymm3, %ymm2 ; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 ; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm3 ; AVX2-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 ; AVX2-NEXT: vpor %xmm1, %xmm2, %xmm1 -; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX2-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 +; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX2-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX2-NEXT: vzeroupper ; AVX2-NEXT: retq ; @@ -2619,8 +2602,8 @@ ; AVX512F-NEXT: vpsllvd {{.*}}(%rip), %zmm2, %zmm2 ; AVX512F-NEXT: vpord %zmm1, %zmm2, %zmm1 ; AVX512F-NEXT: vpmovdb %zmm1, %xmm1 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512F-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512F-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; @@ -2632,38 +2615,38 @@ ; AVX512VL-NEXT: vpsllvd {{.*}}(%rip), %zmm2, %zmm2 ; AVX512VL-NEXT: vpord %zmm1, %zmm2, %zmm1 ; AVX512VL-NEXT: vpmovdb %zmm1, %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512VL-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512VL-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: constant_funnnel_v16i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [8,7,6,5,4,3,2,1,8,1,2,3,4,5,6,7] ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero ; AVX512BW-NEXT: vpsrlvw %zmm2, %zmm1, %zmm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,7,6,5,4,3,2,1] ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero ; AVX512BW-NEXT: vpsllvw %zmm2, %zmm3, %zmm2 ; AVX512BW-NEXT: vpor %ymm1, %ymm2, %ymm1 ; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512BW-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512BW-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: constant_funnnel_v16i8: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} ymm2 = +; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} ymm2 = [8,7,6,5,4,3,2,1,8,1,2,3,4,5,6,7] ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero ; AVX512VBMI2-NEXT: vpsrlvw %zmm2, %zmm1, %zmm1 -; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} ymm2 = +; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,7,6,5,4,3,2,1] ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero ; AVX512VBMI2-NEXT: vpsllvw %zmm2, %zmm3, %zmm2 ; AVX512VBMI2-NEXT: vpor %ymm1, %ymm2, %ymm1 ; AVX512VBMI2-NEXT: vpmovwb %zmm1, %ymm1 -; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512VBMI2-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 +; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512VBMI2-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512VBMI2-NEXT: vzeroupper ; AVX512VBMI2-NEXT: retq ; @@ -2702,8 +2685,8 @@ ; XOP-NEXT: vpshlb {{.*}}(%rip), %xmm1, %xmm1 ; XOP-NEXT: vpshlb {{.*}}(%rip), %xmm0, %xmm2 ; XOP-NEXT: vpor %xmm1, %xmm2, %xmm1 -; XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; XOP-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 +; XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; XOP-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; XOP-NEXT: retq ; ; X32-SSE-LABEL: constant_funnnel_v16i8: @@ -2711,11 +2694,11 @@ ; X32-SSE-NEXT: pxor %xmm2, %xmm2 ; X32-SSE-NEXT: movdqa %xmm1, %xmm3 ; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15] -; X32-SSE-NEXT: movdqa {{.*#+}} xmm4 = +; X32-SSE-NEXT: movdqa {{.*#+}} xmm4 = [1,128,64,32,16,8,4,2] ; X32-SSE-NEXT: pmullw %xmm4, %xmm3 ; X32-SSE-NEXT: psrlw $8, %xmm3 ; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] -; X32-SSE-NEXT: movdqa {{.*#+}} xmm5 = +; X32-SSE-NEXT: movdqa {{.*#+}} xmm5 = [1,2,4,8,16,32,64,128] ; X32-SSE-NEXT: pmullw %xmm5, %xmm1 ; X32-SSE-NEXT: psrlw $8, %xmm1 ; X32-SSE-NEXT: packuswb %xmm3, %xmm1 @@ -2808,9 +2791,25 @@ ; ; X32-SSE-LABEL: splatconstant_funnnel_v2i64: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: psrlq $50, %xmm1 -; X32-SSE-NEXT: psllq $14, %xmm0 -; X32-SSE-NEXT: por %xmm1, %xmm0 +; X32-SSE-NEXT: pxor %xmm2, %xmm2 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [14,0,14,0] +; X32-SSE-NEXT: pcmpeqd %xmm3, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,0,3,2] +; X32-SSE-NEXT: pand %xmm2, %xmm4 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [64,0,64,0] +; X32-SSE-NEXT: psubq %xmm3, %xmm2 +; X32-SSE-NEXT: movdqa %xmm1, %xmm3 +; X32-SSE-NEXT: psrlq %xmm2, %xmm3 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] +; X32-SSE-NEXT: psrlq %xmm2, %xmm1 +; X32-SSE-NEXT: movsd {{.*#+}} xmm1 = xmm3[0],xmm1[1] +; X32-SSE-NEXT: movdqa %xmm0, %xmm2 +; X32-SSE-NEXT: psllq $14, %xmm2 +; X32-SSE-NEXT: movsd {{.*#+}} xmm2 = xmm2[0,1] +; X32-SSE-NEXT: orpd %xmm1, %xmm2 +; X32-SSE-NEXT: pand %xmm4, %xmm0 +; X32-SSE-NEXT: pandn %xmm2, %xmm4 +; X32-SSE-NEXT: por %xmm4, %xmm0 ; X32-SSE-NEXT: retl %res = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %x, <2 x i64> %y, <2 x i64> ) ret <2 x i64> %res diff --git a/llvm/test/CodeGen/X86/vector-fshl-256.ll b/llvm/test/CodeGen/X86/vector-fshl-256.ll --- a/llvm/test/CodeGen/X86/vector-fshl-256.ll +++ b/llvm/test/CodeGen/X86/vector-fshl-256.ll @@ -71,7 +71,6 @@ ; ; AVX512F-LABEL: var_funnnel_v4i64: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512F-NEXT: vpbroadcastq {{.*#+}} ymm3 = [63,63,63,63] ; AVX512F-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512F-NEXT: vpsllvq %ymm2, %ymm0, %ymm3 @@ -79,9 +78,9 @@ ; AVX512F-NEXT: vpsubq %ymm2, %ymm4, %ymm4 ; AVX512F-NEXT: vpsrlvq %ymm4, %ymm1, %ymm1 ; AVX512F-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512F-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} -; AVX512F-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqq %ymm3, %ymm2, %ymm2 +; AVX512F-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v4i64: @@ -99,7 +98,6 @@ ; ; AVX512BW-LABEL: var_funnnel_v4i64: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512BW-NEXT: vpbroadcastq {{.*#+}} ymm3 = [63,63,63,63] ; AVX512BW-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512BW-NEXT: vpsllvq %ymm2, %ymm0, %ymm3 @@ -107,14 +105,13 @@ ; AVX512BW-NEXT: vpsubq %ymm2, %ymm4, %ymm4 ; AVX512BW-NEXT: vpsrlvq %ymm4, %ymm1, %ymm1 ; AVX512BW-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512BW-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqq %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v4i64: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512VBMI2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [63,63,63,63] ; AVX512VBMI2-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512VBMI2-NEXT: vpsllvq %ymm2, %ymm0, %ymm3 @@ -122,9 +119,9 @@ ; AVX512VBMI2-NEXT: vpsubq %ymm2, %ymm4, %ymm4 ; AVX512VBMI2-NEXT: vpsrlvq %ymm4, %ymm1, %ymm1 ; AVX512VBMI2-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512VBMI2-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqq %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v4i64: @@ -252,7 +249,6 @@ ; ; AVX512F-LABEL: var_funnnel_v8i32: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512F-NEXT: vpbroadcastd {{.*#+}} ymm3 = [31,31,31,31,31,31,31,31] ; AVX512F-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512F-NEXT: vpsllvd %ymm2, %ymm0, %ymm3 @@ -260,9 +256,9 @@ ; AVX512F-NEXT: vpsubd %ymm2, %ymm4, %ymm4 ; AVX512F-NEXT: vpsrlvd %ymm4, %ymm1, %ymm1 ; AVX512F-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512F-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} -; AVX512F-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqd %ymm3, %ymm2, %ymm2 +; AVX512F-NEXT: vblendvps %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v8i32: @@ -280,7 +276,6 @@ ; ; AVX512BW-LABEL: var_funnnel_v8i32: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm3 = [31,31,31,31,31,31,31,31] ; AVX512BW-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512BW-NEXT: vpsllvd %ymm2, %ymm0, %ymm3 @@ -288,14 +283,13 @@ ; AVX512BW-NEXT: vpsubd %ymm2, %ymm4, %ymm4 ; AVX512BW-NEXT: vpsrlvd %ymm4, %ymm1, %ymm1 ; AVX512BW-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512BW-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqd %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vblendvps %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v8i32: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512VBMI2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [31,31,31,31,31,31,31,31] ; AVX512VBMI2-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512VBMI2-NEXT: vpsllvd %ymm2, %ymm0, %ymm3 @@ -303,9 +297,9 @@ ; AVX512VBMI2-NEXT: vpsubd %ymm2, %ymm4, %ymm4 ; AVX512VBMI2-NEXT: vpsrlvd %ymm4, %ymm1, %ymm1 ; AVX512VBMI2-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512VBMI2-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqd %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vblendvps %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v8i32: @@ -512,9 +506,9 @@ ; AVX512BW-NEXT: vpsubw %ymm2, %ymm4, %ymm4 ; AVX512BW-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1 ; AVX512BW-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512BW-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqw %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v16i16: @@ -527,9 +521,9 @@ ; AVX512VBMI2-NEXT: vpsubw %ymm2, %ymm4, %ymm4 ; AVX512VBMI2-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1 ; AVX512VBMI2-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512VBMI2-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqw %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v16i16: @@ -777,7 +771,6 @@ ; ; AVX512BW-LABEL: var_funnnel_v32i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero ; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm4 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero,ymm2[16],zero,ymm2[17],zero,ymm2[18],zero,ymm2[19],zero,ymm2[20],zero,ymm2[21],zero,ymm2[22],zero,ymm2[23],zero,ymm2[24],zero,ymm2[25],zero,ymm2[26],zero,ymm2[27],zero,ymm2[28],zero,ymm2[29],zero,ymm2[30],zero,ymm2[31],zero @@ -789,14 +782,13 @@ ; AVX512BW-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1 ; AVX512BW-NEXT: vporq %zmm1, %zmm3, %zmm1 ; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 -; AVX512BW-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v32i8: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} zmm4 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero,ymm2[16],zero,ymm2[17],zero,ymm2[18],zero,ymm2[19],zero,ymm2[20],zero,ymm2[21],zero,ymm2[22],zero,ymm2[23],zero,ymm2[24],zero,ymm2[25],zero,ymm2[26],zero,ymm2[27],zero,ymm2[28],zero,ymm2[29],zero,ymm2[30],zero,ymm2[31],zero @@ -808,9 +800,9 @@ ; AVX512VBMI2-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1 ; AVX512VBMI2-NEXT: vporq %zmm1, %zmm3, %zmm1 ; AVX512VBMI2-NEXT: vpmovwb %zmm1, %ymm1 -; AVX512VBMI2-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqb %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v32i8: @@ -946,7 +938,6 @@ ; ; AVX512F-LABEL: splatvar_funnnel_v4i64: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512F-NEXT: vpbroadcastq %xmm2, %ymm2 ; AVX512F-NEXT: vpbroadcastq {{.*#+}} ymm3 = [63,63,63,63] ; AVX512F-NEXT: vpand %ymm3, %ymm2, %ymm2 @@ -955,9 +946,9 @@ ; AVX512F-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512F-NEXT: vpsrlq %xmm4, %ymm1, %ymm1 ; AVX512F-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512F-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} -; AVX512F-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqq %ymm3, %ymm2, %ymm2 +; AVX512F-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: splatvar_funnnel_v4i64: @@ -976,7 +967,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v4i64: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512BW-NEXT: vpbroadcastq %xmm2, %ymm2 ; AVX512BW-NEXT: vpbroadcastq {{.*#+}} ymm3 = [63,63,63,63] ; AVX512BW-NEXT: vpand %ymm3, %ymm2, %ymm2 @@ -985,14 +975,13 @@ ; AVX512BW-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512BW-NEXT: vpsrlq %xmm4, %ymm1, %ymm1 ; AVX512BW-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512BW-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqq %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v4i64: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512VBMI2-NEXT: vpbroadcastq %xmm2, %ymm2 ; AVX512VBMI2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [63,63,63,63] ; AVX512VBMI2-NEXT: vpand %ymm3, %ymm2, %ymm2 @@ -1001,9 +990,9 @@ ; AVX512VBMI2-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512VBMI2-NEXT: vpsrlq %xmm4, %ymm1, %ymm1 ; AVX512VBMI2-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512VBMI2-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqq %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v4i64: @@ -1118,7 +1107,6 @@ ; ; AVX512F-LABEL: splatvar_funnnel_v8i32: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512F-NEXT: vpbroadcastd %xmm2, %ymm2 ; AVX512F-NEXT: vpbroadcastd {{.*#+}} ymm3 = [31,31,31,31,31,31,31,31] ; AVX512F-NEXT: vpand %ymm3, %ymm2, %ymm2 @@ -1129,9 +1117,9 @@ ; AVX512F-NEXT: vpmovzxdq {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero ; AVX512F-NEXT: vpsrld %xmm4, %ymm1, %ymm1 ; AVX512F-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512F-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} -; AVX512F-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqd %ymm3, %ymm2, %ymm2 +; AVX512F-NEXT: vblendvps %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: splatvar_funnnel_v8i32: @@ -1152,7 +1140,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v8i32: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512BW-NEXT: vpbroadcastd %xmm2, %ymm2 ; AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm3 = [31,31,31,31,31,31,31,31] ; AVX512BW-NEXT: vpand %ymm3, %ymm2, %ymm2 @@ -1163,14 +1150,13 @@ ; AVX512BW-NEXT: vpmovzxdq {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero ; AVX512BW-NEXT: vpsrld %xmm4, %ymm1, %ymm1 ; AVX512BW-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512BW-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqd %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vblendvps %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v8i32: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512VBMI2-NEXT: vpbroadcastd %xmm2, %ymm2 ; AVX512VBMI2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [31,31,31,31,31,31,31,31] ; AVX512VBMI2-NEXT: vpand %ymm3, %ymm2, %ymm2 @@ -1181,9 +1167,9 @@ ; AVX512VBMI2-NEXT: vpmovzxdq {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero ; AVX512VBMI2-NEXT: vpsrld %xmm4, %ymm1, %ymm1 ; AVX512VBMI2-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512VBMI2-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqd %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vblendvps %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v8i32: @@ -1339,7 +1325,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v16i16: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512BW-NEXT: vpbroadcastw %xmm2, %ymm2 ; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 ; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero @@ -1349,14 +1334,13 @@ ; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero ; AVX512BW-NEXT: vpsrlw %xmm4, %ymm1, %ymm1 ; AVX512BW-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512BW-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqw %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v16i16: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512VBMI2-NEXT: vpbroadcastw %xmm2, %ymm2 ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 ; AVX512VBMI2-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero @@ -1366,9 +1350,9 @@ ; AVX512VBMI2-NEXT: vpmovzxwq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero ; AVX512VBMI2-NEXT: vpsrlw %xmm4, %ymm1, %ymm1 ; AVX512VBMI2-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512VBMI2-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqw %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v16i16: @@ -1559,7 +1543,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v32i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512BW-NEXT: vpbroadcastb %xmm2, %ymm2 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero ; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 @@ -1572,14 +1555,13 @@ ; AVX512BW-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1 ; AVX512BW-NEXT: vporq %zmm1, %zmm3, %zmm1 ; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 -; AVX512BW-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} -; AVX512BW-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v32i8: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; AVX512VBMI2-NEXT: vpbroadcastb %xmm2, %ymm2 ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 @@ -1592,9 +1574,9 @@ ; AVX512VBMI2-NEXT: vpsrlvw %zmm4, %zmm1, %zmm1 ; AVX512VBMI2-NEXT: vporq %zmm1, %zmm3, %zmm1 ; AVX512VBMI2-NEXT: vpmovwb %zmm1, %ymm1 -; AVX512VBMI2-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} -; AVX512VBMI2-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqb %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v32i8: @@ -1887,7 +1869,7 @@ ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [256,512,1024,2048,4096,8192,16384,32768] ; AVX1-NEXT: vpmulhuw %xmm3, %xmm2, %xmm2 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = +; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [1,2,4,8,16,32,64,128] ; AVX1-NEXT: vpmulhuw %xmm4, %xmm1, %xmm1 ; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 @@ -1903,7 +1885,7 @@ ; ; AVX2-LABEL: constant_funnnel_v16i16: ; AVX2: # %bb.0: -; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = +; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768] ; AVX2-NEXT: vpmulhuw %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vpmullw %ymm2, %ymm0, %ymm2 ; AVX2-NEXT: vpor %ymm1, %ymm2, %ymm1 @@ -1913,7 +1895,7 @@ ; ; AVX512F-LABEL: constant_funnnel_v16i16: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768] ; AVX512F-NEXT: vpmulhuw %ymm2, %ymm1, %ymm1 ; AVX512F-NEXT: vpmullw %ymm2, %ymm0, %ymm2 ; AVX512F-NEXT: vpor %ymm1, %ymm2, %ymm1 @@ -1923,7 +1905,7 @@ ; ; AVX512VL-LABEL: constant_funnnel_v16i16: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm2 = +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm2 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768] ; AVX512VL-NEXT: vpmulhuw %ymm2, %ymm1, %ymm1 ; AVX512VL-NEXT: vpmullw %ymm2, %ymm0, %ymm2 ; AVX512VL-NEXT: vpor %ymm1, %ymm2, %ymm1 @@ -1988,7 +1970,7 @@ ; ; XOPAVX2-LABEL: constant_funnnel_v16i16: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vmovdqa {{.*#+}} ymm2 = +; XOPAVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768] ; XOPAVX2-NEXT: vpmulhuw %ymm2, %ymm1, %ymm1 ; XOPAVX2-NEXT: vpmullw %ymm2, %ymm0, %ymm2 ; XOPAVX2-NEXT: vpor %ymm1, %ymm2, %ymm1 @@ -2005,11 +1987,11 @@ ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm4 = xmm2[8],xmm3[8],xmm2[9],xmm3[9],xmm2[10],xmm3[10],xmm2[11],xmm3[11],xmm2[12],xmm3[12],xmm2[13],xmm3[13],xmm2[14],xmm3[14],xmm2[15],xmm3[15] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [256,128,64,32,16,8,4,2] +; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [1,128,64,32,16,8,4,2] ; AVX1-NEXT: vpmullw %xmm5, %xmm4, %xmm4 ; AVX1-NEXT: vpsrlw $8, %xmm4, %xmm4 ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero -; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [256,2,4,8,16,32,64,128] +; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [1,2,4,8,16,32,64,128] ; AVX1-NEXT: vpmullw %xmm6, %xmm2, %xmm2 ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 ; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 @@ -2023,21 +2005,19 @@ ; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = -; AVX1-NEXT: vpmullw %xmm4, %xmm3, %xmm3 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [255,255,255,255,255,255,255,255] -; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 +; AVX1-NEXT: vpmullw %xmm5, %xmm3, %xmm3 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255] +; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero -; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = ; AVX1-NEXT: vpmullw %xmm6, %xmm2, %xmm2 -; AVX1-NEXT: vpand %xmm5, %xmm2, %xmm2 +; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 ; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] -; AVX1-NEXT: vpmullw %xmm4, %xmm3, %xmm3 -; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 -; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm4 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero -; AVX1-NEXT: vpmullw %xmm6, %xmm4, %xmm4 -; AVX1-NEXT: vpand %xmm5, %xmm4, %xmm4 +; AVX1-NEXT: vpmullw %xmm5, %xmm3, %xmm3 +; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 +; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm5 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX1-NEXT: vpmullw %xmm6, %xmm5, %xmm5 +; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm4 ; AVX1-NEXT: vpackuswb %xmm3, %xmm4, %xmm3 ; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2 ; AVX1-NEXT: vorps %ymm1, %ymm2, %ymm1 @@ -2070,8 +2050,8 @@ ; AVX2-NEXT: vpsrlw $8, %ymm1, %ymm1 ; AVX2-NEXT: vpackuswb %ymm4, %ymm1, %ymm1 ; AVX2-NEXT: vpor %ymm1, %ymm2, %ymm1 -; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: constant_funnnel_v32i8: @@ -2097,8 +2077,8 @@ ; AVX512F-NEXT: vpsrlw $8, %ymm1, %ymm1 ; AVX512F-NEXT: vpackuswb %ymm4, %ymm1, %ymm1 ; AVX512F-NEXT: vpor %ymm1, %ymm2, %ymm1 -; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512F-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512F-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: constant_funnnel_v32i8: @@ -2125,8 +2105,8 @@ ; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1 ; AVX512VL-NEXT: vpackuswb %ymm3, %ymm1, %ymm1 ; AVX512VL-NEXT: vpor %ymm1, %ymm2, %ymm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512VL-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512VL-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: constant_funnnel_v32i8: @@ -2137,8 +2117,8 @@ ; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm2, %zmm2 ; AVX512BW-NEXT: vporq %zmm1, %zmm2, %zmm1 ; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512BW-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512BW-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: constant_funnnel_v32i8: @@ -2149,8 +2129,8 @@ ; AVX512VBMI2-NEXT: vpsllvw {{.*}}(%rip), %zmm2, %zmm2 ; AVX512VBMI2-NEXT: vporq %zmm1, %zmm2, %zmm1 ; AVX512VBMI2-NEXT: vpmovwb %zmm1, %ymm1 -; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512VBMI2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 +; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512VBMI2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: constant_funnnel_v32i8: @@ -2184,12 +2164,12 @@ ; XOPAVX1-LABEL: constant_funnnel_v32i8: ; XOPAVX1: # %bb.0: ; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 -; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm3 = +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [248,249,250,251,252,253,254,255,248,255,254,253,252,251,250,249] ; XOPAVX1-NEXT: vpshlb %xmm3, %xmm2, %xmm2 ; XOPAVX1-NEXT: vpshlb %xmm3, %xmm1, %xmm1 ; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 ; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 -; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm3 = +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,2,3,4,5,6,7,0,7,6,5,4,3,2,1] ; XOPAVX1-NEXT: vpshlb %xmm3, %xmm2, %xmm2 ; XOPAVX1-NEXT: vpshlb %xmm3, %xmm0, %xmm3 ; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2 @@ -2201,18 +2181,18 @@ ; XOPAVX2-LABEL: constant_funnnel_v32i8: ; XOPAVX2: # %bb.0: ; XOPAVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 -; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm3 = +; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [248,249,250,251,252,253,254,255,248,255,254,253,252,251,250,249] ; XOPAVX2-NEXT: vpshlb %xmm3, %xmm2, %xmm2 ; XOPAVX2-NEXT: vpshlb %xmm3, %xmm1, %xmm1 ; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1 ; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 -; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm3 = +; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,2,3,4,5,6,7,0,7,6,5,4,3,2,1] ; XOPAVX2-NEXT: vpshlb %xmm3, %xmm2, %xmm2 ; XOPAVX2-NEXT: vpshlb %xmm3, %xmm0, %xmm3 ; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2 ; XOPAVX2-NEXT: vpor %ymm1, %ymm2, %ymm1 -; XOPAVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; XOPAVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; XOPAVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; XOPAVX2-NEXT: retq %res = call <32 x i8> @llvm.fshl.v32i8(<32 x i8> %x, <32 x i8> %y, <32 x i8> ) ret <32 x i8> %res diff --git a/llvm/test/CodeGen/X86/vector-fshl-512.ll b/llvm/test/CodeGen/X86/vector-fshl-512.ll --- a/llvm/test/CodeGen/X86/vector-fshl-512.ll +++ b/llvm/test/CodeGen/X86/vector-fshl-512.ll @@ -1074,7 +1074,7 @@ ; AVX512F: # %bb.0: ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm2 ; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm3 -; AVX512F-NEXT: vmovdqa {{.*#+}} ymm4 = +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm4 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768] ; AVX512F-NEXT: vpmulhuw %ymm4, %ymm3, %ymm3 ; AVX512F-NEXT: vpmullw %ymm4, %ymm2, %ymm5 ; AVX512F-NEXT: vpor %ymm3, %ymm5, %ymm3 @@ -1092,7 +1092,7 @@ ; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm2 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm3 -; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm4 = +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm4 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768] ; AVX512VL-NEXT: vpmulhuw %ymm4, %ymm3, %ymm3 ; AVX512VL-NEXT: vpmullw %ymm4, %ymm2, %ymm5 ; AVX512VL-NEXT: vpor %ymm3, %ymm5, %ymm3 @@ -1162,19 +1162,19 @@ ; AVX512F-NEXT: vpblendvb %ymm10, %ymm7, %ymm4, %ymm4 ; AVX512F-NEXT: vpxor %xmm7, %xmm7, %xmm7 ; AVX512F-NEXT: vpunpckhbw {{.*#+}} ymm11 = ymm2[8],ymm7[8],ymm2[9],ymm7[9],ymm2[10],ymm7[10],ymm2[11],ymm7[11],ymm2[12],ymm7[12],ymm2[13],ymm7[13],ymm2[14],ymm7[14],ymm2[15],ymm7[15],ymm2[24],ymm7[24],ymm2[25],ymm7[25],ymm2[26],ymm7[26],ymm2[27],ymm7[27],ymm2[28],ymm7[28],ymm2[29],ymm7[29],ymm2[30],ymm7[30],ymm2[31],ymm7[31] -; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm12 = [256,128,64,32,16,8,4,2,256,128,64,32,16,8,4,2] +; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm12 = [1,128,64,32,16,8,4,2,1,128,64,32,16,8,4,2] ; AVX512F-NEXT: # ymm12 = mem[0,1,0,1] ; AVX512F-NEXT: vpmullw %ymm12, %ymm11, %ymm11 ; AVX512F-NEXT: vpsrlw $8, %ymm11, %ymm11 ; AVX512F-NEXT: vpunpcklbw {{.*#+}} ymm2 = ymm2[0],ymm7[0],ymm2[1],ymm7[1],ymm2[2],ymm7[2],ymm2[3],ymm7[3],ymm2[4],ymm7[4],ymm2[5],ymm7[5],ymm2[6],ymm7[6],ymm2[7],ymm7[7],ymm2[16],ymm7[16],ymm2[17],ymm7[17],ymm2[18],ymm7[18],ymm2[19],ymm7[19],ymm2[20],ymm7[20],ymm2[21],ymm7[21],ymm2[22],ymm7[22],ymm2[23],ymm7[23] -; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm13 = [256,2,4,8,16,32,64,128,256,2,4,8,16,32,64,128] +; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm13 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128] ; AVX512F-NEXT: # ymm13 = mem[0,1,0,1] ; AVX512F-NEXT: vpmullw %ymm2, %ymm13, %ymm2 ; AVX512F-NEXT: vpsrlw $8, %ymm2, %ymm2 ; AVX512F-NEXT: vpackuswb %ymm11, %ymm2, %ymm2 ; AVX512F-NEXT: vpor %ymm2, %ymm4, %ymm2 -; AVX512F-NEXT: vpbroadcastq {{.*#+}} ymm4 = [18446744073709551360,18446744073709551360,18446744073709551360,18446744073709551360] -; AVX512F-NEXT: vpblendvb %ymm4, %ymm2, %ymm3, %ymm2 +; AVX512F-NEXT: vpbroadcastq {{.*#+}} ymm4 = [255,255,255,255] +; AVX512F-NEXT: vpblendvb %ymm4, %ymm3, %ymm2, %ymm2 ; AVX512F-NEXT: vpsllw $4, %ymm0, %ymm3 ; AVX512F-NEXT: vpand %ymm5, %ymm3, %ymm3 ; AVX512F-NEXT: vpblendvb %ymm6, %ymm3, %ymm0, %ymm3 @@ -1191,7 +1191,7 @@ ; AVX512F-NEXT: vpsrlw $8, %ymm1, %ymm1 ; AVX512F-NEXT: vpackuswb %ymm5, %ymm1, %ymm1 ; AVX512F-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512F-NEXT: vpblendvb %ymm4, %ymm1, %ymm0, %ymm0 +; AVX512F-NEXT: vpblendvb %ymm4, %ymm0, %ymm1, %ymm0 ; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0 ; AVX512F-NEXT: retq ; @@ -1215,20 +1215,20 @@ ; AVX512VL-NEXT: vpblendvb %ymm10, %ymm7, %ymm4, %ymm4 ; AVX512VL-NEXT: vpunpckhbw {{.*#+}} ymm7 = ymm2[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31] ; AVX512VL-NEXT: vpsrlw $8, %ymm7, %ymm7 -; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm11 = [256,128,64,32,16,8,4,2,256,128,64,32,16,8,4,2] +; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm11 = [1,128,64,32,16,8,4,2,1,128,64,32,16,8,4,2] ; AVX512VL-NEXT: # ymm11 = mem[0,1,0,1] ; AVX512VL-NEXT: vpmullw %ymm7, %ymm11, %ymm7 ; AVX512VL-NEXT: vpsrlw $8, %ymm7, %ymm7 ; AVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm2 = ymm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23] ; AVX512VL-NEXT: vpsrlw $8, %ymm2, %ymm2 -; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm12 = [256,2,4,8,16,32,64,128,256,2,4,8,16,32,64,128] +; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm12 = [1,2,4,8,16,32,64,128,1,2,4,8,16,32,64,128] ; AVX512VL-NEXT: # ymm12 = mem[0,1,0,1] ; AVX512VL-NEXT: vpmullw %ymm2, %ymm12, %ymm2 ; AVX512VL-NEXT: vpsrlw $8, %ymm2, %ymm2 ; AVX512VL-NEXT: vpackuswb %ymm7, %ymm2, %ymm2 ; AVX512VL-NEXT: vpor %ymm2, %ymm4, %ymm2 -; AVX512VL-NEXT: vpbroadcastq {{.*#+}} ymm4 = [18446744073709551360,18446744073709551360,18446744073709551360,18446744073709551360] -; AVX512VL-NEXT: vpblendvb %ymm4, %ymm2, %ymm3, %ymm2 +; AVX512VL-NEXT: vpbroadcastq {{.*#+}} ymm4 = [255,255,255,255] +; AVX512VL-NEXT: vpblendvb %ymm4, %ymm3, %ymm2, %ymm2 ; AVX512VL-NEXT: vpsllw $4, %ymm0, %ymm3 ; AVX512VL-NEXT: vpand %ymm5, %ymm3, %ymm3 ; AVX512VL-NEXT: vpblendvb %ymm6, %ymm3, %ymm0, %ymm3 @@ -1247,7 +1247,7 @@ ; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1 ; AVX512VL-NEXT: vpackuswb %ymm5, %ymm1, %ymm1 ; AVX512VL-NEXT: vpor %ymm1, %ymm3, %ymm1 -; AVX512VL-NEXT: vpblendvb %ymm4, %ymm1, %ymm0, %ymm0 +; AVX512VL-NEXT: vpblendvb %ymm4, %ymm0, %ymm1, %ymm0 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0 ; AVX512VL-NEXT: retq ; @@ -1269,11 +1269,11 @@ ; AVX512BW-NEXT: vpaddb %zmm3, %zmm3, %zmm3 {%k1} ; AVX512BW-NEXT: vpunpckhbw {{.*#+}} zmm2 = zmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31,40,40,41,41,42,42,43,43,44,44,45,45,46,46,47,47,56,56,57,57,58,58,59,59,60,60,61,61,62,62,63,63] ; AVX512BW-NEXT: vpsrlw $8, %zmm2, %zmm2 -; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm2, %zmm2 +; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %zmm2, %zmm2 ; AVX512BW-NEXT: vpsrlw $8, %zmm2, %zmm2 ; AVX512BW-NEXT: vpunpcklbw {{.*#+}} zmm1 = zmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] ; AVX512BW-NEXT: vpsrlw $8, %zmm1, %zmm1 -; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm1, %zmm1 +; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %zmm1, %zmm1 ; AVX512BW-NEXT: vpsrlw $8, %zmm1, %zmm1 ; AVX512BW-NEXT: vpackuswb %zmm2, %zmm1, %zmm1 ; AVX512BW-NEXT: vporq %zmm1, %zmm3, %zmm1 @@ -1301,11 +1301,11 @@ ; AVX512VBMI2-NEXT: vpaddb %zmm3, %zmm3, %zmm3 {%k1} ; AVX512VBMI2-NEXT: vpunpckhbw {{.*#+}} zmm2 = zmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31,40,40,41,41,42,42,43,43,44,44,45,45,46,46,47,47,56,56,57,57,58,58,59,59,60,60,61,61,62,62,63,63] ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm2, %zmm2 -; AVX512VBMI2-NEXT: vpsllvw {{.*}}(%rip), %zmm2, %zmm2 +; AVX512VBMI2-NEXT: vpmullw {{.*}}(%rip), %zmm2, %zmm2 ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm2, %zmm2 ; AVX512VBMI2-NEXT: vpunpcklbw {{.*#+}} zmm1 = zmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm1, %zmm1 -; AVX512VBMI2-NEXT: vpsllvw {{.*}}(%rip), %zmm1, %zmm1 +; AVX512VBMI2-NEXT: vpmullw {{.*}}(%rip), %zmm1, %zmm1 ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm1, %zmm1 ; AVX512VBMI2-NEXT: vpackuswb %zmm2, %zmm1, %zmm1 ; AVX512VBMI2-NEXT: vporq %zmm1, %zmm3, %zmm1 @@ -1333,11 +1333,11 @@ ; AVX512VLBW-NEXT: vpaddb %zmm3, %zmm3, %zmm3 {%k1} ; AVX512VLBW-NEXT: vpunpckhbw {{.*#+}} zmm2 = zmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31,40,40,41,41,42,42,43,43,44,44,45,45,46,46,47,47,56,56,57,57,58,58,59,59,60,60,61,61,62,62,63,63] ; AVX512VLBW-NEXT: vpsrlw $8, %zmm2, %zmm2 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm2, %zmm2 +; AVX512VLBW-NEXT: vpmullw {{.*}}(%rip), %zmm2, %zmm2 ; AVX512VLBW-NEXT: vpsrlw $8, %zmm2, %zmm2 ; AVX512VLBW-NEXT: vpunpcklbw {{.*#+}} zmm1 = zmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] ; AVX512VLBW-NEXT: vpsrlw $8, %zmm1, %zmm1 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm1, %zmm1 +; AVX512VLBW-NEXT: vpmullw {{.*}}(%rip), %zmm1, %zmm1 ; AVX512VLBW-NEXT: vpsrlw $8, %zmm1, %zmm1 ; AVX512VLBW-NEXT: vpackuswb %zmm2, %zmm1, %zmm1 ; AVX512VLBW-NEXT: vporq %zmm1, %zmm3, %zmm1 @@ -1365,11 +1365,11 @@ ; AVX512VLVBMI2-NEXT: vpaddb %zmm3, %zmm3, %zmm3 {%k1} ; AVX512VLVBMI2-NEXT: vpunpckhbw {{.*#+}} zmm2 = zmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31,40,40,41,41,42,42,43,43,44,44,45,45,46,46,47,47,56,56,57,57,58,58,59,59,60,60,61,61,62,62,63,63] ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm2, %zmm2 -; AVX512VLVBMI2-NEXT: vpsllvw {{.*}}(%rip), %zmm2, %zmm2 +; AVX512VLVBMI2-NEXT: vpmullw {{.*}}(%rip), %zmm2, %zmm2 ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm2, %zmm2 ; AVX512VLVBMI2-NEXT: vpunpcklbw {{.*#+}} zmm1 = zmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm1, %zmm1 -; AVX512VLVBMI2-NEXT: vpsllvw {{.*}}(%rip), %zmm1, %zmm1 +; AVX512VLVBMI2-NEXT: vpmullw {{.*}}(%rip), %zmm1, %zmm1 ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm1, %zmm1 ; AVX512VLVBMI2-NEXT: vpackuswb %zmm2, %zmm1, %zmm1 ; AVX512VLVBMI2-NEXT: vporq %zmm1, %zmm3, %zmm1 diff --git a/llvm/test/CodeGen/X86/vector-fshl-rot-128.ll b/llvm/test/CodeGen/X86/vector-fshl-rot-128.ll --- a/llvm/test/CodeGen/X86/vector-fshl-rot-128.ll +++ b/llvm/test/CodeGen/X86/vector-fshl-rot-128.ll @@ -25,74 +25,85 @@ define <2 x i64> @var_funnnel_v2i64(<2 x i64> %x, <2 x i64> %amt) nounwind { ; SSE2-LABEL: var_funnnel_v2i64: ; SSE2: # %bb.0: -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [63,63] -; SSE2-NEXT: pxor %xmm3, %xmm3 -; SSE2-NEXT: psubq %xmm1, %xmm3 -; SSE2-NEXT: pand %xmm2, %xmm1 +; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE2-NEXT: movdqa %xmm0, %xmm2 +; SSE2-NEXT: psllq %xmm1, %xmm2 +; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] ; SSE2-NEXT: movdqa %xmm0, %xmm4 -; SSE2-NEXT: psllq %xmm1, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] +; SSE2-NEXT: psllq %xmm3, %xmm4 +; SSE2-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1] +; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [64,64] +; SSE2-NEXT: psubq %xmm1, %xmm2 +; SSE2-NEXT: movdqa %xmm0, %xmm3 +; SSE2-NEXT: psrlq %xmm2, %xmm3 +; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] ; SSE2-NEXT: movdqa %xmm0, %xmm5 -; SSE2-NEXT: psllq %xmm1, %xmm5 -; SSE2-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1] -; SSE2-NEXT: pand %xmm2, %xmm3 -; SSE2-NEXT: movdqa %xmm0, %xmm1 -; SSE2-NEXT: psrlq %xmm3, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1] -; SSE2-NEXT: psrlq %xmm2, %xmm0 -; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] -; SSE2-NEXT: orpd %xmm5, %xmm0 +; SSE2-NEXT: psrlq %xmm2, %xmm5 +; SSE2-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1] +; SSE2-NEXT: orpd %xmm4, %xmm5 +; SSE2-NEXT: pxor %xmm2, %xmm2 +; SSE2-NEXT: pcmpeqd %xmm1, %xmm2 +; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,0,3,2] +; SSE2-NEXT: pand %xmm2, %xmm1 +; SSE2-NEXT: pand %xmm1, %xmm0 +; SSE2-NEXT: pandn %xmm5, %xmm1 +; SSE2-NEXT: por %xmm1, %xmm0 ; SSE2-NEXT: retq ; ; SSE41-LABEL: var_funnnel_v2i64: ; SSE41: # %bb.0: -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [63,63] -; SSE41-NEXT: pxor %xmm3, %xmm3 -; SSE41-NEXT: psubq %xmm1, %xmm3 -; SSE41-NEXT: pand %xmm2, %xmm1 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: psllq %xmm1, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] -; SSE41-NEXT: movdqa %xmm0, %xmm5 -; SSE41-NEXT: psllq %xmm1, %xmm5 -; SSE41-NEXT: pblendw {{.*#+}} xmm5 = xmm4[0,1,2,3],xmm5[4,5,6,7] -; SSE41-NEXT: pand %xmm2, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm1 -; SSE41-NEXT: psrlq %xmm3, %xmm1 -; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1] -; SSE41-NEXT: psrlq %xmm2, %xmm0 -; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] -; SSE41-NEXT: por %xmm5, %xmm0 +; SSE41-NEXT: movdqa %xmm0, %xmm2 +; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE41-NEXT: psllq %xmm1, %xmm0 +; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] +; SSE41-NEXT: movdqa %xmm2, %xmm4 +; SSE41-NEXT: psllq %xmm3, %xmm4 +; SSE41-NEXT: pblendw {{.*#+}} xmm4 = xmm0[0,1,2,3],xmm4[4,5,6,7] +; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [64,64] +; SSE41-NEXT: psubq %xmm1, %xmm0 +; SSE41-NEXT: movdqa %xmm2, %xmm5 +; SSE41-NEXT: psrlq %xmm0, %xmm5 +; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] +; SSE41-NEXT: movdqa %xmm2, %xmm3 +; SSE41-NEXT: psrlq %xmm0, %xmm3 +; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm5[0,1,2,3],xmm3[4,5,6,7] +; SSE41-NEXT: por %xmm4, %xmm3 +; SSE41-NEXT: pxor %xmm0, %xmm0 +; SSE41-NEXT: pcmpeqq %xmm1, %xmm0 +; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm3 +; SSE41-NEXT: movapd %xmm3, %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: var_funnnel_v2i64: ; AVX1: # %bb.0: -; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63] -; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX1-NEXT: vpsllq %xmm3, %xmm0, %xmm4 -; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] +; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm2 +; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] ; AVX1-NEXT: vpsllq %xmm3, %xmm0, %xmm3 +; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm3[4,5,6,7] +; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; AVX1-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm4 +; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] +; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm3 ; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0,1,2,3],xmm3[4,5,6,7] -; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX1-NEXT: vpsubq %xmm1, %xmm4, %xmm1 -; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm2 -; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] -; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7] -; AVX1-NEXT: vpor %xmm0, %xmm3, %xmm0 +; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2 +; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqq %xmm3, %xmm1, %xmm1 +; AVX1-NEXT: vblendvpd %xmm1, %xmm0, %xmm2, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: var_funnnel_v2i64: ; AVX2: # %bb.0: -; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63] -; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX2-NEXT: vpsllvq %xmm3, %xmm0, %xmm3 -; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX2-NEXT: vpsubq %xmm1, %xmm4, %xmm1 -; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX2-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: vpor %xmm0, %xmm3, %xmm0 +; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm2 +; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; AVX2-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; AVX2-NEXT: vpsrlvq %xmm3, %xmm0, %xmm3 +; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqq %xmm3, %xmm1, %xmm1 +; AVX2-NEXT: vblendvpd %xmm1, %xmm0, %xmm2, %xmm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: var_funnnel_v2i64: @@ -130,23 +141,29 @@ ; ; X32-SSE-LABEL: var_funnnel_v2i64: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [63,0,63,0] -; X32-SSE-NEXT: pxor %xmm3, %xmm3 -; X32-SSE-NEXT: psubq %xmm1, %xmm3 -; X32-SSE-NEXT: pand %xmm2, %xmm1 +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 +; X32-SSE-NEXT: movdqa %xmm0, %xmm2 +; X32-SSE-NEXT: psllq %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] ; X32-SSE-NEXT: movdqa %xmm0, %xmm4 -; X32-SSE-NEXT: psllq %xmm1, %xmm4 -; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] +; X32-SSE-NEXT: psllq %xmm3, %xmm4 +; X32-SSE-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1] +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [64,0,64,0] +; X32-SSE-NEXT: psubq %xmm1, %xmm2 +; X32-SSE-NEXT: movdqa %xmm0, %xmm3 +; X32-SSE-NEXT: psrlq %xmm2, %xmm3 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] ; X32-SSE-NEXT: movdqa %xmm0, %xmm5 -; X32-SSE-NEXT: psllq %xmm1, %xmm5 -; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1] -; X32-SSE-NEXT: pand %xmm2, %xmm3 -; X32-SSE-NEXT: movdqa %xmm0, %xmm1 -; X32-SSE-NEXT: psrlq %xmm3, %xmm1 -; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1] -; X32-SSE-NEXT: psrlq %xmm2, %xmm0 -; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] -; X32-SSE-NEXT: orpd %xmm5, %xmm0 +; X32-SSE-NEXT: psrlq %xmm2, %xmm5 +; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1] +; X32-SSE-NEXT: orpd %xmm4, %xmm5 +; X32-SSE-NEXT: pxor %xmm2, %xmm2 +; X32-SSE-NEXT: pcmpeqd %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,0,3,2] +; X32-SSE-NEXT: pand %xmm2, %xmm1 +; X32-SSE-NEXT: pand %xmm1, %xmm0 +; X32-SSE-NEXT: pandn %xmm5, %xmm1 +; X32-SSE-NEXT: por %xmm1, %xmm0 ; X32-SSE-NEXT: retl %res = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> %amt) ret <2 x i64> %res @@ -546,70 +563,73 @@ ; ; AVX512F-LABEL: var_funnnel_v16i8: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero -; AVX512F-NEXT: vpsllvd %zmm3, %zmm0, %zmm3 -; AVX512F-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512F-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero -; AVX512F-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0 -; AVX512F-NEXT: vpord %zmm0, %zmm3, %zmm0 -; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero +; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero +; AVX512F-NEXT: vpsllvd %zmm3, %zmm2, %zmm3 +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512F-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero,xmm4[8],zero,zero,zero,xmm4[9],zero,zero,zero,xmm4[10],zero,zero,zero,xmm4[11],zero,zero,zero,xmm4[12],zero,zero,zero,xmm4[13],zero,zero,zero,xmm4[14],zero,zero,zero,xmm4[15],zero,zero,zero +; AVX512F-NEXT: vpsrlvd %zmm4, %zmm2, %zmm2 +; AVX512F-NEXT: vpord %zmm2, %zmm3, %zmm2 +; AVX512F-NEXT: vpmovdb %zmm2, %xmm2 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX512F-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v16i8: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero -; AVX512VL-NEXT: vpsllvd %zmm3, %zmm0, %zmm3 -; AVX512VL-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VL-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero -; AVX512VL-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0 -; AVX512VL-NEXT: vpord %zmm0, %zmm3, %zmm0 -; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero +; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero +; AVX512VL-NEXT: vpsllvd %zmm3, %zmm2, %zmm3 +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VL-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero,xmm4[8],zero,zero,zero,xmm4[9],zero,zero,zero,xmm4[10],zero,zero,zero,xmm4[11],zero,zero,zero,xmm4[12],zero,zero,zero,xmm4[13],zero,zero,zero,xmm4[14],zero,zero,zero,xmm4[15],zero,zero,zero +; AVX512VL-NEXT: vpsrlvd %zmm4, %zmm2, %zmm2 +; AVX512VL-NEXT: vpord %zmm2, %zmm3, %zmm2 +; AVX512VL-NEXT: vpmovdb %zmm2, %xmm2 +; AVX512VL-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VL-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX512VL-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: var_funnnel_v16i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero -; AVX512BW-NEXT: vpsllvw %zmm3, %zmm0, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero -; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpor %ymm0, %ymm3, %ymm0 -; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero +; AVX512BW-NEXT: vpsllvw %zmm3, %zmm2, %zmm3 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero,xmm4[8],zero,xmm4[9],zero,xmm4[10],zero,xmm4[11],zero,xmm4[12],zero,xmm4[13],zero,xmm4[14],zero,xmm4[15],zero +; AVX512BW-NEXT: vpsrlvw %zmm4, %zmm2, %zmm2 +; AVX512BW-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX512BW-NEXT: vpmovwb %zmm2, %ymm2 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX512BW-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v16i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX512VLBW-NEXT: vpsllvw %ymm3, %ymm0, %ymm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero -; AVX512VLBW-NEXT: vpsrlvw %ymm1, %ymm0, %ymm0 -; AVX512VLBW-NEXT: vpor %ymm0, %ymm3, %ymm0 -; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm3 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero +; AVX512VLBW-NEXT: vpsllvw %ymm1, %ymm2, %ymm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VLBW-NEXT: vpsubb %xmm3, %xmm4, %xmm4 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero,xmm4[8],zero,xmm4[9],zero,xmm4[10],zero,xmm4[11],zero,xmm4[12],zero,xmm4[13],zero,xmm4[14],zero,xmm4[15],zero +; AVX512VLBW-NEXT: vpsrlvw %ymm4, %ymm2, %ymm2 +; AVX512VLBW-NEXT: vpor %ymm2, %ymm1, %ymm1 +; AVX512VLBW-NEXT: vpmovwb %ymm1, %xmm1 +; AVX512VLBW-NEXT: vptestnmb %xmm3, %xmm3, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %xmm0, %xmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %xmm1, %xmm0 ; AVX512VLBW-NEXT: vzeroupper ; AVX512VLBW-NEXT: retq ; @@ -669,44 +689,69 @@ ; define <2 x i64> @splatvar_funnnel_v2i64(<2 x i64> %x, <2 x i64> %amt) nounwind { -; SSE-LABEL: splatvar_funnnel_v2i64: -; SSE: # %bb.0: -; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] -; SSE-NEXT: movdqa {{.*#+}} xmm2 = [63,63] -; SSE-NEXT: pxor %xmm3, %xmm3 -; SSE-NEXT: psubq %xmm1, %xmm3 -; SSE-NEXT: pand %xmm2, %xmm1 -; SSE-NEXT: movdqa %xmm0, %xmm4 -; SSE-NEXT: psllq %xmm1, %xmm4 -; SSE-NEXT: pand %xmm2, %xmm3 -; SSE-NEXT: psrlq %xmm3, %xmm0 -; SSE-NEXT: por %xmm4, %xmm0 -; SSE-NEXT: retq +; SSE2-LABEL: splatvar_funnnel_v2i64: +; SSE2: # %bb.0: +; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] +; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE2-NEXT: movdqa %xmm0, %xmm2 +; SSE2-NEXT: psllq %xmm1, %xmm2 +; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [64,64] +; SSE2-NEXT: psubq %xmm1, %xmm3 +; SSE2-NEXT: movdqa %xmm0, %xmm4 +; SSE2-NEXT: psrlq %xmm3, %xmm4 +; SSE2-NEXT: por %xmm2, %xmm4 +; SSE2-NEXT: pxor %xmm2, %xmm2 +; SSE2-NEXT: pcmpeqd %xmm1, %xmm2 +; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,0,3,2] +; SSE2-NEXT: pand %xmm2, %xmm1 +; SSE2-NEXT: pand %xmm1, %xmm0 +; SSE2-NEXT: pandn %xmm4, %xmm1 +; SSE2-NEXT: por %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: splatvar_funnnel_v2i64: +; SSE41: # %bb.0: +; SSE41-NEXT: movdqa %xmm0, %xmm2 +; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm1[0,1,0,1] +; SSE41-NEXT: pand {{.*}}(%rip), %xmm3 +; SSE41-NEXT: psllq %xmm3, %xmm0 +; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [64,64] +; SSE41-NEXT: psubq %xmm3, %xmm4 +; SSE41-NEXT: movdqa %xmm2, %xmm1 +; SSE41-NEXT: psrlq %xmm4, %xmm1 +; SSE41-NEXT: por %xmm0, %xmm1 +; SSE41-NEXT: pxor %xmm0, %xmm0 +; SSE41-NEXT: pcmpeqq %xmm3, %xmm0 +; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm1 +; SSE41-NEXT: movapd %xmm1, %xmm0 +; SSE41-NEXT: retq ; ; AVX1-LABEL: splatvar_funnnel_v2i64: ; AVX1: # %bb.0: ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63] -; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX1-NEXT: vpsllq %xmm3, %xmm0, %xmm3 -; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX1-NEXT: vpsubq %xmm1, %xmm4, %xmm1 -; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm0, %xmm3, %xmm0 +; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm2 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; AVX1-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm3 +; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2 +; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqq %xmm3, %xmm1, %xmm1 +; AVX1-NEXT: vblendvpd %xmm1, %xmm0, %xmm2, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: splatvar_funnnel_v2i64: ; AVX2: # %bb.0: ; AVX2-NEXT: vpbroadcastq %xmm1, %xmm1 -; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63] -; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX2-NEXT: vpsllq %xmm3, %xmm0, %xmm3 -; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX2-NEXT: vpsubq %xmm1, %xmm4, %xmm1 -; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX2-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: vpor %xmm0, %xmm3, %xmm0 +; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX2-NEXT: vpsllq %xmm1, %xmm0, %xmm2 +; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; AVX2-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; AVX2-NEXT: vpsrlq %xmm3, %xmm0, %xmm3 +; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqq %xmm3, %xmm1, %xmm1 +; AVX2-NEXT: vblendvpd %xmm1, %xmm0, %xmm2, %xmm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: splatvar_funnnel_v2i64: @@ -754,23 +799,29 @@ ; X32-SSE-LABEL: splatvar_funnnel_v2i64: ; X32-SSE: # %bb.0: ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] -; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [63,0,63,0] -; X32-SSE-NEXT: pxor %xmm3, %xmm3 -; X32-SSE-NEXT: psubq %xmm1, %xmm3 -; X32-SSE-NEXT: pand %xmm2, %xmm1 +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 +; X32-SSE-NEXT: movdqa %xmm0, %xmm2 +; X32-SSE-NEXT: psllq %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] ; X32-SSE-NEXT: movdqa %xmm0, %xmm4 -; X32-SSE-NEXT: psllq %xmm1, %xmm4 -; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] +; X32-SSE-NEXT: psllq %xmm3, %xmm4 +; X32-SSE-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1] +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [64,0,64,0] +; X32-SSE-NEXT: psubq %xmm1, %xmm2 +; X32-SSE-NEXT: movdqa %xmm0, %xmm3 +; X32-SSE-NEXT: psrlq %xmm2, %xmm3 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] ; X32-SSE-NEXT: movdqa %xmm0, %xmm5 -; X32-SSE-NEXT: psllq %xmm1, %xmm5 -; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1] -; X32-SSE-NEXT: pand %xmm2, %xmm3 -; X32-SSE-NEXT: movdqa %xmm0, %xmm1 -; X32-SSE-NEXT: psrlq %xmm3, %xmm1 -; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1] -; X32-SSE-NEXT: psrlq %xmm2, %xmm0 -; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] -; X32-SSE-NEXT: orpd %xmm5, %xmm0 +; X32-SSE-NEXT: psrlq %xmm2, %xmm5 +; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1] +; X32-SSE-NEXT: orpd %xmm4, %xmm5 +; X32-SSE-NEXT: pxor %xmm2, %xmm2 +; X32-SSE-NEXT: pcmpeqd %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,0,3,2] +; X32-SSE-NEXT: pand %xmm2, %xmm1 +; X32-SSE-NEXT: pand %xmm1, %xmm0 +; X32-SSE-NEXT: pandn %xmm5, %xmm1 +; X32-SSE-NEXT: por %xmm1, %xmm0 ; X32-SSE-NEXT: retl %splat = shufflevector <2 x i64> %amt, <2 x i64> undef, <2 x i32> zeroinitializer %res = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> %splat) @@ -1103,73 +1154,76 @@ ; AVX512F-LABEL: splatvar_funnnel_v16i8: ; AVX512F: # %bb.0: ; AVX512F-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero -; AVX512F-NEXT: vpsllvd %zmm3, %zmm0, %zmm3 -; AVX512F-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512F-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero -; AVX512F-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0 -; AVX512F-NEXT: vpord %zmm0, %zmm3, %zmm0 -; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero +; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero +; AVX512F-NEXT: vpsllvd %zmm3, %zmm2, %zmm3 +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512F-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero,xmm4[8],zero,zero,zero,xmm4[9],zero,zero,zero,xmm4[10],zero,zero,zero,xmm4[11],zero,zero,zero,xmm4[12],zero,zero,zero,xmm4[13],zero,zero,zero,xmm4[14],zero,zero,zero,xmm4[15],zero,zero,zero +; AVX512F-NEXT: vpsrlvd %zmm4, %zmm2, %zmm2 +; AVX512F-NEXT: vpord %zmm2, %zmm3, %zmm2 +; AVX512F-NEXT: vpmovdb %zmm2, %xmm2 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX512F-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: splatvar_funnnel_v16i8: ; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero -; AVX512VL-NEXT: vpsllvd %zmm3, %zmm0, %zmm3 -; AVX512VL-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VL-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero -; AVX512VL-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0 -; AVX512VL-NEXT: vpord %zmm0, %zmm3, %zmm0 -; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero +; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero +; AVX512VL-NEXT: vpsllvd %zmm3, %zmm2, %zmm3 +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VL-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero,xmm4[8],zero,zero,zero,xmm4[9],zero,zero,zero,xmm4[10],zero,zero,zero,xmm4[11],zero,zero,zero,xmm4[12],zero,zero,zero,xmm4[13],zero,zero,zero,xmm4[14],zero,zero,zero,xmm4[15],zero,zero,zero +; AVX512VL-NEXT: vpsrlvd %zmm4, %zmm2, %zmm2 +; AVX512VL-NEXT: vpord %zmm2, %zmm3, %zmm2 +; AVX512VL-NEXT: vpmovdb %zmm2, %xmm2 +; AVX512VL-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VL-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX512VL-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: splatvar_funnnel_v16i8: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero -; AVX512BW-NEXT: vpsllvw %zmm3, %zmm0, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero -; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpor %ymm0, %ymm3, %ymm0 -; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero +; AVX512BW-NEXT: vpsllvw %zmm3, %zmm2, %zmm3 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero,xmm4[8],zero,xmm4[9],zero,xmm4[10],zero,xmm4[11],zero,xmm4[12],zero,xmm4[13],zero,xmm4[14],zero,xmm4[15],zero +; AVX512BW-NEXT: vpsrlvw %zmm4, %zmm2, %zmm2 +; AVX512BW-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX512BW-NEXT: vpmovwb %zmm2, %ymm2 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX512BW-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v16i8: ; AVX512VLBW: # %bb.0: ; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX512VLBW-NEXT: vpsllvw %ymm3, %ymm0, %ymm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero -; AVX512VLBW-NEXT: vpsrlvw %ymm1, %ymm0, %ymm0 -; AVX512VLBW-NEXT: vpor %ymm0, %ymm3, %ymm0 -; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm3 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero +; AVX512VLBW-NEXT: vpsllvw %ymm1, %ymm2, %ymm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VLBW-NEXT: vpsubb %xmm3, %xmm4, %xmm4 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero,xmm4[8],zero,xmm4[9],zero,xmm4[10],zero,xmm4[11],zero,xmm4[12],zero,xmm4[13],zero,xmm4[14],zero,xmm4[15],zero +; AVX512VLBW-NEXT: vpsrlvw %ymm4, %ymm2, %ymm2 +; AVX512VLBW-NEXT: vpor %ymm2, %ymm1, %ymm1 +; AVX512VLBW-NEXT: vpmovwb %ymm1, %xmm1 +; AVX512VLBW-NEXT: vptestnmb %xmm3, %xmm3, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %xmm0, %xmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %xmm1, %xmm0 ; AVX512VLBW-NEXT: vzeroupper ; AVX512VLBW-NEXT: retq ; @@ -1309,16 +1363,30 @@ ; ; X32-SSE-LABEL: constant_funnnel_v2i64: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: movdqa %xmm0, %xmm1 -; X32-SSE-NEXT: psrlq $60, %xmm1 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = <4,u,14,u> +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2 -; X32-SSE-NEXT: psrlq $50, %xmm2 -; X32-SSE-NEXT: movsd {{.*#+}} xmm2 = xmm1[0],xmm2[1] -; X32-SSE-NEXT: movdqa %xmm0, %xmm1 -; X32-SSE-NEXT: psllq $4, %xmm1 -; X32-SSE-NEXT: psllq $14, %xmm0 -; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] -; X32-SSE-NEXT: orpd %xmm2, %xmm0 +; X32-SSE-NEXT: psllq %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: psllq %xmm3, %xmm4 +; X32-SSE-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1] +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [64,0,64,0] +; X32-SSE-NEXT: psubq %xmm1, %xmm2 +; X32-SSE-NEXT: movdqa %xmm0, %xmm3 +; X32-SSE-NEXT: psrlq %xmm2, %xmm3 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] +; X32-SSE-NEXT: movdqa %xmm0, %xmm5 +; X32-SSE-NEXT: psrlq %xmm2, %xmm5 +; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1] +; X32-SSE-NEXT: orpd %xmm4, %xmm5 +; X32-SSE-NEXT: pxor %xmm2, %xmm2 +; X32-SSE-NEXT: pcmpeqd %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,0,3,2] +; X32-SSE-NEXT: pand %xmm2, %xmm1 +; X32-SSE-NEXT: pand %xmm1, %xmm0 +; X32-SSE-NEXT: pandn %xmm5, %xmm1 +; X32-SSE-NEXT: por %xmm1, %xmm0 ; X32-SSE-NEXT: retl %res = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> ) ret <2 x i64> %res @@ -1582,44 +1650,53 @@ ; ; AVX512F-LABEL: constant_funnnel_v16i8: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero -; AVX512F-NEXT: vpsrlvd {{.*}}(%rip), %zmm0, %zmm1 -; AVX512F-NEXT: vpsllvd {{.*}}(%rip), %zmm0, %zmm0 -; AVX512F-NEXT: vpord %zmm1, %zmm0, %zmm0 -; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero +; AVX512F-NEXT: vpsrlvd {{.*}}(%rip), %zmm1, %zmm2 +; AVX512F-NEXT: vpsllvd {{.*}}(%rip), %zmm1, %zmm1 +; AVX512F-NEXT: vpord %zmm2, %zmm1, %zmm1 +; AVX512F-NEXT: vpmovdb %zmm1, %xmm1 +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512F-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: constant_funnnel_v16i8: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero -; AVX512VL-NEXT: vpsrlvd {{.*}}(%rip), %zmm0, %zmm1 -; AVX512VL-NEXT: vpsllvd {{.*}}(%rip), %zmm0, %zmm0 -; AVX512VL-NEXT: vpord %zmm1, %zmm0, %zmm0 -; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero +; AVX512VL-NEXT: vpsrlvd {{.*}}(%rip), %zmm1, %zmm2 +; AVX512VL-NEXT: vpsllvd {{.*}}(%rip), %zmm1, %zmm1 +; AVX512VL-NEXT: vpord %zmm2, %zmm1, %zmm1 +; AVX512VL-NEXT: vpmovdb %zmm1, %xmm1 +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512VL-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: constant_funnnel_v16i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [0,7,6,5,4,3,2,1,0,1,2,3,4,5,6,7] -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,7,6,5,4,3,2,1] -; AVX512BW-NEXT: vpsllvw %zmm2, %zmm0, %zmm0 -; AVX512BW-NEXT: vpor %ymm1, %ymm0, %ymm0 -; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [8,7,6,5,4,3,2,1,8,1,2,3,4,5,6,7] +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm2, %zmm1 +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,2,3,4,5,6,7,0,7,6,5,4,3,2,1] +; AVX512BW-NEXT: vpsllvw %zmm3, %zmm2, %zmm2 +; AVX512BW-NEXT: vpor %ymm1, %ymm2, %ymm1 +; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512BW-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: constant_funnnel_v16i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %ymm0, %ymm1 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %ymm0, %ymm0 -; AVX512VLBW-NEXT: vpor %ymm1, %ymm0, %ymm0 -; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %ymm1, %ymm2 +; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %ymm1, %ymm1 +; AVX512VLBW-NEXT: vpor %ymm2, %ymm1, %ymm1 +; AVX512VLBW-NEXT: vpmovwb %ymm1, %xmm1 +; AVX512VLBW-NEXT: movw $257, %ax # imm = 0x101 +; AVX512VLBW-NEXT: kmovd %eax, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %xmm0, %xmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %xmm1, %xmm0 ; AVX512VLBW-NEXT: vzeroupper ; AVX512VLBW-NEXT: retq ; @@ -1708,10 +1785,26 @@ ; ; X32-SSE-LABEL: splatconstant_funnnel_v2i64: ; X32-SSE: # %bb.0: +; X32-SSE-NEXT: pxor %xmm1, %xmm1 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [14,0,14,0] +; X32-SSE-NEXT: pcmpeqd %xmm2, %xmm1 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,0,3,2] +; X32-SSE-NEXT: pand %xmm1, %xmm3 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [64,0,64,0] +; X32-SSE-NEXT: psubq %xmm2, %xmm1 +; X32-SSE-NEXT: movdqa %xmm0, %xmm2 +; X32-SSE-NEXT: psrlq %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: psrlq %xmm1, %xmm4 +; X32-SSE-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1] ; X32-SSE-NEXT: movdqa %xmm0, %xmm1 -; X32-SSE-NEXT: psrlq $50, %xmm1 -; X32-SSE-NEXT: psllq $14, %xmm0 -; X32-SSE-NEXT: por %xmm1, %xmm0 +; X32-SSE-NEXT: psllq $14, %xmm1 +; X32-SSE-NEXT: movsd {{.*#+}} xmm1 = xmm1[0,1] +; X32-SSE-NEXT: orpd %xmm4, %xmm1 +; X32-SSE-NEXT: pand %xmm3, %xmm0 +; X32-SSE-NEXT: pandn %xmm1, %xmm3 +; X32-SSE-NEXT: por %xmm3, %xmm0 ; X32-SSE-NEXT: retl %res = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> ) ret <2 x i64> %res diff --git a/llvm/test/CodeGen/X86/vector-fshl-rot-256.ll b/llvm/test/CodeGen/X86/vector-fshl-rot-256.ll --- a/llvm/test/CodeGen/X86/vector-fshl-rot-256.ll +++ b/llvm/test/CodeGen/X86/vector-fshl-rot-256.ll @@ -21,46 +21,49 @@ ; AVX1-LABEL: var_funnnel_v4i64: ; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 -; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm3 -; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 -; AVX1-NEXT: vpsllq %xmm4, %xmm2, %xmm5 -; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[2,3,0,1] -; AVX1-NEXT: vpsllq %xmm4, %xmm2, %xmm4 -; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm5[0,1,2,3],xmm4[4,5,6,7] -; AVX1-NEXT: vpsllq %xmm3, %xmm0, %xmm5 -; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] -; AVX1-NEXT: vpsllq %xmm3, %xmm0, %xmm3 -; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm5[0,1,2,3],xmm3[4,5,6,7] -; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3 -; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4 -; AVX1-NEXT: vpxor %xmm5, %xmm5, %xmm5 -; AVX1-NEXT: vpsubq %xmm4, %xmm5, %xmm4 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [63,63] -; AVX1-NEXT: vpand %xmm6, %xmm4, %xmm4 -; AVX1-NEXT: vpsrlq %xmm4, %xmm2, %xmm7 -; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[2,3,0,1] -; AVX1-NEXT: vpsrlq %xmm4, %xmm2, %xmm2 +; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 +; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 +; AVX1-NEXT: vpsllq %xmm3, %xmm2, %xmm4 +; AVX1-NEXT: vpshufd {{.*#+}} xmm5 = xmm3[2,3,0,1] +; AVX1-NEXT: vpsllq %xmm5, %xmm2, %xmm5 +; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1,2,3],xmm5[4,5,6,7] +; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm5 +; AVX1-NEXT: vpshufd {{.*#+}} xmm6 = xmm1[2,3,0,1] +; AVX1-NEXT: vpsllq %xmm6, %xmm0, %xmm6 +; AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1,2,3],xmm6[4,5,6,7] +; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm5, %ymm4 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [64,64] +; AVX1-NEXT: vpsubq %xmm3, %xmm5, %xmm6 +; AVX1-NEXT: vpsrlq %xmm6, %xmm2, %xmm7 +; AVX1-NEXT: vpshufd {{.*#+}} xmm6 = xmm6[2,3,0,1] +; AVX1-NEXT: vpsrlq %xmm6, %xmm2, %xmm2 ; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm7[0,1,2,3],xmm2[4,5,6,7] -; AVX1-NEXT: vpsubq %xmm1, %xmm5, %xmm1 -; AVX1-NEXT: vpand %xmm6, %xmm1, %xmm1 -; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm4 -; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] -; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm4[0,1,2,3],xmm0[4,5,6,7] -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 -; AVX1-NEXT: vorps %ymm0, %ymm3, %ymm0 +; AVX1-NEXT: vpsubq %xmm1, %xmm5, %xmm5 +; AVX1-NEXT: vpsrlq %xmm5, %xmm0, %xmm6 +; AVX1-NEXT: vpshufd {{.*#+}} xmm5 = xmm5[2,3,0,1] +; AVX1-NEXT: vpsrlq %xmm5, %xmm0, %xmm5 +; AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0,1,2,3],xmm5[4,5,6,7] +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm5, %ymm2 +; AVX1-NEXT: vorps %ymm2, %ymm4, %ymm2 +; AVX1-NEXT: vxorps %xmm4, %xmm4, %xmm4 +; AVX1-NEXT: vpcmpeqq %xmm4, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqq %xmm4, %xmm1, %xmm1 +; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1 +; AVX1-NEXT: vblendvpd %ymm1, %ymm0, %ymm2, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: var_funnnel_v4i64: ; AVX2: # %bb.0: ; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [63,63,63,63] -; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm3 -; AVX2-NEXT: vpsllvq %ymm3, %ymm0, %ymm3 -; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX2-NEXT: vpsubq %ymm1, %ymm4, %ymm1 ; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 -; AVX2-NEXT: vpsrlvq %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: vpor %ymm0, %ymm3, %ymm0 +; AVX2-NEXT: vpsllvq %ymm1, %ymm0, %ymm2 +; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [64,64,64,64] +; AVX2-NEXT: vpsubq %ymm1, %ymm3, %ymm3 +; AVX2-NEXT: vpsrlvq %ymm3, %ymm0, %ymm3 +; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqq %ymm3, %ymm1, %ymm1 +; AVX2-NEXT: vblendvpd %ymm1, %ymm0, %ymm2, %ymm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: var_funnnel_v4i64: @@ -456,34 +459,36 @@ ; ; AVX512BW-LABEL: var_funnnel_v32i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512BW-NEXT: vpand %ymm2, %ymm1, %ymm3 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero,ymm3[16],zero,ymm3[17],zero,ymm3[18],zero,ymm3[19],zero,ymm3[20],zero,ymm3[21],zero,ymm3[22],zero,ymm3[23],zero,ymm3[24],zero,ymm3[25],zero,ymm3[26],zero,ymm3[27],zero,ymm3[28],zero,ymm3[29],zero,ymm3[30],zero,ymm3[31],zero -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero -; AVX512BW-NEXT: vpsllvw %zmm3, %zmm0, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubb %ymm1, %ymm4, %ymm1 -; AVX512BW-NEXT: vpand %ymm2, %ymm1, %ymm1 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero -; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm0, %zmm3, %zmm0 -; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm2 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero +; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero +; AVX512BW-NEXT: vpsllvw %zmm3, %zmm2, %zmm3 +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512BW-NEXT: vpsubb %ymm1, %ymm4, %ymm4 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm4 = ymm4[0],zero,ymm4[1],zero,ymm4[2],zero,ymm4[3],zero,ymm4[4],zero,ymm4[5],zero,ymm4[6],zero,ymm4[7],zero,ymm4[8],zero,ymm4[9],zero,ymm4[10],zero,ymm4[11],zero,ymm4[12],zero,ymm4[13],zero,ymm4[14],zero,ymm4[15],zero,ymm4[16],zero,ymm4[17],zero,ymm4[18],zero,ymm4[19],zero,ymm4[20],zero,ymm4[21],zero,ymm4[22],zero,ymm4[23],zero,ymm4[24],zero,ymm4[25],zero,ymm4[26],zero,ymm4[27],zero,ymm4[28],zero,ymm4[29],zero,ymm4[30],zero,ymm4[31],zero +; AVX512BW-NEXT: vpsrlvw %zmm4, %zmm2, %zmm2 +; AVX512BW-NEXT: vporq %zmm2, %zmm3, %zmm2 +; AVX512BW-NEXT: vpmovwb %zmm2, %ymm2 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %ymm3, %ymm1, %ymm1 +; AVX512BW-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v32i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vmovdqa {{.*#+}} ymm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VLBW-NEXT: vpand %ymm2, %ymm1, %ymm3 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero,ymm3[16],zero,ymm3[17],zero,ymm3[18],zero,ymm3[19],zero,ymm3[20],zero,ymm3[21],zero,ymm3[22],zero,ymm3[23],zero,ymm3[24],zero,ymm3[25],zero,ymm3[26],zero,ymm3[27],zero,ymm3[28],zero,ymm3[29],zero,ymm3[30],zero,ymm3[31],zero -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero -; AVX512VLBW-NEXT: vpsllvw %zmm3, %zmm0, %zmm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubb %ymm1, %ymm4, %ymm1 -; AVX512VLBW-NEXT: vpand %ymm2, %ymm1, %ymm1 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero -; AVX512VLBW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm0, %zmm3, %zmm0 -; AVX512VLBW-NEXT: vpmovwb %zmm0, %ymm0 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm2 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero +; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm3 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero,ymm3[16],zero,ymm3[17],zero,ymm3[18],zero,ymm3[19],zero,ymm3[20],zero,ymm3[21],zero,ymm3[22],zero,ymm3[23],zero,ymm3[24],zero,ymm3[25],zero,ymm3[26],zero,ymm3[27],zero,ymm3[28],zero,ymm3[29],zero,ymm3[30],zero,ymm3[31],zero +; AVX512VLBW-NEXT: vpsllvw %zmm1, %zmm2, %zmm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} ymm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VLBW-NEXT: vpsubb %ymm3, %ymm4, %ymm4 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm4 = ymm4[0],zero,ymm4[1],zero,ymm4[2],zero,ymm4[3],zero,ymm4[4],zero,ymm4[5],zero,ymm4[6],zero,ymm4[7],zero,ymm4[8],zero,ymm4[9],zero,ymm4[10],zero,ymm4[11],zero,ymm4[12],zero,ymm4[13],zero,ymm4[14],zero,ymm4[15],zero,ymm4[16],zero,ymm4[17],zero,ymm4[18],zero,ymm4[19],zero,ymm4[20],zero,ymm4[21],zero,ymm4[22],zero,ymm4[23],zero,ymm4[24],zero,ymm4[25],zero,ymm4[26],zero,ymm4[27],zero,ymm4[28],zero,ymm4[29],zero,ymm4[30],zero,ymm4[31],zero +; AVX512VLBW-NEXT: vpsrlvw %zmm4, %zmm2, %zmm2 +; AVX512VLBW-NEXT: vporq %zmm2, %zmm1, %zmm1 +; AVX512VLBW-NEXT: vpmovwb %zmm1, %ymm1 +; AVX512VLBW-NEXT: vptestnmb %ymm3, %ymm3, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %ymm0, %ymm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %ymm1, %ymm0 ; AVX512VLBW-NEXT: retq ; ; XOPAVX1-LABEL: var_funnnel_v32i8: @@ -514,38 +519,41 @@ define <4 x i64> @splatvar_funnnel_v4i64(<4 x i64> %x, <4 x i64> %amt) nounwind { ; AVX1-LABEL: splatvar_funnnel_v4i64: ; AVX1: # %bb.0: -; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] -; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX1-NEXT: vpsubq %xmm1, %xmm2, %xmm2 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [63,63] -; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 -; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 -; AVX1-NEXT: vpsrlq %xmm2, %xmm4, %xmm5 -; AVX1-NEXT: vpshufd {{.*#+}} xmm6 = xmm2[2,3,0,1] -; AVX1-NEXT: vpsrlq %xmm6, %xmm4, %xmm7 -; AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1,2,3],xmm7[4,5,6,7] -; AVX1-NEXT: vpsrlq %xmm2, %xmm0, %xmm2 -; AVX1-NEXT: vpsrlq %xmm6, %xmm0, %xmm6 -; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm6[4,5,6,7] -; AVX1-NEXT: vinsertf128 $1, %xmm5, %ymm2, %ymm2 -; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 -; AVX1-NEXT: vpsllq %xmm1, %xmm4, %xmm3 -; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0 -; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 +; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,0,1] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 +; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 +; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 +; AVX1-NEXT: vpsllq %xmm1, %xmm2, %xmm3 +; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm4 +; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3 +; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [64,64] +; AVX1-NEXT: vpsubq %xmm4, %xmm5, %xmm6 +; AVX1-NEXT: vpsrlq %xmm6, %xmm2, %xmm2 +; AVX1-NEXT: vpsubq %xmm1, %xmm5, %xmm5 +; AVX1-NEXT: vpsrlq %xmm5, %xmm0, %xmm5 +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm5, %ymm2 +; AVX1-NEXT: vorps %ymm2, %ymm3, %ymm2 +; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqq %xmm3, %xmm4, %xmm4 +; AVX1-NEXT: vpcmpeqq %xmm3, %xmm1, %xmm1 +; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm1 +; AVX1-NEXT: vblendvpd %ymm1, %ymm0, %ymm2, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: splatvar_funnnel_v4i64: ; AVX2: # %bb.0: -; AVX2-NEXT: vpbroadcastq %xmm1, %xmm1 -; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63] -; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX2-NEXT: vpsllq %xmm3, %ymm0, %ymm3 -; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX2-NEXT: vpsubq %xmm1, %xmm4, %xmm1 -; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX2-NEXT: vpsrlq %xmm1, %ymm0, %ymm0 -; AVX2-NEXT: vpor %ymm0, %ymm3, %ymm0 +; AVX2-NEXT: vpbroadcastq %xmm1, %ymm1 +; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [63,63,63,63] +; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 +; AVX2-NEXT: vpsllq %xmm1, %ymm0, %ymm2 +; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; AVX2-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; AVX2-NEXT: vpsrlq %xmm3, %ymm0, %ymm3 +; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqq %ymm3, %ymm1, %ymm1 +; AVX2-NEXT: vblendvpd %ymm1, %ymm0, %ymm2, %ymm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: splatvar_funnnel_v4i64: @@ -848,35 +856,37 @@ ; AVX512BW-LABEL: splatvar_funnnel_v32i8: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: vpbroadcastb %xmm1, %ymm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512BW-NEXT: vpand %ymm2, %ymm1, %ymm3 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero,ymm3[16],zero,ymm3[17],zero,ymm3[18],zero,ymm3[19],zero,ymm3[20],zero,ymm3[21],zero,ymm3[22],zero,ymm3[23],zero,ymm3[24],zero,ymm3[25],zero,ymm3[26],zero,ymm3[27],zero,ymm3[28],zero,ymm3[29],zero,ymm3[30],zero,ymm3[31],zero -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero -; AVX512BW-NEXT: vpsllvw %zmm3, %zmm0, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubb %ymm1, %ymm4, %ymm1 -; AVX512BW-NEXT: vpand %ymm2, %ymm1, %ymm1 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero -; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm0, %zmm3, %zmm0 -; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm2 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero +; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero +; AVX512BW-NEXT: vpsllvw %zmm3, %zmm2, %zmm3 +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512BW-NEXT: vpsubb %ymm1, %ymm4, %ymm4 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm4 = ymm4[0],zero,ymm4[1],zero,ymm4[2],zero,ymm4[3],zero,ymm4[4],zero,ymm4[5],zero,ymm4[6],zero,ymm4[7],zero,ymm4[8],zero,ymm4[9],zero,ymm4[10],zero,ymm4[11],zero,ymm4[12],zero,ymm4[13],zero,ymm4[14],zero,ymm4[15],zero,ymm4[16],zero,ymm4[17],zero,ymm4[18],zero,ymm4[19],zero,ymm4[20],zero,ymm4[21],zero,ymm4[22],zero,ymm4[23],zero,ymm4[24],zero,ymm4[25],zero,ymm4[26],zero,ymm4[27],zero,ymm4[28],zero,ymm4[29],zero,ymm4[30],zero,ymm4[31],zero +; AVX512BW-NEXT: vpsrlvw %zmm4, %zmm2, %zmm2 +; AVX512BW-NEXT: vporq %zmm2, %zmm3, %zmm2 +; AVX512BW-NEXT: vpmovwb %zmm2, %ymm2 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %ymm3, %ymm1, %ymm1 +; AVX512BW-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v32i8: ; AVX512VLBW: # %bb.0: ; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %ymm1 -; AVX512VLBW-NEXT: vmovdqa {{.*#+}} ymm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VLBW-NEXT: vpand %ymm2, %ymm1, %ymm3 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero,ymm3[16],zero,ymm3[17],zero,ymm3[18],zero,ymm3[19],zero,ymm3[20],zero,ymm3[21],zero,ymm3[22],zero,ymm3[23],zero,ymm3[24],zero,ymm3[25],zero,ymm3[26],zero,ymm3[27],zero,ymm3[28],zero,ymm3[29],zero,ymm3[30],zero,ymm3[31],zero -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero -; AVX512VLBW-NEXT: vpsllvw %zmm3, %zmm0, %zmm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubb %ymm1, %ymm4, %ymm1 -; AVX512VLBW-NEXT: vpand %ymm2, %ymm1, %ymm1 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero -; AVX512VLBW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm0, %zmm3, %zmm0 -; AVX512VLBW-NEXT: vpmovwb %zmm0, %ymm0 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm2 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero +; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm3 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero,ymm3[16],zero,ymm3[17],zero,ymm3[18],zero,ymm3[19],zero,ymm3[20],zero,ymm3[21],zero,ymm3[22],zero,ymm3[23],zero,ymm3[24],zero,ymm3[25],zero,ymm3[26],zero,ymm3[27],zero,ymm3[28],zero,ymm3[29],zero,ymm3[30],zero,ymm3[31],zero +; AVX512VLBW-NEXT: vpsllvw %zmm1, %zmm2, %zmm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} ymm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VLBW-NEXT: vpsubb %ymm3, %ymm4, %ymm4 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm4 = ymm4[0],zero,ymm4[1],zero,ymm4[2],zero,ymm4[3],zero,ymm4[4],zero,ymm4[5],zero,ymm4[6],zero,ymm4[7],zero,ymm4[8],zero,ymm4[9],zero,ymm4[10],zero,ymm4[11],zero,ymm4[12],zero,ymm4[13],zero,ymm4[14],zero,ymm4[15],zero,ymm4[16],zero,ymm4[17],zero,ymm4[18],zero,ymm4[19],zero,ymm4[20],zero,ymm4[21],zero,ymm4[22],zero,ymm4[23],zero,ymm4[24],zero,ymm4[25],zero,ymm4[26],zero,ymm4[27],zero,ymm4[28],zero,ymm4[29],zero,ymm4[30],zero,ymm4[31],zero +; AVX512VLBW-NEXT: vpsrlvw %zmm4, %zmm2, %zmm2 +; AVX512VLBW-NEXT: vporq %zmm2, %zmm1, %zmm1 +; AVX512VLBW-NEXT: vpmovwb %zmm1, %ymm1 +; AVX512VLBW-NEXT: vptestnmb %ymm3, %ymm3, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %ymm0, %ymm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %ymm1, %ymm0 ; AVX512VLBW-NEXT: retq ; ; XOPAVX1-LABEL: splatvar_funnnel_v32i8: @@ -1253,20 +1263,26 @@ ; ; AVX512BW-LABEL: constant_funnnel_v32i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero -; AVX512BW-NEXT: vpsrlvw {{.*}}(%rip), %zmm0, %zmm1 -; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero +; AVX512BW-NEXT: vpsrlvw {{.*}}(%rip), %zmm1, %zmm2 +; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm1, %zmm1 +; AVX512BW-NEXT: vporq %zmm2, %zmm1, %zmm1 +; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512BW-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: constant_funnnel_v32i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero -; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %zmm0, %zmm1 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vpmovwb %zmm0, %ymm0 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero +; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %zmm1, %zmm2 +; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm1, %zmm1 +; AVX512VLBW-NEXT: vporq %zmm2, %zmm1, %zmm1 +; AVX512VLBW-NEXT: vpmovwb %zmm1, %ymm1 +; AVX512VLBW-NEXT: movl $16843009, %eax # imm = 0x1010101 +; AVX512VLBW-NEXT: kmovd %eax, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %ymm0, %ymm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %ymm1, %ymm0 ; AVX512VLBW-NEXT: retq ; ; XOPAVX1-LABEL: constant_funnnel_v32i8: diff --git a/llvm/test/CodeGen/X86/vector-fshl-rot-512.ll b/llvm/test/CodeGen/X86/vector-fshl-rot-512.ll --- a/llvm/test/CodeGen/X86/vector-fshl-rot-512.ll +++ b/llvm/test/CodeGen/X86/vector-fshl-rot-512.ll @@ -88,26 +88,28 @@ ; ; AVX512BW-LABEL: var_funnnel_v32i16: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa64 {{.*#+}} zmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] -; AVX512BW-NEXT: vpandq %zmm2, %zmm1, %zmm3 -; AVX512BW-NEXT: vpsllvw %zmm3, %zmm0, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubw %zmm1, %zmm4, %zmm1 -; AVX512BW-NEXT: vpandq %zmm2, %zmm1, %zmm1 -; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm0, %zmm3, %zmm0 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512BW-NEXT: vpsllvw %zmm2, %zmm0, %zmm1 +; AVX512BW-NEXT: vmovdqa64 {{.*#+}} zmm3 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] +; AVX512BW-NEXT: vpsubw %zmm2, %zmm3, %zmm3 +; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3 +; AVX512BW-NEXT: vporq %zmm3, %zmm1, %zmm1 +; AVX512BW-NEXT: vptestnmw %zmm2, %zmm2, %k1 +; AVX512BW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} +; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v32i16: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vmovdqa64 {{.*#+}} zmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] -; AVX512VLBW-NEXT: vpandq %zmm2, %zmm1, %zmm3 -; AVX512VLBW-NEXT: vpsllvw %zmm3, %zmm0, %zmm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubw %zmm1, %zmm4, %zmm1 -; AVX512VLBW-NEXT: vpandq %zmm2, %zmm1, %zmm1 -; AVX512VLBW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm0, %zmm3, %zmm0 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512VLBW-NEXT: vpsllvw %zmm2, %zmm0, %zmm1 +; AVX512VLBW-NEXT: vmovdqa64 {{.*#+}} zmm3 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] +; AVX512VLBW-NEXT: vpsubw %zmm2, %zmm3, %zmm3 +; AVX512VLBW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3 +; AVX512VLBW-NEXT: vporq %zmm3, %zmm1, %zmm1 +; AVX512VLBW-NEXT: vptestnmw %zmm2, %zmm2, %k1 +; AVX512VLBW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512VLBW-NEXT: retq %res = call <32 x i16> @llvm.fshl.v32i16(<32 x i16> %x, <32 x i16> %x, <32 x i16> %amt) ret <32 x i16> %res @@ -208,78 +210,80 @@ ; ; AVX512BW-LABEL: var_funnnel_v64i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512BW-NEXT: vpsubb %zmm1, %zmm2, %zmm2 -; AVX512BW-NEXT: vmovdqa64 {{.*#+}} zmm3 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512BW-NEXT: vpandq %zmm3, %zmm2, %zmm2 -; AVX512BW-NEXT: vpsllw $5, %zmm2, %zmm2 -; AVX512BW-NEXT: vpaddb %zmm2, %zmm2, %zmm4 -; AVX512BW-NEXT: vpmovb2m %zmm4, %k1 -; AVX512BW-NEXT: vpmovb2m %zmm2, %k2 -; AVX512BW-NEXT: vpsrlw $4, %zmm0, %zmm2 -; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm2, %zmm2 -; AVX512BW-NEXT: vpblendmb %zmm2, %zmm0, %zmm2 {%k2} -; AVX512BW-NEXT: vpsrlw $2, %zmm2, %zmm5 -; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm5, %zmm5 -; AVX512BW-NEXT: vmovdqu8 %zmm5, %zmm2 {%k1} -; AVX512BW-NEXT: vpsrlw $1, %zmm2, %zmm5 -; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm5, %zmm5 -; AVX512BW-NEXT: vpaddb %zmm4, %zmm4, %zmm4 -; AVX512BW-NEXT: vpmovb2m %zmm4, %k1 -; AVX512BW-NEXT: vmovdqu8 %zmm5, %zmm2 {%k1} -; AVX512BW-NEXT: vpandq %zmm3, %zmm1, %zmm1 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512BW-NEXT: vmovdqa64 {{.*#+}} zmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512BW-NEXT: vpsubb %zmm2, %zmm1, %zmm1 ; AVX512BW-NEXT: vpsllw $5, %zmm1, %zmm1 ; AVX512BW-NEXT: vpaddb %zmm1, %zmm1, %zmm3 ; AVX512BW-NEXT: vpmovb2m %zmm3, %k1 ; AVX512BW-NEXT: vpmovb2m %zmm1, %k2 -; AVX512BW-NEXT: vpsllw $4, %zmm0, %zmm1 -; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm1 -; AVX512BW-NEXT: vmovdqu8 %zmm1, %zmm0 {%k2} -; AVX512BW-NEXT: vpsllw $2, %zmm0, %zmm1 +; AVX512BW-NEXT: vpsrlw $4, %zmm0, %zmm1 ; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm1 -; AVX512BW-NEXT: vmovdqu8 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: vpaddb %zmm3, %zmm3, %zmm1 -; AVX512BW-NEXT: vpmovb2m %zmm1, %k1 -; AVX512BW-NEXT: vpaddb %zmm0, %zmm0, %zmm0 {%k1} -; AVX512BW-NEXT: vporq %zmm2, %zmm0, %zmm0 +; AVX512BW-NEXT: vpblendmb %zmm1, %zmm0, %zmm1 {%k2} +; AVX512BW-NEXT: vpsrlw $2, %zmm1, %zmm4 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm4, %zmm4 +; AVX512BW-NEXT: vmovdqu8 %zmm4, %zmm1 {%k1} +; AVX512BW-NEXT: vpsrlw $1, %zmm1, %zmm4 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm4, %zmm4 +; AVX512BW-NEXT: vpaddb %zmm3, %zmm3, %zmm3 +; AVX512BW-NEXT: vpmovb2m %zmm3, %k1 +; AVX512BW-NEXT: vmovdqu8 %zmm4, %zmm1 {%k1} +; AVX512BW-NEXT: vpsllw $4, %zmm0, %zmm3 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm3, %zmm3 +; AVX512BW-NEXT: vpsllw $5, %zmm2, %zmm4 +; AVX512BW-NEXT: vpmovb2m %zmm4, %k1 +; AVX512BW-NEXT: vpblendmb %zmm3, %zmm0, %zmm3 {%k1} +; AVX512BW-NEXT: vpsllw $2, %zmm3, %zmm5 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm5, %zmm5 +; AVX512BW-NEXT: vpaddb %zmm4, %zmm4, %zmm4 +; AVX512BW-NEXT: vpmovb2m %zmm4, %k1 +; AVX512BW-NEXT: vmovdqu8 %zmm5, %zmm3 {%k1} +; AVX512BW-NEXT: vpaddb %zmm4, %zmm4, %zmm4 +; AVX512BW-NEXT: vpmovb2m %zmm4, %k1 +; AVX512BW-NEXT: vpaddb %zmm3, %zmm3, %zmm3 {%k1} +; AVX512BW-NEXT: vporq %zmm1, %zmm3, %zmm1 +; AVX512BW-NEXT: vptestnmb %zmm2, %zmm2, %k1 +; AVX512BW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} +; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v64i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512VLBW-NEXT: vpsubb %zmm1, %zmm2, %zmm2 -; AVX512VLBW-NEXT: vmovdqa64 {{.*#+}} zmm3 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VLBW-NEXT: vpandq %zmm3, %zmm2, %zmm2 -; AVX512VLBW-NEXT: vpsllw $5, %zmm2, %zmm2 -; AVX512VLBW-NEXT: vpaddb %zmm2, %zmm2, %zmm4 -; AVX512VLBW-NEXT: vpmovb2m %zmm4, %k1 -; AVX512VLBW-NEXT: vpmovb2m %zmm2, %k2 -; AVX512VLBW-NEXT: vpsrlw $4, %zmm0, %zmm2 -; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm2, %zmm2 -; AVX512VLBW-NEXT: vpblendmb %zmm2, %zmm0, %zmm2 {%k2} -; AVX512VLBW-NEXT: vpsrlw $2, %zmm2, %zmm5 -; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm5, %zmm5 -; AVX512VLBW-NEXT: vmovdqu8 %zmm5, %zmm2 {%k1} -; AVX512VLBW-NEXT: vpsrlw $1, %zmm2, %zmm5 -; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm5, %zmm5 -; AVX512VLBW-NEXT: vpaddb %zmm4, %zmm4, %zmm4 -; AVX512VLBW-NEXT: vpmovb2m %zmm4, %k1 -; AVX512VLBW-NEXT: vmovdqu8 %zmm5, %zmm2 {%k1} -; AVX512VLBW-NEXT: vpandq %zmm3, %zmm1, %zmm1 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512VLBW-NEXT: vmovdqa64 {{.*#+}} zmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VLBW-NEXT: vpsubb %zmm2, %zmm1, %zmm1 ; AVX512VLBW-NEXT: vpsllw $5, %zmm1, %zmm1 ; AVX512VLBW-NEXT: vpaddb %zmm1, %zmm1, %zmm3 ; AVX512VLBW-NEXT: vpmovb2m %zmm3, %k1 ; AVX512VLBW-NEXT: vpmovb2m %zmm1, %k2 -; AVX512VLBW-NEXT: vpsllw $4, %zmm0, %zmm1 -; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm1 -; AVX512VLBW-NEXT: vmovdqu8 %zmm1, %zmm0 {%k2} -; AVX512VLBW-NEXT: vpsllw $2, %zmm0, %zmm1 +; AVX512VLBW-NEXT: vpsrlw $4, %zmm0, %zmm1 ; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm1 -; AVX512VLBW-NEXT: vmovdqu8 %zmm1, %zmm0 {%k1} -; AVX512VLBW-NEXT: vpaddb %zmm3, %zmm3, %zmm1 -; AVX512VLBW-NEXT: vpmovb2m %zmm1, %k1 -; AVX512VLBW-NEXT: vpaddb %zmm0, %zmm0, %zmm0 {%k1} -; AVX512VLBW-NEXT: vporq %zmm2, %zmm0, %zmm0 +; AVX512VLBW-NEXT: vpblendmb %zmm1, %zmm0, %zmm1 {%k2} +; AVX512VLBW-NEXT: vpsrlw $2, %zmm1, %zmm4 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm4, %zmm4 +; AVX512VLBW-NEXT: vmovdqu8 %zmm4, %zmm1 {%k1} +; AVX512VLBW-NEXT: vpsrlw $1, %zmm1, %zmm4 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm4, %zmm4 +; AVX512VLBW-NEXT: vpaddb %zmm3, %zmm3, %zmm3 +; AVX512VLBW-NEXT: vpmovb2m %zmm3, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %zmm4, %zmm1 {%k1} +; AVX512VLBW-NEXT: vpsllw $4, %zmm0, %zmm3 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm3, %zmm3 +; AVX512VLBW-NEXT: vpsllw $5, %zmm2, %zmm4 +; AVX512VLBW-NEXT: vpmovb2m %zmm4, %k1 +; AVX512VLBW-NEXT: vpblendmb %zmm3, %zmm0, %zmm3 {%k1} +; AVX512VLBW-NEXT: vpsllw $2, %zmm3, %zmm5 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm5, %zmm5 +; AVX512VLBW-NEXT: vpaddb %zmm4, %zmm4, %zmm4 +; AVX512VLBW-NEXT: vpmovb2m %zmm4, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %zmm5, %zmm3 {%k1} +; AVX512VLBW-NEXT: vpaddb %zmm4, %zmm4, %zmm4 +; AVX512VLBW-NEXT: vpmovb2m %zmm4, %k1 +; AVX512VLBW-NEXT: vpaddb %zmm3, %zmm3, %zmm3 {%k1} +; AVX512VLBW-NEXT: vporq %zmm1, %zmm3, %zmm1 +; AVX512VLBW-NEXT: vptestnmb %zmm2, %zmm2, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512VLBW-NEXT: retq %res = call <64 x i8> @llvm.fshl.v64i8(<64 x i8> %x, <64 x i8> %x, <64 x i8> %amt) ret <64 x i8> %res @@ -350,32 +354,34 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v32i16: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vpbroadcastw %xmm1, %xmm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15] -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm3 +; AVX512BW-NEXT: vpbroadcastw %xmm1, %zmm1 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero +; AVX512BW-NEXT: vpsllw %xmm1, %zmm0, %zmm1 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; AVX512BW-NEXT: vpsubw %xmm2, %xmm3, %xmm3 ; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero -; AVX512BW-NEXT: vpsllw %xmm3, %zmm0, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubw %xmm1, %xmm4, %xmm1 -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX512BW-NEXT: vpsrlw %xmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm0, %zmm3, %zmm0 +; AVX512BW-NEXT: vpsrlw %xmm3, %zmm0, %zmm3 +; AVX512BW-NEXT: vporq %zmm3, %zmm1, %zmm1 +; AVX512BW-NEXT: vptestnmw %zmm2, %zmm2, %k1 +; AVX512BW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} +; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v32i16: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vpbroadcastw %xmm1, %xmm1 -; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15] -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm3 +; AVX512VLBW-NEXT: vpbroadcastw %xmm1, %zmm1 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512VLBW-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero +; AVX512VLBW-NEXT: vpsllw %xmm1, %zmm0, %zmm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; AVX512VLBW-NEXT: vpsubw %xmm2, %xmm3, %xmm3 ; AVX512VLBW-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero -; AVX512VLBW-NEXT: vpsllw %xmm3, %zmm0, %zmm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubw %xmm1, %xmm4, %xmm1 -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512VLBW-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX512VLBW-NEXT: vpsrlw %xmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm0, %zmm3, %zmm0 +; AVX512VLBW-NEXT: vpsrlw %xmm3, %zmm0, %zmm3 +; AVX512VLBW-NEXT: vporq %zmm3, %zmm1, %zmm1 +; AVX512VLBW-NEXT: vptestnmw %zmm2, %zmm2, %k1 +; AVX512VLBW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512VLBW-NEXT: retq %splat = shufflevector <32 x i16> %amt, <32 x i16> undef, <32 x i32> zeroinitializer %res = call <32 x i16> @llvm.fshl.v32i16(<32 x i16> %x, <32 x i16> %x, <32 x i16> %splat) @@ -441,48 +447,50 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v64i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm3 +; AVX512BW-NEXT: vpbroadcastb %xmm1, %zmm1 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero +; AVX512BW-NEXT: vpsllw %xmm1, %zmm0, %zmm3 +; AVX512BW-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4 +; AVX512BW-NEXT: vpsllw %xmm1, %xmm4, %xmm1 +; AVX512BW-NEXT: vpbroadcastb %xmm1, %zmm1 +; AVX512BW-NEXT: vpandq %zmm1, %zmm3, %zmm1 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512BW-NEXT: vpsubb %xmm2, %xmm3, %xmm3 ; AVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,zero,zero,zero,zero,xmm3[1],zero,zero,zero,zero,zero,zero,zero -; AVX512BW-NEXT: vpsllw %xmm3, %zmm0, %zmm4 -; AVX512BW-NEXT: vpcmpeqd %xmm5, %xmm5, %xmm5 -; AVX512BW-NEXT: vpsllw %xmm3, %xmm5, %xmm3 +; AVX512BW-NEXT: vpsrlw %xmm3, %zmm0, %zmm5 +; AVX512BW-NEXT: vpsrlw %xmm3, %xmm4, %xmm3 +; AVX512BW-NEXT: vpsrlw $8, %xmm3, %xmm3 ; AVX512BW-NEXT: vpbroadcastb %xmm3, %zmm3 -; AVX512BW-NEXT: vpandq %zmm3, %zmm4, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX512BW-NEXT: vpsrlw %xmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpsrlw %xmm1, %xmm5, %xmm1 -; AVX512BW-NEXT: vpsrlw $8, %xmm1, %xmm1 -; AVX512BW-NEXT: vpbroadcastb %xmm1, %zmm1 -; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm0, %zmm3, %zmm0 +; AVX512BW-NEXT: vpandq %zmm3, %zmm5, %zmm3 +; AVX512BW-NEXT: vporq %zmm3, %zmm1, %zmm1 +; AVX512BW-NEXT: vptestnmb %zmm2, %zmm2, %k1 +; AVX512BW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} +; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v64i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm3 +; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %zmm1 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512VLBW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero +; AVX512VLBW-NEXT: vpsllw %xmm1, %zmm0, %zmm3 +; AVX512VLBW-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4 +; AVX512VLBW-NEXT: vpsllw %xmm1, %xmm4, %xmm1 +; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %zmm1 +; AVX512VLBW-NEXT: vpandq %zmm1, %zmm3, %zmm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VLBW-NEXT: vpsubb %xmm2, %xmm3, %xmm3 ; AVX512VLBW-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,zero,zero,zero,zero,xmm3[1],zero,zero,zero,zero,zero,zero,zero -; AVX512VLBW-NEXT: vpsllw %xmm3, %zmm0, %zmm4 -; AVX512VLBW-NEXT: vpcmpeqd %xmm5, %xmm5, %xmm5 -; AVX512VLBW-NEXT: vpsllw %xmm3, %xmm5, %xmm3 +; AVX512VLBW-NEXT: vpsrlw %xmm3, %zmm0, %zmm5 +; AVX512VLBW-NEXT: vpsrlw %xmm3, %xmm4, %xmm3 +; AVX512VLBW-NEXT: vpsrlw $8, %xmm3, %xmm3 ; AVX512VLBW-NEXT: vpbroadcastb %xmm3, %zmm3 -; AVX512VLBW-NEXT: vpandq %zmm3, %zmm4, %zmm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512VLBW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX512VLBW-NEXT: vpsrlw %xmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vpsrlw %xmm1, %xmm5, %xmm1 -; AVX512VLBW-NEXT: vpsrlw $8, %xmm1, %xmm1 -; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %zmm1 -; AVX512VLBW-NEXT: vpandq %zmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm0, %zmm3, %zmm0 +; AVX512VLBW-NEXT: vpandq %zmm3, %zmm5, %zmm3 +; AVX512VLBW-NEXT: vporq %zmm3, %zmm1, %zmm1 +; AVX512VLBW-NEXT: vptestnmb %zmm2, %zmm2, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512VLBW-NEXT: retq %splat = shufflevector <64 x i8> %amt, <64 x i8> undef, <64 x i32> zeroinitializer %res = call <64 x i8> @llvm.fshl.v64i8(<64 x i8> %x, <64 x i8> %x, <64 x i8> %splat) @@ -515,51 +523,49 @@ ; AVX512F-LABEL: constant_funnnel_v32i16: ; AVX512F: # %bb.0: ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1 -; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768] ; AVX512F-NEXT: vpmulhuw %ymm2, %ymm1, %ymm3 -; AVX512F-NEXT: vpblendw {{.*#+}} xmm4 = xmm1[0],xmm3[1,2,3,4,5,6,7] -; AVX512F-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7] -; AVX512F-NEXT: vmovdqa {{.*#+}} ymm4 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768] -; AVX512F-NEXT: vpmullw %ymm4, %ymm1, %ymm1 +; AVX512F-NEXT: vpmullw %ymm2, %ymm1, %ymm1 ; AVX512F-NEXT: vpor %ymm3, %ymm1, %ymm1 -; AVX512F-NEXT: vpmulhuw %ymm2, %ymm0, %ymm2 -; AVX512F-NEXT: vpblendw {{.*#+}} xmm3 = xmm0[0],xmm2[1,2,3,4,5,6,7] -; AVX512F-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7] -; AVX512F-NEXT: vpmullw %ymm4, %ymm0, %ymm0 -; AVX512F-NEXT: vpor %ymm2, %ymm0, %ymm0 +; AVX512F-NEXT: vpmulhuw %ymm2, %ymm0, %ymm3 +; AVX512F-NEXT: vpmullw %ymm2, %ymm0, %ymm0 +; AVX512F-NEXT: vpor %ymm3, %ymm0, %ymm0 ; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: constant_funnnel_v32i16: ; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm2 = +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm2 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768] ; AVX512VL-NEXT: vpmulhuw %ymm2, %ymm1, %ymm3 -; AVX512VL-NEXT: vpblendw {{.*#+}} xmm4 = xmm1[0],xmm3[1,2,3,4,5,6,7] -; AVX512VL-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7] -; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm4 = [1,2,4,8,16,32,64,128,256,512,1024,2048,4096,8192,16384,32768] -; AVX512VL-NEXT: vpmullw %ymm4, %ymm1, %ymm1 +; AVX512VL-NEXT: vpmullw %ymm2, %ymm1, %ymm1 ; AVX512VL-NEXT: vpor %ymm3, %ymm1, %ymm1 -; AVX512VL-NEXT: vpmulhuw %ymm2, %ymm0, %ymm2 -; AVX512VL-NEXT: vpblendw {{.*#+}} xmm3 = xmm0[0],xmm2[1,2,3,4,5,6,7] -; AVX512VL-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7] -; AVX512VL-NEXT: vpmullw %ymm4, %ymm0, %ymm0 -; AVX512VL-NEXT: vpor %ymm2, %ymm0, %ymm0 +; AVX512VL-NEXT: vpmulhuw %ymm2, %ymm0, %ymm3 +; AVX512VL-NEXT: vpmullw %ymm2, %ymm0, %ymm0 +; AVX512VL-NEXT: vpor %ymm3, %ymm0, %ymm0 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: constant_funnnel_v32i16: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: vpsrlvw {{.*}}(%rip), %zmm0, %zmm1 -; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm1, %zmm0, %zmm0 +; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm2 +; AVX512BW-NEXT: vporq %zmm1, %zmm2, %zmm1 +; AVX512BW-NEXT: movl $65537, %eax # imm = 0x10001 +; AVX512BW-NEXT: kmovd %eax, %k1 +; AVX512BW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} +; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: constant_funnnel_v32i16: ; AVX512VLBW: # %bb.0: ; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %zmm0, %zmm1 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm1, %zmm0, %zmm0 +; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm2 +; AVX512VLBW-NEXT: vporq %zmm1, %zmm2, %zmm1 +; AVX512VLBW-NEXT: movl $65537, %eax # imm = 0x10001 +; AVX512VLBW-NEXT: kmovd %eax, %k1 +; AVX512VLBW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512VLBW-NEXT: retq %res = call <32 x i16> @llvm.fshl.v32i16(<32 x i16> %x, <32 x i16> %x, <32 x i16> ) ret <32 x i16> %res @@ -685,14 +691,18 @@ ; AVX512BW-NEXT: vpaddb %zmm2, %zmm2, %zmm2 {%k1} ; AVX512BW-NEXT: vpunpckhbw {{.*#+}} zmm1 = zmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31,40,40,41,41,42,42,43,43,44,44,45,45,46,46,47,47,56,56,57,57,58,58,59,59,60,60,61,61,62,62,63,63] ; AVX512BW-NEXT: vpsrlw $8, %zmm1, %zmm1 -; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm1, %zmm1 +; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %zmm1, %zmm1 ; AVX512BW-NEXT: vpsrlw $8, %zmm1, %zmm1 -; AVX512BW-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] -; AVX512BW-NEXT: vpsrlw $8, %zmm0, %zmm0 -; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 -; AVX512BW-NEXT: vpsrlw $8, %zmm0, %zmm0 -; AVX512BW-NEXT: vpackuswb %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm0, %zmm2, %zmm0 +; AVX512BW-NEXT: vpunpcklbw {{.*#+}} zmm3 = zmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] +; AVX512BW-NEXT: vpsrlw $8, %zmm3, %zmm3 +; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %zmm3, %zmm3 +; AVX512BW-NEXT: vpsrlw $8, %zmm3, %zmm3 +; AVX512BW-NEXT: vpackuswb %zmm1, %zmm3, %zmm1 +; AVX512BW-NEXT: vporq %zmm1, %zmm2, %zmm1 +; AVX512BW-NEXT: movabsq $72340172838076673, %rax # imm = 0x101010101010101 +; AVX512BW-NEXT: kmovq %rax, %k1 +; AVX512BW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} +; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: constant_funnnel_v64i8: @@ -713,14 +723,18 @@ ; AVX512VLBW-NEXT: vpaddb %zmm2, %zmm2, %zmm2 {%k1} ; AVX512VLBW-NEXT: vpunpckhbw {{.*#+}} zmm1 = zmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31,40,40,41,41,42,42,43,43,44,44,45,45,46,46,47,47,56,56,57,57,58,58,59,59,60,60,61,61,62,62,63,63] ; AVX512VLBW-NEXT: vpsrlw $8, %zmm1, %zmm1 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm1, %zmm1 +; AVX512VLBW-NEXT: vpmullw {{.*}}(%rip), %zmm1, %zmm1 ; AVX512VLBW-NEXT: vpsrlw $8, %zmm1, %zmm1 -; AVX512VLBW-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] -; AVX512VLBW-NEXT: vpsrlw $8, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 -; AVX512VLBW-NEXT: vpsrlw $8, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vpackuswb %zmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm0, %zmm2, %zmm0 +; AVX512VLBW-NEXT: vpunpcklbw {{.*#+}} zmm3 = zmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] +; AVX512VLBW-NEXT: vpsrlw $8, %zmm3, %zmm3 +; AVX512VLBW-NEXT: vpmullw {{.*}}(%rip), %zmm3, %zmm3 +; AVX512VLBW-NEXT: vpsrlw $8, %zmm3, %zmm3 +; AVX512VLBW-NEXT: vpackuswb %zmm1, %zmm3, %zmm1 +; AVX512VLBW-NEXT: vporq %zmm1, %zmm2, %zmm1 +; AVX512VLBW-NEXT: movabsq $72340172838076673, %rax # imm = 0x101010101010101 +; AVX512VLBW-NEXT: kmovq %rax, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512VLBW-NEXT: retq %res = call <64 x i8> @llvm.fshl.v64i8(<64 x i8> %x, <64 x i8> %x, <64 x i8> ) ret <64 x i8> %res diff --git a/llvm/test/CodeGen/X86/vector-fshr-128.ll b/llvm/test/CodeGen/X86/vector-fshr-128.ll --- a/llvm/test/CodeGen/X86/vector-fshr-128.ll +++ b/llvm/test/CodeGen/X86/vector-fshr-128.ll @@ -110,17 +110,15 @@ ; ; AVX512F-LABEL: var_funnnel_v2i64: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512F-NEXT: vpsrlvq %xmm2, %xmm1, %xmm3 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm4 = [64,64] ; AVX512F-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512F-NEXT: vpsllvq %xmm4, %xmm0, %xmm0 ; AVX512F-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512F-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa64 %zmm1, %zmm0 {%k1} -; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqq %xmm3, %xmm2, %xmm2 +; AVX512F-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v2i64: @@ -137,32 +135,28 @@ ; ; AVX512BW-LABEL: var_funnnel_v2i64: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512BW-NEXT: vpsrlvq %xmm2, %xmm1, %xmm3 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm4 = [64,64] ; AVX512BW-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512BW-NEXT: vpsllvq %xmm4, %xmm0, %xmm0 ; AVX512BW-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512BW-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqq %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v2i64: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpsrlvq %xmm2, %xmm1, %xmm3 ; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} xmm4 = [64,64] ; AVX512VBMI2-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512VBMI2-NEXT: vpsllvq %xmm4, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512VBMI2-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa64 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512VBMI2-NEXT: vzeroupper +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqq %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v2i64: @@ -355,7 +349,6 @@ ; ; AVX512F-LABEL: var_funnnel_v4i32: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512F-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31] ; AVX512F-NEXT: vpand %xmm3, %xmm2, %xmm2 ; AVX512F-NEXT: vpsrlvd %xmm2, %xmm1, %xmm3 @@ -363,10 +356,9 @@ ; AVX512F-NEXT: vpsubd %xmm2, %xmm4, %xmm4 ; AVX512F-NEXT: vpsllvd %xmm4, %xmm0, %xmm0 ; AVX512F-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512F-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1} -; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2 +; AVX512F-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v4i32: @@ -383,7 +375,6 @@ ; ; AVX512BW-LABEL: var_funnnel_v4i32: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512BW-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31] ; AVX512BW-NEXT: vpand %xmm3, %xmm2, %xmm2 ; AVX512BW-NEXT: vpsrlvd %xmm2, %xmm1, %xmm3 @@ -391,15 +382,13 @@ ; AVX512BW-NEXT: vpsubd %xmm2, %xmm4, %xmm4 ; AVX512BW-NEXT: vpsllvd %xmm4, %xmm0, %xmm0 ; AVX512BW-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512BW-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v4i32: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512VBMI2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31] ; AVX512VBMI2-NEXT: vpand %xmm3, %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpsrlvd %xmm2, %xmm1, %xmm3 @@ -407,10 +396,9 @@ ; AVX512VBMI2-NEXT: vpsubd %xmm2, %xmm4, %xmm4 ; AVX512VBMI2-NEXT: vpsllvd %xmm4, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512VBMI2-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512VBMI2-NEXT: vzeroupper +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v4i32: @@ -720,9 +708,9 @@ ; AVX512BW-NEXT: vpsubw %xmm2, %xmm4, %xmm4 ; AVX512BW-NEXT: vpsllvw %zmm4, %zmm0, %zmm0 ; AVX512BW-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512BW-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu16 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqw %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; @@ -736,9 +724,9 @@ ; AVX512VBMI2-NEXT: vpsubw %xmm2, %xmm4, %xmm4 ; AVX512VBMI2-NEXT: vpsllvw %zmm4, %zmm0, %zmm0 ; AVX512VBMI2-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512VBMI2-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu16 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqw %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: vzeroupper ; AVX512VBMI2-NEXT: retq ; @@ -1031,7 +1019,6 @@ ; ; AVX512BW-LABEL: var_funnnel_v16i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero,xmm2[8],zero,xmm2[9],zero,xmm2[10],zero,xmm2[11],zero,xmm2[12],zero,xmm2[13],zero,xmm2[14],zero,xmm2[15],zero @@ -1043,15 +1030,14 @@ ; AVX512BW-NEXT: vpsllvw %zmm4, %zmm0, %zmm0 ; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512BW-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu8 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v16i8: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero,xmm2[8],zero,xmm2[9],zero,xmm2[10],zero,xmm2[11],zero,xmm2[12],zero,xmm2[13],zero,xmm2[14],zero,xmm2[15],zero @@ -1063,9 +1049,9 @@ ; AVX512VBMI2-NEXT: vpsllvw %zmm4, %zmm0, %zmm0 ; AVX512VBMI2-NEXT: vpor %ymm3, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512VBMI2-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu8 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqb %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: vzeroupper ; AVX512VBMI2-NEXT: retq ; @@ -1261,7 +1247,6 @@ ; ; AVX512F-LABEL: splatvar_funnnel_v2i64: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512F-NEXT: vpbroadcastq %xmm2, %xmm2 ; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512F-NEXT: vpsrlq %xmm2, %xmm1, %xmm3 @@ -1269,10 +1254,9 @@ ; AVX512F-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512F-NEXT: vpsllq %xmm4, %xmm0, %xmm0 ; AVX512F-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512F-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa64 %zmm1, %zmm0 {%k1} -; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqq %xmm3, %xmm2, %xmm2 +; AVX512F-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: splatvar_funnnel_v2i64: @@ -1290,7 +1274,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v2i64: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512BW-NEXT: vpbroadcastq %xmm2, %xmm2 ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512BW-NEXT: vpsrlq %xmm2, %xmm1, %xmm3 @@ -1298,15 +1281,13 @@ ; AVX512BW-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512BW-NEXT: vpsllq %xmm4, %xmm0, %xmm0 ; AVX512BW-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512BW-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqq %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v2i64: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512VBMI2-NEXT: vpbroadcastq %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpsrlq %xmm2, %xmm1, %xmm3 @@ -1314,10 +1295,9 @@ ; AVX512VBMI2-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512VBMI2-NEXT: vpsllq %xmm4, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512VBMI2-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa64 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512VBMI2-NEXT: vzeroupper +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqq %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vblendvpd %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v2i64: @@ -1477,7 +1457,6 @@ ; ; AVX512F-LABEL: splatvar_funnnel_v4i32: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512F-NEXT: vpbroadcastd %xmm2, %xmm2 ; AVX512F-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31] ; AVX512F-NEXT: vpand %xmm3, %xmm2, %xmm2 @@ -1488,10 +1467,9 @@ ; AVX512F-NEXT: vpmovzxdq {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero ; AVX512F-NEXT: vpslld %xmm4, %xmm0, %xmm0 ; AVX512F-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512F-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1} -; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512F-NEXT: vzeroupper +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2 +; AVX512F-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: splatvar_funnnel_v4i32: @@ -1511,7 +1489,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v4i32: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512BW-NEXT: vpbroadcastd %xmm2, %xmm2 ; AVX512BW-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31] ; AVX512BW-NEXT: vpand %xmm3, %xmm2, %xmm2 @@ -1522,15 +1499,13 @@ ; AVX512BW-NEXT: vpmovzxdq {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero ; AVX512BW-NEXT: vpslld %xmm4, %xmm0, %xmm0 ; AVX512BW-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512BW-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v4i32: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512VBMI2-NEXT: vpbroadcastd %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31] ; AVX512VBMI2-NEXT: vpand %xmm3, %xmm2, %xmm2 @@ -1541,10 +1516,9 @@ ; AVX512VBMI2-NEXT: vpmovzxdq {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero ; AVX512VBMI2-NEXT: vpslld %xmm4, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512VBMI2-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512VBMI2-NEXT: vzeroupper +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vblendvps %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v4i32: @@ -1739,7 +1713,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v8i16: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512BW-NEXT: vpbroadcastw %xmm2, %xmm2 ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero @@ -1749,15 +1722,13 @@ ; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero ; AVX512BW-NEXT: vpsllw %xmm4, %xmm0, %xmm0 ; AVX512BW-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512BW-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu16 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512BW-NEXT: vzeroupper +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqw %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v8i16: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512VBMI2-NEXT: vpbroadcastw %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero @@ -1767,10 +1738,9 @@ ; AVX512VBMI2-NEXT: vpmovzxwq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero ; AVX512VBMI2-NEXT: vpsllw %xmm4, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX512VBMI2-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu16 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 -; AVX512VBMI2-NEXT: vzeroupper +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqw %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v8i16: @@ -2009,7 +1979,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v16i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512BW-NEXT: vpbroadcastb %xmm2, %xmm2 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 @@ -2022,15 +1991,14 @@ ; AVX512BW-NEXT: vpsllvw %zmm4, %zmm0, %zmm0 ; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512BW-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu8 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %xmm3, %xmm2, %xmm2 +; AVX512BW-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v16i8: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $xmm1 killed $xmm1 def $zmm1 ; AVX512VBMI2-NEXT: vpbroadcastb %xmm2, %xmm2 ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 @@ -2043,9 +2011,9 @@ ; AVX512VBMI2-NEXT: vpsllvw %zmm4, %zmm0, %zmm0 ; AVX512VBMI2-NEXT: vpor %ymm3, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512VBMI2-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu8 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqb %xmm3, %xmm2, %xmm2 +; AVX512VBMI2-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: vzeroupper ; AVX512VBMI2-NEXT: retq ; @@ -2264,15 +2232,30 @@ ; ; X32-SSE-LABEL: constant_funnnel_v2i64: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: movdqa %xmm1, %xmm2 -; X32-SSE-NEXT: psrlq $4, %xmm2 -; X32-SSE-NEXT: psrlq $14, %xmm1 -; X32-SSE-NEXT: movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1] -; X32-SSE-NEXT: movdqa %xmm0, %xmm2 -; X32-SSE-NEXT: psllq $60, %xmm2 -; X32-SSE-NEXT: psllq $50, %xmm0 -; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] -; X32-SSE-NEXT: orpd %xmm1, %xmm0 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = <4,u,14,u> +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2 +; X32-SSE-NEXT: movdqa %xmm1, %xmm3 +; X32-SSE-NEXT: psrlq %xmm2, %xmm3 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[2,3,0,1] +; X32-SSE-NEXT: movdqa %xmm1, %xmm5 +; X32-SSE-NEXT: psrlq %xmm4, %xmm5 +; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1] +; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [64,0,64,0] +; X32-SSE-NEXT: psubq %xmm2, %xmm3 +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: psllq %xmm3, %xmm4 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] +; X32-SSE-NEXT: psllq %xmm3, %xmm0 +; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1] +; X32-SSE-NEXT: orpd %xmm5, %xmm0 +; X32-SSE-NEXT: pxor %xmm3, %xmm3 +; X32-SSE-NEXT: pcmpeqd %xmm2, %xmm3 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[1,0,3,2] +; X32-SSE-NEXT: pand %xmm3, %xmm2 +; X32-SSE-NEXT: pand %xmm2, %xmm1 +; X32-SSE-NEXT: pandn %xmm0, %xmm2 +; X32-SSE-NEXT: por %xmm1, %xmm2 +; X32-SSE-NEXT: movdqa %xmm2, %xmm0 ; X32-SSE-NEXT: retl %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %y, <2 x i64> ) ret <2 x i64> %res @@ -2422,15 +2405,17 @@ define <8 x i16> @constant_funnnel_v8i16(<8 x i16> %x, <8 x i16> %y) nounwind { ; SSE2-LABEL: constant_funnnel_v8i16: ; SSE2: # %bb.0: -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = -; SSE2-NEXT: movdqa %xmm1, %xmm3 -; SSE2-NEXT: pmulhuw %xmm2, %xmm3 -; SSE2-NEXT: pmullw %xmm2, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [0,65535,65535,65535,65535,65535,65535,65535] +; SSE2-NEXT: movdqa %xmm2, %xmm3 +; SSE2-NEXT: pandn %xmm1, %xmm3 +; SSE2-NEXT: movdqa {{.*#+}} xmm4 = +; SSE2-NEXT: pmulhuw %xmm4, %xmm1 +; SSE2-NEXT: pand %xmm2, %xmm1 +; SSE2-NEXT: pmullw %xmm4, %xmm0 +; SSE2-NEXT: por %xmm3, %xmm0 +; SSE2-NEXT: por %xmm1, %xmm0 ; SSE2-NEXT: pand %xmm2, %xmm0 -; SSE2-NEXT: pandn %xmm1, %xmm2 -; SSE2-NEXT: por %xmm2, %xmm0 +; SSE2-NEXT: por %xmm3, %xmm0 ; SSE2-NEXT: retq ; ; SSE41-LABEL: constant_funnnel_v8i16: @@ -2520,15 +2505,17 @@ ; ; X32-SSE-LABEL: constant_funnnel_v8i16: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = -; X32-SSE-NEXT: movdqa %xmm1, %xmm3 -; X32-SSE-NEXT: pmulhuw %xmm2, %xmm3 -; X32-SSE-NEXT: pmullw %xmm2, %xmm0 -; X32-SSE-NEXT: por %xmm3, %xmm0 ; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [0,65535,65535,65535,65535,65535,65535,65535] +; X32-SSE-NEXT: movdqa %xmm2, %xmm3 +; X32-SSE-NEXT: pandn %xmm1, %xmm3 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm4 = +; X32-SSE-NEXT: pmulhuw %xmm4, %xmm1 +; X32-SSE-NEXT: pand %xmm2, %xmm1 +; X32-SSE-NEXT: pmullw %xmm4, %xmm0 +; X32-SSE-NEXT: por %xmm3, %xmm0 +; X32-SSE-NEXT: por %xmm1, %xmm0 ; X32-SSE-NEXT: pand %xmm2, %xmm0 -; X32-SSE-NEXT: pandn %xmm1, %xmm2 -; X32-SSE-NEXT: por %xmm2, %xmm0 +; X32-SSE-NEXT: por %xmm3, %xmm0 ; X32-SSE-NEXT: retl %res = call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %x, <8 x i16> %y, <8 x i16> ) ret <8 x i16> %res @@ -2567,54 +2554,50 @@ ; ; SSE41-LABEL: constant_funnnel_v16i8: ; SSE41: # %bb.0: -; SSE41-NEXT: pxor %xmm2, %xmm2 -; SSE41-NEXT: movdqa %xmm1, %xmm3 -; SSE41-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15] -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = -; SSE41-NEXT: pmullw %xmm2, %xmm3 -; SSE41-NEXT: psrlw $8, %xmm3 -; SSE41-NEXT: pmovzxbw {{.*#+}} xmm4 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero -; SSE41-NEXT: movdqa {{.*#+}} xmm5 = -; SSE41-NEXT: pmullw %xmm5, %xmm4 -; SSE41-NEXT: psrlw $8, %xmm4 -; SSE41-NEXT: packuswb %xmm3, %xmm4 ; SSE41-NEXT: pmovzxbw {{.*#+}} xmm3 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero ; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] -; SSE41-NEXT: pmullw %xmm2, %xmm0 +; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm0 ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] ; SSE41-NEXT: pand %xmm2, %xmm0 -; SSE41-NEXT: pmullw %xmm5, %xmm3 +; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm3 ; SSE41-NEXT: pand %xmm2, %xmm3 ; SSE41-NEXT: packuswb %xmm0, %xmm3 -; SSE41-NEXT: por %xmm4, %xmm3 -; SSE41-NEXT: movaps {{.*#+}} xmm0 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm1 -; SSE41-NEXT: movdqa %xmm1, %xmm0 +; SSE41-NEXT: pxor %xmm0, %xmm0 +; SSE41-NEXT: movdqa %xmm1, %xmm4 +; SSE41-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm0[8],xmm4[9],xmm0[9],xmm4[10],xmm0[10],xmm4[11],xmm0[11],xmm4[12],xmm0[12],xmm4[13],xmm0[13],xmm4[14],xmm0[14],xmm4[15],xmm0[15] +; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm4 +; SSE41-NEXT: psrlw $8, %xmm4 +; SSE41-NEXT: pmovzxbw {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero +; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm2 +; SSE41-NEXT: psrlw $8, %xmm2 +; SSE41-NEXT: packuswb %xmm4, %xmm2 +; SSE41-NEXT: por %xmm3, %xmm2 +; SSE41-NEXT: movaps {{.*#+}} xmm0 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; SSE41-NEXT: pblendvb %xmm0, %xmm1, %xmm2 +; SSE41-NEXT: movdqa %xmm2, %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: constant_funnnel_v16i8: ; AVX1: # %bb.0: +; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] +; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm2, %xmm2 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255] +; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 +; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 +; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 +; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm1[8],xmm2[8],xmm1[9],xmm2[9],xmm1[10],xmm2[10],xmm1[11],xmm2[11],xmm1[12],xmm2[12],xmm1[13],xmm2[13],xmm1[14],xmm2[14],xmm1[15],xmm2[15] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = -; AVX1-NEXT: vpmullw %xmm3, %xmm2, %xmm2 +; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm2, %xmm2 ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 -; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm4 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero -; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = -; AVX1-NEXT: vpmullw %xmm5, %xmm4, %xmm4 -; AVX1-NEXT: vpsrlw $8, %xmm4, %xmm4 -; AVX1-NEXT: vpackuswb %xmm2, %xmm4, %xmm2 -; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm4 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] -; AVX1-NEXT: vpmullw %xmm3, %xmm4, %xmm3 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255] -; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 -; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero -; AVX1-NEXT: vpmullw %xmm5, %xmm0, %xmm0 -; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 -; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 +; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero +; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm3, %xmm3 +; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm3 +; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX1-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: constant_funnnel_v16i8: @@ -2630,8 +2613,8 @@ ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm3 ; AVX2-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 ; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0 -; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX2-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 +; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX2-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX2-NEXT: vzeroupper ; AVX2-NEXT: retq ; @@ -2643,8 +2626,8 @@ ; AVX512F-NEXT: vpsllvd {{.*}}(%rip), %zmm0, %zmm0 ; AVX512F-NEXT: vpord %zmm2, %zmm0, %zmm0 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512F-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512F-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; @@ -2656,38 +2639,38 @@ ; AVX512VL-NEXT: vpsllvd {{.*}}(%rip), %zmm0, %zmm0 ; AVX512VL-NEXT: vpord %zmm2, %zmm0, %zmm0 ; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512VL-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512VL-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: constant_funnnel_v16i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,7,6,5,4,3,2,1] ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero ; AVX512BW-NEXT: vpsrlvw %zmm2, %zmm3, %zmm2 -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm3 = +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm3 = [8,7,6,5,4,3,2,1,8,1,2,3,4,5,6,7] ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero ; AVX512BW-NEXT: vpsllvw %zmm3, %zmm0, %zmm0 ; AVX512BW-NEXT: vpor %ymm2, %ymm0, %ymm0 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512BW-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512BW-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: constant_funnnel_v16i8: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} ymm2 = +; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,0,7,6,5,4,3,2,1] ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero ; AVX512VBMI2-NEXT: vpsrlvw %zmm2, %zmm3, %zmm2 -; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} ymm3 = +; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} ymm3 = [8,7,6,5,4,3,2,1,8,1,2,3,4,5,6,7] ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero ; AVX512VBMI2-NEXT: vpsllvw %zmm3, %zmm0, %zmm0 ; AVX512VBMI2-NEXT: vpor %ymm2, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512VBMI2-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 +; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512VBMI2-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; AVX512VBMI2-NEXT: vzeroupper ; AVX512VBMI2-NEXT: retq ; @@ -2724,8 +2707,8 @@ ; XOP-NEXT: vpshlb {{.*}}(%rip), %xmm1, %xmm2 ; XOP-NEXT: vpshlb {{.*}}(%rip), %xmm0, %xmm0 ; XOP-NEXT: vpor %xmm2, %xmm0, %xmm0 -; XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; XOP-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 +; XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; XOP-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 ; XOP-NEXT: retq ; ; X32-SSE-LABEL: constant_funnnel_v16i8: @@ -2829,9 +2812,26 @@ ; ; X32-SSE-LABEL: splatconstant_funnnel_v2i64: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: psrlq $14, %xmm1 -; X32-SSE-NEXT: psllq $50, %xmm0 -; X32-SSE-NEXT: por %xmm1, %xmm0 +; X32-SSE-NEXT: pxor %xmm3, %xmm3 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm4 = [14,0,14,0] +; X32-SSE-NEXT: pcmpeqd %xmm4, %xmm3 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[1,0,3,2] +; X32-SSE-NEXT: pand %xmm3, %xmm2 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [64,0,64,0] +; X32-SSE-NEXT: psubq %xmm4, %xmm3 +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: psllq %xmm3, %xmm4 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] +; X32-SSE-NEXT: psllq %xmm3, %xmm0 +; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1] +; X32-SSE-NEXT: movdqa %xmm1, %xmm3 +; X32-SSE-NEXT: psrlq $14, %xmm3 +; X32-SSE-NEXT: movsd {{.*#+}} xmm3 = xmm3[0,1] +; X32-SSE-NEXT: orpd %xmm0, %xmm3 +; X32-SSE-NEXT: pand %xmm2, %xmm1 +; X32-SSE-NEXT: pandn %xmm3, %xmm2 +; X32-SSE-NEXT: por %xmm1, %xmm2 +; X32-SSE-NEXT: movdqa %xmm2, %xmm0 ; X32-SSE-NEXT: retl %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %y, <2 x i64> ) ret <2 x i64> %res diff --git a/llvm/test/CodeGen/X86/vector-fshr-256.ll b/llvm/test/CodeGen/X86/vector-fshr-256.ll --- a/llvm/test/CodeGen/X86/vector-fshr-256.ll +++ b/llvm/test/CodeGen/X86/vector-fshr-256.ll @@ -71,7 +71,6 @@ ; ; AVX512F-LABEL: var_funnnel_v4i64: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512F-NEXT: vpbroadcastq {{.*#+}} ymm3 = [63,63,63,63] ; AVX512F-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512F-NEXT: vpsrlvq %ymm2, %ymm1, %ymm3 @@ -79,9 +78,9 @@ ; AVX512F-NEXT: vpsubq %ymm2, %ymm4, %ymm4 ; AVX512F-NEXT: vpsllvq %ymm4, %ymm0, %ymm0 ; AVX512F-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512F-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa64 %zmm1, %zmm0 {%k1} -; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqq %ymm3, %ymm2, %ymm2 +; AVX512F-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v4i64: @@ -98,7 +97,6 @@ ; ; AVX512BW-LABEL: var_funnnel_v4i64: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512BW-NEXT: vpbroadcastq {{.*#+}} ymm3 = [63,63,63,63] ; AVX512BW-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512BW-NEXT: vpsrlvq %ymm2, %ymm1, %ymm3 @@ -106,14 +104,13 @@ ; AVX512BW-NEXT: vpsubq %ymm2, %ymm4, %ymm4 ; AVX512BW-NEXT: vpsllvq %ymm4, %ymm0, %ymm0 ; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512BW-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqq %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v4i64: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512VBMI2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [63,63,63,63] ; AVX512VBMI2-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512VBMI2-NEXT: vpsrlvq %ymm2, %ymm1, %ymm3 @@ -121,9 +118,9 @@ ; AVX512VBMI2-NEXT: vpsubq %ymm2, %ymm4, %ymm4 ; AVX512VBMI2-NEXT: vpsllvq %ymm4, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512VBMI2-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa64 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqq %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v4i64: @@ -253,7 +250,6 @@ ; ; AVX512F-LABEL: var_funnnel_v8i32: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512F-NEXT: vpbroadcastd {{.*#+}} ymm3 = [31,31,31,31,31,31,31,31] ; AVX512F-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512F-NEXT: vpsrlvd %ymm2, %ymm1, %ymm3 @@ -261,9 +257,9 @@ ; AVX512F-NEXT: vpsubd %ymm2, %ymm4, %ymm4 ; AVX512F-NEXT: vpsllvd %ymm4, %ymm0, %ymm0 ; AVX512F-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512F-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1} -; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqd %ymm3, %ymm2, %ymm2 +; AVX512F-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v8i32: @@ -280,7 +276,6 @@ ; ; AVX512BW-LABEL: var_funnnel_v8i32: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm3 = [31,31,31,31,31,31,31,31] ; AVX512BW-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512BW-NEXT: vpsrlvd %ymm2, %ymm1, %ymm3 @@ -288,14 +283,13 @@ ; AVX512BW-NEXT: vpsubd %ymm2, %ymm4, %ymm4 ; AVX512BW-NEXT: vpsllvd %ymm4, %ymm0, %ymm0 ; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512BW-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqd %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v8i32: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512VBMI2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [31,31,31,31,31,31,31,31] ; AVX512VBMI2-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512VBMI2-NEXT: vpsrlvd %ymm2, %ymm1, %ymm3 @@ -303,9 +297,9 @@ ; AVX512VBMI2-NEXT: vpsubd %ymm2, %ymm4, %ymm4 ; AVX512VBMI2-NEXT: vpsllvd %ymm4, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512VBMI2-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqd %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v8i32: @@ -514,9 +508,9 @@ ; AVX512BW-NEXT: vpsubw %ymm2, %ymm4, %ymm4 ; AVX512BW-NEXT: vpsllvw %zmm4, %zmm0, %zmm0 ; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512BW-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu16 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqw %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v16i16: @@ -529,9 +523,9 @@ ; AVX512VBMI2-NEXT: vpsubw %ymm2, %ymm4, %ymm4 ; AVX512VBMI2-NEXT: vpsllvw %zmm4, %zmm0, %zmm0 ; AVX512VBMI2-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512VBMI2-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu16 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqw %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v16i16: @@ -781,7 +775,6 @@ ; ; AVX512BW-LABEL: var_funnnel_v32i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero ; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm4 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero,ymm2[16],zero,ymm2[17],zero,ymm2[18],zero,ymm2[19],zero,ymm2[20],zero,ymm2[21],zero,ymm2[22],zero,ymm2[23],zero,ymm2[24],zero,ymm2[25],zero,ymm2[26],zero,ymm2[27],zero,ymm2[28],zero,ymm2[29],zero,ymm2[30],zero,ymm2[31],zero @@ -793,14 +786,13 @@ ; AVX512BW-NEXT: vpsllvw %zmm4, %zmm0, %zmm0 ; AVX512BW-NEXT: vporq %zmm3, %zmm0, %zmm0 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512BW-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu8 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: var_funnnel_v32i8: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} zmm4 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero,ymm2[16],zero,ymm2[17],zero,ymm2[18],zero,ymm2[19],zero,ymm2[20],zero,ymm2[21],zero,ymm2[22],zero,ymm2[23],zero,ymm2[24],zero,ymm2[25],zero,ymm2[26],zero,ymm2[27],zero,ymm2[28],zero,ymm2[29],zero,ymm2[30],zero,ymm2[31],zero @@ -812,9 +804,9 @@ ; AVX512VBMI2-NEXT: vpsllvw %zmm4, %zmm0, %zmm0 ; AVX512VBMI2-NEXT: vporq %zmm3, %zmm0, %zmm0 ; AVX512VBMI2-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512VBMI2-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu8 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqb %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v32i8: @@ -950,7 +942,6 @@ ; ; AVX512F-LABEL: splatvar_funnnel_v4i64: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512F-NEXT: vpbroadcastq %xmm2, %ymm2 ; AVX512F-NEXT: vpbroadcastq {{.*#+}} ymm3 = [63,63,63,63] ; AVX512F-NEXT: vpand %ymm3, %ymm2, %ymm2 @@ -959,9 +950,9 @@ ; AVX512F-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512F-NEXT: vpsllq %xmm4, %ymm0, %ymm0 ; AVX512F-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512F-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa64 %zmm1, %zmm0 {%k1} -; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqq %ymm3, %ymm2, %ymm2 +; AVX512F-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: splatvar_funnnel_v4i64: @@ -979,7 +970,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v4i64: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512BW-NEXT: vpbroadcastq %xmm2, %ymm2 ; AVX512BW-NEXT: vpbroadcastq {{.*#+}} ymm3 = [63,63,63,63] ; AVX512BW-NEXT: vpand %ymm3, %ymm2, %ymm2 @@ -988,14 +978,13 @@ ; AVX512BW-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512BW-NEXT: vpsllq %xmm4, %ymm0, %ymm0 ; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512BW-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqq %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v4i64: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512VBMI2-NEXT: vpbroadcastq %xmm2, %ymm2 ; AVX512VBMI2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [63,63,63,63] ; AVX512VBMI2-NEXT: vpand %ymm3, %ymm2, %ymm2 @@ -1004,9 +993,9 @@ ; AVX512VBMI2-NEXT: vpsubq %xmm2, %xmm4, %xmm4 ; AVX512VBMI2-NEXT: vpsllq %xmm4, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512VBMI2-NEXT: vptestnmq %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa64 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqq %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vblendvpd %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v4i64: @@ -1121,7 +1110,6 @@ ; ; AVX512F-LABEL: splatvar_funnnel_v8i32: ; AVX512F: # %bb.0: -; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512F-NEXT: vpbroadcastd %xmm2, %ymm2 ; AVX512F-NEXT: vpbroadcastd {{.*#+}} ymm3 = [31,31,31,31,31,31,31,31] ; AVX512F-NEXT: vpand %ymm3, %ymm2, %ymm2 @@ -1132,9 +1120,9 @@ ; AVX512F-NEXT: vpmovzxdq {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero ; AVX512F-NEXT: vpslld %xmm4, %ymm0, %ymm0 ; AVX512F-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512F-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512F-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1} -; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqd %ymm3, %ymm2, %ymm2 +; AVX512F-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: splatvar_funnnel_v8i32: @@ -1154,7 +1142,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v8i32: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512BW-NEXT: vpbroadcastd %xmm2, %ymm2 ; AVX512BW-NEXT: vpbroadcastd {{.*#+}} ymm3 = [31,31,31,31,31,31,31,31] ; AVX512BW-NEXT: vpand %ymm3, %ymm2, %ymm2 @@ -1165,14 +1152,13 @@ ; AVX512BW-NEXT: vpmovzxdq {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero ; AVX512BW-NEXT: vpslld %xmm4, %ymm0, %ymm0 ; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512BW-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqd %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v8i32: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512VBMI2-NEXT: vpbroadcastd %xmm2, %ymm2 ; AVX512VBMI2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [31,31,31,31,31,31,31,31] ; AVX512VBMI2-NEXT: vpand %ymm3, %ymm2, %ymm2 @@ -1183,9 +1169,9 @@ ; AVX512VBMI2-NEXT: vpmovzxdq {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero ; AVX512VBMI2-NEXT: vpslld %xmm4, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512VBMI2-NEXT: vptestnmd %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqa32 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqd %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vblendvps %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v8i32: @@ -1341,7 +1327,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v16i16: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512BW-NEXT: vpbroadcastw %xmm2, %ymm2 ; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 ; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero @@ -1351,14 +1336,13 @@ ; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero ; AVX512BW-NEXT: vpsllw %xmm4, %ymm0, %ymm0 ; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512BW-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu16 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqw %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v16i16: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512VBMI2-NEXT: vpbroadcastw %xmm2, %ymm2 ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 ; AVX512VBMI2-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero @@ -1368,9 +1352,9 @@ ; AVX512VBMI2-NEXT: vpmovzxwq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero ; AVX512VBMI2-NEXT: vpsllw %xmm4, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512VBMI2-NEXT: vptestnmw %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu16 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqw %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v16i16: @@ -1560,7 +1544,6 @@ ; ; AVX512BW-LABEL: splatvar_funnnel_v32i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512BW-NEXT: vpbroadcastb %xmm2, %ymm2 ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero ; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 @@ -1573,14 +1556,13 @@ ; AVX512BW-NEXT: vpsllvw %zmm4, %zmm0, %zmm0 ; AVX512BW-NEXT: vporq %zmm3, %zmm0, %zmm0 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512BW-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512BW-NEXT: vmovdqu8 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: splatvar_funnnel_v32i8: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 ; AVX512VBMI2-NEXT: vpbroadcastb %xmm2, %ymm2 ; AVX512VBMI2-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero ; AVX512VBMI2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 @@ -1593,9 +1575,9 @@ ; AVX512VBMI2-NEXT: vpsllvw %zmm4, %zmm0, %zmm0 ; AVX512VBMI2-NEXT: vporq %zmm3, %zmm0, %zmm0 ; AVX512VBMI2-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512VBMI2-NEXT: vptestnmb %zmm2, %zmm2, %k1 -; AVX512VBMI2-NEXT: vmovdqu8 %zmm1, %zmm0 {%k1} -; AVX512VBMI2-NEXT: # kill: def $ymm0 killed $ymm0 killed $zmm0 +; AVX512VBMI2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VBMI2-NEXT: vpcmpeqb %ymm3, %ymm2, %ymm2 +; AVX512VBMI2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v32i8: @@ -1887,16 +1869,17 @@ define <16 x i16> @constant_funnnel_v16i16(<16 x i16> %x, <16 x i16> %y) nounwind { ; AVX1-LABEL: constant_funnnel_v16i16: ; AVX1: # %bb.0: -; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 +; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [256,128,64,32,16,8,4,2] -; AVX1-NEXT: vpmulhuw %xmm3, %xmm2, %xmm2 +; AVX1-NEXT: vpmullw %xmm3, %xmm2, %xmm2 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = -; AVX1-NEXT: vpmulhuw %xmm4, %xmm1, %xmm5 -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm5, %ymm2 -; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5 -; AVX1-NEXT: vpmullw %xmm3, %xmm5, %xmm3 ; AVX1-NEXT: vpmullw %xmm4, %xmm0, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0 +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 +; AVX1-NEXT: vpmulhuw %xmm3, %xmm2, %xmm2 +; AVX1-NEXT: vpmulhuw %xmm4, %xmm1, %xmm3 +; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm1[0],xmm3[1,2,3,4,5,6,7] +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2 ; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 ; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [0,65535,65535,65535,65535,65535,65535,65535,65535,65535,65535,65535,65535,65535,65535,65535] ; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 @@ -1908,6 +1891,8 @@ ; AVX2: # %bb.0: ; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = ; AVX2-NEXT: vpmulhuw %ymm2, %ymm1, %ymm3 +; AVX2-NEXT: vpblendw {{.*#+}} xmm4 = xmm1[0],xmm3[1,2,3,4,5,6,7] +; AVX2-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7] ; AVX2-NEXT: vpmullw %ymm2, %ymm0, %ymm0 ; AVX2-NEXT: vpor %ymm3, %ymm0, %ymm0 ; AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm0[1,2,3,4,5,6,7] @@ -1918,6 +1903,8 @@ ; AVX512F: # %bb.0: ; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = ; AVX512F-NEXT: vpmulhuw %ymm2, %ymm1, %ymm3 +; AVX512F-NEXT: vpblendw {{.*#+}} xmm4 = xmm1[0],xmm3[1,2,3,4,5,6,7] +; AVX512F-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7] ; AVX512F-NEXT: vpmullw %ymm2, %ymm0, %ymm0 ; AVX512F-NEXT: vpor %ymm3, %ymm0, %ymm0 ; AVX512F-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm0[1,2,3,4,5,6,7] @@ -1928,6 +1915,8 @@ ; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm2 = ; AVX512VL-NEXT: vpmulhuw %ymm2, %ymm1, %ymm3 +; AVX512VL-NEXT: vpblendw {{.*#+}} xmm4 = xmm1[0],xmm3[1,2,3,4,5,6,7] +; AVX512VL-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7] ; AVX512VL-NEXT: vpmullw %ymm2, %ymm0, %ymm0 ; AVX512VL-NEXT: vpor %ymm3, %ymm0, %ymm0 ; AVX512VL-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm0[1,2,3,4,5,6,7] @@ -1993,6 +1982,8 @@ ; XOPAVX2: # %bb.0: ; XOPAVX2-NEXT: vmovdqa {{.*#+}} ymm2 = ; XOPAVX2-NEXT: vpmulhuw %ymm2, %ymm1, %ymm3 +; XOPAVX2-NEXT: vpblendw {{.*#+}} xmm4 = xmm1[0],xmm3[1,2,3,4,5,6,7] +; XOPAVX2-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7] ; XOPAVX2-NEXT: vpmullw %ymm2, %ymm0, %ymm0 ; XOPAVX2-NEXT: vpor %ymm3, %ymm0, %ymm0 ; XOPAVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm0[1,2,3,4,5,6,7] @@ -2054,7 +2045,7 @@ ; AVX2: # %bb.0: ; AVX2-NEXT: vpsllw $4, %ymm0, %ymm2 ; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 -; AVX2-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX2-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX2-NEXT: # ymm3 = mem[0,1,0,1] ; AVX2-NEXT: vpblendvb %ymm3, %ymm2, %ymm0, %ymm0 ; AVX2-NEXT: vpsllw $2, %ymm0, %ymm2 @@ -2073,15 +2064,15 @@ ; AVX2-NEXT: vpsrlw $8, %ymm2, %ymm2 ; AVX2-NEXT: vpackuswb %ymm3, %ymm2, %ymm2 ; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm0 -; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: constant_funnnel_v32i8: ; AVX512F: # %bb.0: ; AVX512F-NEXT: vpsllw $4, %ymm0, %ymm2 ; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 -; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512F-NEXT: # ymm3 = mem[0,1,0,1] ; AVX512F-NEXT: vpblendvb %ymm3, %ymm2, %ymm0, %ymm0 ; AVX512F-NEXT: vpsllw $2, %ymm0, %ymm2 @@ -2100,15 +2091,15 @@ ; AVX512F-NEXT: vpsrlw $8, %ymm2, %ymm2 ; AVX512F-NEXT: vpackuswb %ymm3, %ymm2, %ymm2 ; AVX512F-NEXT: vpor %ymm2, %ymm0, %ymm0 -; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512F-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512F-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: constant_funnnel_v32i8: ; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vpsllw $4, %ymm0, %ymm2 ; AVX512VL-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 -; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512VL-NEXT: # ymm3 = mem[0,1,0,1] ; AVX512VL-NEXT: vpblendvb %ymm3, %ymm2, %ymm0, %ymm0 ; AVX512VL-NEXT: vpsllw $2, %ymm0, %ymm2 @@ -2128,8 +2119,8 @@ ; AVX512VL-NEXT: vpsrlw $8, %ymm3, %ymm3 ; AVX512VL-NEXT: vpackuswb %ymm2, %ymm3, %ymm2 ; AVX512VL-NEXT: vpor %ymm2, %ymm0, %ymm0 -; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512VL-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512VL-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: constant_funnnel_v32i8: @@ -2140,8 +2131,8 @@ ; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 ; AVX512BW-NEXT: vporq %zmm2, %zmm0, %zmm0 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512BW-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512BW-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VBMI2-LABEL: constant_funnnel_v32i8: @@ -2152,8 +2143,8 @@ ; AVX512VBMI2-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 ; AVX512VBMI2-NEXT: vporq %zmm2, %zmm0, %zmm0 ; AVX512VBMI2-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; AVX512VBMI2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 +; AVX512VBMI2-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512VBMI2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; AVX512VBMI2-NEXT: retq ; ; AVX512VLBW-LABEL: constant_funnnel_v32i8: @@ -2185,12 +2176,12 @@ ; XOPAVX1-LABEL: constant_funnnel_v32i8: ; XOPAVX1: # %bb.0: ; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 -; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm3 = +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [0,255,254,253,252,251,250,249,0,249,250,251,252,253,254,255] ; XOPAVX1-NEXT: vpshlb %xmm3, %xmm2, %xmm2 ; XOPAVX1-NEXT: vpshlb %xmm3, %xmm1, %xmm3 ; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2 ; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 -; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm4 = +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [8,7,6,5,4,3,2,1,8,1,2,3,4,5,6,7] ; XOPAVX1-NEXT: vpshlb %xmm4, %xmm3, %xmm3 ; XOPAVX1-NEXT: vpshlb %xmm4, %xmm0, %xmm0 ; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0 @@ -2202,18 +2193,18 @@ ; XOPAVX2-LABEL: constant_funnnel_v32i8: ; XOPAVX2: # %bb.0: ; XOPAVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 -; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm3 = +; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [0,255,254,253,252,251,250,249,0,249,250,251,252,253,254,255] ; XOPAVX2-NEXT: vpshlb %xmm3, %xmm2, %xmm2 ; XOPAVX2-NEXT: vpshlb %xmm3, %xmm1, %xmm3 ; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2 ; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm3 -; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm4 = +; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm4 = [8,7,6,5,4,3,2,1,8,1,2,3,4,5,6,7] ; XOPAVX2-NEXT: vpshlb %xmm4, %xmm3, %xmm3 ; XOPAVX2-NEXT: vpshlb %xmm4, %xmm0, %xmm0 ; XOPAVX2-NEXT: vinserti128 $1, %xmm3, %ymm0, %ymm0 ; XOPAVX2-NEXT: vpor %ymm2, %ymm0, %ymm0 -; XOPAVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] -; XOPAVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; XOPAVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0 ; XOPAVX2-NEXT: retq %res = call <32 x i8> @llvm.fshr.v32i8(<32 x i8> %x, <32 x i8> %y, <32 x i8> ) ret <32 x i8> %res diff --git a/llvm/test/CodeGen/X86/vector-fshr-512.ll b/llvm/test/CodeGen/X86/vector-fshr-512.ll --- a/llvm/test/CodeGen/X86/vector-fshr-512.ll +++ b/llvm/test/CodeGen/X86/vector-fshr-512.ll @@ -1064,11 +1064,15 @@ ; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm3 ; AVX512F-NEXT: vmovdqa {{.*#+}} ymm4 = ; AVX512F-NEXT: vpmulhuw %ymm4, %ymm3, %ymm5 +; AVX512F-NEXT: vpblendw {{.*#+}} xmm6 = xmm3[0],xmm5[1,2,3,4,5,6,7] +; AVX512F-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1,2,3],ymm5[4,5,6,7] ; AVX512F-NEXT: vpmullw %ymm4, %ymm2, %ymm2 ; AVX512F-NEXT: vpor %ymm5, %ymm2, %ymm2 ; AVX512F-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm2[1,2,3,4,5,6,7] ; AVX512F-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7] ; AVX512F-NEXT: vpmulhuw %ymm4, %ymm1, %ymm3 +; AVX512F-NEXT: vpblendw {{.*#+}} xmm5 = xmm1[0],xmm3[1,2,3,4,5,6,7] +; AVX512F-NEXT: vpblendd {{.*#+}} ymm3 = ymm5[0,1,2,3],ymm3[4,5,6,7] ; AVX512F-NEXT: vpmullw %ymm4, %ymm0, %ymm0 ; AVX512F-NEXT: vpor %ymm3, %ymm0, %ymm0 ; AVX512F-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm0[1,2,3,4,5,6,7] @@ -1082,11 +1086,15 @@ ; AVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm3 ; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm4 = ; AVX512VL-NEXT: vpmulhuw %ymm4, %ymm3, %ymm5 +; AVX512VL-NEXT: vpblendw {{.*#+}} xmm6 = xmm3[0],xmm5[1,2,3,4,5,6,7] +; AVX512VL-NEXT: vpblendd {{.*#+}} ymm5 = ymm6[0,1,2,3],ymm5[4,5,6,7] ; AVX512VL-NEXT: vpmullw %ymm4, %ymm2, %ymm2 ; AVX512VL-NEXT: vpor %ymm5, %ymm2, %ymm2 ; AVX512VL-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm2[1,2,3,4,5,6,7] ; AVX512VL-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7] ; AVX512VL-NEXT: vpmulhuw %ymm4, %ymm1, %ymm3 +; AVX512VL-NEXT: vpblendw {{.*#+}} xmm5 = xmm1[0],xmm3[1,2,3,4,5,6,7] +; AVX512VL-NEXT: vpblendd {{.*#+}} ymm3 = ymm5[0,1,2,3],ymm3[4,5,6,7] ; AVX512VL-NEXT: vpmullw %ymm4, %ymm0, %ymm0 ; AVX512VL-NEXT: vpor %ymm3, %ymm0, %ymm0 ; AVX512VL-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm0[1,2,3,4,5,6,7] @@ -1137,7 +1145,7 @@ ; AVX512F-NEXT: vpsllw $4, %ymm3, %ymm4 ; AVX512F-NEXT: vmovdqa {{.*#+}} ymm5 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240] ; AVX512F-NEXT: vpand %ymm5, %ymm4, %ymm4 -; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm6 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm6 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512F-NEXT: # ymm6 = mem[0,1,0,1] ; AVX512F-NEXT: vpblendvb %ymm6, %ymm4, %ymm3, %ymm3 ; AVX512F-NEXT: vpsllw $2, %ymm3, %ymm4 @@ -1161,8 +1169,8 @@ ; AVX512F-NEXT: vpsrlw $8, %ymm12, %ymm12 ; AVX512F-NEXT: vpackuswb %ymm10, %ymm12, %ymm10 ; AVX512F-NEXT: vpor %ymm3, %ymm10, %ymm3 -; AVX512F-NEXT: vpbroadcastq {{.*#+}} ymm10 = [18446744073709551360,18446744073709551360,18446744073709551360,18446744073709551360] -; AVX512F-NEXT: vpblendvb %ymm10, %ymm3, %ymm2, %ymm2 +; AVX512F-NEXT: vpbroadcastq {{.*#+}} ymm10 = [255,255,255,255] +; AVX512F-NEXT: vpblendvb %ymm10, %ymm2, %ymm3, %ymm2 ; AVX512F-NEXT: vpsllw $4, %ymm0, %ymm3 ; AVX512F-NEXT: vpand %ymm5, %ymm3, %ymm3 ; AVX512F-NEXT: vpblendvb %ymm6, %ymm3, %ymm0, %ymm0 @@ -1179,7 +1187,7 @@ ; AVX512F-NEXT: vpsrlw $8, %ymm4, %ymm4 ; AVX512F-NEXT: vpackuswb %ymm3, %ymm4, %ymm3 ; AVX512F-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512F-NEXT: vpblendvb %ymm10, %ymm0, %ymm1, %ymm0 +; AVX512F-NEXT: vpblendvb %ymm10, %ymm1, %ymm0, %ymm0 ; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0 ; AVX512F-NEXT: retq ; @@ -1190,7 +1198,7 @@ ; AVX512VL-NEXT: vpsllw $4, %ymm3, %ymm4 ; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm5 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240] ; AVX512VL-NEXT: vpand %ymm5, %ymm4, %ymm4 -; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm6 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm6 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512VL-NEXT: # ymm6 = mem[0,1,0,1] ; AVX512VL-NEXT: vpblendvb %ymm6, %ymm4, %ymm3, %ymm3 ; AVX512VL-NEXT: vpsllw $2, %ymm3, %ymm4 @@ -1215,8 +1223,8 @@ ; AVX512VL-NEXT: vpsrlw $8, %ymm11, %ymm11 ; AVX512VL-NEXT: vpackuswb %ymm4, %ymm11, %ymm4 ; AVX512VL-NEXT: vpor %ymm4, %ymm3, %ymm3 -; AVX512VL-NEXT: vpbroadcastq {{.*#+}} ymm4 = [18446744073709551360,18446744073709551360,18446744073709551360,18446744073709551360] -; AVX512VL-NEXT: vpblendvb %ymm4, %ymm3, %ymm2, %ymm2 +; AVX512VL-NEXT: vpbroadcastq {{.*#+}} ymm4 = [255,255,255,255] +; AVX512VL-NEXT: vpblendvb %ymm4, %ymm2, %ymm3, %ymm2 ; AVX512VL-NEXT: vpsllw $4, %ymm0, %ymm3 ; AVX512VL-NEXT: vpand %ymm5, %ymm3, %ymm3 ; AVX512VL-NEXT: vpblendvb %ymm6, %ymm3, %ymm0, %ymm0 @@ -1235,13 +1243,13 @@ ; AVX512VL-NEXT: vpsrlw $8, %ymm5, %ymm5 ; AVX512VL-NEXT: vpackuswb %ymm3, %ymm5, %ymm3 ; AVX512VL-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512VL-NEXT: vpblendvb %ymm4, %ymm0, %ymm1, %ymm0 +; AVX512VL-NEXT: vpblendvb %ymm4, %ymm1, %ymm0, %ymm0 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: constant_funnnel_v64i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm2 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm2 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512BW-NEXT: # zmm2 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3] ; AVX512BW-NEXT: vpmovb2m %zmm2, %k1 ; AVX512BW-NEXT: vpsllw $4, %zmm0, %zmm3 @@ -1257,11 +1265,11 @@ ; AVX512BW-NEXT: vpaddb %zmm0, %zmm0, %zmm0 {%k1} ; AVX512BW-NEXT: vpunpckhbw {{.*#+}} zmm2 = zmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31,40,40,41,41,42,42,43,43,44,44,45,45,46,46,47,47,56,56,57,57,58,58,59,59,60,60,61,61,62,62,63,63] ; AVX512BW-NEXT: vpsrlw $8, %zmm2, %zmm2 -; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm2, %zmm2 +; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %zmm2, %zmm2 ; AVX512BW-NEXT: vpsrlw $8, %zmm2, %zmm2 ; AVX512BW-NEXT: vpunpcklbw {{.*#+}} zmm3 = zmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] ; AVX512BW-NEXT: vpsrlw $8, %zmm3, %zmm3 -; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm3, %zmm3 +; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %zmm3, %zmm3 ; AVX512BW-NEXT: vpsrlw $8, %zmm3, %zmm3 ; AVX512BW-NEXT: vpackuswb %zmm2, %zmm3, %zmm2 ; AVX512BW-NEXT: vporq %zmm2, %zmm0, %zmm0 @@ -1272,7 +1280,7 @@ ; ; AVX512VBMI2-LABEL: constant_funnnel_v64i8: ; AVX512VBMI2: # %bb.0: -; AVX512VBMI2-NEXT: vbroadcasti32x4 {{.*#+}} zmm2 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512VBMI2-NEXT: vbroadcasti32x4 {{.*#+}} zmm2 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512VBMI2-NEXT: # zmm2 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3] ; AVX512VBMI2-NEXT: vpmovb2m %zmm2, %k1 ; AVX512VBMI2-NEXT: vpsllw $4, %zmm0, %zmm3 @@ -1288,11 +1296,11 @@ ; AVX512VBMI2-NEXT: vpaddb %zmm0, %zmm0, %zmm0 {%k1} ; AVX512VBMI2-NEXT: vpunpckhbw {{.*#+}} zmm2 = zmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31,40,40,41,41,42,42,43,43,44,44,45,45,46,46,47,47,56,56,57,57,58,58,59,59,60,60,61,61,62,62,63,63] ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm2, %zmm2 -; AVX512VBMI2-NEXT: vpsllvw {{.*}}(%rip), %zmm2, %zmm2 +; AVX512VBMI2-NEXT: vpmullw {{.*}}(%rip), %zmm2, %zmm2 ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm2, %zmm2 ; AVX512VBMI2-NEXT: vpunpcklbw {{.*#+}} zmm3 = zmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm3, %zmm3 -; AVX512VBMI2-NEXT: vpsllvw {{.*}}(%rip), %zmm3, %zmm3 +; AVX512VBMI2-NEXT: vpmullw {{.*}}(%rip), %zmm3, %zmm3 ; AVX512VBMI2-NEXT: vpsrlw $8, %zmm3, %zmm3 ; AVX512VBMI2-NEXT: vpackuswb %zmm2, %zmm3, %zmm2 ; AVX512VBMI2-NEXT: vporq %zmm2, %zmm0, %zmm0 @@ -1303,7 +1311,7 @@ ; ; AVX512VLBW-LABEL: constant_funnnel_v64i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vbroadcasti32x4 {{.*#+}} zmm2 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512VLBW-NEXT: vbroadcasti32x4 {{.*#+}} zmm2 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512VLBW-NEXT: # zmm2 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3] ; AVX512VLBW-NEXT: vpmovb2m %zmm2, %k1 ; AVX512VLBW-NEXT: vpsllw $4, %zmm0, %zmm3 @@ -1319,11 +1327,11 @@ ; AVX512VLBW-NEXT: vpaddb %zmm0, %zmm0, %zmm0 {%k1} ; AVX512VLBW-NEXT: vpunpckhbw {{.*#+}} zmm2 = zmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31,40,40,41,41,42,42,43,43,44,44,45,45,46,46,47,47,56,56,57,57,58,58,59,59,60,60,61,61,62,62,63,63] ; AVX512VLBW-NEXT: vpsrlw $8, %zmm2, %zmm2 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm2, %zmm2 +; AVX512VLBW-NEXT: vpmullw {{.*}}(%rip), %zmm2, %zmm2 ; AVX512VLBW-NEXT: vpsrlw $8, %zmm2, %zmm2 ; AVX512VLBW-NEXT: vpunpcklbw {{.*#+}} zmm3 = zmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] ; AVX512VLBW-NEXT: vpsrlw $8, %zmm3, %zmm3 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm3, %zmm3 +; AVX512VLBW-NEXT: vpmullw {{.*}}(%rip), %zmm3, %zmm3 ; AVX512VLBW-NEXT: vpsrlw $8, %zmm3, %zmm3 ; AVX512VLBW-NEXT: vpackuswb %zmm2, %zmm3, %zmm2 ; AVX512VLBW-NEXT: vporq %zmm2, %zmm0, %zmm0 @@ -1334,7 +1342,7 @@ ; ; AVX512VLVBMI2-LABEL: constant_funnnel_v64i8: ; AVX512VLVBMI2: # %bb.0: -; AVX512VLVBMI2-NEXT: vbroadcasti32x4 {{.*#+}} zmm2 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512VLVBMI2-NEXT: vbroadcasti32x4 {{.*#+}} zmm2 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512VLVBMI2-NEXT: # zmm2 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3] ; AVX512VLVBMI2-NEXT: vpmovb2m %zmm2, %k1 ; AVX512VLVBMI2-NEXT: vpsllw $4, %zmm0, %zmm3 @@ -1350,11 +1358,11 @@ ; AVX512VLVBMI2-NEXT: vpaddb %zmm0, %zmm0, %zmm0 {%k1} ; AVX512VLVBMI2-NEXT: vpunpckhbw {{.*#+}} zmm2 = zmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31,40,40,41,41,42,42,43,43,44,44,45,45,46,46,47,47,56,56,57,57,58,58,59,59,60,60,61,61,62,62,63,63] ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm2, %zmm2 -; AVX512VLVBMI2-NEXT: vpsllvw {{.*}}(%rip), %zmm2, %zmm2 +; AVX512VLVBMI2-NEXT: vpmullw {{.*}}(%rip), %zmm2, %zmm2 ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm2, %zmm2 ; AVX512VLVBMI2-NEXT: vpunpcklbw {{.*#+}} zmm3 = zmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm3, %zmm3 -; AVX512VLVBMI2-NEXT: vpsllvw {{.*}}(%rip), %zmm3, %zmm3 +; AVX512VLVBMI2-NEXT: vpmullw {{.*}}(%rip), %zmm3, %zmm3 ; AVX512VLVBMI2-NEXT: vpsrlw $8, %zmm3, %zmm3 ; AVX512VLVBMI2-NEXT: vpackuswb %zmm2, %zmm3, %zmm2 ; AVX512VLVBMI2-NEXT: vporq %zmm2, %zmm0, %zmm0 diff --git a/llvm/test/CodeGen/X86/vector-fshr-rot-128.ll b/llvm/test/CodeGen/X86/vector-fshr-rot-128.ll --- a/llvm/test/CodeGen/X86/vector-fshr-rot-128.ll +++ b/llvm/test/CodeGen/X86/vector-fshr-rot-128.ll @@ -25,74 +25,85 @@ define <2 x i64> @var_funnnel_v2i64(<2 x i64> %x, <2 x i64> %amt) nounwind { ; SSE2-LABEL: var_funnnel_v2i64: ; SSE2: # %bb.0: -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [63,63] -; SSE2-NEXT: pxor %xmm3, %xmm3 -; SSE2-NEXT: psubq %xmm1, %xmm3 -; SSE2-NEXT: pand %xmm2, %xmm1 +; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE2-NEXT: movdqa %xmm0, %xmm2 +; SSE2-NEXT: psrlq %xmm1, %xmm2 +; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] ; SSE2-NEXT: movdqa %xmm0, %xmm4 -; SSE2-NEXT: psrlq %xmm1, %xmm4 -; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] +; SSE2-NEXT: psrlq %xmm3, %xmm4 +; SSE2-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1] +; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [64,64] +; SSE2-NEXT: psubq %xmm1, %xmm2 +; SSE2-NEXT: movdqa %xmm0, %xmm3 +; SSE2-NEXT: psllq %xmm2, %xmm3 +; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] ; SSE2-NEXT: movdqa %xmm0, %xmm5 -; SSE2-NEXT: psrlq %xmm1, %xmm5 -; SSE2-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1] -; SSE2-NEXT: pand %xmm2, %xmm3 -; SSE2-NEXT: movdqa %xmm0, %xmm1 -; SSE2-NEXT: psllq %xmm3, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1] -; SSE2-NEXT: psllq %xmm2, %xmm0 -; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] -; SSE2-NEXT: orpd %xmm5, %xmm0 +; SSE2-NEXT: psllq %xmm2, %xmm5 +; SSE2-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1] +; SSE2-NEXT: orpd %xmm4, %xmm5 +; SSE2-NEXT: pxor %xmm2, %xmm2 +; SSE2-NEXT: pcmpeqd %xmm1, %xmm2 +; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,0,3,2] +; SSE2-NEXT: pand %xmm2, %xmm1 +; SSE2-NEXT: pand %xmm1, %xmm0 +; SSE2-NEXT: pandn %xmm5, %xmm1 +; SSE2-NEXT: por %xmm1, %xmm0 ; SSE2-NEXT: retq ; ; SSE41-LABEL: var_funnnel_v2i64: ; SSE41: # %bb.0: -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [63,63] -; SSE41-NEXT: pxor %xmm3, %xmm3 -; SSE41-NEXT: psubq %xmm1, %xmm3 -; SSE41-NEXT: pand %xmm2, %xmm1 -; SSE41-NEXT: movdqa %xmm0, %xmm4 -; SSE41-NEXT: psrlq %xmm1, %xmm4 -; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] -; SSE41-NEXT: movdqa %xmm0, %xmm5 -; SSE41-NEXT: psrlq %xmm1, %xmm5 -; SSE41-NEXT: pblendw {{.*#+}} xmm5 = xmm4[0,1,2,3],xmm5[4,5,6,7] -; SSE41-NEXT: pand %xmm2, %xmm3 -; SSE41-NEXT: movdqa %xmm0, %xmm1 -; SSE41-NEXT: psllq %xmm3, %xmm1 -; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1] -; SSE41-NEXT: psllq %xmm2, %xmm0 -; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] -; SSE41-NEXT: por %xmm5, %xmm0 +; SSE41-NEXT: movdqa %xmm0, %xmm2 +; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE41-NEXT: psrlq %xmm1, %xmm0 +; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] +; SSE41-NEXT: movdqa %xmm2, %xmm4 +; SSE41-NEXT: psrlq %xmm3, %xmm4 +; SSE41-NEXT: pblendw {{.*#+}} xmm4 = xmm0[0,1,2,3],xmm4[4,5,6,7] +; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [64,64] +; SSE41-NEXT: psubq %xmm1, %xmm0 +; SSE41-NEXT: movdqa %xmm2, %xmm5 +; SSE41-NEXT: psllq %xmm0, %xmm5 +; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] +; SSE41-NEXT: movdqa %xmm2, %xmm3 +; SSE41-NEXT: psllq %xmm0, %xmm3 +; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm5[0,1,2,3],xmm3[4,5,6,7] +; SSE41-NEXT: por %xmm4, %xmm3 +; SSE41-NEXT: pxor %xmm0, %xmm0 +; SSE41-NEXT: pcmpeqq %xmm1, %xmm0 +; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm3 +; SSE41-NEXT: movapd %xmm3, %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: var_funnnel_v2i64: ; AVX1: # %bb.0: -; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63] -; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm4 -; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] +; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm2 +; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] ; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm3 +; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm3[4,5,6,7] +; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; AVX1-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; AVX1-NEXT: vpsllq %xmm3, %xmm0, %xmm4 +; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] +; AVX1-NEXT: vpsllq %xmm3, %xmm0, %xmm3 ; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0,1,2,3],xmm3[4,5,6,7] -; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX1-NEXT: vpsubq %xmm1, %xmm4, %xmm1 -; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm2 -; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] -; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7] -; AVX1-NEXT: vpor %xmm3, %xmm0, %xmm0 +; AVX1-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqq %xmm3, %xmm1, %xmm1 +; AVX1-NEXT: vblendvpd %xmm1, %xmm0, %xmm2, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: var_funnnel_v2i64: ; AVX2: # %bb.0: -; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63] -; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX2-NEXT: vpsrlvq %xmm3, %xmm0, %xmm3 -; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX2-NEXT: vpsubq %xmm1, %xmm4, %xmm1 -; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: vpor %xmm3, %xmm0, %xmm0 +; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX2-NEXT: vpsrlvq %xmm1, %xmm0, %xmm2 +; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; AVX2-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; AVX2-NEXT: vpsllvq %xmm3, %xmm0, %xmm3 +; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqq %xmm3, %xmm1, %xmm1 +; AVX2-NEXT: vblendvpd %xmm1, %xmm0, %xmm2, %xmm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: var_funnnel_v2i64: @@ -123,32 +134,58 @@ ; AVX512VLBW-NEXT: vprorvq %xmm1, %xmm0, %xmm0 ; AVX512VLBW-NEXT: retq ; -; XOP-LABEL: var_funnnel_v2i64: -; XOP: # %bb.0: -; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOP-NEXT: vpsubq %xmm1, %xmm2, %xmm1 -; XOP-NEXT: vprotq %xmm1, %xmm0, %xmm0 -; XOP-NEXT: retq +; XOPAVX1-LABEL: var_funnnel_v2i64: +; XOPAVX1: # %bb.0: +; XOPAVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 +; XOPAVX1-NEXT: vpsubq %xmm1, %xmm2, %xmm3 +; XOPAVX1-NEXT: vpshlq %xmm3, %xmm0, %xmm3 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [64,64] +; XOPAVX1-NEXT: vpsubq %xmm1, %xmm4, %xmm4 +; XOPAVX1-NEXT: vpshlq %xmm4, %xmm0, %xmm4 +; XOPAVX1-NEXT: vpor %xmm3, %xmm4, %xmm3 +; XOPAVX1-NEXT: vpcomeqq %xmm2, %xmm1, %xmm1 +; XOPAVX1-NEXT: vblendvpd %xmm1, %xmm0, %xmm3, %xmm0 +; XOPAVX1-NEXT: retq +; +; XOPAVX2-LABEL: var_funnnel_v2i64: +; XOPAVX2: # %bb.0: +; XOPAVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; XOPAVX2-NEXT: vpsrlvq %xmm1, %xmm0, %xmm2 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; XOPAVX2-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpsllvq %xmm3, %xmm0, %xmm3 +; XOPAVX2-NEXT: vpor %xmm2, %xmm3, %xmm2 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpcomeqq %xmm3, %xmm1, %xmm1 +; XOPAVX2-NEXT: vblendvpd %xmm1, %xmm0, %xmm2, %xmm0 +; XOPAVX2-NEXT: retq ; ; X32-SSE-LABEL: var_funnnel_v2i64: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [63,0,63,0] -; X32-SSE-NEXT: pxor %xmm3, %xmm3 -; X32-SSE-NEXT: psubq %xmm1, %xmm3 -; X32-SSE-NEXT: pand %xmm2, %xmm1 +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 +; X32-SSE-NEXT: movdqa %xmm0, %xmm2 +; X32-SSE-NEXT: psrlq %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] ; X32-SSE-NEXT: movdqa %xmm0, %xmm4 -; X32-SSE-NEXT: psrlq %xmm1, %xmm4 -; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] +; X32-SSE-NEXT: psrlq %xmm3, %xmm4 +; X32-SSE-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1] +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [64,0,64,0] +; X32-SSE-NEXT: psubq %xmm1, %xmm2 +; X32-SSE-NEXT: movdqa %xmm0, %xmm3 +; X32-SSE-NEXT: psllq %xmm2, %xmm3 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] ; X32-SSE-NEXT: movdqa %xmm0, %xmm5 -; X32-SSE-NEXT: psrlq %xmm1, %xmm5 -; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1] -; X32-SSE-NEXT: pand %xmm2, %xmm3 -; X32-SSE-NEXT: movdqa %xmm0, %xmm1 -; X32-SSE-NEXT: psllq %xmm3, %xmm1 -; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1] -; X32-SSE-NEXT: psllq %xmm2, %xmm0 -; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] -; X32-SSE-NEXT: orpd %xmm5, %xmm0 +; X32-SSE-NEXT: psllq %xmm2, %xmm5 +; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1] +; X32-SSE-NEXT: orpd %xmm4, %xmm5 +; X32-SSE-NEXT: pxor %xmm2, %xmm2 +; X32-SSE-NEXT: pcmpeqd %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,0,3,2] +; X32-SSE-NEXT: pand %xmm2, %xmm1 +; X32-SSE-NEXT: pand %xmm1, %xmm0 +; X32-SSE-NEXT: pandn %xmm5, %xmm1 +; X32-SSE-NEXT: por %xmm1, %xmm0 ; X32-SSE-NEXT: retl %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> %amt) ret <2 x i64> %res @@ -157,74 +194,115 @@ define <4 x i32> @var_funnnel_v4i32(<4 x i32> %x, <4 x i32> %amt) nounwind { ; SSE2-LABEL: var_funnnel_v4i32: ; SSE2: # %bb.0: +; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7] +; SSE2-NEXT: movdqa %xmm0, %xmm3 +; SSE2-NEXT: psrld %xmm2, %xmm3 +; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm1[0,1,1,1,4,5,6,7] +; SSE2-NEXT: movdqa %xmm0, %xmm2 +; SSE2-NEXT: psrld %xmm4, %xmm2 +; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0] +; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] +; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[2,3,3,3,4,5,6,7] +; SSE2-NEXT: movdqa %xmm0, %xmm5 +; SSE2-NEXT: psrld %xmm4, %xmm5 +; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,1,1,4,5,6,7] +; SSE2-NEXT: movdqa %xmm0, %xmm4 +; SSE2-NEXT: psrld %xmm3, %xmm4 +; SSE2-NEXT: punpckhqdq {{.*#+}} xmm4 = xmm4[1],xmm5[1] +; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,3],xmm4[0,3] +; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [32,32,32,32] +; SSE2-NEXT: psubd %xmm1, %xmm3 +; SSE2-NEXT: pslld $23, %xmm3 +; SSE2-NEXT: paddd {{.*}}(%rip), %xmm3 +; SSE2-NEXT: cvttps2dq %xmm3, %xmm3 +; SSE2-NEXT: movdqa %xmm0, %xmm4 +; SSE2-NEXT: pmuludq %xmm3, %xmm4 +; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] +; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] +; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3] +; SSE2-NEXT: pmuludq %xmm3, %xmm5 +; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm5[0,2,2,3] +; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1] +; SSE2-NEXT: por %xmm2, %xmm4 ; SSE2-NEXT: pxor %xmm2, %xmm2 -; SSE2-NEXT: psubd %xmm1, %xmm2 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm2 -; SSE2-NEXT: pslld $23, %xmm2 -; SSE2-NEXT: paddd {{.*}}(%rip), %xmm2 -; SSE2-NEXT: cvttps2dq %xmm2, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] -; SSE2-NEXT: pmuludq %xmm1, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3] -; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; SSE2-NEXT: pmuludq %xmm2, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3] -; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1] -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] -; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] -; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; SSE2-NEXT: por %xmm3, %xmm0 +; SSE2-NEXT: pcmpeqd %xmm1, %xmm2 +; SSE2-NEXT: pand %xmm2, %xmm0 +; SSE2-NEXT: pandn %xmm4, %xmm2 +; SSE2-NEXT: por %xmm2, %xmm0 ; SSE2-NEXT: retq ; ; SSE41-LABEL: var_funnnel_v4i32: ; SSE41: # %bb.0: -; SSE41-NEXT: pxor %xmm2, %xmm2 -; SSE41-NEXT: psubd %xmm1, %xmm2 -; SSE41-NEXT: pand {{.*}}(%rip), %xmm2 -; SSE41-NEXT: pslld $23, %xmm2 -; SSE41-NEXT: paddd {{.*}}(%rip), %xmm2 -; SSE41-NEXT: cvttps2dq %xmm2, %xmm1 -; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3] -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] -; SSE41-NEXT: pmuludq %xmm2, %xmm3 -; SSE41-NEXT: pmuludq %xmm1, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] -; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7] -; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,0,2,2] -; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7] -; SSE41-NEXT: por %xmm1, %xmm0 +; SSE41-NEXT: movdqa %xmm0, %xmm2 +; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE41-NEXT: pshuflw {{.*#+}} xmm0 = xmm1[2,3,3,3,4,5,6,7] +; SSE41-NEXT: movdqa %xmm2, %xmm3 +; SSE41-NEXT: psrld %xmm0, %xmm3 +; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] +; SSE41-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[2,3,3,3,4,5,6,7] +; SSE41-NEXT: movdqa %xmm2, %xmm5 +; SSE41-NEXT: psrld %xmm4, %xmm5 +; SSE41-NEXT: pblendw {{.*#+}} xmm5 = xmm3[0,1,2,3],xmm5[4,5,6,7] +; SSE41-NEXT: pshuflw {{.*#+}} xmm3 = xmm1[0,1,1,1,4,5,6,7] +; SSE41-NEXT: movdqa %xmm2, %xmm4 +; SSE41-NEXT: psrld %xmm3, %xmm4 +; SSE41-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,1,1,4,5,6,7] +; SSE41-NEXT: movdqa %xmm2, %xmm3 +; SSE41-NEXT: psrld %xmm0, %xmm3 +; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm4[0,1,2,3],xmm3[4,5,6,7] +; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0,1],xmm5[2,3],xmm3[4,5],xmm5[6,7] +; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [32,32,32,32] +; SSE41-NEXT: psubd %xmm1, %xmm0 +; SSE41-NEXT: pslld $23, %xmm0 +; SSE41-NEXT: paddd {{.*}}(%rip), %xmm0 +; SSE41-NEXT: cvttps2dq %xmm0, %xmm0 +; SSE41-NEXT: pmulld %xmm2, %xmm0 +; SSE41-NEXT: por %xmm0, %xmm3 +; SSE41-NEXT: pxor %xmm0, %xmm0 +; SSE41-NEXT: pcmpeqd %xmm1, %xmm0 +; SSE41-NEXT: blendvps %xmm0, %xmm2, %xmm3 +; SSE41-NEXT: movaps %xmm3, %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: var_funnnel_v4i32: ; AVX1: # %bb.0: -; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 -; AVX1-NEXT: vpslld $23, %xmm1, %xmm1 -; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm1, %xmm1 -; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1 -; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3] -; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] -; AVX1-NEXT: vpmuludq %xmm2, %xmm3, %xmm2 -; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] -; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7] -; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,2,2] -; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7] -; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0 +; AVX1-NEXT: vpsrldq {{.*#+}} xmm2 = xmm1[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero +; AVX1-NEXT: vpsrld %xmm2, %xmm0, %xmm2 +; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm3 +; AVX1-NEXT: vpsrld %xmm3, %xmm0, %xmm3 +; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7] +; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm4 = xmm1[2],xmm3[2],xmm1[3],xmm3[3] +; AVX1-NEXT: vpsrld %xmm4, %xmm0, %xmm4 +; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm5 = xmm1[0],zero,xmm1[1],zero +; AVX1-NEXT: vpsrld %xmm5, %xmm0, %xmm5 +; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm5[0,1,2,3],xmm4[4,5,6,7] +; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0,1],xmm2[2,3],xmm4[4,5],xmm2[6,7] +; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [32,32,32,32] +; AVX1-NEXT: vpsubd %xmm1, %xmm4, %xmm4 +; AVX1-NEXT: vpslld $23, %xmm4, %xmm4 +; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm4, %xmm4 +; AVX1-NEXT: vcvttps2dq %xmm4, %xmm4 +; AVX1-NEXT: vpmulld %xmm4, %xmm0, %xmm4 +; AVX1-NEXT: vpor %xmm2, %xmm4, %xmm2 +; AVX1-NEXT: vpcmpeqd %xmm3, %xmm1, %xmm1 +; AVX1-NEXT: vblendvps %xmm1, %xmm0, %xmm2, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: var_funnnel_v4i32: ; AVX2: # %bb.0: -; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX2-NEXT: vpsubd %xmm1, %xmm2, %xmm1 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [31,31,31,31] ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm2 +; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm2 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [32,32,32,32] -; AVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm1 -; AVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0 +; AVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm3 +; AVX2-NEXT: vpsllvd %xmm3, %xmm0, %xmm3 +; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqd %xmm3, %xmm1, %xmm1 +; AVX2-NEXT: vblendvps %xmm1, %xmm0, %xmm2, %xmm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: var_funnnel_v4i32: @@ -255,32 +333,72 @@ ; AVX512VLBW-NEXT: vprorvd %xmm1, %xmm0, %xmm0 ; AVX512VLBW-NEXT: retq ; -; XOP-LABEL: var_funnnel_v4i32: -; XOP: # %bb.0: -; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOP-NEXT: vpsubd %xmm1, %xmm2, %xmm1 -; XOP-NEXT: vprotd %xmm1, %xmm0, %xmm0 -; XOP-NEXT: retq +; XOPAVX1-LABEL: var_funnnel_v4i32: +; XOPAVX1: # %bb.0: +; XOPAVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 +; XOPAVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm3 +; XOPAVX1-NEXT: vpshld %xmm3, %xmm0, %xmm3 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [32,32,32,32] +; XOPAVX1-NEXT: vpsubd %xmm1, %xmm4, %xmm4 +; XOPAVX1-NEXT: vpshld %xmm4, %xmm0, %xmm4 +; XOPAVX1-NEXT: vpor %xmm3, %xmm4, %xmm3 +; XOPAVX1-NEXT: vpcomeqd %xmm2, %xmm1, %xmm1 +; XOPAVX1-NEXT: vblendvps %xmm1, %xmm0, %xmm3, %xmm0 +; XOPAVX1-NEXT: retq +; +; XOPAVX2-LABEL: var_funnnel_v4i32: +; XOPAVX2: # %bb.0: +; XOPAVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [31,31,31,31] +; XOPAVX2-NEXT: vpand %xmm2, %xmm1, %xmm1 +; XOPAVX2-NEXT: vpsrlvd %xmm1, %xmm0, %xmm2 +; XOPAVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [32,32,32,32] +; XOPAVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpsllvd %xmm3, %xmm0, %xmm3 +; XOPAVX2-NEXT: vpor %xmm2, %xmm3, %xmm2 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpcomeqd %xmm3, %xmm1, %xmm1 +; XOPAVX2-NEXT: vblendvps %xmm1, %xmm0, %xmm2, %xmm0 +; XOPAVX2-NEXT: retq ; ; X32-SSE-LABEL: var_funnnel_v4i32: ; X32-SSE: # %bb.0: +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 +; X32-SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm1[2,3,3,3,4,5,6,7] +; X32-SSE-NEXT: movdqa %xmm0, %xmm3 +; X32-SSE-NEXT: psrld %xmm2, %xmm3 +; X32-SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm1[0,1,1,1,4,5,6,7] +; X32-SSE-NEXT: movdqa %xmm0, %xmm2 +; X32-SSE-NEXT: psrld %xmm4, %xmm2 +; X32-SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0] +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] +; X32-SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm3[2,3,3,3,4,5,6,7] +; X32-SSE-NEXT: movdqa %xmm0, %xmm5 +; X32-SSE-NEXT: psrld %xmm4, %xmm5 +; X32-SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,1,1,4,5,6,7] +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: psrld %xmm3, %xmm4 +; X32-SSE-NEXT: punpckhqdq {{.*#+}} xmm4 = xmm4[1],xmm5[1] +; X32-SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,3],xmm4[0,3] +; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [32,32,32,32] +; X32-SSE-NEXT: psubd %xmm1, %xmm3 +; X32-SSE-NEXT: pslld $23, %xmm3 +; X32-SSE-NEXT: paddd {{\.LCPI.*}}, %xmm3 +; X32-SSE-NEXT: cvttps2dq %xmm3, %xmm3 +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: pmuludq %xmm3, %xmm4 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] +; X32-SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3] +; X32-SSE-NEXT: pmuludq %xmm3, %xmm5 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm5[0,2,2,3] +; X32-SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1] +; X32-SSE-NEXT: por %xmm2, %xmm4 ; X32-SSE-NEXT: pxor %xmm2, %xmm2 -; X32-SSE-NEXT: psubd %xmm1, %xmm2 -; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2 -; X32-SSE-NEXT: pslld $23, %xmm2 -; X32-SSE-NEXT: paddd {{\.LCPI.*}}, %xmm2 -; X32-SSE-NEXT: cvttps2dq %xmm2, %xmm1 -; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] -; X32-SSE-NEXT: pmuludq %xmm1, %xmm0 -; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3] -; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; X32-SSE-NEXT: pmuludq %xmm2, %xmm1 -; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3] -; X32-SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1] -; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] -; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] -; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; X32-SSE-NEXT: por %xmm3, %xmm0 +; X32-SSE-NEXT: pcmpeqd %xmm1, %xmm2 +; X32-SSE-NEXT: pand %xmm2, %xmm0 +; X32-SSE-NEXT: pandn %xmm4, %xmm2 +; X32-SSE-NEXT: por %xmm2, %xmm0 ; X32-SSE-NEXT: retl %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> %amt) ret <4 x i32> %res @@ -289,187 +407,310 @@ define <8 x i16> @var_funnnel_v8i16(<8 x i16> %x, <8 x i16> %amt) nounwind { ; SSE2-LABEL: var_funnnel_v8i16: ; SSE2: # %bb.0: -; SSE2-NEXT: pxor %xmm2, %xmm2 +; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [16,16,16,16,16,16,16,16] ; SSE2-NEXT: psubw %xmm1, %xmm2 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm2 +; SSE2-NEXT: pxor %xmm3, %xmm3 +; SSE2-NEXT: pcmpeqw %xmm1, %xmm3 +; SSE2-NEXT: psllw $12, %xmm1 +; SSE2-NEXT: movdqa %xmm1, %xmm4 +; SSE2-NEXT: psraw $15, %xmm4 +; SSE2-NEXT: movdqa %xmm0, %xmm5 +; SSE2-NEXT: psrlw $8, %xmm5 +; SSE2-NEXT: pand %xmm4, %xmm5 +; SSE2-NEXT: pandn %xmm0, %xmm4 +; SSE2-NEXT: por %xmm5, %xmm4 +; SSE2-NEXT: paddw %xmm1, %xmm1 +; SSE2-NEXT: movdqa %xmm1, %xmm5 +; SSE2-NEXT: psraw $15, %xmm5 +; SSE2-NEXT: movdqa %xmm5, %xmm6 +; SSE2-NEXT: pandn %xmm4, %xmm6 +; SSE2-NEXT: psrlw $4, %xmm4 +; SSE2-NEXT: pand %xmm5, %xmm4 +; SSE2-NEXT: por %xmm6, %xmm4 +; SSE2-NEXT: paddw %xmm1, %xmm1 +; SSE2-NEXT: movdqa %xmm1, %xmm5 +; SSE2-NEXT: psraw $15, %xmm5 +; SSE2-NEXT: movdqa %xmm5, %xmm6 +; SSE2-NEXT: pandn %xmm4, %xmm6 +; SSE2-NEXT: psrlw $2, %xmm4 +; SSE2-NEXT: pand %xmm5, %xmm4 +; SSE2-NEXT: por %xmm6, %xmm4 +; SSE2-NEXT: paddw %xmm1, %xmm1 +; SSE2-NEXT: psraw $15, %xmm1 +; SSE2-NEXT: movdqa %xmm1, %xmm5 +; SSE2-NEXT: pandn %xmm4, %xmm5 +; SSE2-NEXT: psrlw $1, %xmm4 +; SSE2-NEXT: pand %xmm1, %xmm4 ; SSE2-NEXT: movdqa %xmm2, %xmm1 ; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] ; SSE2-NEXT: pslld $23, %xmm1 -; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1065353216,1065353216,1065353216,1065353216] -; SSE2-NEXT: paddd %xmm3, %xmm1 +; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [1065353216,1065353216,1065353216,1065353216] +; SSE2-NEXT: paddd %xmm6, %xmm1 ; SSE2-NEXT: cvttps2dq %xmm1, %xmm1 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] ; SSE2-NEXT: pslld $23, %xmm2 -; SSE2-NEXT: paddd %xmm3, %xmm2 +; SSE2-NEXT: paddd %xmm6, %xmm2 ; SSE2-NEXT: cvttps2dq %xmm2, %xmm2 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0] -; SSE2-NEXT: movdqa %xmm0, %xmm1 -; SSE2-NEXT: pmulhuw %xmm2, %xmm1 -; SSE2-NEXT: pmullw %xmm2, %xmm0 -; SSE2-NEXT: por %xmm1, %xmm0 +; SSE2-NEXT: pmullw %xmm0, %xmm2 +; SSE2-NEXT: por %xmm5, %xmm2 +; SSE2-NEXT: por %xmm4, %xmm2 +; SSE2-NEXT: pand %xmm3, %xmm0 +; SSE2-NEXT: pandn %xmm2, %xmm3 +; SSE2-NEXT: por %xmm3, %xmm0 ; SSE2-NEXT: retq ; ; SSE41-LABEL: var_funnnel_v8i16: ; SSE41: # %bb.0: -; SSE41-NEXT: pxor %xmm2, %xmm2 -; SSE41-NEXT: psubw %xmm1, %xmm2 -; SSE41-NEXT: pand {{.*}}(%rip), %xmm2 -; SSE41-NEXT: pmovzxwd {{.*#+}} xmm1 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero -; SSE41-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] -; SSE41-NEXT: pslld $23, %xmm2 -; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [1065353216,1065353216,1065353216,1065353216] -; SSE41-NEXT: paddd %xmm3, %xmm2 -; SSE41-NEXT: cvttps2dq %xmm2, %xmm2 -; SSE41-NEXT: pslld $23, %xmm1 -; SSE41-NEXT: paddd %xmm3, %xmm1 -; SSE41-NEXT: cvttps2dq %xmm1, %xmm1 -; SSE41-NEXT: packusdw %xmm2, %xmm1 ; SSE41-NEXT: movdqa %xmm0, %xmm2 -; SSE41-NEXT: pmulhuw %xmm1, %xmm2 -; SSE41-NEXT: pmullw %xmm1, %xmm0 -; SSE41-NEXT: por %xmm2, %xmm0 +; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE41-NEXT: movdqa %xmm1, %xmm0 +; SSE41-NEXT: movdqa {{.*#+}} xmm5 = [16,16,16,16,16,16,16,16] +; SSE41-NEXT: psubw %xmm1, %xmm5 +; SSE41-NEXT: pxor %xmm3, %xmm3 +; SSE41-NEXT: pcmpeqw %xmm1, %xmm3 +; SSE41-NEXT: psllw $12, %xmm1 +; SSE41-NEXT: psllw $4, %xmm0 +; SSE41-NEXT: por %xmm1, %xmm0 +; SSE41-NEXT: movdqa %xmm0, %xmm1 +; SSE41-NEXT: paddw %xmm0, %xmm1 +; SSE41-NEXT: movdqa %xmm2, %xmm6 +; SSE41-NEXT: psrlw $8, %xmm6 +; SSE41-NEXT: movdqa %xmm2, %xmm4 +; SSE41-NEXT: pblendvb %xmm0, %xmm6, %xmm4 +; SSE41-NEXT: movdqa %xmm4, %xmm6 +; SSE41-NEXT: psrlw $4, %xmm6 +; SSE41-NEXT: movdqa %xmm1, %xmm0 +; SSE41-NEXT: pblendvb %xmm0, %xmm6, %xmm4 +; SSE41-NEXT: movdqa %xmm4, %xmm6 +; SSE41-NEXT: psrlw $2, %xmm6 +; SSE41-NEXT: paddw %xmm1, %xmm1 +; SSE41-NEXT: movdqa %xmm1, %xmm0 +; SSE41-NEXT: pblendvb %xmm0, %xmm6, %xmm4 +; SSE41-NEXT: movdqa %xmm4, %xmm6 +; SSE41-NEXT: psrlw $1, %xmm6 +; SSE41-NEXT: paddw %xmm1, %xmm1 +; SSE41-NEXT: movdqa %xmm1, %xmm0 +; SSE41-NEXT: pblendvb %xmm0, %xmm6, %xmm4 +; SSE41-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm5[0],zero,xmm5[1],zero,xmm5[2],zero,xmm5[3],zero +; SSE41-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm0[4],xmm5[5],xmm0[5],xmm5[6],xmm0[6],xmm5[7],xmm0[7] +; SSE41-NEXT: pslld $23, %xmm5 +; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [1065353216,1065353216,1065353216,1065353216] +; SSE41-NEXT: paddd %xmm1, %xmm5 +; SSE41-NEXT: cvttps2dq %xmm5, %xmm5 +; SSE41-NEXT: pslld $23, %xmm0 +; SSE41-NEXT: paddd %xmm1, %xmm0 +; SSE41-NEXT: cvttps2dq %xmm0, %xmm0 +; SSE41-NEXT: packusdw %xmm5, %xmm0 +; SSE41-NEXT: pmullw %xmm2, %xmm0 +; SSE41-NEXT: por %xmm0, %xmm4 +; SSE41-NEXT: movdqa %xmm3, %xmm0 +; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm4 +; SSE41-NEXT: movdqa %xmm4, %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: var_funnnel_v8i16: ; AVX1: # %bb.0: -; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX1-NEXT: vpsubw %xmm1, %xmm2, %xmm1 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 -; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] -; AVX1-NEXT: vpslld $23, %xmm2, %xmm2 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [1065353216,1065353216,1065353216,1065353216] -; AVX1-NEXT: vpaddd %xmm3, %xmm2, %xmm2 -; AVX1-NEXT: vcvttps2dq %xmm2, %xmm2 -; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero -; AVX1-NEXT: vpslld $23, %xmm1, %xmm1 -; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm1 -; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1 -; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vpmulhuw %xmm1, %xmm0, %xmm2 -; AVX1-NEXT: vpmullw %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0 +; AVX1-NEXT: vpsllw $12, %xmm1, %xmm2 +; AVX1-NEXT: vpsllw $4, %xmm1, %xmm3 +; AVX1-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX1-NEXT: vpaddw %xmm2, %xmm2, %xmm3 +; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm4 +; AVX1-NEXT: vpblendvb %xmm2, %xmm4, %xmm0, %xmm2 +; AVX1-NEXT: vpsrlw $4, %xmm2, %xmm4 +; AVX1-NEXT: vpblendvb %xmm3, %xmm4, %xmm2, %xmm2 +; AVX1-NEXT: vpsrlw $2, %xmm2, %xmm4 +; AVX1-NEXT: vpaddw %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpblendvb %xmm3, %xmm4, %xmm2, %xmm2 +; AVX1-NEXT: vpsrlw $1, %xmm2, %xmm4 +; AVX1-NEXT: vpaddw %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpblendvb %xmm3, %xmm4, %xmm2, %xmm2 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; AVX1-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm4 = xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7] +; AVX1-NEXT: vpslld $23, %xmm4, %xmm4 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [1065353216,1065353216,1065353216,1065353216] +; AVX1-NEXT: vpaddd %xmm5, %xmm4, %xmm4 +; AVX1-NEXT: vcvttps2dq %xmm4, %xmm4 +; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero +; AVX1-NEXT: vpslld $23, %xmm3, %xmm3 +; AVX1-NEXT: vpaddd %xmm5, %xmm3, %xmm3 +; AVX1-NEXT: vcvttps2dq %xmm3, %xmm3 +; AVX1-NEXT: vpackusdw %xmm4, %xmm3, %xmm3 +; AVX1-NEXT: vpmullw %xmm3, %xmm0, %xmm3 +; AVX1-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqw %xmm3, %xmm1, %xmm1 +; AVX1-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: var_funnnel_v8i16: ; AVX2: # %bb.0: -; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX2-NEXT: vpsubw %xmm1, %xmm2, %xmm1 +; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero ; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 -; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [16,16,16,16,16,16,16,16] -; AVX2-NEXT: vpsubw %xmm1, %xmm2, %xmm2 -; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero -; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero -; AVX2-NEXT: vpsrlvd %ymm2, %ymm0, %ymm2 -; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm3 -; AVX2-NEXT: vpackusdw %xmm3, %xmm2, %xmm2 -; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero -; AVX2-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] -; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] -; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0 +; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero +; AVX2-NEXT: vpsrlvd %ymm3, %ymm2, %ymm3 +; AVX2-NEXT: vextracti128 $1, %ymm3, %xmm4 +; AVX2-NEXT: vpackusdw %xmm4, %xmm3, %xmm3 +; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = [16,16,16,16,16,16,16,16] +; AVX2-NEXT: vpsubw %xmm1, %xmm4, %xmm4 +; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero +; AVX2-NEXT: vpsllvd %ymm4, %ymm2, %ymm2 +; AVX2-NEXT: vpshufb {{.*#+}} ymm2 = ymm2[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] +; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] +; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqw %xmm3, %xmm1, %xmm1 +; AVX2-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX2-NEXT: vzeroupper ; AVX2-NEXT: retq ; ; AVX512F-LABEL: var_funnnel_v8i16: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512F-NEXT: vpsubw %xmm1, %xmm2, %xmm1 +; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero ; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 -; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero -; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero -; AVX512F-NEXT: vpsllvd %ymm2, %ymm0, %ymm2 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] -; AVX512F-NEXT: vpsubw %xmm1, %xmm3, %xmm1 -; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero -; AVX512F-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 -; AVX512F-NEXT: vpor %ymm0, %ymm2, %ymm0 -; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 -; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 +; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero +; AVX512F-NEXT: vpsrlvd %ymm3, %ymm2, %ymm3 +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm4 = [16,16,16,16,16,16,16,16] +; AVX512F-NEXT: vpsubw %xmm1, %xmm4, %xmm4 +; AVX512F-NEXT: vpmovzxwd {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero +; AVX512F-NEXT: vpsllvd %ymm4, %ymm2, %ymm2 +; AVX512F-NEXT: vpor %ymm3, %ymm2, %ymm2 +; AVX512F-NEXT: vpmovdw %zmm2, %ymm2 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqw %xmm3, %xmm1, %xmm1 +; AVX512F-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v8i16: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512VL-NEXT: vpsubw %xmm1, %xmm2, %xmm1 +; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero ; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 -; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero -; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero -; AVX512VL-NEXT: vpsllvd %ymm2, %ymm0, %ymm2 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] -; AVX512VL-NEXT: vpsubw %xmm1, %xmm3, %xmm1 -; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero -; AVX512VL-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: vpor %ymm0, %ymm2, %ymm0 -; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 +; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero +; AVX512VL-NEXT: vpsrlvd %ymm3, %ymm2, %ymm3 +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm4 = [16,16,16,16,16,16,16,16] +; AVX512VL-NEXT: vpsubw %xmm1, %xmm4, %xmm4 +; AVX512VL-NEXT: vpmovzxwd {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero +; AVX512VL-NEXT: vpsllvd %ymm4, %ymm2, %ymm2 +; AVX512VL-NEXT: vpor %ymm3, %ymm2, %ymm2 +; AVX512VL-NEXT: vpmovdw %ymm2, %xmm2 +; AVX512VL-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VL-NEXT: vpcmpeqw %xmm3, %xmm1, %xmm1 +; AVX512VL-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: var_funnnel_v8i16: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 -; AVX512BW-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512BW-NEXT: vpsubw %xmm1, %xmm2, %xmm1 ; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 -; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm2 +; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm2 ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] -; AVX512BW-NEXT: vpsubw %xmm1, %xmm3, %xmm1 -; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpor %xmm0, %xmm2, %xmm0 +; AVX512BW-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; AVX512BW-NEXT: vpsllvw %zmm3, %zmm0, %zmm3 +; AVX512BW-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqw %xmm3, %xmm1, %xmm1 +; AVX512BW-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v8i16: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512VLBW-NEXT: vpsubw %xmm1, %xmm2, %xmm1 -; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 -; AVX512VLBW-NEXT: vpsllvw %xmm1, %xmm0, %xmm2 +; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm2 +; AVX512VLBW-NEXT: vpsrlvw %xmm2, %xmm0, %xmm1 ; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] -; AVX512VLBW-NEXT: vpsubw %xmm1, %xmm3, %xmm1 -; AVX512VLBW-NEXT: vpsrlvw %xmm1, %xmm0, %xmm0 -; AVX512VLBW-NEXT: vpor %xmm0, %xmm2, %xmm0 +; AVX512VLBW-NEXT: vpsubw %xmm2, %xmm3, %xmm3 +; AVX512VLBW-NEXT: vpsllvw %xmm3, %xmm0, %xmm3 +; AVX512VLBW-NEXT: vpor %xmm1, %xmm3, %xmm1 +; AVX512VLBW-NEXT: vptestnmw %xmm2, %xmm2, %k1 +; AVX512VLBW-NEXT: vmovdqu16 %xmm0, %xmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %xmm1, %xmm0 ; AVX512VLBW-NEXT: retq ; ; XOP-LABEL: var_funnnel_v8i16: ; XOP: # %bb.0: +; XOP-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOP-NEXT: vpsubw %xmm1, %xmm2, %xmm1 -; XOP-NEXT: vprotw %xmm1, %xmm0, %xmm0 +; XOP-NEXT: vpsubw %xmm1, %xmm2, %xmm3 +; XOP-NEXT: vpshlw %xmm3, %xmm0, %xmm3 +; XOP-NEXT: vmovdqa {{.*#+}} xmm4 = [16,16,16,16,16,16,16,16] +; XOP-NEXT: vpsubw %xmm1, %xmm4, %xmm4 +; XOP-NEXT: vpshlw %xmm4, %xmm0, %xmm4 +; XOP-NEXT: vpor %xmm3, %xmm4, %xmm3 +; XOP-NEXT: vpcomeqw %xmm2, %xmm1, %xmm1 +; XOP-NEXT: vpblendvb %xmm1, %xmm0, %xmm3, %xmm0 ; XOP-NEXT: retq ; ; X32-SSE-LABEL: var_funnnel_v8i16: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: pxor %xmm2, %xmm2 +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [16,16,16,16,16,16,16,16] ; X32-SSE-NEXT: psubw %xmm1, %xmm2 -; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2 +; X32-SSE-NEXT: pxor %xmm3, %xmm3 +; X32-SSE-NEXT: pcmpeqw %xmm1, %xmm3 +; X32-SSE-NEXT: psllw $12, %xmm1 +; X32-SSE-NEXT: movdqa %xmm1, %xmm4 +; X32-SSE-NEXT: psraw $15, %xmm4 +; X32-SSE-NEXT: movdqa %xmm0, %xmm5 +; X32-SSE-NEXT: psrlw $8, %xmm5 +; X32-SSE-NEXT: pand %xmm4, %xmm5 +; X32-SSE-NEXT: pandn %xmm0, %xmm4 +; X32-SSE-NEXT: por %xmm5, %xmm4 +; X32-SSE-NEXT: paddw %xmm1, %xmm1 +; X32-SSE-NEXT: movdqa %xmm1, %xmm5 +; X32-SSE-NEXT: psraw $15, %xmm5 +; X32-SSE-NEXT: movdqa %xmm5, %xmm6 +; X32-SSE-NEXT: pandn %xmm4, %xmm6 +; X32-SSE-NEXT: psrlw $4, %xmm4 +; X32-SSE-NEXT: pand %xmm5, %xmm4 +; X32-SSE-NEXT: por %xmm6, %xmm4 +; X32-SSE-NEXT: paddw %xmm1, %xmm1 +; X32-SSE-NEXT: movdqa %xmm1, %xmm5 +; X32-SSE-NEXT: psraw $15, %xmm5 +; X32-SSE-NEXT: movdqa %xmm5, %xmm6 +; X32-SSE-NEXT: pandn %xmm4, %xmm6 +; X32-SSE-NEXT: psrlw $2, %xmm4 +; X32-SSE-NEXT: pand %xmm5, %xmm4 +; X32-SSE-NEXT: por %xmm6, %xmm4 +; X32-SSE-NEXT: paddw %xmm1, %xmm1 +; X32-SSE-NEXT: psraw $15, %xmm1 +; X32-SSE-NEXT: movdqa %xmm1, %xmm5 +; X32-SSE-NEXT: pandn %xmm4, %xmm5 +; X32-SSE-NEXT: psrlw $1, %xmm4 +; X32-SSE-NEXT: pand %xmm1, %xmm4 ; X32-SSE-NEXT: movdqa %xmm2, %xmm1 ; X32-SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] ; X32-SSE-NEXT: pslld $23, %xmm1 -; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [1065353216,1065353216,1065353216,1065353216] -; X32-SSE-NEXT: paddd %xmm3, %xmm1 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm6 = [1065353216,1065353216,1065353216,1065353216] +; X32-SSE-NEXT: paddd %xmm6, %xmm1 ; X32-SSE-NEXT: cvttps2dq %xmm1, %xmm1 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; X32-SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; X32-SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] ; X32-SSE-NEXT: pslld $23, %xmm2 -; X32-SSE-NEXT: paddd %xmm3, %xmm2 +; X32-SSE-NEXT: paddd %xmm6, %xmm2 ; X32-SSE-NEXT: cvttps2dq %xmm2, %xmm2 ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7] ; X32-SSE-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,4,6,6,7] ; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] ; X32-SSE-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0] -; X32-SSE-NEXT: movdqa %xmm0, %xmm1 -; X32-SSE-NEXT: pmulhuw %xmm2, %xmm1 -; X32-SSE-NEXT: pmullw %xmm2, %xmm0 -; X32-SSE-NEXT: por %xmm1, %xmm0 +; X32-SSE-NEXT: pmullw %xmm0, %xmm2 +; X32-SSE-NEXT: por %xmm5, %xmm2 +; X32-SSE-NEXT: por %xmm4, %xmm2 +; X32-SSE-NEXT: pand %xmm3, %xmm0 +; X32-SSE-NEXT: pandn %xmm2, %xmm3 +; X32-SSE-NEXT: por %xmm3, %xmm0 ; X32-SSE-NEXT: retl %res = call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> %amt) ret <8 x i16> %res @@ -478,227 +719,304 @@ define <16 x i8> @var_funnnel_v16i8(<16 x i8> %x, <16 x i8> %amt) nounwind { ; SSE2-LABEL: var_funnnel_v16i8: ; SSE2: # %bb.0: -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pxor %xmm0, %xmm0 -; SSE2-NEXT: pxor %xmm3, %xmm3 -; SSE2-NEXT: psubb %xmm1, %xmm3 -; SSE2-NEXT: psllw $5, %xmm3 -; SSE2-NEXT: pxor %xmm1, %xmm1 -; SSE2-NEXT: pcmpgtb %xmm3, %xmm1 -; SSE2-NEXT: movdqa %xmm2, %xmm4 -; SSE2-NEXT: psrlw $4, %xmm4 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm4 -; SSE2-NEXT: movdqa %xmm2, %xmm5 -; SSE2-NEXT: psllw $4, %xmm5 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm5 -; SSE2-NEXT: por %xmm4, %xmm5 -; SSE2-NEXT: pand %xmm1, %xmm5 -; SSE2-NEXT: pandn %xmm2, %xmm1 -; SSE2-NEXT: por %xmm5, %xmm1 -; SSE2-NEXT: movdqa %xmm1, %xmm2 -; SSE2-NEXT: psrlw $6, %xmm2 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm2 +; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 ; SSE2-NEXT: movdqa %xmm1, %xmm4 +; SSE2-NEXT: psllw $5, %xmm4 +; SSE2-NEXT: pxor %xmm2, %xmm2 +; SSE2-NEXT: pxor %xmm5, %xmm5 +; SSE2-NEXT: pcmpgtb %xmm4, %xmm5 +; SSE2-NEXT: movdqa %xmm0, %xmm3 +; SSE2-NEXT: psrlw $4, %xmm3 +; SSE2-NEXT: pand %xmm5, %xmm3 +; SSE2-NEXT: pandn %xmm0, %xmm5 +; SSE2-NEXT: pand {{.*}}(%rip), %xmm3 +; SSE2-NEXT: por %xmm5, %xmm3 +; SSE2-NEXT: paddb %xmm4, %xmm4 +; SSE2-NEXT: pxor %xmm5, %xmm5 +; SSE2-NEXT: pcmpgtb %xmm4, %xmm5 +; SSE2-NEXT: movdqa %xmm5, %xmm6 +; SSE2-NEXT: pandn %xmm3, %xmm6 +; SSE2-NEXT: psrlw $2, %xmm3 +; SSE2-NEXT: pand %xmm5, %xmm3 +; SSE2-NEXT: pand {{.*}}(%rip), %xmm3 +; SSE2-NEXT: por %xmm6, %xmm3 +; SSE2-NEXT: paddb %xmm4, %xmm4 +; SSE2-NEXT: pxor %xmm5, %xmm5 +; SSE2-NEXT: pcmpgtb %xmm4, %xmm5 +; SSE2-NEXT: movdqa %xmm5, %xmm4 +; SSE2-NEXT: pandn %xmm3, %xmm4 +; SSE2-NEXT: psrlw $1, %xmm3 +; SSE2-NEXT: pand %xmm5, %xmm3 +; SSE2-NEXT: pand {{.*}}(%rip), %xmm3 +; SSE2-NEXT: por %xmm4, %xmm3 +; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; SSE2-NEXT: psubb %xmm1, %xmm5 +; SSE2-NEXT: psllw $5, %xmm5 +; SSE2-NEXT: pxor %xmm6, %xmm6 +; SSE2-NEXT: pcmpgtb %xmm5, %xmm6 +; SSE2-NEXT: movdqa %xmm0, %xmm4 +; SSE2-NEXT: psllw $4, %xmm4 +; SSE2-NEXT: pand %xmm6, %xmm4 +; SSE2-NEXT: pandn %xmm0, %xmm6 +; SSE2-NEXT: pand {{.*}}(%rip), %xmm4 +; SSE2-NEXT: por %xmm6, %xmm4 +; SSE2-NEXT: paddb %xmm5, %xmm5 +; SSE2-NEXT: pxor %xmm6, %xmm6 +; SSE2-NEXT: pcmpgtb %xmm5, %xmm6 +; SSE2-NEXT: movdqa %xmm6, %xmm7 +; SSE2-NEXT: pandn %xmm4, %xmm7 ; SSE2-NEXT: psllw $2, %xmm4 +; SSE2-NEXT: pand %xmm6, %xmm4 ; SSE2-NEXT: pand {{.*}}(%rip), %xmm4 -; SSE2-NEXT: por %xmm2, %xmm4 -; SSE2-NEXT: paddb %xmm3, %xmm3 -; SSE2-NEXT: pxor %xmm2, %xmm2 -; SSE2-NEXT: pcmpgtb %xmm3, %xmm2 +; SSE2-NEXT: por %xmm7, %xmm4 +; SSE2-NEXT: paddb %xmm5, %xmm5 +; SSE2-NEXT: pcmpeqb %xmm2, %xmm1 +; SSE2-NEXT: pcmpgtb %xmm5, %xmm2 +; SSE2-NEXT: movdqa %xmm2, %xmm5 +; SSE2-NEXT: pandn %xmm4, %xmm5 +; SSE2-NEXT: por %xmm3, %xmm5 +; SSE2-NEXT: paddb %xmm4, %xmm4 ; SSE2-NEXT: pand %xmm2, %xmm4 -; SSE2-NEXT: pandn %xmm1, %xmm2 -; SSE2-NEXT: por %xmm4, %xmm2 -; SSE2-NEXT: movdqa %xmm2, %xmm1 -; SSE2-NEXT: paddb %xmm2, %xmm1 -; SSE2-NEXT: movdqa %xmm2, %xmm4 -; SSE2-NEXT: psrlw $7, %xmm4 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm4 -; SSE2-NEXT: por %xmm1, %xmm4 -; SSE2-NEXT: paddb %xmm3, %xmm3 -; SSE2-NEXT: pcmpgtb %xmm3, %xmm0 -; SSE2-NEXT: pand %xmm0, %xmm4 -; SSE2-NEXT: pandn %xmm2, %xmm0 -; SSE2-NEXT: por %xmm4, %xmm0 +; SSE2-NEXT: por %xmm5, %xmm4 +; SSE2-NEXT: pand %xmm1, %xmm0 +; SSE2-NEXT: pandn %xmm4, %xmm1 +; SSE2-NEXT: por %xmm1, %xmm0 ; SSE2-NEXT: retq ; ; SSE41-LABEL: var_funnnel_v16i8: ; SSE41: # %bb.0: ; SSE41-NEXT: movdqa %xmm0, %xmm2 -; SSE41-NEXT: psrlw $4, %xmm0 -; SSE41-NEXT: pand {{.*}}(%rip), %xmm0 -; SSE41-NEXT: movdqa %xmm2, %xmm3 -; SSE41-NEXT: psllw $4, %xmm3 -; SSE41-NEXT: pand {{.*}}(%rip), %xmm3 -; SSE41-NEXT: por %xmm0, %xmm3 -; SSE41-NEXT: pxor %xmm0, %xmm0 -; SSE41-NEXT: psubb %xmm1, %xmm0 +; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; SSE41-NEXT: psubb %xmm1, %xmm3 +; SSE41-NEXT: pxor %xmm4, %xmm4 +; SSE41-NEXT: pcmpeqb %xmm1, %xmm4 +; SSE41-NEXT: movdqa %xmm1, %xmm0 ; SSE41-NEXT: psllw $5, %xmm0 -; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2 ; SSE41-NEXT: movdqa %xmm2, %xmm1 -; SSE41-NEXT: psrlw $6, %xmm1 +; SSE41-NEXT: psrlw $4, %xmm1 +; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE41-NEXT: movdqa %xmm2, %xmm6 +; SSE41-NEXT: pblendvb %xmm0, %xmm1, %xmm6 +; SSE41-NEXT: movdqa %xmm6, %xmm1 +; SSE41-NEXT: psrlw $2, %xmm1 ; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 -; SSE41-NEXT: movdqa %xmm2, %xmm3 -; SSE41-NEXT: psllw $2, %xmm3 -; SSE41-NEXT: pand {{.*}}(%rip), %xmm3 -; SSE41-NEXT: por %xmm1, %xmm3 ; SSE41-NEXT: paddb %xmm0, %xmm0 -; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2 -; SSE41-NEXT: movdqa %xmm2, %xmm1 -; SSE41-NEXT: paddb %xmm2, %xmm1 -; SSE41-NEXT: movdqa %xmm2, %xmm3 -; SSE41-NEXT: psrlw $7, %xmm3 -; SSE41-NEXT: pand {{.*}}(%rip), %xmm3 -; SSE41-NEXT: por %xmm1, %xmm3 +; SSE41-NEXT: pblendvb %xmm0, %xmm1, %xmm6 +; SSE41-NEXT: movdqa %xmm6, %xmm1 +; SSE41-NEXT: psrlw $1, %xmm1 +; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 ; SSE41-NEXT: paddb %xmm0, %xmm0 -; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm2 -; SSE41-NEXT: movdqa %xmm2, %xmm0 +; SSE41-NEXT: pblendvb %xmm0, %xmm1, %xmm6 +; SSE41-NEXT: psllw $5, %xmm3 +; SSE41-NEXT: movdqa %xmm3, %xmm1 +; SSE41-NEXT: paddb %xmm3, %xmm1 +; SSE41-NEXT: movdqa %xmm2, %xmm7 +; SSE41-NEXT: psllw $4, %xmm7 +; SSE41-NEXT: pand {{.*}}(%rip), %xmm7 +; SSE41-NEXT: movdqa %xmm2, %xmm5 +; SSE41-NEXT: movdqa %xmm3, %xmm0 +; SSE41-NEXT: pblendvb %xmm0, %xmm7, %xmm5 +; SSE41-NEXT: movdqa %xmm5, %xmm3 +; SSE41-NEXT: psllw $2, %xmm3 +; SSE41-NEXT: pand {{.*}}(%rip), %xmm3 +; SSE41-NEXT: movdqa %xmm1, %xmm0 +; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm5 +; SSE41-NEXT: movdqa %xmm5, %xmm3 +; SSE41-NEXT: paddb %xmm5, %xmm3 +; SSE41-NEXT: paddb %xmm1, %xmm1 +; SSE41-NEXT: movdqa %xmm1, %xmm0 +; SSE41-NEXT: pblendvb %xmm0, %xmm3, %xmm5 +; SSE41-NEXT: por %xmm6, %xmm5 +; SSE41-NEXT: movdqa %xmm4, %xmm0 +; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm5 +; SSE41-NEXT: movdqa %xmm5, %xmm0 ; SSE41-NEXT: retq ; ; AVX-LABEL: var_funnnel_v16i8: ; AVX: # %bb.0: -; AVX-NEXT: vpsrlw $4, %xmm0, %xmm2 -; AVX-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 -; AVX-NEXT: vpsllw $4, %xmm0, %xmm3 +; AVX-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX-NEXT: vpsllw $5, %xmm1, %xmm2 +; AVX-NEXT: vpsrlw $4, %xmm0, %xmm3 ; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3 +; AVX-NEXT: vpblendvb %xmm2, %xmm3, %xmm0, %xmm3 +; AVX-NEXT: vpsrlw $2, %xmm3, %xmm4 +; AVX-NEXT: vpand {{.*}}(%rip), %xmm4, %xmm4 +; AVX-NEXT: vpaddb %xmm2, %xmm2, %xmm2 +; AVX-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm3 +; AVX-NEXT: vpsrlw $1, %xmm3, %xmm4 +; AVX-NEXT: vpand {{.*}}(%rip), %xmm4, %xmm4 +; AVX-NEXT: vpaddb %xmm2, %xmm2, %xmm2 +; AVX-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm2 +; AVX-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX-NEXT: vpsubb %xmm1, %xmm3, %xmm3 +; AVX-NEXT: vpsllw $5, %xmm3, %xmm3 +; AVX-NEXT: vpaddb %xmm3, %xmm3, %xmm4 +; AVX-NEXT: vpsllw $4, %xmm0, %xmm5 +; AVX-NEXT: vpand {{.*}}(%rip), %xmm5, %xmm5 +; AVX-NEXT: vpblendvb %xmm3, %xmm5, %xmm0, %xmm3 +; AVX-NEXT: vpsllw $2, %xmm3, %xmm5 +; AVX-NEXT: vpand {{.*}}(%rip), %xmm5, %xmm5 +; AVX-NEXT: vpblendvb %xmm4, %xmm5, %xmm3, %xmm3 +; AVX-NEXT: vpaddb %xmm3, %xmm3, %xmm5 +; AVX-NEXT: vpaddb %xmm4, %xmm4, %xmm4 +; AVX-NEXT: vpblendvb %xmm4, %xmm5, %xmm3, %xmm3 ; AVX-NEXT: vpor %xmm2, %xmm3, %xmm2 ; AVX-NEXT: vpxor %xmm3, %xmm3, %xmm3 -; AVX-NEXT: vpsubb %xmm1, %xmm3, %xmm1 -; AVX-NEXT: vpsllw $5, %xmm1, %xmm1 -; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0 -; AVX-NEXT: vpsrlw $6, %xmm0, %xmm2 -; AVX-NEXT: vpand {{.*}}(%rip), %xmm2, %xmm2 -; AVX-NEXT: vpsllw $2, %xmm0, %xmm3 -; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3 -; AVX-NEXT: vpor %xmm2, %xmm3, %xmm2 -; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1 -; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0 -; AVX-NEXT: vpaddb %xmm0, %xmm0, %xmm2 -; AVX-NEXT: vpsrlw $7, %xmm0, %xmm3 -; AVX-NEXT: vpand {{.*}}(%rip), %xmm3, %xmm3 -; AVX-NEXT: vpor %xmm3, %xmm2, %xmm2 -; AVX-NEXT: vpaddb %xmm1, %xmm1, %xmm1 -; AVX-NEXT: vpblendvb %xmm1, %xmm2, %xmm0, %xmm0 +; AVX-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX-NEXT: retq ; ; AVX512F-LABEL: var_funnnel_v16i8: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero -; AVX512F-NEXT: vpsrlvd %zmm3, %zmm0, %zmm3 -; AVX512F-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512F-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero -; AVX512F-NEXT: vpsllvd %zmm1, %zmm0, %zmm0 -; AVX512F-NEXT: vpord %zmm3, %zmm0, %zmm0 -; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero +; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero +; AVX512F-NEXT: vpsrlvd %zmm3, %zmm2, %zmm3 +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512F-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero,xmm4[8],zero,zero,zero,xmm4[9],zero,zero,zero,xmm4[10],zero,zero,zero,xmm4[11],zero,zero,zero,xmm4[12],zero,zero,zero,xmm4[13],zero,zero,zero,xmm4[14],zero,zero,zero,xmm4[15],zero,zero,zero +; AVX512F-NEXT: vpsllvd %zmm4, %zmm2, %zmm2 +; AVX512F-NEXT: vpord %zmm3, %zmm2, %zmm2 +; AVX512F-NEXT: vpmovdb %zmm2, %xmm2 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX512F-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v16i8: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero -; AVX512VL-NEXT: vpsrlvd %zmm3, %zmm0, %zmm3 -; AVX512VL-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VL-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero -; AVX512VL-NEXT: vpsllvd %zmm1, %zmm0, %zmm0 -; AVX512VL-NEXT: vpord %zmm3, %zmm0, %zmm0 -; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero +; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero +; AVX512VL-NEXT: vpsrlvd %zmm3, %zmm2, %zmm3 +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VL-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero,xmm4[8],zero,zero,zero,xmm4[9],zero,zero,zero,xmm4[10],zero,zero,zero,xmm4[11],zero,zero,zero,xmm4[12],zero,zero,zero,xmm4[13],zero,zero,zero,xmm4[14],zero,zero,zero,xmm4[15],zero,zero,zero +; AVX512VL-NEXT: vpsllvd %zmm4, %zmm2, %zmm2 +; AVX512VL-NEXT: vpord %zmm3, %zmm2, %zmm2 +; AVX512VL-NEXT: vpmovdb %zmm2, %xmm2 +; AVX512VL-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VL-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX512VL-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: var_funnnel_v16i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero -; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero -; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero +; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm2, %zmm3 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero,xmm4[8],zero,xmm4[9],zero,xmm4[10],zero,xmm4[11],zero,xmm4[12],zero,xmm4[13],zero,xmm4[14],zero,xmm4[15],zero +; AVX512BW-NEXT: vpsllvw %zmm4, %zmm2, %zmm2 +; AVX512BW-NEXT: vpor %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vpmovwb %zmm2, %ymm2 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX512BW-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v16i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX512VLBW-NEXT: vpsrlvw %ymm3, %ymm0, %ymm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero -; AVX512VLBW-NEXT: vpsllvw %ymm1, %ymm0, %ymm0 -; AVX512VLBW-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm3 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero +; AVX512VLBW-NEXT: vpsrlvw %ymm1, %ymm2, %ymm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VLBW-NEXT: vpsubb %xmm3, %xmm4, %xmm4 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero,xmm4[8],zero,xmm4[9],zero,xmm4[10],zero,xmm4[11],zero,xmm4[12],zero,xmm4[13],zero,xmm4[14],zero,xmm4[15],zero +; AVX512VLBW-NEXT: vpsllvw %ymm4, %ymm2, %ymm2 +; AVX512VLBW-NEXT: vpor %ymm1, %ymm2, %ymm1 +; AVX512VLBW-NEXT: vpmovwb %ymm1, %xmm1 +; AVX512VLBW-NEXT: vptestnmb %xmm3, %xmm3, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %xmm0, %xmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %xmm1, %xmm0 ; AVX512VLBW-NEXT: vzeroupper ; AVX512VLBW-NEXT: retq ; ; XOP-LABEL: var_funnnel_v16i8: ; XOP: # %bb.0: +; XOP-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 ; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOP-NEXT: vpsubb %xmm1, %xmm2, %xmm1 -; XOP-NEXT: vprotb %xmm1, %xmm0, %xmm0 +; XOP-NEXT: vpsubb %xmm1, %xmm2, %xmm3 +; XOP-NEXT: vpshlb %xmm3, %xmm0, %xmm3 +; XOP-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; XOP-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; XOP-NEXT: vpshlb %xmm4, %xmm0, %xmm4 +; XOP-NEXT: vpor %xmm3, %xmm4, %xmm3 +; XOP-NEXT: vpcomeqb %xmm2, %xmm1, %xmm1 +; XOP-NEXT: vpblendvb %xmm1, %xmm0, %xmm3, %xmm0 ; XOP-NEXT: retq ; ; X32-SSE-LABEL: var_funnnel_v16i8: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: movdqa %xmm0, %xmm2 -; X32-SSE-NEXT: pxor %xmm0, %xmm0 -; X32-SSE-NEXT: pxor %xmm3, %xmm3 -; X32-SSE-NEXT: psubb %xmm1, %xmm3 -; X32-SSE-NEXT: psllw $5, %xmm3 -; X32-SSE-NEXT: pxor %xmm1, %xmm1 -; X32-SSE-NEXT: pcmpgtb %xmm3, %xmm1 -; X32-SSE-NEXT: movdqa %xmm2, %xmm4 -; X32-SSE-NEXT: psrlw $4, %xmm4 -; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm4 -; X32-SSE-NEXT: movdqa %xmm2, %xmm5 -; X32-SSE-NEXT: psllw $4, %xmm5 -; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm5 -; X32-SSE-NEXT: por %xmm4, %xmm5 -; X32-SSE-NEXT: pand %xmm1, %xmm5 -; X32-SSE-NEXT: pandn %xmm2, %xmm1 -; X32-SSE-NEXT: por %xmm5, %xmm1 -; X32-SSE-NEXT: movdqa %xmm1, %xmm2 -; X32-SSE-NEXT: psrlw $6, %xmm2 -; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2 +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 ; X32-SSE-NEXT: movdqa %xmm1, %xmm4 +; X32-SSE-NEXT: psllw $5, %xmm4 +; X32-SSE-NEXT: pxor %xmm2, %xmm2 +; X32-SSE-NEXT: pxor %xmm5, %xmm5 +; X32-SSE-NEXT: pcmpgtb %xmm4, %xmm5 +; X32-SSE-NEXT: movdqa %xmm0, %xmm3 +; X32-SSE-NEXT: psrlw $4, %xmm3 +; X32-SSE-NEXT: pand %xmm5, %xmm3 +; X32-SSE-NEXT: pandn %xmm0, %xmm5 +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm3 +; X32-SSE-NEXT: por %xmm5, %xmm3 +; X32-SSE-NEXT: paddb %xmm4, %xmm4 +; X32-SSE-NEXT: pxor %xmm5, %xmm5 +; X32-SSE-NEXT: pcmpgtb %xmm4, %xmm5 +; X32-SSE-NEXT: movdqa %xmm5, %xmm6 +; X32-SSE-NEXT: pandn %xmm3, %xmm6 +; X32-SSE-NEXT: psrlw $2, %xmm3 +; X32-SSE-NEXT: pand %xmm5, %xmm3 +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm3 +; X32-SSE-NEXT: por %xmm6, %xmm3 +; X32-SSE-NEXT: paddb %xmm4, %xmm4 +; X32-SSE-NEXT: pxor %xmm5, %xmm5 +; X32-SSE-NEXT: pcmpgtb %xmm4, %xmm5 +; X32-SSE-NEXT: movdqa %xmm5, %xmm4 +; X32-SSE-NEXT: pandn %xmm3, %xmm4 +; X32-SSE-NEXT: psrlw $1, %xmm3 +; X32-SSE-NEXT: pand %xmm5, %xmm3 +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm3 +; X32-SSE-NEXT: por %xmm4, %xmm3 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm5 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; X32-SSE-NEXT: psubb %xmm1, %xmm5 +; X32-SSE-NEXT: psllw $5, %xmm5 +; X32-SSE-NEXT: pxor %xmm6, %xmm6 +; X32-SSE-NEXT: pcmpgtb %xmm5, %xmm6 +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: psllw $4, %xmm4 +; X32-SSE-NEXT: pand %xmm6, %xmm4 +; X32-SSE-NEXT: pandn %xmm0, %xmm6 +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm4 +; X32-SSE-NEXT: por %xmm6, %xmm4 +; X32-SSE-NEXT: paddb %xmm5, %xmm5 +; X32-SSE-NEXT: pxor %xmm6, %xmm6 +; X32-SSE-NEXT: pcmpgtb %xmm5, %xmm6 +; X32-SSE-NEXT: movdqa %xmm6, %xmm7 +; X32-SSE-NEXT: pandn %xmm4, %xmm7 ; X32-SSE-NEXT: psllw $2, %xmm4 +; X32-SSE-NEXT: pand %xmm6, %xmm4 ; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm4 -; X32-SSE-NEXT: por %xmm2, %xmm4 -; X32-SSE-NEXT: paddb %xmm3, %xmm3 -; X32-SSE-NEXT: pxor %xmm2, %xmm2 -; X32-SSE-NEXT: pcmpgtb %xmm3, %xmm2 +; X32-SSE-NEXT: por %xmm7, %xmm4 +; X32-SSE-NEXT: paddb %xmm5, %xmm5 +; X32-SSE-NEXT: pcmpeqb %xmm2, %xmm1 +; X32-SSE-NEXT: pcmpgtb %xmm5, %xmm2 +; X32-SSE-NEXT: movdqa %xmm2, %xmm5 +; X32-SSE-NEXT: pandn %xmm4, %xmm5 +; X32-SSE-NEXT: por %xmm3, %xmm5 +; X32-SSE-NEXT: paddb %xmm4, %xmm4 ; X32-SSE-NEXT: pand %xmm2, %xmm4 -; X32-SSE-NEXT: pandn %xmm1, %xmm2 -; X32-SSE-NEXT: por %xmm4, %xmm2 -; X32-SSE-NEXT: movdqa %xmm2, %xmm1 -; X32-SSE-NEXT: paddb %xmm2, %xmm1 -; X32-SSE-NEXT: movdqa %xmm2, %xmm4 -; X32-SSE-NEXT: psrlw $7, %xmm4 -; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm4 -; X32-SSE-NEXT: por %xmm1, %xmm4 -; X32-SSE-NEXT: paddb %xmm3, %xmm3 -; X32-SSE-NEXT: pcmpgtb %xmm3, %xmm0 -; X32-SSE-NEXT: pand %xmm0, %xmm4 -; X32-SSE-NEXT: pandn %xmm2, %xmm0 -; X32-SSE-NEXT: por %xmm4, %xmm0 +; X32-SSE-NEXT: por %xmm5, %xmm4 +; X32-SSE-NEXT: pand %xmm1, %xmm0 +; X32-SSE-NEXT: pandn %xmm4, %xmm1 +; X32-SSE-NEXT: por %xmm1, %xmm0 ; X32-SSE-NEXT: retl %res = call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> %amt) ret <16 x i8> %res @@ -709,44 +1027,69 @@ ; define <2 x i64> @splatvar_funnnel_v2i64(<2 x i64> %x, <2 x i64> %amt) nounwind { -; SSE-LABEL: splatvar_funnnel_v2i64: -; SSE: # %bb.0: -; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] -; SSE-NEXT: movdqa {{.*#+}} xmm2 = [63,63] -; SSE-NEXT: pxor %xmm3, %xmm3 -; SSE-NEXT: psubq %xmm1, %xmm3 -; SSE-NEXT: pand %xmm2, %xmm1 -; SSE-NEXT: movdqa %xmm0, %xmm4 -; SSE-NEXT: psrlq %xmm1, %xmm4 -; SSE-NEXT: pand %xmm2, %xmm3 -; SSE-NEXT: psllq %xmm3, %xmm0 -; SSE-NEXT: por %xmm4, %xmm0 -; SSE-NEXT: retq +; SSE2-LABEL: splatvar_funnnel_v2i64: +; SSE2: # %bb.0: +; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] +; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE2-NEXT: movdqa %xmm0, %xmm2 +; SSE2-NEXT: psrlq %xmm1, %xmm2 +; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [64,64] +; SSE2-NEXT: psubq %xmm1, %xmm3 +; SSE2-NEXT: movdqa %xmm0, %xmm4 +; SSE2-NEXT: psllq %xmm3, %xmm4 +; SSE2-NEXT: por %xmm2, %xmm4 +; SSE2-NEXT: pxor %xmm2, %xmm2 +; SSE2-NEXT: pcmpeqd %xmm1, %xmm2 +; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,0,3,2] +; SSE2-NEXT: pand %xmm2, %xmm1 +; SSE2-NEXT: pand %xmm1, %xmm0 +; SSE2-NEXT: pandn %xmm4, %xmm1 +; SSE2-NEXT: por %xmm1, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: splatvar_funnnel_v2i64: +; SSE41: # %bb.0: +; SSE41-NEXT: movdqa %xmm0, %xmm2 +; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm1[0,1,0,1] +; SSE41-NEXT: pand {{.*}}(%rip), %xmm3 +; SSE41-NEXT: psrlq %xmm3, %xmm0 +; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [64,64] +; SSE41-NEXT: psubq %xmm3, %xmm4 +; SSE41-NEXT: movdqa %xmm2, %xmm1 +; SSE41-NEXT: psllq %xmm4, %xmm1 +; SSE41-NEXT: por %xmm0, %xmm1 +; SSE41-NEXT: pxor %xmm0, %xmm0 +; SSE41-NEXT: pcmpeqq %xmm3, %xmm0 +; SSE41-NEXT: blendvpd %xmm0, %xmm2, %xmm1 +; SSE41-NEXT: movapd %xmm1, %xmm0 +; SSE41-NEXT: retq ; ; AVX1-LABEL: splatvar_funnnel_v2i64: ; AVX1: # %bb.0: ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63] -; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm3 -; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX1-NEXT: vpsubq %xmm1, %xmm4, %xmm1 -; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm3, %xmm0, %xmm0 +; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm2 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; AVX1-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; AVX1-NEXT: vpsllq %xmm3, %xmm0, %xmm3 +; AVX1-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqq %xmm3, %xmm1, %xmm1 +; AVX1-NEXT: vblendvpd %xmm1, %xmm0, %xmm2, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: splatvar_funnnel_v2i64: ; AVX2: # %bb.0: ; AVX2-NEXT: vpbroadcastq %xmm1, %xmm1 -; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63] -; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX2-NEXT: vpsrlq %xmm3, %xmm0, %xmm3 -; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX2-NEXT: vpsubq %xmm1, %xmm4, %xmm1 -; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX2-NEXT: vpsllq %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: vpor %xmm3, %xmm0, %xmm0 +; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX2-NEXT: vpsrlq %xmm1, %xmm0, %xmm2 +; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; AVX2-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; AVX2-NEXT: vpsllq %xmm3, %xmm0, %xmm3 +; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqq %xmm3, %xmm1, %xmm1 +; AVX2-NEXT: vblendvpd %xmm1, %xmm0, %xmm2, %xmm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: splatvar_funnnel_v2i64: @@ -782,39 +1125,57 @@ ; XOPAVX1-LABEL: splatvar_funnnel_v2i64: ; XOPAVX1: # %bb.0: ; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] -; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX1-NEXT: vpsubq %xmm1, %xmm2, %xmm1 -; XOPAVX1-NEXT: vprotq %xmm1, %xmm0, %xmm0 +; XOPAVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; XOPAVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm2 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; XOPAVX1-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; XOPAVX1-NEXT: vpsllq %xmm3, %xmm0, %xmm3 +; XOPAVX1-NEXT: vpor %xmm2, %xmm3, %xmm2 +; XOPAVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX1-NEXT: vpcomeqq %xmm3, %xmm1, %xmm1 +; XOPAVX1-NEXT: vblendvpd %xmm1, %xmm0, %xmm2, %xmm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: splatvar_funnnel_v2i64: ; XOPAVX2: # %bb.0: ; XOPAVX2-NEXT: vpbroadcastq %xmm1, %xmm1 -; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX2-NEXT: vpsubq %xmm1, %xmm2, %xmm1 -; XOPAVX2-NEXT: vprotq %xmm1, %xmm0, %xmm0 +; XOPAVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; XOPAVX2-NEXT: vpsrlq %xmm1, %xmm0, %xmm2 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; XOPAVX2-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpsllq %xmm3, %xmm0, %xmm3 +; XOPAVX2-NEXT: vpor %xmm2, %xmm3, %xmm2 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpcomeqq %xmm3, %xmm1, %xmm1 +; XOPAVX2-NEXT: vblendvpd %xmm1, %xmm0, %xmm2, %xmm0 ; XOPAVX2-NEXT: retq ; ; X32-SSE-LABEL: splatvar_funnnel_v2i64: ; X32-SSE: # %bb.0: ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] -; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [63,0,63,0] -; X32-SSE-NEXT: pxor %xmm3, %xmm3 -; X32-SSE-NEXT: psubq %xmm1, %xmm3 -; X32-SSE-NEXT: pand %xmm2, %xmm1 +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 +; X32-SSE-NEXT: movdqa %xmm0, %xmm2 +; X32-SSE-NEXT: psrlq %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] ; X32-SSE-NEXT: movdqa %xmm0, %xmm4 -; X32-SSE-NEXT: psrlq %xmm1, %xmm4 -; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] +; X32-SSE-NEXT: psrlq %xmm3, %xmm4 +; X32-SSE-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1] +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [64,0,64,0] +; X32-SSE-NEXT: psubq %xmm1, %xmm2 +; X32-SSE-NEXT: movdqa %xmm0, %xmm3 +; X32-SSE-NEXT: psllq %xmm2, %xmm3 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] ; X32-SSE-NEXT: movdqa %xmm0, %xmm5 -; X32-SSE-NEXT: psrlq %xmm1, %xmm5 -; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm4[0],xmm5[1] -; X32-SSE-NEXT: pand %xmm2, %xmm3 -; X32-SSE-NEXT: movdqa %xmm0, %xmm1 -; X32-SSE-NEXT: psllq %xmm3, %xmm1 -; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1] -; X32-SSE-NEXT: psllq %xmm2, %xmm0 -; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] -; X32-SSE-NEXT: orpd %xmm5, %xmm0 +; X32-SSE-NEXT: psllq %xmm2, %xmm5 +; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1] +; X32-SSE-NEXT: orpd %xmm4, %xmm5 +; X32-SSE-NEXT: pxor %xmm2, %xmm2 +; X32-SSE-NEXT: pcmpeqd %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,0,3,2] +; X32-SSE-NEXT: pand %xmm2, %xmm1 +; X32-SSE-NEXT: pand %xmm1, %xmm0 +; X32-SSE-NEXT: pandn %xmm5, %xmm1 +; X32-SSE-NEXT: por %xmm1, %xmm0 ; X32-SSE-NEXT: retl %splat = shufflevector <2 x i64> %amt, <2 x i64> undef, <2 x i32> zeroinitializer %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> %splat) @@ -824,64 +1185,77 @@ define <4 x i32> @splatvar_funnnel_v4i32(<4 x i32> %x, <4 x i32> %amt) nounwind { ; SSE2-LABEL: splatvar_funnnel_v4i32: ; SSE2: # %bb.0: +; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] +; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE2-NEXT: pxor %xmm2, %xmm2 +; SSE2-NEXT: xorps %xmm3, %xmm3 +; SSE2-NEXT: movss {{.*#+}} xmm3 = xmm1[0],xmm3[1,2,3] +; SSE2-NEXT: movdqa %xmm0, %xmm4 +; SSE2-NEXT: psrld %xmm3, %xmm4 ; SSE2-NEXT: movd %xmm1, %eax -; SSE2-NEXT: negl %eax -; SSE2-NEXT: andl $31, %eax -; SSE2-NEXT: movd %eax, %xmm1 -; SSE2-NEXT: movdqa %xmm0, %xmm2 -; SSE2-NEXT: pslld %xmm1, %xmm2 ; SSE2-NEXT: movl $32, %ecx ; SSE2-NEXT: subl %eax, %ecx -; SSE2-NEXT: movd %ecx, %xmm1 -; SSE2-NEXT: psrld %xmm1, %xmm0 -; SSE2-NEXT: por %xmm2, %xmm0 +; SSE2-NEXT: movd %ecx, %xmm3 +; SSE2-NEXT: movdqa %xmm0, %xmm5 +; SSE2-NEXT: pslld %xmm3, %xmm5 +; SSE2-NEXT: por %xmm4, %xmm5 +; SSE2-NEXT: pcmpeqd %xmm2, %xmm1 +; SSE2-NEXT: pand %xmm1, %xmm0 +; SSE2-NEXT: pandn %xmm5, %xmm1 +; SSE2-NEXT: por %xmm1, %xmm0 ; SSE2-NEXT: retq ; ; SSE41-LABEL: splatvar_funnnel_v4i32: ; SSE41: # %bb.0: -; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; SSE41-NEXT: pxor %xmm2, %xmm2 -; SSE41-NEXT: psubd %xmm1, %xmm2 -; SSE41-NEXT: pand {{.*}}(%rip), %xmm2 -; SSE41-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm2[0],zero,xmm2[1],zero -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: pslld %xmm1, %xmm3 -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [32,32,32,32] -; SSE41-NEXT: psubd %xmm2, %xmm1 -; SSE41-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero -; SSE41-NEXT: psrld %xmm1, %xmm0 -; SSE41-NEXT: por %xmm3, %xmm0 +; SSE41-NEXT: movdqa %xmm0, %xmm2 +; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm1[0,0,0,0] +; SSE41-NEXT: pand {{.*}}(%rip), %xmm3 +; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm3[0],zero,xmm3[1],zero +; SSE41-NEXT: movdqa %xmm2, %xmm4 +; SSE41-NEXT: psrld %xmm0, %xmm4 +; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [32,32,32,32] +; SSE41-NEXT: psubd %xmm3, %xmm0 +; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero +; SSE41-NEXT: movdqa %xmm2, %xmm1 +; SSE41-NEXT: pslld %xmm0, %xmm1 +; SSE41-NEXT: por %xmm4, %xmm1 +; SSE41-NEXT: pxor %xmm0, %xmm0 +; SSE41-NEXT: pcmpeqd %xmm3, %xmm0 +; SSE41-NEXT: blendvps %xmm0, %xmm2, %xmm1 +; SSE41-NEXT: movaps %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: splatvar_funnnel_v4i32: ; AVX1: # %bb.0: ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero -; AVX1-NEXT: vpslld %xmm2, %xmm0, %xmm2 +; AVX1-NEXT: vpsrld %xmm2, %xmm0, %xmm2 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [32,32,32,32] -; AVX1-NEXT: vpsubd %xmm1, %xmm3, %xmm1 -; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero -; AVX1-NEXT: vpsrld %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0 +; AVX1-NEXT: vpsubd %xmm1, %xmm3, %xmm3 +; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero +; AVX1-NEXT: vpslld %xmm3, %xmm0, %xmm3 +; AVX1-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqd %xmm3, %xmm1, %xmm1 +; AVX1-NEXT: vblendvps %xmm1, %xmm0, %xmm2, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: splatvar_funnnel_v4i32: ; AVX2: # %bb.0: ; AVX2-NEXT: vpbroadcastd %xmm1, %xmm1 -; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX2-NEXT: vpsubd %xmm1, %xmm2, %xmm1 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [31,31,31,31] ; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1 ; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero -; AVX2-NEXT: vpslld %xmm2, %xmm0, %xmm2 +; AVX2-NEXT: vpsrld %xmm2, %xmm0, %xmm2 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [32,32,32,32] -; AVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm1 -; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero -; AVX2-NEXT: vpsrld %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0 +; AVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm3 +; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero +; AVX2-NEXT: vpslld %xmm3, %xmm0, %xmm3 +; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqd %xmm3, %xmm1, %xmm1 +; AVX2-NEXT: vblendvps %xmm1, %xmm0, %xmm2, %xmm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: splatvar_funnnel_v4i32: @@ -917,32 +1291,56 @@ ; XOPAVX1-LABEL: splatvar_funnnel_v4i32: ; XOPAVX1: # %bb.0: ; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1 -; XOPAVX1-NEXT: vprotd %xmm1, %xmm0, %xmm0 +; XOPAVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; XOPAVX1-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero +; XOPAVX1-NEXT: vpsrld %xmm2, %xmm0, %xmm2 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [32,32,32,32] +; XOPAVX1-NEXT: vpsubd %xmm1, %xmm3, %xmm3 +; XOPAVX1-NEXT: vpmovzxdq {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero +; XOPAVX1-NEXT: vpslld %xmm3, %xmm0, %xmm3 +; XOPAVX1-NEXT: vpor %xmm2, %xmm3, %xmm2 +; XOPAVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX1-NEXT: vpcomeqd %xmm3, %xmm1, %xmm1 +; XOPAVX1-NEXT: vblendvps %xmm1, %xmm0, %xmm2, %xmm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: splatvar_funnnel_v4i32: ; XOPAVX2: # %bb.0: ; XOPAVX2-NEXT: vpbroadcastd %xmm1, %xmm1 -; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX2-NEXT: vpsubd %xmm1, %xmm2, %xmm1 -; XOPAVX2-NEXT: vprotd %xmm1, %xmm0, %xmm0 +; XOPAVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [31,31,31,31] +; XOPAVX2-NEXT: vpand %xmm2, %xmm1, %xmm1 +; XOPAVX2-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero +; XOPAVX2-NEXT: vpsrld %xmm2, %xmm0, %xmm2 +; XOPAVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [32,32,32,32] +; XOPAVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpmovzxdq {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero +; XOPAVX2-NEXT: vpslld %xmm3, %xmm0, %xmm3 +; XOPAVX2-NEXT: vpor %xmm2, %xmm3, %xmm2 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpcomeqd %xmm3, %xmm1, %xmm1 +; XOPAVX2-NEXT: vblendvps %xmm1, %xmm0, %xmm2, %xmm0 ; XOPAVX2-NEXT: retq ; ; X32-SSE-LABEL: splatvar_funnnel_v4i32: ; X32-SSE: # %bb.0: +; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 +; X32-SSE-NEXT: pxor %xmm2, %xmm2 +; X32-SSE-NEXT: xorps %xmm3, %xmm3 +; X32-SSE-NEXT: movss {{.*#+}} xmm3 = xmm1[0],xmm3[1,2,3] +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: psrld %xmm3, %xmm4 ; X32-SSE-NEXT: movd %xmm1, %eax -; X32-SSE-NEXT: negl %eax -; X32-SSE-NEXT: andl $31, %eax -; X32-SSE-NEXT: movd %eax, %xmm1 -; X32-SSE-NEXT: movdqa %xmm0, %xmm2 -; X32-SSE-NEXT: pslld %xmm1, %xmm2 ; X32-SSE-NEXT: movl $32, %ecx ; X32-SSE-NEXT: subl %eax, %ecx -; X32-SSE-NEXT: movd %ecx, %xmm1 -; X32-SSE-NEXT: psrld %xmm1, %xmm0 -; X32-SSE-NEXT: por %xmm2, %xmm0 +; X32-SSE-NEXT: movd %ecx, %xmm3 +; X32-SSE-NEXT: movdqa %xmm0, %xmm5 +; X32-SSE-NEXT: pslld %xmm3, %xmm5 +; X32-SSE-NEXT: por %xmm4, %xmm5 +; X32-SSE-NEXT: pcmpeqd %xmm2, %xmm1 +; X32-SSE-NEXT: pand %xmm1, %xmm0 +; X32-SSE-NEXT: pandn %xmm5, %xmm1 +; X32-SSE-NEXT: por %xmm1, %xmm0 ; X32-SSE-NEXT: retl %splat = shufflevector <4 x i32> %amt, <4 x i32> undef, <4 x i32> zeroinitializer %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> %splat) @@ -954,117 +1352,196 @@ ; SSE2: # %bb.0: ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; SSE2-NEXT: pxor %xmm2, %xmm2 +; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [16,16,16,16,16,16,16,16] ; SSE2-NEXT: psubw %xmm1, %xmm2 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm2 -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16] -; SSE2-NEXT: psubw %xmm2, %xmm1 -; SSE2-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1] -; SSE2-NEXT: psrldq {{.*#+}} xmm2 = xmm2[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: psllw %xmm2, %xmm3 +; SSE2-NEXT: pxor %xmm3, %xmm3 +; SSE2-NEXT: pcmpeqw %xmm1, %xmm3 ; SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1] ; SSE2-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero -; SSE2-NEXT: psrlw %xmm1, %xmm0 +; SSE2-NEXT: movdqa %xmm0, %xmm4 +; SSE2-NEXT: psrlw %xmm1, %xmm4 +; SSE2-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1] +; SSE2-NEXT: psrldq {{.*#+}} xmm2 = xmm2[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero +; SSE2-NEXT: movdqa %xmm0, %xmm1 +; SSE2-NEXT: psllw %xmm2, %xmm1 +; SSE2-NEXT: por %xmm4, %xmm1 +; SSE2-NEXT: pand %xmm3, %xmm0 +; SSE2-NEXT: pandn %xmm1, %xmm3 ; SSE2-NEXT: por %xmm3, %xmm0 ; SSE2-NEXT: retq ; ; SSE41-LABEL: splatvar_funnnel_v8i16: ; SSE41: # %bb.0: -; SSE41-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7] -; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; SSE41-NEXT: pxor %xmm2, %xmm2 -; SSE41-NEXT: psubw %xmm1, %xmm2 -; SSE41-NEXT: pand {{.*}}(%rip), %xmm2 -; SSE41-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero -; SSE41-NEXT: movdqa %xmm0, %xmm3 -; SSE41-NEXT: psllw %xmm1, %xmm3 -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16] -; SSE41-NEXT: psubw %xmm2, %xmm1 -; SSE41-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; SSE41-NEXT: psrlw %xmm1, %xmm0 -; SSE41-NEXT: por %xmm3, %xmm0 +; SSE41-NEXT: movdqa %xmm0, %xmm2 +; SSE41-NEXT: pshuflw {{.*#+}} xmm0 = xmm1[0,0,2,3,4,5,6,7] +; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,0,0,0] +; SSE41-NEXT: pand {{.*}}(%rip), %xmm3 +; SSE41-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; SSE41-NEXT: movdqa %xmm2, %xmm4 +; SSE41-NEXT: psrlw %xmm0, %xmm4 +; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [16,16,16,16,16,16,16,16] +; SSE41-NEXT: psubw %xmm3, %xmm0 +; SSE41-NEXT: pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero +; SSE41-NEXT: movdqa %xmm2, %xmm1 +; SSE41-NEXT: psllw %xmm0, %xmm1 +; SSE41-NEXT: por %xmm4, %xmm1 +; SSE41-NEXT: pxor %xmm0, %xmm0 +; SSE41-NEXT: pcmpeqw %xmm3, %xmm0 +; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm1 +; SSE41-NEXT: movdqa %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: splatvar_funnnel_v8i16: ; AVX1: # %bb.0: ; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7] ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX1-NEXT: vpsubw %xmm1, %xmm2, %xmm1 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 ; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX1-NEXT: vpsllw %xmm2, %xmm0, %xmm2 +; AVX1-NEXT: vpsrlw %xmm2, %xmm0, %xmm2 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] -; AVX1-NEXT: vpsubw %xmm1, %xmm3, %xmm1 -; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0 +; AVX1-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; AVX1-NEXT: vpsllw %xmm3, %xmm0, %xmm3 +; AVX1-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqw %xmm3, %xmm1, %xmm1 +; AVX1-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: splatvar_funnnel_v8i16: ; AVX2: # %bb.0: ; AVX2-NEXT: vpbroadcastw %xmm1, %xmm1 -; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX2-NEXT: vpsubw %xmm1, %xmm2, %xmm1 ; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 ; AVX2-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX2-NEXT: vpsllw %xmm2, %xmm0, %xmm2 +; AVX2-NEXT: vpsrlw %xmm2, %xmm0, %xmm2 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] -; AVX2-NEXT: vpsubw %xmm1, %xmm3, %xmm1 -; AVX2-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0 +; AVX2-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; AVX2-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; AVX2-NEXT: vpsllw %xmm3, %xmm0, %xmm3 +; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqw %xmm3, %xmm1, %xmm1 +; AVX2-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX2-NEXT: retq ; -; AVX512-LABEL: splatvar_funnnel_v8i16: -; AVX512: # %bb.0: -; AVX512-NEXT: vpbroadcastw %xmm1, %xmm1 -; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512-NEXT: vpsubw %xmm1, %xmm2, %xmm1 -; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 -; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX512-NEXT: vpsllw %xmm2, %xmm0, %xmm2 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] -; AVX512-NEXT: vpsubw %xmm1, %xmm3, %xmm1 -; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX512-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 -; AVX512-NEXT: vpor %xmm0, %xmm2, %xmm0 -; AVX512-NEXT: retq +; AVX512F-LABEL: splatvar_funnnel_v8i16: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vpbroadcastw %xmm1, %xmm1 +; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512F-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero +; AVX512F-NEXT: vpsrlw %xmm2, %xmm0, %xmm2 +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; AVX512F-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; AVX512F-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; AVX512F-NEXT: vpsllw %xmm3, %xmm0, %xmm3 +; AVX512F-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqw %xmm3, %xmm1, %xmm1 +; AVX512F-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: splatvar_funnnel_v8i16: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: vpbroadcastw %xmm1, %xmm1 +; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512VL-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero +; AVX512VL-NEXT: vpsrlw %xmm2, %xmm0, %xmm2 +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; AVX512VL-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; AVX512VL-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; AVX512VL-NEXT: vpsllw %xmm3, %xmm0, %xmm3 +; AVX512VL-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX512VL-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VL-NEXT: vpcmpeqw %xmm3, %xmm1, %xmm1 +; AVX512VL-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: splatvar_funnnel_v8i16: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vpbroadcastw %xmm1, %xmm1 +; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero +; AVX512BW-NEXT: vpsrlw %xmm2, %xmm0, %xmm2 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; AVX512BW-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; AVX512BW-NEXT: vpsllw %xmm3, %xmm0, %xmm3 +; AVX512BW-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqw %xmm3, %xmm1, %xmm1 +; AVX512BW-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 +; AVX512BW-NEXT: retq +; +; AVX512VLBW-LABEL: splatvar_funnnel_v8i16: +; AVX512VLBW: # %bb.0: +; AVX512VLBW-NEXT: vpbroadcastw %xmm1, %xmm1 +; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm2 +; AVX512VLBW-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero +; AVX512VLBW-NEXT: vpsrlw %xmm1, %xmm0, %xmm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; AVX512VLBW-NEXT: vpsubw %xmm2, %xmm3, %xmm3 +; AVX512VLBW-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; AVX512VLBW-NEXT: vpsllw %xmm3, %xmm0, %xmm3 +; AVX512VLBW-NEXT: vpor %xmm1, %xmm3, %xmm1 +; AVX512VLBW-NEXT: vptestnmw %xmm2, %xmm2, %k1 +; AVX512VLBW-NEXT: vmovdqu16 %xmm0, %xmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %xmm1, %xmm0 +; AVX512VLBW-NEXT: retq ; ; XOPAVX1-LABEL: splatvar_funnnel_v8i16: ; XOPAVX1: # %bb.0: ; XOPAVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7] ; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX1-NEXT: vpsubw %xmm1, %xmm2, %xmm1 -; XOPAVX1-NEXT: vprotw %xmm1, %xmm0, %xmm0 +; XOPAVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; XOPAVX1-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero +; XOPAVX1-NEXT: vpsrlw %xmm2, %xmm0, %xmm2 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; XOPAVX1-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; XOPAVX1-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; XOPAVX1-NEXT: vpsllw %xmm3, %xmm0, %xmm3 +; XOPAVX1-NEXT: vpor %xmm2, %xmm3, %xmm2 +; XOPAVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX1-NEXT: vpcomeqw %xmm3, %xmm1, %xmm1 +; XOPAVX1-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: splatvar_funnnel_v8i16: ; XOPAVX2: # %bb.0: ; XOPAVX2-NEXT: vpbroadcastw %xmm1, %xmm1 -; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX2-NEXT: vpsubw %xmm1, %xmm2, %xmm1 -; XOPAVX2-NEXT: vprotw %xmm1, %xmm0, %xmm0 +; XOPAVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; XOPAVX2-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero +; XOPAVX2-NEXT: vpsrlw %xmm2, %xmm0, %xmm2 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; XOPAVX2-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; XOPAVX2-NEXT: vpsllw %xmm3, %xmm0, %xmm3 +; XOPAVX2-NEXT: vpor %xmm2, %xmm3, %xmm2 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpcomeqw %xmm3, %xmm1, %xmm1 +; XOPAVX2-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; XOPAVX2-NEXT: retq ; ; X32-SSE-LABEL: splatvar_funnnel_v8i16: ; X32-SSE: # %bb.0: ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7] ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; X32-SSE-NEXT: pxor %xmm2, %xmm2 +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [16,16,16,16,16,16,16,16] ; X32-SSE-NEXT: psubw %xmm1, %xmm2 -; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2 -; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16] -; X32-SSE-NEXT: psubw %xmm2, %xmm1 -; X32-SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1] -; X32-SSE-NEXT: psrldq {{.*#+}} xmm2 = xmm2[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero -; X32-SSE-NEXT: movdqa %xmm0, %xmm3 -; X32-SSE-NEXT: psllw %xmm2, %xmm3 +; X32-SSE-NEXT: pxor %xmm3, %xmm3 +; X32-SSE-NEXT: pcmpeqw %xmm1, %xmm3 ; X32-SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1] ; X32-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero -; X32-SSE-NEXT: psrlw %xmm1, %xmm0 +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: psrlw %xmm1, %xmm4 +; X32-SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1] +; X32-SSE-NEXT: psrldq {{.*#+}} xmm2 = xmm2[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero +; X32-SSE-NEXT: movdqa %xmm0, %xmm1 +; X32-SSE-NEXT: psllw %xmm2, %xmm1 +; X32-SSE-NEXT: por %xmm4, %xmm1 +; X32-SSE-NEXT: pand %xmm3, %xmm0 +; X32-SSE-NEXT: pandn %xmm1, %xmm3 ; X32-SSE-NEXT: por %xmm3, %xmm0 ; X32-SSE-NEXT: retl %splat = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> zeroinitializer @@ -1078,176 +1555,186 @@ ; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; SSE2-NEXT: pxor %xmm2, %xmm2 +; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] ; SSE2-NEXT: psubb %xmm1, %xmm2 -; SSE2-NEXT: pand {{.*}}(%rip), %xmm2 -; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] -; SSE2-NEXT: psubb %xmm2, %xmm3 +; SSE2-NEXT: pxor %xmm3, %xmm3 +; SSE2-NEXT: pcmpeqb %xmm1, %xmm3 +; SSE2-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0] +; SSE2-NEXT: psrldq {{.*#+}} xmm1 = xmm1[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero +; SSE2-NEXT: movdqa %xmm0, %xmm4 +; SSE2-NEXT: psrlw %xmm1, %xmm4 +; SSE2-NEXT: pcmpeqd %xmm5, %xmm5 +; SSE2-NEXT: psrlw %xmm1, %xmm5 +; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 +; SSE2-NEXT: psrlw $8, %xmm5 +; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] +; SSE2-NEXT: pshuflw {{.*#+}} xmm5 = xmm5[0,0,2,3,4,5,6,7] +; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,0,0,0] +; SSE2-NEXT: pand %xmm4, %xmm5 ; SSE2-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0] ; SSE2-NEXT: psrldq {{.*#+}} xmm2 = xmm2[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero -; SSE2-NEXT: movdqa %xmm0, %xmm1 +; SSE2-NEXT: movdqa %xmm0, %xmm4 +; SSE2-NEXT: psllw %xmm2, %xmm4 ; SSE2-NEXT: psllw %xmm2, %xmm1 -; SSE2-NEXT: pcmpeqd %xmm4, %xmm4 -; SSE2-NEXT: pcmpeqd %xmm5, %xmm5 -; SSE2-NEXT: psllw %xmm2, %xmm5 -; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] -; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm5[0,0,2,3,4,5,6,7] -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,0,0,0] -; SSE2-NEXT: pand %xmm2, %xmm1 -; SSE2-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0] -; SSE2-NEXT: psrldq {{.*#+}} xmm3 = xmm3[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero -; SSE2-NEXT: psrlw %xmm3, %xmm0 -; SSE2-NEXT: psrlw %xmm3, %xmm4 -; SSE2-NEXT: psrlw $8, %xmm4 -; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] -; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm4[0,0,2,3,4,5,6,7] -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,0,0,0] -; SSE2-NEXT: pand %xmm0, %xmm2 -; SSE2-NEXT: por %xmm2, %xmm1 -; SSE2-NEXT: movdqa %xmm1, %xmm0 +; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] +; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7] +; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] +; SSE2-NEXT: pand %xmm4, %xmm1 +; SSE2-NEXT: por %xmm5, %xmm1 +; SSE2-NEXT: pand %xmm3, %xmm0 +; SSE2-NEXT: pandn %xmm1, %xmm3 +; SSE2-NEXT: por %xmm3, %xmm0 ; SSE2-NEXT: retq ; ; SSE41-LABEL: splatvar_funnnel_v16i8: ; SSE41: # %bb.0: -; SSE41-NEXT: pxor %xmm2, %xmm2 -; SSE41-NEXT: pshufb %xmm2, %xmm1 -; SSE41-NEXT: pxor %xmm3, %xmm3 -; SSE41-NEXT: psubb %xmm1, %xmm3 -; SSE41-NEXT: pand {{.*}}(%rip), %xmm3 -; SSE41-NEXT: pmovzxbq {{.*#+}} xmm4 = xmm3[0],zero,zero,zero,zero,zero,zero,zero,xmm3[1],zero,zero,zero,zero,zero,zero,zero -; SSE41-NEXT: movdqa %xmm0, %xmm1 -; SSE41-NEXT: psllw %xmm4, %xmm1 +; SSE41-NEXT: movdqa %xmm0, %xmm2 +; SSE41-NEXT: pxor %xmm0, %xmm0 +; SSE41-NEXT: pshufb %xmm0, %xmm1 +; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 +; SSE41-NEXT: pmovzxbq {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero +; SSE41-NEXT: movdqa %xmm2, %xmm4 +; SSE41-NEXT: psrlw %xmm3, %xmm4 ; SSE41-NEXT: pcmpeqd %xmm5, %xmm5 ; SSE41-NEXT: pcmpeqd %xmm6, %xmm6 -; SSE41-NEXT: psllw %xmm4, %xmm6 -; SSE41-NEXT: pshufb %xmm2, %xmm6 -; SSE41-NEXT: pand %xmm6, %xmm1 -; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] -; SSE41-NEXT: psubb %xmm3, %xmm2 -; SSE41-NEXT: pmovzxbq {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero -; SSE41-NEXT: psrlw %xmm2, %xmm0 -; SSE41-NEXT: psrlw %xmm2, %xmm5 -; SSE41-NEXT: pshufb {{.*#+}} xmm5 = xmm5[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] -; SSE41-NEXT: pand %xmm0, %xmm5 -; SSE41-NEXT: por %xmm5, %xmm1 -; SSE41-NEXT: movdqa %xmm1, %xmm0 +; SSE41-NEXT: psrlw %xmm3, %xmm6 +; SSE41-NEXT: pshufb {{.*#+}} xmm6 = xmm6[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] +; SSE41-NEXT: pand %xmm4, %xmm6 +; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; SSE41-NEXT: psubb %xmm1, %xmm3 +; SSE41-NEXT: pmovzxbq {{.*#+}} xmm4 = xmm3[0],zero,zero,zero,zero,zero,zero,zero,xmm3[1],zero,zero,zero,zero,zero,zero,zero +; SSE41-NEXT: movdqa %xmm2, %xmm3 +; SSE41-NEXT: psllw %xmm4, %xmm3 +; SSE41-NEXT: psllw %xmm4, %xmm5 +; SSE41-NEXT: pshufb %xmm0, %xmm5 +; SSE41-NEXT: pand %xmm5, %xmm3 +; SSE41-NEXT: por %xmm6, %xmm3 +; SSE41-NEXT: pcmpeqb %xmm1, %xmm0 +; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm3 +; SSE41-NEXT: movdqa %xmm3, %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: splatvar_funnnel_v16i8: ; AVX1: # %bb.0: ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm1 ; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 ; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX1-NEXT: vpsllw %xmm3, %xmm0, %xmm4 +; AVX1-NEXT: vpsrlw %xmm3, %xmm0, %xmm4 ; AVX1-NEXT: vpcmpeqd %xmm5, %xmm5, %xmm5 -; AVX1-NEXT: vpsllw %xmm3, %xmm5, %xmm3 -; AVX1-NEXT: vpshufb %xmm2, %xmm3, %xmm2 -; AVX1-NEXT: vpand %xmm2, %xmm4, %xmm2 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] -; AVX1-NEXT: vpsubb %xmm1, %xmm3, %xmm1 -; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpsrlw %xmm1, %xmm5, %xmm1 -; AVX1-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] -; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0 +; AVX1-NEXT: vpsrlw %xmm3, %xmm5, %xmm3 +; AVX1-NEXT: vpshufb {{.*#+}} xmm3 = xmm3[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] +; AVX1-NEXT: vpand %xmm3, %xmm4, %xmm3 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX1-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,zero,zero,zero,zero,xmm4[1],zero,zero,zero,zero,zero,zero,zero +; AVX1-NEXT: vpsllw %xmm4, %xmm0, %xmm6 +; AVX1-NEXT: vpsllw %xmm4, %xmm5, %xmm4 +; AVX1-NEXT: vpshufb %xmm2, %xmm4, %xmm4 +; AVX1-NEXT: vpand %xmm4, %xmm6, %xmm4 +; AVX1-NEXT: vpor %xmm3, %xmm4, %xmm3 +; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1 +; AVX1-NEXT: vpblendvb %xmm1, %xmm0, %xmm3, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: splatvar_funnnel_v16i8: ; AVX2: # %bb.0: ; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1 ; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 ; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX2-NEXT: vpsllw %xmm2, %xmm0, %xmm3 +; AVX2-NEXT: vpsrlw %xmm2, %xmm0, %xmm3 ; AVX2-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4 -; AVX2-NEXT: vpsllw %xmm2, %xmm4, %xmm2 +; AVX2-NEXT: vpsrlw %xmm2, %xmm4, %xmm2 +; AVX2-NEXT: vpsrlw $8, %xmm2, %xmm2 ; AVX2-NEXT: vpbroadcastb %xmm2, %xmm2 ; AVX2-NEXT: vpand %xmm2, %xmm3, %xmm2 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] -; AVX2-NEXT: vpsubb %xmm1, %xmm3, %xmm1 -; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX2-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: vpsrlw %xmm1, %xmm4, %xmm1 -; AVX2-NEXT: vpsrlw $8, %xmm1, %xmm1 -; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0 -; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0 +; AVX2-NEXT: vpsubb %xmm1, %xmm3, %xmm3 +; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,zero,zero,zero,zero,xmm3[1],zero,zero,zero,zero,zero,zero,zero +; AVX2-NEXT: vpsllw %xmm3, %xmm0, %xmm5 +; AVX2-NEXT: vpsllw %xmm3, %xmm4, %xmm3 +; AVX2-NEXT: vpbroadcastb %xmm3, %xmm3 +; AVX2-NEXT: vpand %xmm3, %xmm5, %xmm3 +; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX2-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: splatvar_funnnel_v16i8: ; AVX512F: # %bb.0: ; AVX512F-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero -; AVX512F-NEXT: vpsrlvd %zmm3, %zmm0, %zmm3 -; AVX512F-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512F-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero -; AVX512F-NEXT: vpsllvd %zmm1, %zmm0, %zmm0 -; AVX512F-NEXT: vpord %zmm3, %zmm0, %zmm0 -; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero +; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero +; AVX512F-NEXT: vpsrlvd %zmm3, %zmm2, %zmm3 +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512F-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero,xmm4[8],zero,zero,zero,xmm4[9],zero,zero,zero,xmm4[10],zero,zero,zero,xmm4[11],zero,zero,zero,xmm4[12],zero,zero,zero,xmm4[13],zero,zero,zero,xmm4[14],zero,zero,zero,xmm4[15],zero,zero,zero +; AVX512F-NEXT: vpsllvd %zmm4, %zmm2, %zmm2 +; AVX512F-NEXT: vpord %zmm3, %zmm2, %zmm2 +; AVX512F-NEXT: vpmovdb %zmm2, %xmm2 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX512F-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: splatvar_funnnel_v16i8: ; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero,xmm3[8],zero,zero,zero,xmm3[9],zero,zero,zero,xmm3[10],zero,zero,zero,xmm3[11],zero,zero,zero,xmm3[12],zero,zero,zero,xmm3[13],zero,zero,zero,xmm3[14],zero,zero,zero,xmm3[15],zero,zero,zero -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero -; AVX512VL-NEXT: vpsrlvd %zmm3, %zmm0, %zmm3 -; AVX512VL-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VL-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero -; AVX512VL-NEXT: vpsllvd %zmm1, %zmm0, %zmm0 -; AVX512VL-NEXT: vpord %zmm3, %zmm0, %zmm0 -; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero +; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero +; AVX512VL-NEXT: vpsrlvd %zmm3, %zmm2, %zmm3 +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VL-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero,xmm4[8],zero,zero,zero,xmm4[9],zero,zero,zero,xmm4[10],zero,zero,zero,xmm4[11],zero,zero,zero,xmm4[12],zero,zero,zero,xmm4[13],zero,zero,zero,xmm4[14],zero,zero,zero,xmm4[15],zero,zero,zero +; AVX512VL-NEXT: vpsllvd %zmm4, %zmm2, %zmm2 +; AVX512VL-NEXT: vpord %zmm3, %zmm2, %zmm2 +; AVX512VL-NEXT: vpmovdb %zmm2, %xmm2 +; AVX512VL-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VL-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX512VL-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: splatvar_funnnel_v16i8: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero -; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero -; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero +; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm2, %zmm3 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero,xmm4[8],zero,xmm4[9],zero,xmm4[10],zero,xmm4[11],zero,xmm4[12],zero,xmm4[13],zero,xmm4[14],zero,xmm4[15],zero +; AVX512BW-NEXT: vpsllvw %zmm4, %zmm2, %zmm2 +; AVX512BW-NEXT: vpor %ymm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vpmovwb %zmm2, %ymm2 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %xmm3, %xmm1, %xmm1 +; AVX512BW-NEXT: vpblendvb %xmm1, %xmm0, %xmm2, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v16i8: ; AVX512VLBW: # %bb.0: ; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX512VLBW-NEXT: vpsrlvw %ymm3, %ymm0, %ymm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero -; AVX512VLBW-NEXT: vpsllvw %ymm1, %ymm0, %ymm0 -; AVX512VLBW-NEXT: vpor %ymm3, %ymm0, %ymm0 -; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm3 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero +; AVX512VLBW-NEXT: vpsrlvw %ymm1, %ymm2, %ymm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VLBW-NEXT: vpsubb %xmm3, %xmm4, %xmm4 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero,xmm4[8],zero,xmm4[9],zero,xmm4[10],zero,xmm4[11],zero,xmm4[12],zero,xmm4[13],zero,xmm4[14],zero,xmm4[15],zero +; AVX512VLBW-NEXT: vpsllvw %ymm4, %ymm2, %ymm2 +; AVX512VLBW-NEXT: vpor %ymm1, %ymm2, %ymm1 +; AVX512VLBW-NEXT: vpmovwb %ymm1, %xmm1 +; AVX512VLBW-NEXT: vptestnmb %xmm3, %xmm3, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %xmm0, %xmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %xmm1, %xmm0 ; AVX512VLBW-NEXT: vzeroupper ; AVX512VLBW-NEXT: retq ; @@ -1255,16 +1742,30 @@ ; XOPAVX1: # %bb.0: ; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; XOPAVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; XOPAVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm1 -; XOPAVX1-NEXT: vprotb %xmm1, %xmm0, %xmm0 +; XOPAVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; XOPAVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm3 +; XOPAVX1-NEXT: vpshlb %xmm3, %xmm0, %xmm3 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; XOPAVX1-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; XOPAVX1-NEXT: vpshlb %xmm4, %xmm0, %xmm4 +; XOPAVX1-NEXT: vpor %xmm3, %xmm4, %xmm3 +; XOPAVX1-NEXT: vpcomeqb %xmm2, %xmm1, %xmm1 +; XOPAVX1-NEXT: vpblendvb %xmm1, %xmm0, %xmm3, %xmm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: splatvar_funnnel_v16i8: ; XOPAVX2: # %bb.0: ; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1 +; XOPAVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 ; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1 -; XOPAVX2-NEXT: vprotb %xmm1, %xmm0, %xmm0 +; XOPAVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm3 +; XOPAVX2-NEXT: vpshlb %xmm3, %xmm0, %xmm3 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; XOPAVX2-NEXT: vpsubb %xmm1, %xmm4, %xmm4 +; XOPAVX2-NEXT: vpshlb %xmm4, %xmm0, %xmm4 +; XOPAVX2-NEXT: vpor %xmm3, %xmm4, %xmm3 +; XOPAVX2-NEXT: vpcomeqb %xmm2, %xmm1, %xmm1 +; XOPAVX2-NEXT: vpblendvb %xmm1, %xmm0, %xmm3, %xmm0 ; XOPAVX2-NEXT: retq ; ; X32-SSE-LABEL: splatvar_funnnel_v16i8: @@ -1272,33 +1773,36 @@ ; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] ; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7] ; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; X32-SSE-NEXT: pxor %xmm2, %xmm2 +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] ; X32-SSE-NEXT: psubb %xmm1, %xmm2 -; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm2 -; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] -; X32-SSE-NEXT: psubb %xmm2, %xmm3 +; X32-SSE-NEXT: pxor %xmm3, %xmm3 +; X32-SSE-NEXT: pcmpeqb %xmm1, %xmm3 +; X32-SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0] +; X32-SSE-NEXT: psrldq {{.*#+}} xmm1 = xmm1[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: psrlw %xmm1, %xmm4 +; X32-SSE-NEXT: pcmpeqd %xmm5, %xmm5 +; X32-SSE-NEXT: psrlw %xmm1, %xmm5 +; X32-SSE-NEXT: pcmpeqd %xmm1, %xmm1 +; X32-SSE-NEXT: psrlw $8, %xmm5 +; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] +; X32-SSE-NEXT: pshuflw {{.*#+}} xmm5 = xmm5[0,0,2,3,4,5,6,7] +; X32-SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,0,0,0] +; X32-SSE-NEXT: pand %xmm4, %xmm5 ; X32-SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0] ; X32-SSE-NEXT: psrldq {{.*#+}} xmm2 = xmm2[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero -; X32-SSE-NEXT: movdqa %xmm0, %xmm1 +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: psllw %xmm2, %xmm4 ; X32-SSE-NEXT: psllw %xmm2, %xmm1 -; X32-SSE-NEXT: pcmpeqd %xmm4, %xmm4 -; X32-SSE-NEXT: pcmpeqd %xmm5, %xmm5 -; X32-SSE-NEXT: psllw %xmm2, %xmm5 -; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] -; X32-SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm5[0,0,2,3,4,5,6,7] -; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,0,0,0] -; X32-SSE-NEXT: pand %xmm2, %xmm1 -; X32-SSE-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0] -; X32-SSE-NEXT: psrldq {{.*#+}} xmm3 = xmm3[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero -; X32-SSE-NEXT: psrlw %xmm3, %xmm0 -; X32-SSE-NEXT: psrlw %xmm3, %xmm4 -; X32-SSE-NEXT: psrlw $8, %xmm4 -; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] -; X32-SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm4[0,0,2,3,4,5,6,7] -; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,0,0,0] -; X32-SSE-NEXT: pand %xmm0, %xmm2 -; X32-SSE-NEXT: por %xmm2, %xmm1 -; X32-SSE-NEXT: movdqa %xmm1, %xmm0 +; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] +; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7] +; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] +; X32-SSE-NEXT: pand %xmm4, %xmm1 +; X32-SSE-NEXT: por %xmm5, %xmm1 +; X32-SSE-NEXT: pand %xmm3, %xmm0 +; X32-SSE-NEXT: pandn %xmm1, %xmm3 +; X32-SSE-NEXT: por %xmm3, %xmm0 ; X32-SSE-NEXT: retl %splat = shufflevector <16 x i8> %amt, <16 x i8> undef, <16 x i32> zeroinitializer %res = call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> %splat) @@ -1384,23 +1888,46 @@ ; AVX512VLBW-NEXT: vprorvq {{.*}}(%rip), %xmm0, %xmm0 ; AVX512VLBW-NEXT: retq ; -; XOP-LABEL: constant_funnnel_v2i64: -; XOP: # %bb.0: -; XOP-NEXT: vprotq {{.*}}(%rip), %xmm0, %xmm0 -; XOP-NEXT: retq +; XOPAVX1-LABEL: constant_funnnel_v2i64: +; XOPAVX1: # %bb.0: +; XOPAVX1-NEXT: vpshlq {{.*}}(%rip), %xmm0, %xmm1 +; XOPAVX1-NEXT: vpshlq {{.*}}(%rip), %xmm0, %xmm0 +; XOPAVX1-NEXT: vpor %xmm1, %xmm0, %xmm0 +; XOPAVX1-NEXT: retq +; +; XOPAVX2-LABEL: constant_funnnel_v2i64: +; XOPAVX2: # %bb.0: +; XOPAVX2-NEXT: vpsrlvq {{.*}}(%rip), %xmm0, %xmm1 +; XOPAVX2-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 +; XOPAVX2-NEXT: vpor %xmm1, %xmm0, %xmm0 +; XOPAVX2-NEXT: retq ; ; X32-SSE-LABEL: constant_funnnel_v2i64: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: movdqa %xmm0, %xmm1 -; X32-SSE-NEXT: psrlq $4, %xmm1 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = <4,u,14,u> +; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2 -; X32-SSE-NEXT: psrlq $14, %xmm2 -; X32-SSE-NEXT: movsd {{.*#+}} xmm2 = xmm1[0],xmm2[1] -; X32-SSE-NEXT: movdqa %xmm0, %xmm1 -; X32-SSE-NEXT: psllq $60, %xmm1 -; X32-SSE-NEXT: psllq $50, %xmm0 -; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] -; X32-SSE-NEXT: orpd %xmm2, %xmm0 +; X32-SSE-NEXT: psrlq %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: psrlq %xmm3, %xmm4 +; X32-SSE-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1] +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [64,0,64,0] +; X32-SSE-NEXT: psubq %xmm1, %xmm2 +; X32-SSE-NEXT: movdqa %xmm0, %xmm3 +; X32-SSE-NEXT: psllq %xmm2, %xmm3 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] +; X32-SSE-NEXT: movdqa %xmm0, %xmm5 +; X32-SSE-NEXT: psllq %xmm2, %xmm5 +; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm3[0],xmm5[1] +; X32-SSE-NEXT: orpd %xmm4, %xmm5 +; X32-SSE-NEXT: pxor %xmm2, %xmm2 +; X32-SSE-NEXT: pcmpeqd %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[1,0,3,2] +; X32-SSE-NEXT: pand %xmm2, %xmm1 +; X32-SSE-NEXT: pand %xmm1, %xmm0 +; X32-SSE-NEXT: pandn %xmm5, %xmm1 +; X32-SSE-NEXT: por %xmm1, %xmm0 ; X32-SSE-NEXT: retl %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> ) ret <2 x i64> %res @@ -1409,45 +1936,56 @@ define <4 x i32> @constant_funnnel_v4i32(<4 x i32> %x) nounwind { ; SSE2-LABEL: constant_funnnel_v4i32: ; SSE2: # %bb.0: -; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [268435456,134217728,67108864,33554432] -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] -; SSE2-NEXT: pmuludq %xmm1, %xmm0 -; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3] -; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; SSE2-NEXT: pmuludq %xmm2, %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3] -; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1] +; SSE2-NEXT: movdqa %xmm0, %xmm1 +; SSE2-NEXT: psrld $7, %xmm1 +; SSE2-NEXT: movdqa %xmm0, %xmm2 +; SSE2-NEXT: psrld $6, %xmm2 +; SSE2-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1],xmm1[1] +; SSE2-NEXT: movdqa %xmm0, %xmm3 +; SSE2-NEXT: psrld $5, %xmm3 +; SSE2-NEXT: movdqa %xmm0, %xmm1 +; SSE2-NEXT: psrld $4, %xmm1 +; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0] +; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,3],xmm2[0,3] +; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [268435456,134217728,67108864,33554432] +; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] +; SSE2-NEXT: pmuludq %xmm2, %xmm0 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] -; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] -; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; SSE2-NEXT: por %xmm3, %xmm0 +; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] +; SSE2-NEXT: pmuludq %xmm3, %xmm2 +; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] +; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] +; SSE2-NEXT: orps %xmm0, %xmm1 +; SSE2-NEXT: movaps %xmm1, %xmm0 ; SSE2-NEXT: retq ; ; SSE41-LABEL: constant_funnnel_v4i32: ; SSE41: # %bb.0: -; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [268435456,134217728,67108864,33554432] -; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3] -; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] -; SSE41-NEXT: pmuludq %xmm2, %xmm3 -; SSE41-NEXT: pmuludq %xmm1, %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] -; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7] -; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,0,2,2] -; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7] -; SSE41-NEXT: por %xmm1, %xmm0 +; SSE41-NEXT: movdqa %xmm0, %xmm1 +; SSE41-NEXT: psrld $7, %xmm1 +; SSE41-NEXT: movdqa %xmm0, %xmm2 +; SSE41-NEXT: psrld $5, %xmm2 +; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm1[4,5,6,7] +; SSE41-NEXT: movdqa %xmm0, %xmm1 +; SSE41-NEXT: psrld $6, %xmm1 +; SSE41-NEXT: movdqa %xmm0, %xmm3 +; SSE41-NEXT: psrld $4, %xmm3 +; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0,1,2,3],xmm1[4,5,6,7] +; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0,1],xmm2[2,3],xmm3[4,5],xmm2[6,7] +; SSE41-NEXT: pmulld {{.*}}(%rip), %xmm0 +; SSE41-NEXT: por %xmm3, %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: constant_funnnel_v4i32: ; AVX1: # %bb.0: -; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [268435456,134217728,67108864,33554432] -; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3] -; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] -; AVX1-NEXT: vpmuludq %xmm2, %xmm3, %xmm2 -; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] -; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7] -; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,2,2] -; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7] +; AVX1-NEXT: vpsrld $7, %xmm0, %xmm1 +; AVX1-NEXT: vpsrld $5, %xmm0, %xmm2 +; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7] +; AVX1-NEXT: vpsrld $6, %xmm0, %xmm2 +; AVX1-NEXT: vpsrld $4, %xmm0, %xmm3 +; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7] +; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7] +; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 ; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0 ; AVX1-NEXT: retq ; @@ -1486,93 +2024,144 @@ ; AVX512VLBW-NEXT: vprorvd {{.*}}(%rip), %xmm0, %xmm0 ; AVX512VLBW-NEXT: retq ; -; XOP-LABEL: constant_funnnel_v4i32: -; XOP: # %bb.0: -; XOP-NEXT: vprotd {{.*}}(%rip), %xmm0, %xmm0 -; XOP-NEXT: retq +; XOPAVX1-LABEL: constant_funnnel_v4i32: +; XOPAVX1: # %bb.0: +; XOPAVX1-NEXT: vpshld {{.*}}(%rip), %xmm0, %xmm1 +; XOPAVX1-NEXT: vpshld {{.*}}(%rip), %xmm0, %xmm0 +; XOPAVX1-NEXT: vpor %xmm1, %xmm0, %xmm0 +; XOPAVX1-NEXT: retq +; +; XOPAVX2-LABEL: constant_funnnel_v4i32: +; XOPAVX2: # %bb.0: +; XOPAVX2-NEXT: vpsrlvd {{.*}}(%rip), %xmm0, %xmm1 +; XOPAVX2-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0 +; XOPAVX2-NEXT: vpor %xmm1, %xmm0, %xmm0 +; XOPAVX2-NEXT: retq ; ; X32-SSE-LABEL: constant_funnnel_v4i32: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [268435456,134217728,67108864,33554432] -; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] -; X32-SSE-NEXT: pmuludq %xmm1, %xmm0 -; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,3,2,3] -; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] -; X32-SSE-NEXT: pmuludq %xmm2, %xmm1 -; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3] -; X32-SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1] +; X32-SSE-NEXT: movdqa %xmm0, %xmm1 +; X32-SSE-NEXT: psrld $7, %xmm1 +; X32-SSE-NEXT: movdqa %xmm0, %xmm2 +; X32-SSE-NEXT: psrld $6, %xmm2 +; X32-SSE-NEXT: punpckhqdq {{.*#+}} xmm2 = xmm2[1],xmm1[1] +; X32-SSE-NEXT: movdqa %xmm0, %xmm3 +; X32-SSE-NEXT: psrld $5, %xmm3 +; X32-SSE-NEXT: movdqa %xmm0, %xmm1 +; X32-SSE-NEXT: psrld $4, %xmm1 +; X32-SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0] +; X32-SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,3],xmm2[0,3] +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [268435456,134217728,67108864,33554432] +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] +; X32-SSE-NEXT: pmuludq %xmm2, %xmm0 ; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] -; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] -; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] -; X32-SSE-NEXT: por %xmm3, %xmm0 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] +; X32-SSE-NEXT: pmuludq %xmm3, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] +; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] +; X32-SSE-NEXT: orps %xmm0, %xmm1 +; X32-SSE-NEXT: movaps %xmm1, %xmm0 ; X32-SSE-NEXT: retl %res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %x, <4 x i32> ) ret <4 x i32> %res } define <8 x i16> @constant_funnnel_v8i16(<8 x i16> %x) nounwind { -; SSE-LABEL: constant_funnnel_v8i16: -; SSE: # %bb.0: -; SSE-NEXT: movdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512] -; SSE-NEXT: movdqa %xmm0, %xmm2 -; SSE-NEXT: pmulhuw %xmm1, %xmm2 -; SSE-NEXT: pmullw %xmm1, %xmm0 -; SSE-NEXT: por %xmm2, %xmm0 -; SSE-NEXT: retq +; SSE2-LABEL: constant_funnnel_v8i16: +; SSE2: # %bb.0: +; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [0,65535,65535,65535,65535,65535,65535,65535] +; SSE2-NEXT: movdqa %xmm1, %xmm2 +; SSE2-NEXT: pandn %xmm0, %xmm2 +; SSE2-NEXT: movdqa {{.*#+}} xmm3 = +; SSE2-NEXT: movdqa %xmm0, %xmm4 +; SSE2-NEXT: pmulhuw %xmm3, %xmm4 +; SSE2-NEXT: pand %xmm1, %xmm4 +; SSE2-NEXT: pmullw %xmm3, %xmm0 +; SSE2-NEXT: por %xmm2, %xmm0 +; SSE2-NEXT: por %xmm4, %xmm0 +; SSE2-NEXT: pand %xmm1, %xmm0 +; SSE2-NEXT: por %xmm2, %xmm0 +; SSE2-NEXT: retq +; +; SSE41-LABEL: constant_funnnel_v8i16: +; SSE41: # %bb.0: +; SSE41-NEXT: movdqa {{.*#+}} xmm2 = +; SSE41-NEXT: movdqa %xmm0, %xmm1 +; SSE41-NEXT: pmulhuw %xmm2, %xmm1 +; SSE41-NEXT: pmullw %xmm0, %xmm2 +; SSE41-NEXT: por %xmm2, %xmm1 +; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3,4,5,6,7] +; SSE41-NEXT: movdqa %xmm1, %xmm0 +; SSE41-NEXT: retq ; ; AVX-LABEL: constant_funnnel_v8i16: ; AVX: # %bb.0: -; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512] +; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = ; AVX-NEXT: vpmulhuw %xmm1, %xmm0, %xmm2 -; AVX-NEXT: vpmullw %xmm1, %xmm0, %xmm0 -; AVX-NEXT: vpor %xmm2, %xmm0, %xmm0 +; AVX-NEXT: vpmullw %xmm1, %xmm0, %xmm1 +; AVX-NEXT: vpor %xmm2, %xmm1, %xmm1 +; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7] ; AVX-NEXT: retq ; ; AVX512F-LABEL: constant_funnnel_v8i16: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512] +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm1 = ; AVX512F-NEXT: vpmulhuw %xmm1, %xmm0, %xmm2 -; AVX512F-NEXT: vpmullw %xmm1, %xmm0, %xmm0 -; AVX512F-NEXT: vpor %xmm2, %xmm0, %xmm0 +; AVX512F-NEXT: vpmullw %xmm1, %xmm0, %xmm1 +; AVX512F-NEXT: vpor %xmm2, %xmm1, %xmm1 +; AVX512F-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7] ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: constant_funnnel_v8i16: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512] +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm1 = ; AVX512VL-NEXT: vpmulhuw %xmm1, %xmm0, %xmm2 -; AVX512VL-NEXT: vpmullw %xmm1, %xmm0, %xmm0 -; AVX512VL-NEXT: vpor %xmm2, %xmm0, %xmm0 +; AVX512VL-NEXT: vpmullw %xmm1, %xmm0, %xmm1 +; AVX512VL-NEXT: vpor %xmm2, %xmm1, %xmm1 +; AVX512VL-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7] ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: constant_funnnel_v8i16: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [16,1,2,3,4,5,6,7] +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [0,15,14,13,12,11,10,9] -; AVX512BW-NEXT: vpsllvw %zmm2, %zmm0, %zmm0 -; AVX512BW-NEXT: vpor %xmm1, %xmm0, %xmm0 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = +; AVX512BW-NEXT: vpsllvw %zmm2, %zmm0, %zmm2 +; AVX512BW-NEXT: vpor %xmm1, %xmm2, %xmm1 +; AVX512BW-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7] ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: constant_funnnel_v8i16: ; AVX512VLBW: # %bb.0: ; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %xmm0, %xmm1 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %xmm0, %xmm0 -; AVX512VLBW-NEXT: vpor %xmm1, %xmm0, %xmm0 +; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %xmm0, %xmm2 +; AVX512VLBW-NEXT: vpor %xmm1, %xmm2, %xmm1 +; AVX512VLBW-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7] ; AVX512VLBW-NEXT: retq ; ; XOP-LABEL: constant_funnnel_v8i16: ; XOP: # %bb.0: -; XOP-NEXT: vprotw {{.*}}(%rip), %xmm0, %xmm0 +; XOP-NEXT: vpshlw {{.*}}(%rip), %xmm0, %xmm1 +; XOP-NEXT: vpshlw {{.*}}(%rip), %xmm0, %xmm2 +; XOP-NEXT: vpor %xmm1, %xmm2, %xmm1 +; XOP-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7] ; XOP-NEXT: retq ; ; X32-SSE-LABEL: constant_funnnel_v8i16: ; X32-SSE: # %bb.0: -; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [1,32768,16384,8192,4096,2048,1024,512] -; X32-SSE-NEXT: movdqa %xmm0, %xmm2 -; X32-SSE-NEXT: pmulhuw %xmm1, %xmm2 -; X32-SSE-NEXT: pmullw %xmm1, %xmm0 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [0,65535,65535,65535,65535,65535,65535,65535] +; X32-SSE-NEXT: movdqa %xmm1, %xmm2 +; X32-SSE-NEXT: pandn %xmm0, %xmm2 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: pmulhuw %xmm3, %xmm4 +; X32-SSE-NEXT: pand %xmm1, %xmm4 +; X32-SSE-NEXT: pmullw %xmm3, %xmm0 +; X32-SSE-NEXT: por %xmm2, %xmm0 +; X32-SSE-NEXT: por %xmm4, %xmm0 +; X32-SSE-NEXT: pand %xmm1, %xmm0 ; X32-SSE-NEXT: por %xmm2, %xmm0 ; X32-SSE-NEXT: retl %res = call <8 x i16> @llvm.fshr.v8i16(<8 x i16> %x, <8 x i16> %x, <8 x i16> ) @@ -1585,46 +2174,57 @@ ; SSE2-NEXT: pxor %xmm1, %xmm1 ; SSE2-NEXT: movdqa %xmm0, %xmm2 ; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] -; SSE2-NEXT: pmullw {{.*}}(%rip), %xmm2 +; SSE2-NEXT: movdqa {{.*#+}} xmm3 = +; SSE2-NEXT: pmullw %xmm3, %xmm2 ; SSE2-NEXT: psrlw $8, %xmm2 -; SSE2-NEXT: movdqa %xmm0, %xmm3 -; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] -; SSE2-NEXT: pmullw {{.*}}(%rip), %xmm3 -; SSE2-NEXT: psrlw $8, %xmm3 -; SSE2-NEXT: packuswb %xmm2, %xmm3 +; SSE2-NEXT: movdqa %xmm0, %xmm4 +; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7] +; SSE2-NEXT: movdqa {{.*#+}} xmm5 = +; SSE2-NEXT: pmullw %xmm5, %xmm4 +; SSE2-NEXT: psrlw $8, %xmm4 +; SSE2-NEXT: packuswb %xmm2, %xmm4 +; SSE2-NEXT: movdqa %xmm0, %xmm2 +; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15] +; SSE2-NEXT: pmullw %xmm3, %xmm2 +; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255] +; SSE2-NEXT: pand %xmm3, %xmm2 ; SSE2-NEXT: movdqa %xmm0, %xmm1 -; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] -; SSE2-NEXT: pmullw {{.*}}(%rip), %xmm1 -; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] +; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] +; SSE2-NEXT: pmullw %xmm5, %xmm1 +; SSE2-NEXT: pand %xmm3, %xmm1 +; SSE2-NEXT: packuswb %xmm2, %xmm1 +; SSE2-NEXT: por %xmm4, %xmm1 +; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] ; SSE2-NEXT: pand %xmm2, %xmm1 -; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] -; SSE2-NEXT: pmullw {{.*}}(%rip), %xmm0 -; SSE2-NEXT: pand %xmm2, %xmm0 -; SSE2-NEXT: packuswb %xmm1, %xmm0 -; SSE2-NEXT: por %xmm3, %xmm0 +; SSE2-NEXT: pandn %xmm0, %xmm2 +; SSE2-NEXT: por %xmm2, %xmm1 +; SSE2-NEXT: movdqa %xmm1, %xmm0 ; SSE2-NEXT: retq ; ; SSE41-LABEL: constant_funnnel_v16i8: ; SSE41: # %bb.0: -; SSE41-NEXT: movdqa %xmm0, %xmm2 -; SSE41-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15] -; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm2 +; SSE41-NEXT: movdqa %xmm0, %xmm1 +; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] +; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm0 ; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255] -; SSE41-NEXT: pand %xmm3, %xmm2 -; SSE41-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero -; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [1,128,64,32,16,8,4,2] -; SSE41-NEXT: pmullw %xmm1, %xmm4 +; SSE41-NEXT: pand %xmm3, %xmm0 +; SSE41-NEXT: pmovzxbw {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero +; SSE41-NEXT: movdqa {{.*#+}} xmm4 = +; SSE41-NEXT: pmullw %xmm2, %xmm4 ; SSE41-NEXT: pand %xmm3, %xmm4 -; SSE41-NEXT: packuswb %xmm2, %xmm4 -; SSE41-NEXT: pxor %xmm2, %xmm2 -; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm2[8],xmm0[9],xmm2[9],xmm0[10],xmm2[10],xmm0[11],xmm2[11],xmm0[12],xmm2[12],xmm0[13],xmm2[13],xmm0[14],xmm2[14],xmm0[15],xmm2[15] -; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm0 -; SSE41-NEXT: psrlw $8, %xmm0 -; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm1 -; SSE41-NEXT: psrlw $8, %xmm1 -; SSE41-NEXT: packuswb %xmm0, %xmm1 -; SSE41-NEXT: por %xmm4, %xmm1 -; SSE41-NEXT: movdqa %xmm1, %xmm0 +; SSE41-NEXT: packuswb %xmm0, %xmm4 +; SSE41-NEXT: pxor %xmm0, %xmm0 +; SSE41-NEXT: movdqa %xmm1, %xmm3 +; SSE41-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm0[8],xmm3[9],xmm0[9],xmm3[10],xmm0[10],xmm3[11],xmm0[11],xmm3[12],xmm0[12],xmm3[13],xmm0[13],xmm3[14],xmm0[14],xmm3[15],xmm0[15] +; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm3 +; SSE41-NEXT: psrlw $8, %xmm3 +; SSE41-NEXT: pmullw {{.*}}(%rip), %xmm2 +; SSE41-NEXT: psrlw $8, %xmm2 +; SSE41-NEXT: packuswb %xmm3, %xmm2 +; SSE41-NEXT: por %xmm4, %xmm2 +; SSE41-NEXT: movaps {{.*#+}} xmm0 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; SSE41-NEXT: pblendvb %xmm0, %xmm1, %xmm2 +; SSE41-NEXT: movdqa %xmm2, %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: constant_funnnel_v16i8: @@ -1638,76 +2238,93 @@ ; AVX1-NEXT: vpand %xmm2, %xmm4, %xmm2 ; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8],xmm2[8],xmm0[9],xmm2[9],xmm0[10],xmm2[10],xmm0[11],xmm2[11],xmm0[12],xmm2[12],xmm0[13],xmm2[13],xmm0[14],xmm2[14],xmm0[15],xmm2[15] -; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 -; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0 -; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm3, %xmm2 +; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm0[8],xmm2[8],xmm0[9],xmm2[9],xmm0[10],xmm2[10],xmm0[11],xmm2[11],xmm0[12],xmm2[12],xmm0[13],xmm2[13],xmm0[14],xmm2[14],xmm0[15],xmm2[15] +; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm2, %xmm2 ; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 -; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 -; AVX1-NEXT: vpor %xmm0, %xmm1, %xmm0 +; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm3, %xmm3 +; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm3 +; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 +; AVX1-NEXT: vpor %xmm2, %xmm1, %xmm1 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX1-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: constant_funnnel_v16i8: ; AVX2: # %bb.0: -; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm1 -; AVX2-NEXT: vpsrlw $8, %ymm1, %ymm1 -; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 -; AVX2-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 -; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 -; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 -; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 -; AVX2-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 -; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0 +; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm1, %ymm2 +; AVX2-NEXT: vpsrlw $8, %ymm2, %ymm2 +; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm3 +; AVX2-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 +; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm1, %ymm1 +; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 +; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm3 +; AVX2-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 +; AVX2-NEXT: vpor %xmm2, %xmm1, %xmm1 +; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX2-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX2-NEXT: vzeroupper ; AVX2-NEXT: retq ; ; AVX512F-LABEL: constant_funnnel_v16i8: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero -; AVX512F-NEXT: vpsrlvd {{.*}}(%rip), %zmm0, %zmm1 -; AVX512F-NEXT: vpsllvd {{.*}}(%rip), %zmm0, %zmm0 -; AVX512F-NEXT: vpord %zmm1, %zmm0, %zmm0 -; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512F-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero +; AVX512F-NEXT: vpsrlvd {{.*}}(%rip), %zmm1, %zmm2 +; AVX512F-NEXT: vpsllvd {{.*}}(%rip), %zmm1, %zmm1 +; AVX512F-NEXT: vpord %zmm2, %zmm1, %zmm1 +; AVX512F-NEXT: vpmovdb %zmm1, %xmm1 +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512F-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512F-NEXT: vzeroupper ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: constant_funnnel_v16i8: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero -; AVX512VL-NEXT: vpsrlvd {{.*}}(%rip), %zmm0, %zmm1 -; AVX512VL-NEXT: vpsllvd {{.*}}(%rip), %zmm0, %zmm0 -; AVX512VL-NEXT: vpord %zmm1, %zmm0, %zmm0 -; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 +; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero +; AVX512VL-NEXT: vpsrlvd {{.*}}(%rip), %zmm1, %zmm2 +; AVX512VL-NEXT: vpsllvd {{.*}}(%rip), %zmm1, %zmm1 +; AVX512VL-NEXT: vpord %zmm2, %zmm1, %zmm1 +; AVX512VL-NEXT: vpmovdb %zmm1, %xmm1 +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512VL-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: constant_funnnel_v16i8: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,0,7,6,5,4,3,2,1] -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [0,7,6,5,4,3,2,1,0,1,2,3,4,5,6,7] -; AVX512BW-NEXT: vpsllvw %zmm2, %zmm0, %zmm0 -; AVX512BW-NEXT: vpor %ymm1, %ymm0, %ymm0 -; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 -; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm2, %zmm1 +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm3 = [8,7,6,5,4,3,2,1,8,1,2,3,4,5,6,7] +; AVX512BW-NEXT: vpsllvw %zmm3, %zmm2, %zmm2 +; AVX512BW-NEXT: vpor %ymm1, %ymm2, %ymm1 +; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512BW-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: constant_funnnel_v16i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero -; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %ymm0, %ymm1 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %ymm0, %ymm0 -; AVX512VLBW-NEXT: vpor %ymm1, %ymm0, %ymm0 -; AVX512VLBW-NEXT: vpmovwb %ymm0, %xmm0 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero +; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %ymm1, %ymm2 +; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %ymm1, %ymm1 +; AVX512VLBW-NEXT: vpor %ymm2, %ymm1, %ymm1 +; AVX512VLBW-NEXT: vpmovwb %ymm1, %xmm1 +; AVX512VLBW-NEXT: movw $257, %ax # imm = 0x101 +; AVX512VLBW-NEXT: kmovd %eax, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %xmm0, %xmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %xmm1, %xmm0 ; AVX512VLBW-NEXT: vzeroupper ; AVX512VLBW-NEXT: retq ; ; XOP-LABEL: constant_funnnel_v16i8: ; XOP: # %bb.0: -; XOP-NEXT: vprotb {{.*}}(%rip), %xmm0, %xmm0 +; XOP-NEXT: vpshlb {{.*}}(%rip), %xmm0, %xmm1 +; XOP-NEXT: vpshlb {{.*}}(%rip), %xmm0, %xmm2 +; XOP-NEXT: vpor %xmm1, %xmm2, %xmm1 +; XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; XOP-NEXT: vpblendvb %xmm2, %xmm0, %xmm1, %xmm0 ; XOP-NEXT: retq ; ; X32-SSE-LABEL: constant_funnnel_v16i8: @@ -1715,23 +2332,31 @@ ; X32-SSE-NEXT: pxor %xmm1, %xmm1 ; X32-SSE-NEXT: movdqa %xmm0, %xmm2 ; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] -; X32-SSE-NEXT: pmullw {{\.LCPI.*}}, %xmm2 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = +; X32-SSE-NEXT: pmullw %xmm3, %xmm2 ; X32-SSE-NEXT: psrlw $8, %xmm2 -; X32-SSE-NEXT: movdqa %xmm0, %xmm3 -; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] -; X32-SSE-NEXT: pmullw {{\.LCPI.*}}, %xmm3 -; X32-SSE-NEXT: psrlw $8, %xmm3 -; X32-SSE-NEXT: packuswb %xmm2, %xmm3 +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7] +; X32-SSE-NEXT: movdqa {{.*#+}} xmm5 = +; X32-SSE-NEXT: pmullw %xmm5, %xmm4 +; X32-SSE-NEXT: psrlw $8, %xmm4 +; X32-SSE-NEXT: packuswb %xmm2, %xmm4 +; X32-SSE-NEXT: movdqa %xmm0, %xmm2 +; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15] +; X32-SSE-NEXT: pmullw %xmm3, %xmm2 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255] +; X32-SSE-NEXT: pand %xmm3, %xmm2 ; X32-SSE-NEXT: movdqa %xmm0, %xmm1 -; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] -; X32-SSE-NEXT: pmullw {{\.LCPI.*}}, %xmm1 -; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] +; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] +; X32-SSE-NEXT: pmullw %xmm5, %xmm1 +; X32-SSE-NEXT: pand %xmm3, %xmm1 +; X32-SSE-NEXT: packuswb %xmm2, %xmm1 +; X32-SSE-NEXT: por %xmm4, %xmm1 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [0,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255] ; X32-SSE-NEXT: pand %xmm2, %xmm1 -; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] -; X32-SSE-NEXT: pmullw {{\.LCPI.*}}, %xmm0 -; X32-SSE-NEXT: pand %xmm2, %xmm0 -; X32-SSE-NEXT: packuswb %xmm1, %xmm0 -; X32-SSE-NEXT: por %xmm3, %xmm0 +; X32-SSE-NEXT: pandn %xmm0, %xmm2 +; X32-SSE-NEXT: por %xmm2, %xmm1 +; X32-SSE-NEXT: movdqa %xmm1, %xmm0 ; X32-SSE-NEXT: retl %res = call <16 x i8> @llvm.fshr.v16i8(<16 x i8> %x, <16 x i8> %x, <16 x i8> ) ret <16 x i8> %res @@ -1785,15 +2410,33 @@ ; ; XOP-LABEL: splatconstant_funnnel_v2i64: ; XOP: # %bb.0: -; XOP-NEXT: vprotq $50, %xmm0, %xmm0 +; XOP-NEXT: vpsrlq $14, %xmm0, %xmm1 +; XOP-NEXT: vpsllq $50, %xmm0, %xmm0 +; XOP-NEXT: vpor %xmm1, %xmm0, %xmm0 ; XOP-NEXT: retq ; ; X32-SSE-LABEL: splatconstant_funnnel_v2i64: ; X32-SSE: # %bb.0: +; X32-SSE-NEXT: pxor %xmm1, %xmm1 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [14,0,14,0] +; X32-SSE-NEXT: pcmpeqd %xmm2, %xmm1 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,0,3,2] +; X32-SSE-NEXT: pand %xmm1, %xmm3 +; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [64,0,64,0] +; X32-SSE-NEXT: psubq %xmm2, %xmm1 +; X32-SSE-NEXT: movdqa %xmm0, %xmm2 +; X32-SSE-NEXT: psllq %xmm1, %xmm2 +; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] +; X32-SSE-NEXT: movdqa %xmm0, %xmm4 +; X32-SSE-NEXT: psllq %xmm1, %xmm4 +; X32-SSE-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1] ; X32-SSE-NEXT: movdqa %xmm0, %xmm1 ; X32-SSE-NEXT: psrlq $14, %xmm1 -; X32-SSE-NEXT: psllq $50, %xmm0 -; X32-SSE-NEXT: por %xmm1, %xmm0 +; X32-SSE-NEXT: movsd {{.*#+}} xmm1 = xmm1[0,1] +; X32-SSE-NEXT: orpd %xmm4, %xmm1 +; X32-SSE-NEXT: pand %xmm3, %xmm0 +; X32-SSE-NEXT: pandn %xmm1, %xmm3 +; X32-SSE-NEXT: por %xmm3, %xmm0 ; X32-SSE-NEXT: retl %res = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %x, <2 x i64> %x, <2 x i64> ) ret <2 x i64> %res @@ -1843,7 +2486,9 @@ ; ; XOP-LABEL: splatconstant_funnnel_v4i32: ; XOP: # %bb.0: -; XOP-NEXT: vprotd $28, %xmm0, %xmm0 +; XOP-NEXT: vpsrld $4, %xmm0, %xmm1 +; XOP-NEXT: vpslld $28, %xmm0, %xmm0 +; XOP-NEXT: vpor %xmm1, %xmm0, %xmm0 ; XOP-NEXT: retq ; ; X32-SSE-LABEL: splatconstant_funnnel_v4i32: @@ -1882,7 +2527,9 @@ ; ; XOP-LABEL: splatconstant_funnnel_v8i16: ; XOP: # %bb.0: -; XOP-NEXT: vprotw $9, %xmm0, %xmm0 +; XOP-NEXT: vpsrlw $7, %xmm0, %xmm1 +; XOP-NEXT: vpsllw $9, %xmm0, %xmm0 +; XOP-NEXT: vpor %xmm1, %xmm0, %xmm0 ; XOP-NEXT: retq ; ; X32-SSE-LABEL: splatconstant_funnnel_v8i16: @@ -1950,7 +2597,9 @@ ; ; XOP-LABEL: splatconstant_funnnel_v16i8: ; XOP: # %bb.0: -; XOP-NEXT: vprotb $4, %xmm0, %xmm0 +; XOP-NEXT: vpshlb {{.*}}(%rip), %xmm0, %xmm1 +; XOP-NEXT: vpshlb {{.*}}(%rip), %xmm0, %xmm0 +; XOP-NEXT: vpor %xmm1, %xmm0, %xmm0 ; XOP-NEXT: retq ; ; X32-SSE-LABEL: splatconstant_funnnel_v16i8: diff --git a/llvm/test/CodeGen/X86/vector-fshr-rot-256.ll b/llvm/test/CodeGen/X86/vector-fshr-rot-256.ll --- a/llvm/test/CodeGen/X86/vector-fshr-rot-256.ll +++ b/llvm/test/CodeGen/X86/vector-fshr-rot-256.ll @@ -21,46 +21,49 @@ ; AVX1-LABEL: var_funnnel_v4i64: ; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 -; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm3 -; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 -; AVX1-NEXT: vpsrlq %xmm4, %xmm2, %xmm5 -; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[2,3,0,1] -; AVX1-NEXT: vpsrlq %xmm4, %xmm2, %xmm4 -; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm5[0,1,2,3],xmm4[4,5,6,7] -; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm5 -; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] -; AVX1-NEXT: vpsrlq %xmm3, %xmm0, %xmm3 -; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm5[0,1,2,3],xmm3[4,5,6,7] -; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm3, %ymm3 -; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4 -; AVX1-NEXT: vpxor %xmm5, %xmm5, %xmm5 -; AVX1-NEXT: vpsubq %xmm4, %xmm5, %xmm4 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [63,63] -; AVX1-NEXT: vpand %xmm6, %xmm4, %xmm4 -; AVX1-NEXT: vpsllq %xmm4, %xmm2, %xmm7 -; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[2,3,0,1] -; AVX1-NEXT: vpsllq %xmm4, %xmm2, %xmm2 +; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 +; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 +; AVX1-NEXT: vpsrlq %xmm3, %xmm2, %xmm4 +; AVX1-NEXT: vpshufd {{.*#+}} xmm5 = xmm3[2,3,0,1] +; AVX1-NEXT: vpsrlq %xmm5, %xmm2, %xmm5 +; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1,2,3],xmm5[4,5,6,7] +; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm5 +; AVX1-NEXT: vpshufd {{.*#+}} xmm6 = xmm1[2,3,0,1] +; AVX1-NEXT: vpsrlq %xmm6, %xmm0, %xmm6 +; AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1,2,3],xmm6[4,5,6,7] +; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm5, %ymm4 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [64,64] +; AVX1-NEXT: vpsubq %xmm3, %xmm5, %xmm6 +; AVX1-NEXT: vpsllq %xmm6, %xmm2, %xmm7 +; AVX1-NEXT: vpshufd {{.*#+}} xmm6 = xmm6[2,3,0,1] +; AVX1-NEXT: vpsllq %xmm6, %xmm2, %xmm2 ; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm7[0,1,2,3],xmm2[4,5,6,7] -; AVX1-NEXT: vpsubq %xmm1, %xmm5, %xmm1 -; AVX1-NEXT: vpand %xmm6, %xmm1, %xmm1 -; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm4 -; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] -; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm4[0,1,2,3],xmm0[4,5,6,7] -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 -; AVX1-NEXT: vorps %ymm3, %ymm0, %ymm0 +; AVX1-NEXT: vpsubq %xmm1, %xmm5, %xmm5 +; AVX1-NEXT: vpsllq %xmm5, %xmm0, %xmm6 +; AVX1-NEXT: vpshufd {{.*#+}} xmm5 = xmm5[2,3,0,1] +; AVX1-NEXT: vpsllq %xmm5, %xmm0, %xmm5 +; AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0,1,2,3],xmm5[4,5,6,7] +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm5, %ymm2 +; AVX1-NEXT: vorps %ymm4, %ymm2, %ymm2 +; AVX1-NEXT: vxorps %xmm4, %xmm4, %xmm4 +; AVX1-NEXT: vpcmpeqq %xmm4, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqq %xmm4, %xmm1, %xmm1 +; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1 +; AVX1-NEXT: vblendvpd %ymm1, %ymm0, %ymm2, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: var_funnnel_v4i64: ; AVX2: # %bb.0: ; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [63,63,63,63] -; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm3 -; AVX2-NEXT: vpsrlvq %ymm3, %ymm0, %ymm3 -; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX2-NEXT: vpsubq %ymm1, %ymm4, %ymm1 ; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 -; AVX2-NEXT: vpsllvq %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: vpor %ymm3, %ymm0, %ymm0 +; AVX2-NEXT: vpsrlvq %ymm1, %ymm0, %ymm2 +; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [64,64,64,64] +; AVX2-NEXT: vpsubq %ymm1, %ymm3, %ymm3 +; AVX2-NEXT: vpsllvq %ymm3, %ymm0, %ymm3 +; AVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqq %ymm3, %ymm1, %ymm1 +; AVX2-NEXT: vblendvpd %ymm1, %ymm0, %ymm2, %ymm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: var_funnnel_v4i64: @@ -91,25 +94,40 @@ ; ; XOPAVX1-LABEL: var_funnnel_v4i64: ; XOPAVX1: # %bb.0: +; XOPAVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 ; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; XOPAVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 -; XOPAVX1-NEXT: vpsubq %xmm2, %xmm3, %xmm2 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 -; XOPAVX1-NEXT: vprotq %xmm2, %xmm4, %xmm2 -; XOPAVX1-NEXT: vpsubq %xmm1, %xmm3, %xmm1 -; XOPAVX1-NEXT: vprotq %xmm1, %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX1-NEXT: vpsubq %xmm2, %xmm3, %xmm4 +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm5 +; XOPAVX1-NEXT: vpshlq %xmm4, %xmm5, %xmm4 +; XOPAVX1-NEXT: vpsubq %xmm1, %xmm3, %xmm6 +; XOPAVX1-NEXT: vpshlq %xmm6, %xmm0, %xmm6 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm4 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [64,64] +; XOPAVX1-NEXT: vpsubq %xmm2, %xmm6, %xmm7 +; XOPAVX1-NEXT: vpshlq %xmm7, %xmm5, %xmm5 +; XOPAVX1-NEXT: vpsubq %xmm1, %xmm6, %xmm6 +; XOPAVX1-NEXT: vpshlq %xmm6, %xmm0, %xmm6 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm5, %ymm6, %ymm5 +; XOPAVX1-NEXT: vorpd %ymm4, %ymm5, %ymm4 +; XOPAVX1-NEXT: vpcomeqq %xmm3, %xmm2, %xmm2 +; XOPAVX1-NEXT: vpcomeqq %xmm3, %xmm1, %xmm1 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 +; XOPAVX1-NEXT: vblendvpd %ymm1, %ymm0, %ymm4, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: var_funnnel_v4i64: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX2-NEXT: vpsubq %ymm1, %ymm2, %ymm1 -; XOPAVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm3 -; XOPAVX2-NEXT: vprotq %xmm2, %xmm3, %xmm2 -; XOPAVX2-NEXT: vprotq %xmm1, %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [63,63,63,63] +; XOPAVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 +; XOPAVX2-NEXT: vpsrlvq %ymm1, %ymm0, %ymm2 +; XOPAVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [64,64,64,64] +; XOPAVX2-NEXT: vpsubq %ymm1, %ymm3, %ymm3 +; XOPAVX2-NEXT: vpsllvq %ymm3, %ymm0, %ymm3 +; XOPAVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpcmpeqq %ymm3, %ymm1, %ymm1 +; XOPAVX2-NEXT: vblendvpd %ymm1, %ymm0, %ymm2, %ymm0 ; XOPAVX2-NEXT: retq %res = call <4 x i64> @llvm.fshr.v4i64(<4 x i64> %x, <4 x i64> %x, <4 x i64> %amt) ret <4 x i64> %res @@ -118,53 +136,65 @@ define <8 x i32> @var_funnnel_v8i32(<8 x i32> %x, <8 x i32> %amt) nounwind { ; AVX1-LABEL: var_funnnel_v8i32: ; AVX1: # %bb.0: +; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 +; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 +; AVX1-NEXT: vpsrldq {{.*#+}} xmm3 = xmm2[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero +; AVX1-NEXT: vpsrld %xmm3, %xmm4, %xmm3 +; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm5 +; AVX1-NEXT: vpsrld %xmm5, %xmm4, %xmm5 +; AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1,2,3],xmm3[4,5,6,7] ; AVX1-NEXT: vpxor %xmm8, %xmm8, %xmm8 -; AVX1-NEXT: vpsubd %xmm2, %xmm8, %xmm2 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [31,31,31,31] -; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 -; AVX1-NEXT: vpslld $23, %xmm2, %xmm2 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [1065353216,1065353216,1065353216,1065353216] -; AVX1-NEXT: vpaddd %xmm5, %xmm2, %xmm2 -; AVX1-NEXT: vcvttps2dq %xmm2, %xmm2 -; AVX1-NEXT: vpshufd {{.*#+}} xmm6 = xmm2[1,1,3,3] -; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm7 -; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm7[1,1,3,3] -; AVX1-NEXT: vpmuludq %xmm6, %xmm3, %xmm3 -; AVX1-NEXT: vpmuludq %xmm2, %xmm7, %xmm2 -; AVX1-NEXT: vpshufd {{.*#+}} xmm6 = xmm2[1,1,3,3] -; AVX1-NEXT: vpblendw {{.*#+}} xmm6 = xmm6[0,1],xmm3[2,3],xmm6[4,5],xmm3[6,7] -; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[0,0,2,2] -; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7] -; AVX1-NEXT: vpor %xmm6, %xmm2, %xmm2 -; AVX1-NEXT: vpsubd %xmm1, %xmm8, %xmm1 -; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 -; AVX1-NEXT: vpslld $23, %xmm1, %xmm1 -; AVX1-NEXT: vpaddd %xmm5, %xmm1, %xmm1 -; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1 -; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[1,1,3,3] -; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[1,1,3,3] -; AVX1-NEXT: vpmuludq %xmm3, %xmm4, %xmm3 -; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] -; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm3[2,3],xmm1[4,5],xmm3[6,7] -; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[0,0,2,2] -; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm3[2,3],xmm0[4,5],xmm3[6,7] -; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm6 = xmm2[2],xmm8[2],xmm2[3],xmm8[3] +; AVX1-NEXT: vpsrld %xmm6, %xmm4, %xmm6 +; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm7 = xmm2[0],zero,xmm2[1],zero +; AVX1-NEXT: vpsrld %xmm7, %xmm4, %xmm7 +; AVX1-NEXT: vpblendw {{.*#+}} xmm6 = xmm7[0,1,2,3],xmm6[4,5,6,7] +; AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm6[0,1],xmm5[2,3],xmm6[4,5],xmm5[6,7] +; AVX1-NEXT: vpsrldq {{.*#+}} xmm6 = xmm1[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero +; AVX1-NEXT: vpsrld %xmm6, %xmm0, %xmm6 +; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm7 +; AVX1-NEXT: vpsrld %xmm7, %xmm0, %xmm7 +; AVX1-NEXT: vpblendw {{.*#+}} xmm6 = xmm7[0,1,2,3],xmm6[4,5,6,7] +; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm7 = xmm1[2],xmm8[2],xmm1[3],xmm8[3] +; AVX1-NEXT: vpsrld %xmm7, %xmm0, %xmm7 +; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm3 = xmm1[0],zero,xmm1[1],zero +; AVX1-NEXT: vpsrld %xmm3, %xmm0, %xmm3 +; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1,2,3],xmm7[4,5,6,7] +; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1],xmm6[2,3],xmm3[4,5],xmm6[6,7] +; AVX1-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm3 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [32,32,32,32] +; AVX1-NEXT: vpsubd %xmm2, %xmm5, %xmm6 +; AVX1-NEXT: vpslld $23, %xmm6, %xmm6 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = [1065353216,1065353216,1065353216,1065353216] +; AVX1-NEXT: vpaddd %xmm7, %xmm6, %xmm6 +; AVX1-NEXT: vcvttps2dq %xmm6, %xmm6 +; AVX1-NEXT: vpmulld %xmm6, %xmm4, %xmm4 +; AVX1-NEXT: vpsubd %xmm1, %xmm5, %xmm5 +; AVX1-NEXT: vpslld $23, %xmm5, %xmm5 +; AVX1-NEXT: vpaddd %xmm7, %xmm5, %xmm5 +; AVX1-NEXT: vcvttps2dq %xmm5, %xmm5 +; AVX1-NEXT: vpmulld %xmm5, %xmm0, %xmm5 +; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm5, %ymm4 +; AVX1-NEXT: vorps %ymm3, %ymm4, %ymm3 +; AVX1-NEXT: vpcmpeqd %xmm2, %xmm8, %xmm2 +; AVX1-NEXT: vpcmpeqd %xmm1, %xmm8, %xmm1 +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 +; AVX1-NEXT: vblendvps %ymm1, %ymm0, %ymm3, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: var_funnnel_v8i32: ; AVX2: # %bb.0: -; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX2-NEXT: vpsubd %ymm1, %ymm2, %ymm1 ; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [31,31,31,31,31,31,31,31] ; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 -; AVX2-NEXT: vpsllvd %ymm1, %ymm0, %ymm2 +; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm2 ; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [32,32,32,32,32,32,32,32] -; AVX2-NEXT: vpsubd %ymm1, %ymm3, %ymm1 -; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: vpor %ymm0, %ymm2, %ymm0 +; AVX2-NEXT: vpsubd %ymm1, %ymm3, %ymm3 +; AVX2-NEXT: vpsllvd %ymm3, %ymm0, %ymm3 +; AVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqd %ymm3, %ymm1, %ymm1 +; AVX2-NEXT: vblendvps %ymm1, %ymm0, %ymm2, %ymm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: var_funnnel_v8i32: @@ -195,25 +225,40 @@ ; ; XOPAVX1-LABEL: var_funnnel_v8i32: ; XOPAVX1: # %bb.0: +; XOPAVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 ; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; XOPAVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 -; XOPAVX1-NEXT: vpsubd %xmm2, %xmm3, %xmm2 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 -; XOPAVX1-NEXT: vprotd %xmm2, %xmm4, %xmm2 -; XOPAVX1-NEXT: vpsubd %xmm1, %xmm3, %xmm1 -; XOPAVX1-NEXT: vprotd %xmm1, %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX1-NEXT: vpsubd %xmm2, %xmm3, %xmm4 +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm5 +; XOPAVX1-NEXT: vpshld %xmm4, %xmm5, %xmm4 +; XOPAVX1-NEXT: vpsubd %xmm1, %xmm3, %xmm6 +; XOPAVX1-NEXT: vpshld %xmm6, %xmm0, %xmm6 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm4 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [32,32,32,32] +; XOPAVX1-NEXT: vpsubd %xmm2, %xmm6, %xmm7 +; XOPAVX1-NEXT: vpshld %xmm7, %xmm5, %xmm5 +; XOPAVX1-NEXT: vpsubd %xmm1, %xmm6, %xmm6 +; XOPAVX1-NEXT: vpshld %xmm6, %xmm0, %xmm6 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm5, %ymm6, %ymm5 +; XOPAVX1-NEXT: vorps %ymm4, %ymm5, %ymm4 +; XOPAVX1-NEXT: vpcomeqd %xmm3, %xmm2, %xmm2 +; XOPAVX1-NEXT: vpcomeqd %xmm3, %xmm1, %xmm1 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 +; XOPAVX1-NEXT: vblendvps %ymm1, %ymm0, %ymm4, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: var_funnnel_v8i32: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX2-NEXT: vpsubd %ymm1, %ymm2, %ymm1 -; XOPAVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm3 -; XOPAVX2-NEXT: vprotd %xmm2, %xmm3, %xmm2 -; XOPAVX2-NEXT: vprotd %xmm1, %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [31,31,31,31,31,31,31,31] +; XOPAVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 +; XOPAVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm2 +; XOPAVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [32,32,32,32,32,32,32,32] +; XOPAVX2-NEXT: vpsubd %ymm1, %ymm3, %ymm3 +; XOPAVX2-NEXT: vpsllvd %ymm3, %ymm0, %ymm3 +; XOPAVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpcmpeqd %ymm3, %ymm1, %ymm1 +; XOPAVX2-NEXT: vblendvps %ymm1, %ymm0, %ymm2, %ymm0 ; XOPAVX2-NEXT: retq %res = call <8 x i32> @llvm.fshr.v8i32(<8 x i32> %x, <8 x i32> %x, <8 x i32> %amt) ret <8 x i32> %res @@ -222,146 +267,206 @@ define <16 x i16> @var_funnnel_v16i16(<16 x i16> %x, <16 x i16> %amt) nounwind { ; AVX1-LABEL: var_funnnel_v16i16: ; AVX1: # %bb.0: +; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 -; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 -; AVX1-NEXT: vpsubw %xmm2, %xmm3, %xmm2 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [15,15,15,15,15,15,15,15] -; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 -; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] +; AVX1-NEXT: vpsllw $12, %xmm2, %xmm3 +; AVX1-NEXT: vpsllw $4, %xmm2, %xmm4 +; AVX1-NEXT: vpor %xmm3, %xmm4, %xmm4 +; AVX1-NEXT: vpaddw %xmm4, %xmm4, %xmm5 +; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 +; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm6 +; AVX1-NEXT: vpblendvb %xmm4, %xmm6, %xmm3, %xmm4 +; AVX1-NEXT: vpsrlw $4, %xmm4, %xmm6 +; AVX1-NEXT: vpblendvb %xmm5, %xmm6, %xmm4, %xmm4 +; AVX1-NEXT: vpsrlw $2, %xmm4, %xmm6 +; AVX1-NEXT: vpaddw %xmm5, %xmm5, %xmm5 +; AVX1-NEXT: vpblendvb %xmm5, %xmm6, %xmm4, %xmm4 +; AVX1-NEXT: vpsrlw $1, %xmm4, %xmm6 +; AVX1-NEXT: vpaddw %xmm5, %xmm5, %xmm5 +; AVX1-NEXT: vpblendvb %xmm5, %xmm6, %xmm4, %xmm4 +; AVX1-NEXT: vpsllw $12, %xmm1, %xmm5 +; AVX1-NEXT: vpsllw $4, %xmm1, %xmm6 +; AVX1-NEXT: vpor %xmm5, %xmm6, %xmm5 +; AVX1-NEXT: vpaddw %xmm5, %xmm5, %xmm6 +; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm7 +; AVX1-NEXT: vpblendvb %xmm5, %xmm7, %xmm0, %xmm5 +; AVX1-NEXT: vpsrlw $4, %xmm5, %xmm7 +; AVX1-NEXT: vpblendvb %xmm6, %xmm7, %xmm5, %xmm5 +; AVX1-NEXT: vpsrlw $2, %xmm5, %xmm7 +; AVX1-NEXT: vpaddw %xmm6, %xmm6, %xmm6 +; AVX1-NEXT: vpblendvb %xmm6, %xmm7, %xmm5, %xmm5 +; AVX1-NEXT: vpsrlw $1, %xmm5, %xmm7 +; AVX1-NEXT: vpaddw %xmm6, %xmm6, %xmm6 +; AVX1-NEXT: vpblendvb %xmm6, %xmm7, %xmm5, %xmm5 +; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm5, %ymm8 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [16,16,16,16,16,16,16,16] +; AVX1-NEXT: vpsubw %xmm2, %xmm5, %xmm6 +; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm7 = xmm6[4],xmm0[4],xmm6[5],xmm0[5],xmm6[6],xmm0[6],xmm6[7],xmm0[7] +; AVX1-NEXT: vpslld $23, %xmm7, %xmm7 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [1065353216,1065353216,1065353216,1065353216] +; AVX1-NEXT: vpaddd %xmm4, %xmm7, %xmm7 +; AVX1-NEXT: vcvttps2dq %xmm7, %xmm7 +; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm6 = xmm6[0],zero,xmm6[1],zero,xmm6[2],zero,xmm6[3],zero +; AVX1-NEXT: vpslld $23, %xmm6, %xmm6 +; AVX1-NEXT: vpaddd %xmm4, %xmm6, %xmm6 +; AVX1-NEXT: vcvttps2dq %xmm6, %xmm6 +; AVX1-NEXT: vpackusdw %xmm7, %xmm6, %xmm6 +; AVX1-NEXT: vpmullw %xmm6, %xmm3, %xmm3 +; AVX1-NEXT: vpsubw %xmm1, %xmm5, %xmm5 +; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm6 = xmm5[4],xmm0[4],xmm5[5],xmm0[5],xmm5[6],xmm0[6],xmm5[7],xmm0[7] +; AVX1-NEXT: vpslld $23, %xmm6, %xmm6 +; AVX1-NEXT: vpaddd %xmm4, %xmm6, %xmm6 +; AVX1-NEXT: vcvttps2dq %xmm6, %xmm6 +; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm5 = xmm5[0],zero,xmm5[1],zero,xmm5[2],zero,xmm5[3],zero ; AVX1-NEXT: vpslld $23, %xmm5, %xmm5 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [1065353216,1065353216,1065353216,1065353216] -; AVX1-NEXT: vpaddd %xmm6, %xmm5, %xmm5 -; AVX1-NEXT: vcvttps2dq %xmm5, %xmm5 -; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero -; AVX1-NEXT: vpslld $23, %xmm2, %xmm2 -; AVX1-NEXT: vpaddd %xmm6, %xmm2, %xmm2 -; AVX1-NEXT: vcvttps2dq %xmm2, %xmm2 -; AVX1-NEXT: vpackusdw %xmm5, %xmm2, %xmm2 -; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm5 -; AVX1-NEXT: vpmulhuw %xmm2, %xmm5, %xmm7 -; AVX1-NEXT: vpmullw %xmm2, %xmm5, %xmm2 -; AVX1-NEXT: vpor %xmm7, %xmm2, %xmm2 -; AVX1-NEXT: vpsubw %xmm1, %xmm3, %xmm1 -; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 -; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm3 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] -; AVX1-NEXT: vpslld $23, %xmm3, %xmm3 -; AVX1-NEXT: vpaddd %xmm6, %xmm3, %xmm3 -; AVX1-NEXT: vcvttps2dq %xmm3, %xmm3 -; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero -; AVX1-NEXT: vpslld $23, %xmm1, %xmm1 -; AVX1-NEXT: vpaddd %xmm6, %xmm1, %xmm1 -; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1 -; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1 -; AVX1-NEXT: vpmulhuw %xmm1, %xmm0, %xmm3 -; AVX1-NEXT: vpmullw %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vpaddd %xmm4, %xmm5, %xmm4 +; AVX1-NEXT: vcvttps2dq %xmm4, %xmm4 +; AVX1-NEXT: vpackusdw %xmm6, %xmm4, %xmm4 +; AVX1-NEXT: vpmullw %xmm4, %xmm0, %xmm4 +; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3 +; AVX1-NEXT: vorps %ymm3, %ymm8, %ymm3 +; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4 +; AVX1-NEXT: vpcmpeqw %xmm4, %xmm2, %xmm2 +; AVX1-NEXT: vpcmpeqw %xmm4, %xmm1, %xmm1 +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 +; AVX1-NEXT: vandnps %ymm3, %ymm1, %ymm2 +; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 +; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: var_funnnel_v16i16: ; AVX2: # %bb.0: ; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm2[4],ymm0[4],ymm2[5],ymm0[5],ymm2[6],ymm0[6],ymm2[7],ymm0[7],ymm2[12],ymm0[12],ymm2[13],ymm0[13],ymm2[14],ymm0[14],ymm2[15],ymm0[15] -; AVX2-NEXT: vpsubw %ymm1, %ymm2, %ymm1 ; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 ; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm1[4],ymm2[4],ymm1[5],ymm2[5],ymm1[6],ymm2[6],ymm1[7],ymm2[7],ymm1[12],ymm2[12],ymm1[13],ymm2[13],ymm1[14],ymm2[14],ymm1[15],ymm2[15] -; AVX2-NEXT: vpsllvd %ymm4, %ymm3, %ymm4 +; AVX2-NEXT: vpsrlvd %ymm4, %ymm3, %ymm4 ; AVX2-NEXT: vpsrld $16, %ymm4, %ymm4 -; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm2[0],ymm0[0],ymm2[1],ymm0[1],ymm2[2],ymm0[2],ymm2[3],ymm0[3],ymm2[8],ymm0[8],ymm2[9],ymm0[9],ymm2[10],ymm0[10],ymm2[11],ymm0[11] -; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm1[0],ymm2[0],ymm1[1],ymm2[1],ymm1[2],ymm2[2],ymm1[3],ymm2[3],ymm1[8],ymm2[8],ymm1[9],ymm2[9],ymm1[10],ymm2[10],ymm1[11],ymm2[11] -; AVX2-NEXT: vpsllvd %ymm5, %ymm0, %ymm5 -; AVX2-NEXT: vpsrld $16, %ymm5, %ymm5 -; AVX2-NEXT: vpackusdw %ymm4, %ymm5, %ymm4 -; AVX2-NEXT: vmovdqa {{.*#+}} ymm5 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] -; AVX2-NEXT: vpsubw %ymm1, %ymm5, %ymm1 -; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm5 = ymm1[4],ymm2[4],ymm1[5],ymm2[5],ymm1[6],ymm2[6],ymm1[7],ymm2[7],ymm1[12],ymm2[12],ymm1[13],ymm2[13],ymm1[14],ymm2[14],ymm1[15],ymm2[15] -; AVX2-NEXT: vpsrlvd %ymm5, %ymm3, %ymm3 +; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm5 = ymm2[0],ymm0[0],ymm2[1],ymm0[1],ymm2[2],ymm0[2],ymm2[3],ymm0[3],ymm2[8],ymm0[8],ymm2[9],ymm0[9],ymm2[10],ymm0[10],ymm2[11],ymm0[11] +; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm1[0],ymm2[0],ymm1[1],ymm2[1],ymm1[2],ymm2[2],ymm1[3],ymm2[3],ymm1[8],ymm2[8],ymm1[9],ymm2[9],ymm1[10],ymm2[10],ymm1[11],ymm2[11] +; AVX2-NEXT: vpsrlvd %ymm6, %ymm5, %ymm6 +; AVX2-NEXT: vpsrld $16, %ymm6, %ymm6 +; AVX2-NEXT: vpackusdw %ymm4, %ymm6, %ymm4 +; AVX2-NEXT: vmovdqa {{.*#+}} ymm6 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] +; AVX2-NEXT: vpsubw %ymm1, %ymm6, %ymm6 +; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm7 = ymm6[4],ymm2[4],ymm6[5],ymm2[5],ymm6[6],ymm2[6],ymm6[7],ymm2[7],ymm6[12],ymm2[12],ymm6[13],ymm2[13],ymm6[14],ymm2[14],ymm6[15],ymm2[15] +; AVX2-NEXT: vpsllvd %ymm7, %ymm3, %ymm3 ; AVX2-NEXT: vpsrld $16, %ymm3, %ymm3 -; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm1[0],ymm2[0],ymm1[1],ymm2[1],ymm1[2],ymm2[2],ymm1[3],ymm2[3],ymm1[8],ymm2[8],ymm1[9],ymm2[9],ymm1[10],ymm2[10],ymm1[11],ymm2[11] -; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 -; AVX2-NEXT: vpackusdw %ymm3, %ymm0, %ymm0 -; AVX2-NEXT: vpor %ymm0, %ymm4, %ymm0 +; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm6 = ymm6[0],ymm2[0],ymm6[1],ymm2[1],ymm6[2],ymm2[2],ymm6[3],ymm2[3],ymm6[8],ymm2[8],ymm6[9],ymm2[9],ymm6[10],ymm2[10],ymm6[11],ymm2[11] +; AVX2-NEXT: vpsllvd %ymm6, %ymm5, %ymm5 +; AVX2-NEXT: vpsrld $16, %ymm5, %ymm5 +; AVX2-NEXT: vpackusdw %ymm3, %ymm5, %ymm3 +; AVX2-NEXT: vpor %ymm4, %ymm3, %ymm3 +; AVX2-NEXT: vpcmpeqw %ymm2, %ymm1, %ymm1 +; AVX2-NEXT: vpblendvb %ymm1, %ymm0, %ymm3, %ymm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: var_funnnel_v16i16: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512F-NEXT: vpsubw %ymm1, %ymm2, %ymm1 +; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm2 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero ; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 -; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm2 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero -; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero -; AVX512F-NEXT: vpsllvd %zmm2, %zmm0, %zmm2 -; AVX512F-NEXT: vmovdqa {{.*#+}} ymm3 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] -; AVX512F-NEXT: vpsubw %ymm1, %ymm3, %ymm1 -; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero -; AVX512F-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0 -; AVX512F-NEXT: vpord %zmm0, %zmm2, %zmm0 -; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 +; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero +; AVX512F-NEXT: vpsrlvd %zmm3, %zmm2, %zmm3 +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm4 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] +; AVX512F-NEXT: vpsubw %ymm1, %ymm4, %ymm4 +; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm4 = ymm4[0],zero,ymm4[1],zero,ymm4[2],zero,ymm4[3],zero,ymm4[4],zero,ymm4[5],zero,ymm4[6],zero,ymm4[7],zero,ymm4[8],zero,ymm4[9],zero,ymm4[10],zero,ymm4[11],zero,ymm4[12],zero,ymm4[13],zero,ymm4[14],zero,ymm4[15],zero +; AVX512F-NEXT: vpsllvd %zmm4, %zmm2, %zmm2 +; AVX512F-NEXT: vpord %zmm3, %zmm2, %zmm2 +; AVX512F-NEXT: vpmovdw %zmm2, %ymm2 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 +; AVX512F-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v16i16: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512VL-NEXT: vpsubw %ymm1, %ymm2, %ymm1 +; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm2 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero ; AVX512VL-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 -; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm2 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero -; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero -; AVX512VL-NEXT: vpsllvd %zmm2, %zmm0, %zmm2 -; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] -; AVX512VL-NEXT: vpsubw %ymm1, %ymm3, %ymm1 -; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero -; AVX512VL-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0 -; AVX512VL-NEXT: vpord %zmm0, %zmm2, %zmm0 -; AVX512VL-NEXT: vpmovdw %zmm0, %ymm0 +; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero +; AVX512VL-NEXT: vpsrlvd %zmm3, %zmm2, %zmm3 +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm4 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] +; AVX512VL-NEXT: vpsubw %ymm1, %ymm4, %ymm4 +; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm4 = ymm4[0],zero,ymm4[1],zero,ymm4[2],zero,ymm4[3],zero,ymm4[4],zero,ymm4[5],zero,ymm4[6],zero,ymm4[7],zero,ymm4[8],zero,ymm4[9],zero,ymm4[10],zero,ymm4[11],zero,ymm4[12],zero,ymm4[13],zero,ymm4[14],zero,ymm4[15],zero +; AVX512VL-NEXT: vpsllvd %zmm4, %zmm2, %zmm2 +; AVX512VL-NEXT: vpord %zmm3, %zmm2, %zmm2 +; AVX512VL-NEXT: vpmovdw %zmm2, %ymm2 +; AVX512VL-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VL-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 +; AVX512VL-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: var_funnnel_v16i16: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 -; AVX512BW-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512BW-NEXT: vpsubw %ymm1, %ymm2, %ymm1 ; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 -; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm2 +; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm2 ; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm3 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] -; AVX512BW-NEXT: vpsubw %ymm1, %ymm3, %ymm1 -; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpor %ymm0, %ymm2, %ymm0 +; AVX512BW-NEXT: vpsubw %ymm1, %ymm3, %ymm3 +; AVX512BW-NEXT: vpsllvw %zmm3, %zmm0, %zmm3 +; AVX512BW-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 +; AVX512BW-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v16i16: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512VLBW-NEXT: vpsubw %ymm1, %ymm2, %ymm1 -; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 -; AVX512VLBW-NEXT: vpsllvw %ymm1, %ymm0, %ymm2 +; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm2 +; AVX512VLBW-NEXT: vpsrlvw %ymm2, %ymm0, %ymm1 ; AVX512VLBW-NEXT: vmovdqa {{.*#+}} ymm3 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] -; AVX512VLBW-NEXT: vpsubw %ymm1, %ymm3, %ymm1 -; AVX512VLBW-NEXT: vpsrlvw %ymm1, %ymm0, %ymm0 -; AVX512VLBW-NEXT: vpor %ymm0, %ymm2, %ymm0 +; AVX512VLBW-NEXT: vpsubw %ymm2, %ymm3, %ymm3 +; AVX512VLBW-NEXT: vpsllvw %ymm3, %ymm0, %ymm3 +; AVX512VLBW-NEXT: vpor %ymm1, %ymm3, %ymm1 +; AVX512VLBW-NEXT: vptestnmw %ymm2, %ymm2, %k1 +; AVX512VLBW-NEXT: vmovdqu16 %ymm0, %ymm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %ymm1, %ymm0 ; AVX512VLBW-NEXT: retq ; ; XOPAVX1-LABEL: var_funnnel_v16i16: ; XOPAVX1: # %bb.0: +; XOPAVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 ; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; XOPAVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 -; XOPAVX1-NEXT: vpsubw %xmm2, %xmm3, %xmm2 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 -; XOPAVX1-NEXT: vprotw %xmm2, %xmm4, %xmm2 -; XOPAVX1-NEXT: vpsubw %xmm1, %xmm3, %xmm1 -; XOPAVX1-NEXT: vprotw %xmm1, %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX1-NEXT: vpsubw %xmm2, %xmm3, %xmm4 +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm5 +; XOPAVX1-NEXT: vpshlw %xmm4, %xmm5, %xmm4 +; XOPAVX1-NEXT: vpsubw %xmm1, %xmm3, %xmm6 +; XOPAVX1-NEXT: vpshlw %xmm6, %xmm0, %xmm6 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm4 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [16,16,16,16,16,16,16,16] +; XOPAVX1-NEXT: vpsubw %xmm2, %xmm6, %xmm7 +; XOPAVX1-NEXT: vpshlw %xmm7, %xmm5, %xmm5 +; XOPAVX1-NEXT: vpsubw %xmm1, %xmm6, %xmm6 +; XOPAVX1-NEXT: vpshlw %xmm6, %xmm0, %xmm6 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm5, %ymm6, %ymm5 +; XOPAVX1-NEXT: vorps %ymm4, %ymm5, %ymm4 +; XOPAVX1-NEXT: vpcomeqw %xmm3, %xmm2, %xmm2 +; XOPAVX1-NEXT: vpcomeqw %xmm3, %xmm1, %xmm1 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 +; XOPAVX1-NEXT: vpcmov %ymm1, %ymm4, %ymm0, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: var_funnnel_v16i16: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX2-NEXT: vpsubw %ymm1, %ymm2, %ymm1 +; XOPAVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 ; XOPAVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm3 -; XOPAVX2-NEXT: vprotw %xmm2, %xmm3, %xmm2 -; XOPAVX2-NEXT: vprotw %xmm1, %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpsubw %xmm2, %xmm3, %xmm2 +; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm4 +; XOPAVX2-NEXT: vpshlw %xmm2, %xmm4, %xmm2 +; XOPAVX2-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpshlw %xmm3, %xmm0, %xmm3 +; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] +; XOPAVX2-NEXT: vpsubw %ymm1, %ymm3, %ymm3 +; XOPAVX2-NEXT: vextracti128 $1, %ymm3, %xmm5 +; XOPAVX2-NEXT: vpshlw %xmm5, %xmm4, %xmm4 +; XOPAVX2-NEXT: vpshlw %xmm3, %xmm0, %xmm3 +; XOPAVX2-NEXT: vinserti128 $1, %xmm4, %ymm3, %ymm3 +; XOPAVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 +; XOPAVX2-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; XOPAVX2-NEXT: retq %res = call <16 x i16> @llvm.fshr.v16i16(<16 x i16> %x, <16 x i16> %x, <16 x i16> %amt) ret <16 x i16> %res @@ -370,184 +475,256 @@ define <32 x i8> @var_funnnel_v32i8(<32 x i8> %x, <32 x i8> %amt) nounwind { ; AVX1-LABEL: var_funnnel_v32i8: ; AVX1: # %bb.0: -; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 -; AVX1-NEXT: vpsrlw $4, %xmm2, %xmm3 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240] -; AVX1-NEXT: vpandn %xmm3, %xmm4, %xmm3 -; AVX1-NEXT: vpsllw $4, %xmm2, %xmm5 -; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm5 -; AVX1-NEXT: vpor %xmm3, %xmm5, %xmm3 -; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5 -; AVX1-NEXT: vpxor %xmm8, %xmm8, %xmm8 -; AVX1-NEXT: vpsubb %xmm5, %xmm8, %xmm5 -; AVX1-NEXT: vpsllw $5, %xmm5, %xmm5 -; AVX1-NEXT: vpblendvb %xmm5, %xmm3, %xmm2, %xmm2 -; AVX1-NEXT: vpsrlw $6, %xmm2, %xmm3 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = [252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252] -; AVX1-NEXT: vpandn %xmm3, %xmm7, %xmm3 -; AVX1-NEXT: vpsllw $2, %xmm2, %xmm6 -; AVX1-NEXT: vpand %xmm7, %xmm6, %xmm6 -; AVX1-NEXT: vpor %xmm3, %xmm6, %xmm3 -; AVX1-NEXT: vpaddb %xmm5, %xmm5, %xmm5 -; AVX1-NEXT: vpblendvb %xmm5, %xmm3, %xmm2, %xmm2 -; AVX1-NEXT: vpsrlw $7, %xmm2, %xmm3 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm9 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] -; AVX1-NEXT: vpand %xmm3, %xmm9, %xmm3 -; AVX1-NEXT: vpaddb %xmm2, %xmm2, %xmm6 -; AVX1-NEXT: vpor %xmm3, %xmm6, %xmm3 -; AVX1-NEXT: vpaddb %xmm5, %xmm5, %xmm5 -; AVX1-NEXT: vpblendvb %xmm5, %xmm3, %xmm2, %xmm2 -; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm3 -; AVX1-NEXT: vpandn %xmm3, %xmm4, %xmm3 +; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 +; AVX1-NEXT: vpsllw $4, %xmm3, %xmm2 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm8 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240] +; AVX1-NEXT: vpand %xmm2, %xmm8, %xmm5 +; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 +; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm9 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX1-NEXT: vpsubb %xmm2, %xmm9, %xmm7 +; AVX1-NEXT: vpsllw $5, %xmm7, %xmm7 +; AVX1-NEXT: vpblendvb %xmm7, %xmm5, %xmm3, %xmm5 +; AVX1-NEXT: vpsllw $2, %xmm5, %xmm4 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm10 = [252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252] +; AVX1-NEXT: vpand %xmm4, %xmm10, %xmm4 +; AVX1-NEXT: vpaddb %xmm7, %xmm7, %xmm7 +; AVX1-NEXT: vpblendvb %xmm7, %xmm4, %xmm5, %xmm4 +; AVX1-NEXT: vpaddb %xmm4, %xmm4, %xmm5 +; AVX1-NEXT: vpaddb %xmm7, %xmm7, %xmm7 +; AVX1-NEXT: vpblendvb %xmm7, %xmm5, %xmm4, %xmm4 ; AVX1-NEXT: vpsllw $4, %xmm0, %xmm5 -; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm4 -; AVX1-NEXT: vpor %xmm3, %xmm4, %xmm3 -; AVX1-NEXT: vpsubb %xmm1, %xmm8, %xmm1 -; AVX1-NEXT: vpsllw $5, %xmm1, %xmm1 -; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 -; AVX1-NEXT: vpsrlw $6, %xmm0, %xmm3 -; AVX1-NEXT: vpandn %xmm3, %xmm7, %xmm3 -; AVX1-NEXT: vpsllw $2, %xmm0, %xmm4 -; AVX1-NEXT: vpand %xmm7, %xmm4, %xmm4 -; AVX1-NEXT: vpor %xmm3, %xmm4, %xmm3 -; AVX1-NEXT: vpaddb %xmm1, %xmm1, %xmm1 -; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 -; AVX1-NEXT: vpsrlw $7, %xmm0, %xmm3 -; AVX1-NEXT: vpand %xmm3, %xmm9, %xmm3 -; AVX1-NEXT: vpaddb %xmm0, %xmm0, %xmm4 -; AVX1-NEXT: vpor %xmm3, %xmm4, %xmm3 -; AVX1-NEXT: vpaddb %xmm1, %xmm1, %xmm1 -; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vpand %xmm5, %xmm8, %xmm5 +; AVX1-NEXT: vpsubb %xmm1, %xmm9, %xmm7 +; AVX1-NEXT: vpsllw $5, %xmm7, %xmm7 +; AVX1-NEXT: vpblendvb %xmm7, %xmm5, %xmm0, %xmm5 +; AVX1-NEXT: vpsllw $2, %xmm5, %xmm6 +; AVX1-NEXT: vpand %xmm6, %xmm10, %xmm6 +; AVX1-NEXT: vpaddb %xmm7, %xmm7, %xmm7 +; AVX1-NEXT: vpblendvb %xmm7, %xmm6, %xmm5, %xmm5 +; AVX1-NEXT: vpaddb %xmm5, %xmm5, %xmm6 +; AVX1-NEXT: vpaddb %xmm7, %xmm7, %xmm7 +; AVX1-NEXT: vpblendvb %xmm7, %xmm6, %xmm5, %xmm5 +; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm5, %ymm8 +; AVX1-NEXT: vpsrlw $4, %xmm3, %xmm5 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm9 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] +; AVX1-NEXT: vpand %xmm5, %xmm9, %xmm5 +; AVX1-NEXT: vpsllw $5, %xmm2, %xmm7 +; AVX1-NEXT: vpblendvb %xmm7, %xmm5, %xmm3, %xmm3 +; AVX1-NEXT: vpsrlw $2, %xmm3, %xmm5 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm10 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63] +; AVX1-NEXT: vpand %xmm5, %xmm10, %xmm5 +; AVX1-NEXT: vpaddb %xmm7, %xmm7, %xmm7 +; AVX1-NEXT: vpblendvb %xmm7, %xmm5, %xmm3, %xmm3 +; AVX1-NEXT: vpsrlw $1, %xmm3, %xmm5 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127] +; AVX1-NEXT: vpand %xmm6, %xmm5, %xmm5 +; AVX1-NEXT: vpaddb %xmm7, %xmm7, %xmm7 +; AVX1-NEXT: vpblendvb %xmm7, %xmm5, %xmm3, %xmm3 +; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm5 +; AVX1-NEXT: vpand %xmm5, %xmm9, %xmm5 +; AVX1-NEXT: vpsllw $5, %xmm1, %xmm7 +; AVX1-NEXT: vpblendvb %xmm7, %xmm5, %xmm0, %xmm5 +; AVX1-NEXT: vpsrlw $2, %xmm5, %xmm4 +; AVX1-NEXT: vpand %xmm4, %xmm10, %xmm4 +; AVX1-NEXT: vpaddb %xmm7, %xmm7, %xmm7 +; AVX1-NEXT: vpblendvb %xmm7, %xmm4, %xmm5, %xmm4 +; AVX1-NEXT: vpsrlw $1, %xmm4, %xmm5 +; AVX1-NEXT: vpand %xmm6, %xmm5, %xmm5 +; AVX1-NEXT: vpaddb %xmm7, %xmm7, %xmm6 +; AVX1-NEXT: vpblendvb %xmm6, %xmm5, %xmm4, %xmm4 +; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3 +; AVX1-NEXT: vorps %ymm3, %ymm8, %ymm3 +; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4 +; AVX1-NEXT: vpcmpeqb %xmm4, %xmm2, %xmm2 +; AVX1-NEXT: vpcmpeqb %xmm4, %xmm1, %xmm1 +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 +; AVX1-NEXT: vandnps %ymm3, %ymm1, %ymm2 +; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 +; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: var_funnnel_v32i8: ; AVX2: # %bb.0: -; AVX2-NEXT: vpsrlw $4, %ymm0, %ymm2 -; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 -; AVX2-NEXT: vpsllw $4, %ymm0, %ymm3 +; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 +; AVX2-NEXT: vpsllw $5, %ymm1, %ymm2 +; AVX2-NEXT: vpsrlw $4, %ymm0, %ymm3 ; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3 +; AVX2-NEXT: vpblendvb %ymm2, %ymm3, %ymm0, %ymm3 +; AVX2-NEXT: vpsrlw $2, %ymm3, %ymm4 +; AVX2-NEXT: vpand {{.*}}(%rip), %ymm4, %ymm4 +; AVX2-NEXT: vpaddb %ymm2, %ymm2, %ymm2 +; AVX2-NEXT: vpblendvb %ymm2, %ymm4, %ymm3, %ymm3 +; AVX2-NEXT: vpsrlw $1, %ymm3, %ymm4 +; AVX2-NEXT: vpand {{.*}}(%rip), %ymm4, %ymm4 +; AVX2-NEXT: vpaddb %ymm2, %ymm2, %ymm2 +; AVX2-NEXT: vpblendvb %ymm2, %ymm4, %ymm3, %ymm2 +; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX2-NEXT: vpsubb %ymm1, %ymm3, %ymm3 +; AVX2-NEXT: vpsllw $5, %ymm3, %ymm3 +; AVX2-NEXT: vpaddb %ymm3, %ymm3, %ymm4 +; AVX2-NEXT: vpsllw $4, %ymm0, %ymm5 +; AVX2-NEXT: vpand {{.*}}(%rip), %ymm5, %ymm5 +; AVX2-NEXT: vpblendvb %ymm3, %ymm5, %ymm0, %ymm3 +; AVX2-NEXT: vpsllw $2, %ymm3, %ymm5 +; AVX2-NEXT: vpand {{.*}}(%rip), %ymm5, %ymm5 +; AVX2-NEXT: vpblendvb %ymm4, %ymm5, %ymm3, %ymm3 +; AVX2-NEXT: vpaddb %ymm3, %ymm3, %ymm5 +; AVX2-NEXT: vpaddb %ymm4, %ymm4, %ymm4 +; AVX2-NEXT: vpblendvb %ymm4, %ymm5, %ymm3, %ymm3 ; AVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 ; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 -; AVX2-NEXT: vpsubb %ymm1, %ymm3, %ymm1 -; AVX2-NEXT: vpsllw $5, %ymm1, %ymm1 -; AVX2-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 -; AVX2-NEXT: vpsrlw $6, %ymm0, %ymm2 -; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 -; AVX2-NEXT: vpsllw $2, %ymm0, %ymm3 -; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3 -; AVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 -; AVX2-NEXT: vpaddb %ymm1, %ymm1, %ymm1 -; AVX2-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 -; AVX2-NEXT: vpaddb %ymm0, %ymm0, %ymm2 -; AVX2-NEXT: vpsrlw $7, %ymm0, %ymm3 -; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3 -; AVX2-NEXT: vpor %ymm3, %ymm2, %ymm2 -; AVX2-NEXT: vpaddb %ymm1, %ymm1, %ymm1 -; AVX2-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 +; AVX2-NEXT: vpcmpeqb %ymm3, %ymm1, %ymm1 +; AVX2-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: var_funnnel_v32i8: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vpsrlw $4, %ymm0, %ymm2 -; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 -; AVX512F-NEXT: vpsllw $4, %ymm0, %ymm3 +; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 +; AVX512F-NEXT: vpsllw $5, %ymm1, %ymm2 +; AVX512F-NEXT: vpsrlw $4, %ymm0, %ymm3 ; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3 +; AVX512F-NEXT: vpblendvb %ymm2, %ymm3, %ymm0, %ymm3 +; AVX512F-NEXT: vpsrlw $2, %ymm3, %ymm4 +; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm4, %ymm4 +; AVX512F-NEXT: vpaddb %ymm2, %ymm2, %ymm2 +; AVX512F-NEXT: vpblendvb %ymm2, %ymm4, %ymm3, %ymm3 +; AVX512F-NEXT: vpsrlw $1, %ymm3, %ymm4 +; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm4, %ymm4 +; AVX512F-NEXT: vpaddb %ymm2, %ymm2, %ymm2 +; AVX512F-NEXT: vpblendvb %ymm2, %ymm4, %ymm3, %ymm2 +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512F-NEXT: vpsubb %ymm1, %ymm3, %ymm3 +; AVX512F-NEXT: vpsllw $5, %ymm3, %ymm3 +; AVX512F-NEXT: vpaddb %ymm3, %ymm3, %ymm4 +; AVX512F-NEXT: vpsllw $4, %ymm0, %ymm5 +; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm5, %ymm5 +; AVX512F-NEXT: vpblendvb %ymm3, %ymm5, %ymm0, %ymm3 +; AVX512F-NEXT: vpsllw $2, %ymm3, %ymm5 +; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm5, %ymm5 +; AVX512F-NEXT: vpblendvb %ymm4, %ymm5, %ymm3, %ymm3 +; AVX512F-NEXT: vpaddb %ymm3, %ymm3, %ymm5 +; AVX512F-NEXT: vpaddb %ymm4, %ymm4, %ymm4 +; AVX512F-NEXT: vpblendvb %ymm4, %ymm5, %ymm3, %ymm3 ; AVX512F-NEXT: vpor %ymm2, %ymm3, %ymm2 ; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 -; AVX512F-NEXT: vpsubb %ymm1, %ymm3, %ymm1 -; AVX512F-NEXT: vpsllw $5, %ymm1, %ymm1 -; AVX512F-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 -; AVX512F-NEXT: vpsrlw $6, %ymm0, %ymm2 -; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 -; AVX512F-NEXT: vpsllw $2, %ymm0, %ymm3 -; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3 -; AVX512F-NEXT: vpor %ymm2, %ymm3, %ymm2 -; AVX512F-NEXT: vpaddb %ymm1, %ymm1, %ymm1 -; AVX512F-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 -; AVX512F-NEXT: vpaddb %ymm0, %ymm0, %ymm2 -; AVX512F-NEXT: vpsrlw $7, %ymm0, %ymm3 -; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3 -; AVX512F-NEXT: vpor %ymm3, %ymm2, %ymm2 -; AVX512F-NEXT: vpaddb %ymm1, %ymm1, %ymm1 -; AVX512F-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 +; AVX512F-NEXT: vpcmpeqb %ymm3, %ymm1, %ymm1 +; AVX512F-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v32i8: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vpsllw $4, %ymm0, %ymm2 +; AVX512VL-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 +; AVX512VL-NEXT: vpsllw $5, %ymm1, %ymm2 ; AVX512VL-NEXT: vpsrlw $4, %ymm0, %ymm3 -; AVX512VL-NEXT: vpternlogq $216, {{.*}}(%rip), %ymm2, %ymm3 -; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512VL-NEXT: vpsubb %ymm1, %ymm2, %ymm1 -; AVX512VL-NEXT: vpsllw $5, %ymm1, %ymm1 -; AVX512VL-NEXT: vpblendvb %ymm1, %ymm3, %ymm0, %ymm0 -; AVX512VL-NEXT: vpsllw $2, %ymm0, %ymm2 -; AVX512VL-NEXT: vpsrlw $6, %ymm0, %ymm3 -; AVX512VL-NEXT: vpternlogq $216, {{.*}}(%rip), %ymm2, %ymm3 -; AVX512VL-NEXT: vpaddb %ymm1, %ymm1, %ymm1 -; AVX512VL-NEXT: vpblendvb %ymm1, %ymm3, %ymm0, %ymm0 -; AVX512VL-NEXT: vpaddb %ymm0, %ymm0, %ymm2 -; AVX512VL-NEXT: vpsrlw $7, %ymm0, %ymm3 ; AVX512VL-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3 -; AVX512VL-NEXT: vpor %ymm3, %ymm2, %ymm2 -; AVX512VL-NEXT: vpaddb %ymm1, %ymm1, %ymm1 -; AVX512VL-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 +; AVX512VL-NEXT: vpblendvb %ymm2, %ymm3, %ymm0, %ymm3 +; AVX512VL-NEXT: vpsrlw $2, %ymm3, %ymm4 +; AVX512VL-NEXT: vpand {{.*}}(%rip), %ymm4, %ymm4 +; AVX512VL-NEXT: vpaddb %ymm2, %ymm2, %ymm2 +; AVX512VL-NEXT: vpblendvb %ymm2, %ymm4, %ymm3, %ymm3 +; AVX512VL-NEXT: vpsrlw $1, %ymm3, %ymm4 +; AVX512VL-NEXT: vpand {{.*}}(%rip), %ymm4, %ymm4 +; AVX512VL-NEXT: vpaddb %ymm2, %ymm2, %ymm2 +; AVX512VL-NEXT: vpblendvb %ymm2, %ymm4, %ymm3, %ymm2 +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VL-NEXT: vpsubb %ymm1, %ymm3, %ymm3 +; AVX512VL-NEXT: vpsllw $5, %ymm3, %ymm3 +; AVX512VL-NEXT: vpaddb %ymm3, %ymm3, %ymm4 +; AVX512VL-NEXT: vpsllw $4, %ymm0, %ymm5 +; AVX512VL-NEXT: vpand {{.*}}(%rip), %ymm5, %ymm5 +; AVX512VL-NEXT: vpblendvb %ymm3, %ymm5, %ymm0, %ymm3 +; AVX512VL-NEXT: vpsllw $2, %ymm3, %ymm5 +; AVX512VL-NEXT: vpand {{.*}}(%rip), %ymm5, %ymm5 +; AVX512VL-NEXT: vpblendvb %ymm4, %ymm5, %ymm3, %ymm3 +; AVX512VL-NEXT: vpaddb %ymm3, %ymm3, %ymm5 +; AVX512VL-NEXT: vpaddb %ymm4, %ymm4, %ymm4 +; AVX512VL-NEXT: vpblendvb %ymm4, %ymm5, %ymm3, %ymm3 +; AVX512VL-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX512VL-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VL-NEXT: vpcmpeqb %ymm3, %ymm1, %ymm1 +; AVX512VL-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: var_funnnel_v32i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512BW-NEXT: vpand %ymm2, %ymm1, %ymm3 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero,ymm3[16],zero,ymm3[17],zero,ymm3[18],zero,ymm3[19],zero,ymm3[20],zero,ymm3[21],zero,ymm3[22],zero,ymm3[23],zero,ymm3[24],zero,ymm3[25],zero,ymm3[26],zero,ymm3[27],zero,ymm3[28],zero,ymm3[29],zero,ymm3[30],zero,ymm3[31],zero -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero -; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubb %ymm1, %ymm4, %ymm1 -; AVX512BW-NEXT: vpand %ymm2, %ymm1, %ymm1 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero -; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm3, %zmm0, %zmm0 -; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm2 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero +; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero +; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm2, %zmm3 +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512BW-NEXT: vpsubb %ymm1, %ymm4, %ymm4 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm4 = ymm4[0],zero,ymm4[1],zero,ymm4[2],zero,ymm4[3],zero,ymm4[4],zero,ymm4[5],zero,ymm4[6],zero,ymm4[7],zero,ymm4[8],zero,ymm4[9],zero,ymm4[10],zero,ymm4[11],zero,ymm4[12],zero,ymm4[13],zero,ymm4[14],zero,ymm4[15],zero,ymm4[16],zero,ymm4[17],zero,ymm4[18],zero,ymm4[19],zero,ymm4[20],zero,ymm4[21],zero,ymm4[22],zero,ymm4[23],zero,ymm4[24],zero,ymm4[25],zero,ymm4[26],zero,ymm4[27],zero,ymm4[28],zero,ymm4[29],zero,ymm4[30],zero,ymm4[31],zero +; AVX512BW-NEXT: vpsllvw %zmm4, %zmm2, %zmm2 +; AVX512BW-NEXT: vporq %zmm3, %zmm2, %zmm2 +; AVX512BW-NEXT: vpmovwb %zmm2, %ymm2 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %ymm3, %ymm1, %ymm1 +; AVX512BW-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v32i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vmovdqa {{.*#+}} ymm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VLBW-NEXT: vpand %ymm2, %ymm1, %ymm3 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero,ymm3[16],zero,ymm3[17],zero,ymm3[18],zero,ymm3[19],zero,ymm3[20],zero,ymm3[21],zero,ymm3[22],zero,ymm3[23],zero,ymm3[24],zero,ymm3[25],zero,ymm3[26],zero,ymm3[27],zero,ymm3[28],zero,ymm3[29],zero,ymm3[30],zero,ymm3[31],zero -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero -; AVX512VLBW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubb %ymm1, %ymm4, %ymm1 -; AVX512VLBW-NEXT: vpand %ymm2, %ymm1, %ymm1 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero -; AVX512VLBW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm3, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vpmovwb %zmm0, %ymm0 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm2 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero +; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm3 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero,ymm3[16],zero,ymm3[17],zero,ymm3[18],zero,ymm3[19],zero,ymm3[20],zero,ymm3[21],zero,ymm3[22],zero,ymm3[23],zero,ymm3[24],zero,ymm3[25],zero,ymm3[26],zero,ymm3[27],zero,ymm3[28],zero,ymm3[29],zero,ymm3[30],zero,ymm3[31],zero +; AVX512VLBW-NEXT: vpsrlvw %zmm1, %zmm2, %zmm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} ymm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VLBW-NEXT: vpsubb %ymm3, %ymm4, %ymm4 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm4 = ymm4[0],zero,ymm4[1],zero,ymm4[2],zero,ymm4[3],zero,ymm4[4],zero,ymm4[5],zero,ymm4[6],zero,ymm4[7],zero,ymm4[8],zero,ymm4[9],zero,ymm4[10],zero,ymm4[11],zero,ymm4[12],zero,ymm4[13],zero,ymm4[14],zero,ymm4[15],zero,ymm4[16],zero,ymm4[17],zero,ymm4[18],zero,ymm4[19],zero,ymm4[20],zero,ymm4[21],zero,ymm4[22],zero,ymm4[23],zero,ymm4[24],zero,ymm4[25],zero,ymm4[26],zero,ymm4[27],zero,ymm4[28],zero,ymm4[29],zero,ymm4[30],zero,ymm4[31],zero +; AVX512VLBW-NEXT: vpsllvw %zmm4, %zmm2, %zmm2 +; AVX512VLBW-NEXT: vporq %zmm1, %zmm2, %zmm1 +; AVX512VLBW-NEXT: vpmovwb %zmm1, %ymm1 +; AVX512VLBW-NEXT: vptestnmb %ymm3, %ymm3, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %ymm0, %ymm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %ymm1, %ymm0 ; AVX512VLBW-NEXT: retq ; ; XOPAVX1-LABEL: var_funnnel_v32i8: ; XOPAVX1: # %bb.0: +; XOPAVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 ; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; XOPAVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 -; XOPAVX1-NEXT: vpsubb %xmm2, %xmm3, %xmm2 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 -; XOPAVX1-NEXT: vprotb %xmm2, %xmm4, %xmm2 -; XOPAVX1-NEXT: vpsubb %xmm1, %xmm3, %xmm1 -; XOPAVX1-NEXT: vprotb %xmm1, %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX1-NEXT: vpsubb %xmm2, %xmm3, %xmm4 +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm5 +; XOPAVX1-NEXT: vpshlb %xmm4, %xmm5, %xmm4 +; XOPAVX1-NEXT: vpsubb %xmm1, %xmm3, %xmm6 +; XOPAVX1-NEXT: vpshlb %xmm6, %xmm0, %xmm6 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm4 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; XOPAVX1-NEXT: vpsubb %xmm2, %xmm6, %xmm7 +; XOPAVX1-NEXT: vpshlb %xmm7, %xmm5, %xmm5 +; XOPAVX1-NEXT: vpsubb %xmm1, %xmm6, %xmm6 +; XOPAVX1-NEXT: vpshlb %xmm6, %xmm0, %xmm6 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm5, %ymm6, %ymm5 +; XOPAVX1-NEXT: vorps %ymm4, %ymm5, %ymm4 +; XOPAVX1-NEXT: vpcomeqb %xmm3, %xmm2, %xmm2 +; XOPAVX1-NEXT: vpcomeqb %xmm3, %xmm1, %xmm1 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 +; XOPAVX1-NEXT: vpcmov %ymm1, %ymm4, %ymm0, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: var_funnnel_v32i8: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX2-NEXT: vpsubb %ymm1, %ymm2, %ymm1 +; XOPAVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 ; XOPAVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm3 -; XOPAVX2-NEXT: vprotb %xmm2, %xmm3, %xmm2 -; XOPAVX2-NEXT: vprotb %xmm1, %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpsubb %xmm2, %xmm3, %xmm2 +; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm4 +; XOPAVX2-NEXT: vpshlb %xmm2, %xmm4, %xmm2 +; XOPAVX2-NEXT: vpsubb %xmm1, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpshlb %xmm3, %xmm0, %xmm3 +; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; XOPAVX2-NEXT: vpsubb %ymm1, %ymm3, %ymm3 +; XOPAVX2-NEXT: vextracti128 $1, %ymm3, %xmm5 +; XOPAVX2-NEXT: vpshlb %xmm5, %xmm4, %xmm4 +; XOPAVX2-NEXT: vpshlb %xmm3, %xmm0, %xmm3 +; XOPAVX2-NEXT: vinserti128 $1, %xmm4, %ymm3, %ymm3 +; XOPAVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpcmpeqb %ymm3, %ymm1, %ymm1 +; XOPAVX2-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; XOPAVX2-NEXT: retq %res = call <32 x i8> @llvm.fshr.v32i8(<32 x i8> %x, <32 x i8> %x, <32 x i8> %amt) ret <32 x i8> %res @@ -560,38 +737,41 @@ define <4 x i64> @splatvar_funnnel_v4i64(<4 x i64> %x, <4 x i64> %amt) nounwind { ; AVX1-LABEL: splatvar_funnnel_v4i64: ; AVX1: # %bb.0: -; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] -; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX1-NEXT: vpsubq %xmm1, %xmm2, %xmm2 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [63,63] -; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 -; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 -; AVX1-NEXT: vpsllq %xmm2, %xmm4, %xmm5 -; AVX1-NEXT: vpshufd {{.*#+}} xmm6 = xmm2[2,3,0,1] -; AVX1-NEXT: vpsllq %xmm6, %xmm4, %xmm7 -; AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1,2,3],xmm7[4,5,6,7] -; AVX1-NEXT: vpsllq %xmm2, %xmm0, %xmm2 -; AVX1-NEXT: vpsllq %xmm6, %xmm0, %xmm6 -; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm6[4,5,6,7] -; AVX1-NEXT: vinsertf128 $1, %xmm5, %ymm2, %ymm2 -; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 -; AVX1-NEXT: vpsrlq %xmm1, %xmm4, %xmm3 -; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0 -; AVX1-NEXT: vorps %ymm0, %ymm2, %ymm0 +; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,0,1] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 +; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 +; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 +; AVX1-NEXT: vpsrlq %xmm1, %xmm2, %xmm3 +; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm4 +; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3 +; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [64,64] +; AVX1-NEXT: vpsubq %xmm4, %xmm5, %xmm6 +; AVX1-NEXT: vpsllq %xmm6, %xmm2, %xmm2 +; AVX1-NEXT: vpsubq %xmm1, %xmm5, %xmm5 +; AVX1-NEXT: vpsllq %xmm5, %xmm0, %xmm5 +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm5, %ymm2 +; AVX1-NEXT: vorps %ymm3, %ymm2, %ymm2 +; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqq %xmm3, %xmm4, %xmm4 +; AVX1-NEXT: vpcmpeqq %xmm3, %xmm1, %xmm1 +; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm1 +; AVX1-NEXT: vblendvpd %ymm1, %ymm0, %ymm2, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: splatvar_funnnel_v4i64: ; AVX2: # %bb.0: -; AVX2-NEXT: vpbroadcastq %xmm1, %xmm1 -; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [63,63] -; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm3 -; AVX2-NEXT: vpsrlq %xmm3, %ymm0, %ymm3 -; AVX2-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX2-NEXT: vpsubq %xmm1, %xmm4, %xmm1 -; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX2-NEXT: vpsllq %xmm1, %ymm0, %ymm0 -; AVX2-NEXT: vpor %ymm3, %ymm0, %ymm0 +; AVX2-NEXT: vpbroadcastq %xmm1, %ymm1 +; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [63,63,63,63] +; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 +; AVX2-NEXT: vpsrlq %xmm1, %ymm0, %ymm2 +; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; AVX2-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; AVX2-NEXT: vpsllq %xmm3, %ymm0, %ymm3 +; AVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqq %ymm3, %ymm1, %ymm1 +; AVX2-NEXT: vblendvpd %ymm1, %ymm0, %ymm2, %ymm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: splatvar_funnnel_v4i64: @@ -624,25 +804,41 @@ ; ; XOPAVX1-LABEL: splatvar_funnnel_v4i64: ; XOPAVX1: # %bb.0: -; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] -; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX1-NEXT: vpsubq %xmm1, %xmm2, %xmm1 +; XOPAVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,0,1] +; XOPAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 +; XOPAVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 ; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 -; XOPAVX1-NEXT: vprotq %xmm1, %xmm2, %xmm2 -; XOPAVX1-NEXT: vprotq %xmm1, %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX1-NEXT: vpsrlq %xmm1, %xmm2, %xmm3 +; XOPAVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm4 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm4, %ymm3 +; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm4 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [64,64] +; XOPAVX1-NEXT: vpsubq %xmm4, %xmm5, %xmm6 +; XOPAVX1-NEXT: vpsllq %xmm6, %xmm2, %xmm2 +; XOPAVX1-NEXT: vpsubq %xmm1, %xmm5, %xmm5 +; XOPAVX1-NEXT: vpsllq %xmm5, %xmm0, %xmm5 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm5, %ymm2 +; XOPAVX1-NEXT: vorps %ymm3, %ymm2, %ymm2 +; XOPAVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 +; XOPAVX1-NEXT: vpcomeqq %xmm3, %xmm4, %xmm4 +; XOPAVX1-NEXT: vpcomeqq %xmm3, %xmm1, %xmm1 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm1 +; XOPAVX1-NEXT: vblendvpd %ymm1, %ymm0, %ymm2, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: splatvar_funnnel_v4i64: ; XOPAVX2: # %bb.0: ; XOPAVX2-NEXT: vpbroadcastq %xmm1, %ymm1 -; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX2-NEXT: vpsubq %ymm1, %ymm2, %ymm1 -; XOPAVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm3 -; XOPAVX2-NEXT: vprotq %xmm2, %xmm3, %xmm2 -; XOPAVX2-NEXT: vprotq %xmm1, %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [63,63,63,63] +; XOPAVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 +; XOPAVX2-NEXT: vpsrlq %xmm1, %ymm0, %ymm2 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [64,64] +; XOPAVX2-NEXT: vpsubq %xmm1, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpsllq %xmm3, %ymm0, %ymm3 +; XOPAVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpcmpeqq %ymm3, %ymm1, %ymm1 +; XOPAVX2-NEXT: vblendvpd %ymm1, %ymm0, %ymm2, %ymm0 ; XOPAVX2-NEXT: retq %splat = shufflevector <4 x i64> %amt, <4 x i64> undef, <4 x i32> zeroinitializer %res = call <4 x i64> @llvm.fshr.v4i64(<4 x i64> %x, <4 x i64> %x, <4 x i64> %splat) @@ -652,38 +848,46 @@ define <8 x i32> @splatvar_funnnel_v8i32(<8 x i32> %x, <8 x i32> %amt) nounwind { ; AVX1-LABEL: splatvar_funnnel_v8i32: ; AVX1: # %bb.0: -; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1 -; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,0,0] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 +; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 ; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 -; AVX1-NEXT: vpslld %xmm2, %xmm3, %xmm4 +; AVX1-NEXT: vpsrld %xmm2, %xmm3, %xmm4 +; AVX1-NEXT: vpsrld %xmm2, %xmm0, %xmm2 +; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm2, %ymm2 +; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [32,32,32,32] -; AVX1-NEXT: vpsubd %xmm1, %xmm5, %xmm1 -; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero -; AVX1-NEXT: vpsrld %xmm1, %xmm3, %xmm3 -; AVX1-NEXT: vpor %xmm3, %xmm4, %xmm3 -; AVX1-NEXT: vpslld %xmm2, %xmm0, %xmm2 -; AVX1-NEXT: vpsrld %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0 +; AVX1-NEXT: vpsubd %xmm4, %xmm5, %xmm6 +; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm6 = xmm6[0],zero,xmm6[1],zero +; AVX1-NEXT: vpslld %xmm6, %xmm3, %xmm3 +; AVX1-NEXT: vpsubd %xmm1, %xmm5, %xmm5 +; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm5 = xmm5[0],zero,xmm5[1],zero +; AVX1-NEXT: vpslld %xmm5, %xmm0, %xmm5 +; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm5, %ymm3 +; AVX1-NEXT: vorps %ymm2, %ymm3, %ymm2 +; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqd %xmm3, %xmm4, %xmm4 +; AVX1-NEXT: vpcmpeqd %xmm3, %xmm1, %xmm1 +; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm1 +; AVX1-NEXT: vblendvps %ymm1, %ymm0, %ymm2, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: splatvar_funnnel_v8i32: ; AVX2: # %bb.0: -; AVX2-NEXT: vpbroadcastd %xmm1, %xmm1 -; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX2-NEXT: vpsubd %xmm1, %xmm2, %xmm1 -; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [31,31,31,31] -; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm1 +; AVX2-NEXT: vpbroadcastd %xmm1, %ymm1 +; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [31,31,31,31,31,31,31,31] +; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero -; AVX2-NEXT: vpslld %xmm2, %ymm0, %ymm2 +; AVX2-NEXT: vpsrld %xmm2, %ymm0, %ymm2 ; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [32,32,32,32] -; AVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm1 -; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero -; AVX2-NEXT: vpsrld %xmm1, %ymm0, %ymm0 -; AVX2-NEXT: vpor %ymm0, %ymm2, %ymm0 +; AVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm3 +; AVX2-NEXT: vpmovzxdq {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero +; AVX2-NEXT: vpslld %xmm3, %ymm0, %ymm3 +; AVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqd %ymm3, %ymm1, %ymm1 +; AVX2-NEXT: vblendvps %ymm1, %ymm0, %ymm2, %ymm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: splatvar_funnnel_v8i32: @@ -716,25 +920,46 @@ ; ; XOPAVX1-LABEL: splatvar_funnnel_v8i32: ; XOPAVX1: # %bb.0: -; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 -; XOPAVX1-NEXT: vprotd %xmm1, %xmm2, %xmm2 -; XOPAVX1-NEXT: vprotd %xmm1, %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,0,0] +; XOPAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 +; XOPAVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 +; XOPAVX1-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 +; XOPAVX1-NEXT: vpsrld %xmm2, %xmm3, %xmm4 +; XOPAVX1-NEXT: vpsrld %xmm2, %xmm0, %xmm2 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm2, %ymm2 +; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm4 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [32,32,32,32] +; XOPAVX1-NEXT: vpsubd %xmm4, %xmm5, %xmm6 +; XOPAVX1-NEXT: vpmovzxdq {{.*#+}} xmm6 = xmm6[0],zero,xmm6[1],zero +; XOPAVX1-NEXT: vpslld %xmm6, %xmm3, %xmm3 +; XOPAVX1-NEXT: vpsubd %xmm1, %xmm5, %xmm5 +; XOPAVX1-NEXT: vpmovzxdq {{.*#+}} xmm5 = xmm5[0],zero,xmm5[1],zero +; XOPAVX1-NEXT: vpslld %xmm5, %xmm0, %xmm5 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm5, %ymm3 +; XOPAVX1-NEXT: vorps %ymm2, %ymm3, %ymm2 +; XOPAVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 +; XOPAVX1-NEXT: vpcomeqd %xmm3, %xmm4, %xmm4 +; XOPAVX1-NEXT: vpcomeqd %xmm3, %xmm1, %xmm1 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm1 +; XOPAVX1-NEXT: vblendvps %ymm1, %ymm0, %ymm2, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: splatvar_funnnel_v8i32: ; XOPAVX2: # %bb.0: ; XOPAVX2-NEXT: vpbroadcastd %xmm1, %ymm1 -; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX2-NEXT: vpsubd %ymm1, %ymm2, %ymm1 -; XOPAVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm3 -; XOPAVX2-NEXT: vprotd %xmm2, %xmm3, %xmm2 -; XOPAVX2-NEXT: vprotd %xmm1, %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [31,31,31,31,31,31,31,31] +; XOPAVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 +; XOPAVX2-NEXT: vpmovzxdq {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero +; XOPAVX2-NEXT: vpsrld %xmm2, %ymm0, %ymm2 +; XOPAVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [32,32,32,32] +; XOPAVX2-NEXT: vpsubd %xmm1, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpmovzxdq {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero +; XOPAVX2-NEXT: vpslld %xmm3, %ymm0, %ymm3 +; XOPAVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpcmpeqd %ymm3, %ymm1, %ymm1 +; XOPAVX2-NEXT: vblendvps %ymm1, %ymm0, %ymm2, %ymm0 ; XOPAVX2-NEXT: retq %splat = shufflevector <8 x i32> %amt, <8 x i32> undef, <8 x i32> zeroinitializer %res = call <8 x i32> @llvm.fshr.v8i32(<8 x i32> %x, <8 x i32> %x, <8 x i32> %splat) @@ -746,75 +971,154 @@ ; AVX1: # %bb.0: ; AVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7] ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX1-NEXT: vpsubw %xmm1, %xmm2, %xmm1 -; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 +; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 ; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 -; AVX1-NEXT: vpsllw %xmm2, %xmm3, %xmm4 +; AVX1-NEXT: vpsrlw %xmm2, %xmm3, %xmm4 +; AVX1-NEXT: vpsrlw %xmm2, %xmm0, %xmm2 +; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm2, %ymm2 +; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm4 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [16,16,16,16,16,16,16,16] -; AVX1-NEXT: vpsubw %xmm1, %xmm5, %xmm1 -; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX1-NEXT: vpsrlw %xmm1, %xmm3, %xmm3 -; AVX1-NEXT: vpor %xmm3, %xmm4, %xmm3 -; AVX1-NEXT: vpsllw %xmm2, %xmm0, %xmm2 -; AVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm0, %ymm0 +; AVX1-NEXT: vpsubw %xmm4, %xmm5, %xmm6 +; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm6 = xmm6[0],zero,zero,zero,xmm6[1],zero,zero,zero +; AVX1-NEXT: vpsllw %xmm6, %xmm3, %xmm3 +; AVX1-NEXT: vpsubw %xmm1, %xmm5, %xmm5 +; AVX1-NEXT: vpmovzxwq {{.*#+}} xmm5 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero +; AVX1-NEXT: vpsllw %xmm5, %xmm0, %xmm5 +; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm5, %ymm3 +; AVX1-NEXT: vorps %ymm2, %ymm3, %ymm2 +; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 +; AVX1-NEXT: vpcmpeqw %xmm3, %xmm4, %xmm4 +; AVX1-NEXT: vpcmpeqw %xmm3, %xmm1, %xmm1 +; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm1 +; AVX1-NEXT: vandnps %ymm2, %ymm1, %ymm2 +; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 +; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: splatvar_funnnel_v16i16: ; AVX2: # %bb.0: -; AVX2-NEXT: vpbroadcastw %xmm1, %xmm1 -; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX2-NEXT: vpsubw %xmm1, %xmm2, %xmm1 -; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX2-NEXT: vpbroadcastw %xmm1, %ymm1 +; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 ; AVX2-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX2-NEXT: vpsllw %xmm2, %ymm0, %ymm2 +; AVX2-NEXT: vpsrlw %xmm2, %ymm0, %ymm2 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] -; AVX2-NEXT: vpsubw %xmm1, %xmm3, %xmm1 -; AVX2-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 -; AVX2-NEXT: vpor %ymm0, %ymm2, %ymm0 +; AVX2-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; AVX2-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; AVX2-NEXT: vpsllw %xmm3, %ymm0, %ymm3 +; AVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 +; AVX2-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX2-NEXT: retq ; -; AVX512-LABEL: splatvar_funnnel_v16i16: -; AVX512: # %bb.0: -; AVX512-NEXT: vpbroadcastw %xmm1, %xmm1 -; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512-NEXT: vpsubw %xmm1, %xmm2, %xmm1 -; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 -; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX512-NEXT: vpsllw %xmm2, %ymm0, %ymm2 -; AVX512-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] -; AVX512-NEXT: vpsubw %xmm1, %xmm3, %xmm1 -; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX512-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 -; AVX512-NEXT: vpor %ymm0, %ymm2, %ymm0 -; AVX512-NEXT: retq +; AVX512F-LABEL: splatvar_funnnel_v16i16: +; AVX512F: # %bb.0: +; AVX512F-NEXT: vpbroadcastw %xmm1, %ymm1 +; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 +; AVX512F-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero +; AVX512F-NEXT: vpsrlw %xmm2, %ymm0, %ymm2 +; AVX512F-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; AVX512F-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; AVX512F-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; AVX512F-NEXT: vpsllw %xmm3, %ymm0, %ymm3 +; AVX512F-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 +; AVX512F-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: splatvar_funnnel_v16i16: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: vpbroadcastw %xmm1, %ymm1 +; AVX512VL-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 +; AVX512VL-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero +; AVX512VL-NEXT: vpsrlw %xmm2, %ymm0, %ymm2 +; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; AVX512VL-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; AVX512VL-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; AVX512VL-NEXT: vpsllw %xmm3, %ymm0, %ymm3 +; AVX512VL-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX512VL-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VL-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 +; AVX512VL-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 +; AVX512VL-NEXT: retq +; +; AVX512BW-LABEL: splatvar_funnnel_v16i16: +; AVX512BW: # %bb.0: +; AVX512BW-NEXT: vpbroadcastw %xmm1, %ymm1 +; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 +; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero +; AVX512BW-NEXT: vpsrlw %xmm2, %ymm0, %ymm2 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; AVX512BW-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; AVX512BW-NEXT: vpsllw %xmm3, %ymm0, %ymm3 +; AVX512BW-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 +; AVX512BW-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 +; AVX512BW-NEXT: retq +; +; AVX512VLBW-LABEL: splatvar_funnnel_v16i16: +; AVX512VLBW: # %bb.0: +; AVX512VLBW-NEXT: vpbroadcastw %xmm1, %ymm1 +; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm2 +; AVX512VLBW-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero +; AVX512VLBW-NEXT: vpsrlw %xmm1, %ymm0, %ymm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; AVX512VLBW-NEXT: vpsubw %xmm2, %xmm3, %xmm3 +; AVX512VLBW-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; AVX512VLBW-NEXT: vpsllw %xmm3, %ymm0, %ymm3 +; AVX512VLBW-NEXT: vpor %ymm1, %ymm3, %ymm1 +; AVX512VLBW-NEXT: vptestnmw %ymm2, %ymm2, %k1 +; AVX512VLBW-NEXT: vmovdqu16 %ymm0, %ymm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %ymm1, %ymm0 +; AVX512VLBW-NEXT: retq ; ; XOPAVX1-LABEL: splatvar_funnnel_v16i16: ; XOPAVX1: # %bb.0: ; XOPAVX1-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7] ; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] -; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX1-NEXT: vpsubw %xmm1, %xmm2, %xmm1 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 -; XOPAVX1-NEXT: vprotw %xmm1, %xmm2, %xmm2 -; XOPAVX1-NEXT: vprotw %xmm1, %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 +; XOPAVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 +; XOPAVX1-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 +; XOPAVX1-NEXT: vpsrlw %xmm2, %xmm3, %xmm4 +; XOPAVX1-NEXT: vpsrlw %xmm2, %xmm0, %xmm2 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm2, %ymm2 +; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm4 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [16,16,16,16,16,16,16,16] +; XOPAVX1-NEXT: vpsubw %xmm4, %xmm5, %xmm6 +; XOPAVX1-NEXT: vpmovzxwq {{.*#+}} xmm6 = xmm6[0],zero,zero,zero,xmm6[1],zero,zero,zero +; XOPAVX1-NEXT: vpsllw %xmm6, %xmm3, %xmm3 +; XOPAVX1-NEXT: vpsubw %xmm1, %xmm5, %xmm5 +; XOPAVX1-NEXT: vpmovzxwq {{.*#+}} xmm5 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero +; XOPAVX1-NEXT: vpsllw %xmm5, %xmm0, %xmm5 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm5, %ymm3 +; XOPAVX1-NEXT: vorps %ymm2, %ymm3, %ymm2 +; XOPAVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 +; XOPAVX1-NEXT: vpcomeqw %xmm3, %xmm4, %xmm4 +; XOPAVX1-NEXT: vpcomeqw %xmm3, %xmm1, %xmm1 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm1 +; XOPAVX1-NEXT: vpcmov %ymm1, %ymm2, %ymm0, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: splatvar_funnnel_v16i16: ; XOPAVX2: # %bb.0: ; XOPAVX2-NEXT: vpbroadcastw %xmm1, %ymm1 -; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX2-NEXT: vpsubw %ymm1, %ymm2, %ymm1 -; XOPAVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm3 -; XOPAVX2-NEXT: vprotw %xmm2, %xmm3, %xmm2 -; XOPAVX2-NEXT: vprotw %xmm1, %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 +; XOPAVX2-NEXT: vpmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero +; XOPAVX2-NEXT: vpsrlw %xmm2, %ymm0, %ymm2 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; XOPAVX2-NEXT: vpsubw %xmm1, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero +; XOPAVX2-NEXT: vpsllw %xmm3, %ymm0, %ymm3 +; XOPAVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 +; XOPAVX2-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; XOPAVX2-NEXT: retq %splat = shufflevector <16 x i16> %amt, <16 x i16> undef, <16 x i32> zeroinitializer %res = call <16 x i16> @llvm.fshr.v16i16(<16 x i16> %x, <16 x i16> %x, <16 x i16> %splat) @@ -826,155 +1130,198 @@ ; AVX1: # %bb.0: ; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm1 -; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 +; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 ; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 -; AVX1-NEXT: vpsllw %xmm3, %xmm4, %xmm5 -; AVX1-NEXT: vpcmpeqd %xmm6, %xmm6, %xmm6 -; AVX1-NEXT: vpsllw %xmm3, %xmm6, %xmm7 -; AVX1-NEXT: vpshufb %xmm2, %xmm7, %xmm2 -; AVX1-NEXT: vpand %xmm2, %xmm5, %xmm5 +; AVX1-NEXT: vpsrlw %xmm3, %xmm4, %xmm5 +; AVX1-NEXT: vpcmpeqd %xmm8, %xmm8, %xmm8 +; AVX1-NEXT: vpsrlw %xmm3, %xmm8, %xmm7 +; AVX1-NEXT: vpshufb {{.*#+}} xmm7 = xmm7[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] +; AVX1-NEXT: vpand %xmm7, %xmm5, %xmm5 +; AVX1-NEXT: vpsrlw %xmm3, %xmm0, %xmm3 +; AVX1-NEXT: vpand %xmm7, %xmm3, %xmm3 +; AVX1-NEXT: vinsertf128 $1, %xmm5, %ymm3, %ymm3 +; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] -; AVX1-NEXT: vpsubb %xmm1, %xmm7, %xmm1 -; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX1-NEXT: vpsrlw %xmm1, %xmm4, %xmm4 -; AVX1-NEXT: vpsrlw %xmm1, %xmm6, %xmm6 -; AVX1-NEXT: vpshufb {{.*#+}} xmm6 = xmm6[1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] +; AVX1-NEXT: vpsubb %xmm5, %xmm7, %xmm6 +; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm6 = xmm6[0],zero,zero,zero,zero,zero,zero,zero,xmm6[1],zero,zero,zero,zero,zero,zero,zero +; AVX1-NEXT: vpsllw %xmm6, %xmm4, %xmm4 +; AVX1-NEXT: vpsllw %xmm6, %xmm8, %xmm6 +; AVX1-NEXT: vpshufb %xmm2, %xmm6, %xmm6 ; AVX1-NEXT: vpand %xmm6, %xmm4, %xmm4 -; AVX1-NEXT: vpor %xmm4, %xmm5, %xmm4 -; AVX1-NEXT: vpsllw %xmm3, %xmm0, %xmm3 -; AVX1-NEXT: vpand %xmm2, %xmm3, %xmm2 -; AVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 -; AVX1-NEXT: vpand %xmm6, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm0, %xmm2, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm0, %ymm0 +; AVX1-NEXT: vpsubb %xmm1, %xmm7, %xmm6 +; AVX1-NEXT: vpmovzxbq {{.*#+}} xmm6 = xmm6[0],zero,zero,zero,zero,zero,zero,zero,xmm6[1],zero,zero,zero,zero,zero,zero,zero +; AVX1-NEXT: vpsllw %xmm6, %xmm0, %xmm7 +; AVX1-NEXT: vpsllw %xmm6, %xmm8, %xmm6 +; AVX1-NEXT: vpshufb %xmm2, %xmm6, %xmm6 +; AVX1-NEXT: vpand %xmm6, %xmm7, %xmm6 +; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm4 +; AVX1-NEXT: vorps %ymm3, %ymm4, %ymm3 +; AVX1-NEXT: vpcmpeqb %xmm2, %xmm5, %xmm4 +; AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1 +; AVX1-NEXT: vinsertf128 $1, %xmm4, %ymm1, %ymm1 +; AVX1-NEXT: vandnps %ymm3, %ymm1, %ymm2 +; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 +; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: splatvar_funnnel_v32i8: ; AVX2: # %bb.0: -; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1 -; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX2-NEXT: vpbroadcastb %xmm1, %ymm1 +; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 ; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX2-NEXT: vpsllw %xmm2, %ymm0, %ymm3 +; AVX2-NEXT: vpsrlw %xmm2, %ymm0, %ymm3 ; AVX2-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4 -; AVX2-NEXT: vpsllw %xmm2, %xmm4, %xmm2 +; AVX2-NEXT: vpsrlw %xmm2, %xmm4, %xmm2 +; AVX2-NEXT: vpsrlw $8, %xmm2, %xmm2 ; AVX2-NEXT: vpbroadcastb %xmm2, %ymm2 ; AVX2-NEXT: vpand %ymm2, %ymm3, %ymm2 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] -; AVX2-NEXT: vpsubb %xmm1, %xmm3, %xmm1 -; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 -; AVX2-NEXT: vpsrlw %xmm1, %xmm4, %xmm1 -; AVX2-NEXT: vpsrlw $8, %xmm1, %xmm1 -; AVX2-NEXT: vpbroadcastb %xmm1, %ymm1 -; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: vpor %ymm0, %ymm2, %ymm0 +; AVX2-NEXT: vpsubb %xmm1, %xmm3, %xmm3 +; AVX2-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,zero,zero,zero,zero,xmm3[1],zero,zero,zero,zero,zero,zero,zero +; AVX2-NEXT: vpsllw %xmm3, %ymm0, %ymm5 +; AVX2-NEXT: vpsllw %xmm3, %xmm4, %xmm3 +; AVX2-NEXT: vpbroadcastb %xmm3, %ymm3 +; AVX2-NEXT: vpand %ymm3, %ymm5, %ymm3 +; AVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX2-NEXT: vpcmpeqb %ymm3, %ymm1, %ymm1 +; AVX2-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: splatvar_funnnel_v32i8: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512F-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512F-NEXT: vpsubb %xmm1, %xmm2, %xmm1 -; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512F-NEXT: vpbroadcastb %xmm1, %ymm1 +; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 ; AVX512F-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX512F-NEXT: vpsllw %xmm2, %ymm0, %ymm3 +; AVX512F-NEXT: vpsrlw %xmm2, %ymm0, %ymm3 ; AVX512F-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4 -; AVX512F-NEXT: vpsllw %xmm2, %xmm4, %xmm2 +; AVX512F-NEXT: vpsrlw %xmm2, %xmm4, %xmm2 +; AVX512F-NEXT: vpsrlw $8, %xmm2, %xmm2 ; AVX512F-NEXT: vpbroadcastb %xmm2, %ymm2 ; AVX512F-NEXT: vpand %ymm2, %ymm3, %ymm2 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] -; AVX512F-NEXT: vpsubb %xmm1, %xmm3, %xmm1 -; AVX512F-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX512F-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 -; AVX512F-NEXT: vpsrlw %xmm1, %xmm4, %xmm1 -; AVX512F-NEXT: vpsrlw $8, %xmm1, %xmm1 -; AVX512F-NEXT: vpbroadcastb %xmm1, %ymm1 -; AVX512F-NEXT: vpand %ymm1, %ymm0, %ymm0 -; AVX512F-NEXT: vpor %ymm0, %ymm2, %ymm0 +; AVX512F-NEXT: vpsubb %xmm1, %xmm3, %xmm3 +; AVX512F-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,zero,zero,zero,zero,xmm3[1],zero,zero,zero,zero,zero,zero,zero +; AVX512F-NEXT: vpsllw %xmm3, %ymm0, %ymm5 +; AVX512F-NEXT: vpsllw %xmm3, %xmm4, %xmm3 +; AVX512F-NEXT: vpbroadcastb %xmm3, %ymm3 +; AVX512F-NEXT: vpand %ymm3, %ymm5, %ymm3 +; AVX512F-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512F-NEXT: vpcmpeqb %ymm3, %ymm1, %ymm1 +; AVX512F-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: splatvar_funnnel_v32i8: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; AVX512VL-NEXT: vpsubb %xmm1, %xmm2, %xmm1 -; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512VL-NEXT: vpbroadcastb %xmm1, %ymm1 +; AVX512VL-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 ; AVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX512VL-NEXT: vpsllw %xmm2, %ymm0, %ymm3 +; AVX512VL-NEXT: vpsrlw %xmm2, %ymm0, %ymm3 ; AVX512VL-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4 -; AVX512VL-NEXT: vpsllw %xmm2, %xmm4, %xmm2 +; AVX512VL-NEXT: vpsrlw %xmm2, %xmm4, %xmm2 +; AVX512VL-NEXT: vpsrlw $8, %xmm2, %xmm2 ; AVX512VL-NEXT: vpbroadcastb %xmm2, %ymm2 ; AVX512VL-NEXT: vpand %ymm2, %ymm3, %ymm2 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] -; AVX512VL-NEXT: vpsubb %xmm1, %xmm3, %xmm1 -; AVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX512VL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 -; AVX512VL-NEXT: vpsrlw %xmm1, %xmm4, %xmm1 -; AVX512VL-NEXT: vpsrlw $8, %xmm1, %xmm1 -; AVX512VL-NEXT: vpbroadcastb %xmm1, %ymm1 -; AVX512VL-NEXT: vpand %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: vpor %ymm0, %ymm2, %ymm0 +; AVX512VL-NEXT: vpsubb %xmm1, %xmm3, %xmm3 +; AVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,zero,zero,zero,zero,xmm3[1],zero,zero,zero,zero,zero,zero,zero +; AVX512VL-NEXT: vpsllw %xmm3, %ymm0, %ymm5 +; AVX512VL-NEXT: vpsllw %xmm3, %xmm4, %xmm3 +; AVX512VL-NEXT: vpbroadcastb %xmm3, %ymm3 +; AVX512VL-NEXT: vpand %ymm3, %ymm5, %ymm3 +; AVX512VL-NEXT: vpor %ymm2, %ymm3, %ymm2 +; AVX512VL-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512VL-NEXT: vpcmpeqb %ymm3, %ymm1, %ymm1 +; AVX512VL-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: splatvar_funnnel_v32i8: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: vpbroadcastb %xmm1, %ymm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512BW-NEXT: vpand %ymm2, %ymm1, %ymm3 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero,ymm3[16],zero,ymm3[17],zero,ymm3[18],zero,ymm3[19],zero,ymm3[20],zero,ymm3[21],zero,ymm3[22],zero,ymm3[23],zero,ymm3[24],zero,ymm3[25],zero,ymm3[26],zero,ymm3[27],zero,ymm3[28],zero,ymm3[29],zero,ymm3[30],zero,ymm3[31],zero -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero -; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubb %ymm1, %ymm4, %ymm1 -; AVX512BW-NEXT: vpand %ymm2, %ymm1, %ymm1 -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero -; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm3, %zmm0, %zmm0 -; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm2 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero +; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero +; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm2, %zmm3 +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512BW-NEXT: vpsubb %ymm1, %ymm4, %ymm4 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm4 = ymm4[0],zero,ymm4[1],zero,ymm4[2],zero,ymm4[3],zero,ymm4[4],zero,ymm4[5],zero,ymm4[6],zero,ymm4[7],zero,ymm4[8],zero,ymm4[9],zero,ymm4[10],zero,ymm4[11],zero,ymm4[12],zero,ymm4[13],zero,ymm4[14],zero,ymm4[15],zero,ymm4[16],zero,ymm4[17],zero,ymm4[18],zero,ymm4[19],zero,ymm4[20],zero,ymm4[21],zero,ymm4[22],zero,ymm4[23],zero,ymm4[24],zero,ymm4[25],zero,ymm4[26],zero,ymm4[27],zero,ymm4[28],zero,ymm4[29],zero,ymm4[30],zero,ymm4[31],zero +; AVX512BW-NEXT: vpsllvw %zmm4, %zmm2, %zmm2 +; AVX512BW-NEXT: vporq %zmm3, %zmm2, %zmm2 +; AVX512BW-NEXT: vpmovwb %zmm2, %ymm2 +; AVX512BW-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; AVX512BW-NEXT: vpcmpeqb %ymm3, %ymm1, %ymm1 +; AVX512BW-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v32i8: ; AVX512VLBW: # %bb.0: ; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %ymm1 -; AVX512VLBW-NEXT: vmovdqa {{.*#+}} ymm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VLBW-NEXT: vpand %ymm2, %ymm1, %ymm3 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm3 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero,ymm3[16],zero,ymm3[17],zero,ymm3[18],zero,ymm3[19],zero,ymm3[20],zero,ymm3[21],zero,ymm3[22],zero,ymm3[23],zero,ymm3[24],zero,ymm3[25],zero,ymm3[26],zero,ymm3[27],zero,ymm3[28],zero,ymm3[29],zero,ymm3[30],zero,ymm3[31],zero -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero -; AVX512VLBW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubb %ymm1, %ymm4, %ymm1 -; AVX512VLBW-NEXT: vpand %ymm2, %ymm1, %ymm1 -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero -; AVX512VLBW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm3, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vpmovwb %zmm0, %ymm0 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm2 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero +; AVX512VLBW-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm3 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero,ymm3[16],zero,ymm3[17],zero,ymm3[18],zero,ymm3[19],zero,ymm3[20],zero,ymm3[21],zero,ymm3[22],zero,ymm3[23],zero,ymm3[24],zero,ymm3[25],zero,ymm3[26],zero,ymm3[27],zero,ymm3[28],zero,ymm3[29],zero,ymm3[30],zero,ymm3[31],zero +; AVX512VLBW-NEXT: vpsrlvw %zmm1, %zmm2, %zmm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} ymm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VLBW-NEXT: vpsubb %ymm3, %ymm4, %ymm4 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm4 = ymm4[0],zero,ymm4[1],zero,ymm4[2],zero,ymm4[3],zero,ymm4[4],zero,ymm4[5],zero,ymm4[6],zero,ymm4[7],zero,ymm4[8],zero,ymm4[9],zero,ymm4[10],zero,ymm4[11],zero,ymm4[12],zero,ymm4[13],zero,ymm4[14],zero,ymm4[15],zero,ymm4[16],zero,ymm4[17],zero,ymm4[18],zero,ymm4[19],zero,ymm4[20],zero,ymm4[21],zero,ymm4[22],zero,ymm4[23],zero,ymm4[24],zero,ymm4[25],zero,ymm4[26],zero,ymm4[27],zero,ymm4[28],zero,ymm4[29],zero,ymm4[30],zero,ymm4[31],zero +; AVX512VLBW-NEXT: vpsllvw %zmm4, %zmm2, %zmm2 +; AVX512VLBW-NEXT: vporq %zmm1, %zmm2, %zmm1 +; AVX512VLBW-NEXT: vpmovwb %zmm1, %ymm1 +; AVX512VLBW-NEXT: vptestnmb %ymm3, %ymm3, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %ymm0, %ymm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %ymm1, %ymm0 ; AVX512VLBW-NEXT: retq ; ; XOPAVX1-LABEL: splatvar_funnnel_v32i8: ; XOPAVX1: # %bb.0: ; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; XOPAVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 -; XOPAVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm1 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 -; XOPAVX1-NEXT: vprotb %xmm1, %xmm2, %xmm2 -; XOPAVX1-NEXT: vprotb %xmm1, %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1 +; XOPAVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 +; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 +; XOPAVX1-NEXT: vpsubb %xmm3, %xmm2, %xmm4 +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm5 +; XOPAVX1-NEXT: vpshlb %xmm4, %xmm5, %xmm4 +; XOPAVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm6 +; XOPAVX1-NEXT: vpshlb %xmm6, %xmm0, %xmm6 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm4, %ymm6, %ymm4 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; XOPAVX1-NEXT: vpsubb %xmm3, %xmm6, %xmm7 +; XOPAVX1-NEXT: vpshlb %xmm7, %xmm5, %xmm5 +; XOPAVX1-NEXT: vpsubb %xmm1, %xmm6, %xmm6 +; XOPAVX1-NEXT: vpshlb %xmm6, %xmm0, %xmm6 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm5, %ymm6, %ymm5 +; XOPAVX1-NEXT: vorps %ymm4, %ymm5, %ymm4 +; XOPAVX1-NEXT: vpcomeqb %xmm2, %xmm3, %xmm3 +; XOPAVX1-NEXT: vpcomeqb %xmm2, %xmm1, %xmm1 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1 +; XOPAVX1-NEXT: vpcmov %ymm1, %ymm4, %ymm0, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: splatvar_funnnel_v32i8: ; XOPAVX2: # %bb.0: ; XOPAVX2-NEXT: vpbroadcastb %xmm1, %ymm1 -; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 -; XOPAVX2-NEXT: vpsubb %ymm1, %ymm2, %ymm1 +; XOPAVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 ; XOPAVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm3 -; XOPAVX2-NEXT: vprotb %xmm2, %xmm3, %xmm2 -; XOPAVX2-NEXT: vprotb %xmm1, %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpsubb %xmm2, %xmm3, %xmm2 +; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm4 +; XOPAVX2-NEXT: vpshlb %xmm2, %xmm4, %xmm2 +; XOPAVX2-NEXT: vpsubb %xmm1, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpshlb %xmm3, %xmm0, %xmm3 +; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; XOPAVX2-NEXT: vpsubb %ymm1, %ymm3, %ymm3 +; XOPAVX2-NEXT: vextracti128 $1, %ymm3, %xmm5 +; XOPAVX2-NEXT: vpshlb %xmm5, %xmm4, %xmm4 +; XOPAVX2-NEXT: vpshlb %xmm3, %xmm0, %xmm3 +; XOPAVX2-NEXT: vinserti128 $1, %xmm4, %ymm3, %ymm3 +; XOPAVX2-NEXT: vpor %ymm2, %ymm3, %ymm2 +; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 +; XOPAVX2-NEXT: vpcmpeqb %ymm3, %ymm1, %ymm1 +; XOPAVX2-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0 ; XOPAVX2-NEXT: retq %splat = shufflevector <32 x i8> %amt, <32 x i8> undef, <32 x i32> zeroinitializer %res = call <32 x i8> @llvm.fshr.v32i8(<32 x i8> %x, <32 x i8> %x, <32 x i8> %splat) @@ -1041,18 +1388,21 @@ ; ; XOPAVX1-LABEL: constant_funnnel_v4i64: ; XOPAVX1: # %bb.0: -; XOPAVX1-NEXT: vprotq {{.*}}(%rip), %xmm0, %xmm1 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 -; XOPAVX1-NEXT: vprotq {{.*}}(%rip), %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX1-NEXT: vpshlq {{.*}}(%rip), %xmm0, %xmm1 +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 +; XOPAVX1-NEXT: vpshlq {{.*}}(%rip), %xmm2, %xmm3 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1 +; XOPAVX1-NEXT: vpshlq {{.*}}(%rip), %xmm0, %xmm0 +; XOPAVX1-NEXT: vpshlq {{.*}}(%rip), %xmm2, %xmm2 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: constant_funnnel_v4i64: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vprotq {{.*}}(%rip), %xmm0, %xmm1 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 -; XOPAVX2-NEXT: vprotq {{.*}}(%rip), %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX2-NEXT: vpsrlvq {{.*}}(%rip), %ymm0, %ymm1 +; XOPAVX2-NEXT: vpsllvq {{.*}}(%rip), %ymm0, %ymm0 +; XOPAVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 ; XOPAVX2-NEXT: retq %res = call <4 x i64> @llvm.fshr.v4i64(<4 x i64> %x, <4 x i64> %x, <4 x i64> ) ret <4 x i64> %res @@ -1061,28 +1411,26 @@ define <8 x i32> @constant_funnnel_v8i32(<8 x i32> %x) nounwind { ; AVX1-LABEL: constant_funnnel_v8i32: ; AVX1: # %bb.0: -; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [16777216,8388608,4194304,2097152] -; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[1,1,3,3] -; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 -; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm3[1,1,3,3] -; AVX1-NEXT: vpmuludq %xmm2, %xmm4, %xmm2 -; AVX1-NEXT: vpmuludq %xmm1, %xmm3, %xmm1 -; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[1,1,3,3] -; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1],xmm2[2,3],xmm3[4,5],xmm2[6,7] -; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[0,0,2,2] -; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7] -; AVX1-NEXT: vpor %xmm3, %xmm1, %xmm1 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [268435456,134217728,67108864,33554432] -; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[1,1,3,3] -; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm0[1,1,3,3] -; AVX1-NEXT: vpmuludq %xmm3, %xmm4, %xmm3 -; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm0 -; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] -; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7] -; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[0,0,2,2] -; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm3[2,3],xmm0[4,5],xmm3[6,7] -; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0 +; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 +; AVX1-NEXT: vpsrld $11, %xmm1, %xmm2 +; AVX1-NEXT: vpsrld $9, %xmm1, %xmm3 +; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7] +; AVX1-NEXT: vpsrld $10, %xmm1, %xmm3 +; AVX1-NEXT: vpsrld $8, %xmm1, %xmm4 +; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0,1,2,3],xmm3[4,5,6,7] +; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1],xmm2[2,3],xmm3[4,5],xmm2[6,7] +; AVX1-NEXT: vpsrld $7, %xmm0, %xmm3 +; AVX1-NEXT: vpsrld $5, %xmm0, %xmm4 +; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0,1,2,3],xmm3[4,5,6,7] +; AVX1-NEXT: vpsrld $6, %xmm0, %xmm4 +; AVX1-NEXT: vpsrld $4, %xmm0, %xmm5 +; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm5[0,1,2,3],xmm4[4,5,6,7] +; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0,1],xmm3[2,3],xmm4[4,5],xmm3[6,7] +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2 +; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 +; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm1, %xmm1 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: constant_funnnel_v8i32: @@ -1120,18 +1468,21 @@ ; ; XOPAVX1-LABEL: constant_funnnel_v8i32: ; XOPAVX1: # %bb.0: -; XOPAVX1-NEXT: vprotd {{.*}}(%rip), %xmm0, %xmm1 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 -; XOPAVX1-NEXT: vprotd {{.*}}(%rip), %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX1-NEXT: vpshld {{.*}}(%rip), %xmm0, %xmm1 +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 +; XOPAVX1-NEXT: vpshld {{.*}}(%rip), %xmm2, %xmm3 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1 +; XOPAVX1-NEXT: vpshld {{.*}}(%rip), %xmm0, %xmm0 +; XOPAVX1-NEXT: vpshld {{.*}}(%rip), %xmm2, %xmm2 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: constant_funnnel_v8i32: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vprotd {{.*}}(%rip), %xmm0, %xmm1 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 -; XOPAVX2-NEXT: vprotd {{.*}}(%rip), %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX2-NEXT: vpsrlvd {{.*}}(%rip), %ymm0, %ymm1 +; XOPAVX2-NEXT: vpsllvd {{.*}}(%rip), %ymm0, %ymm0 +; XOPAVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 ; XOPAVX2-NEXT: retq %res = call <8 x i32> @llvm.fshr.v8i32(<8 x i32> %x, <8 x i32> %x, <8 x i32> ) ret <8 x i32> %res @@ -1142,71 +1493,102 @@ ; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [256,128,64,32,16,8,4,2] -; AVX1-NEXT: vpmulhuw %xmm2, %xmm1, %xmm3 -; AVX1-NEXT: vpmullw %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vpor %xmm3, %xmm1, %xmm1 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [1,32768,16384,8192,4096,2048,1024,512] -; AVX1-NEXT: vpmulhuw %xmm2, %xmm0, %xmm3 -; AVX1-NEXT: vpmullw %xmm2, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; AVX1-NEXT: vpmullw %xmm2, %xmm1, %xmm3 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = +; AVX1-NEXT: vpmullw %xmm4, %xmm0, %xmm5 +; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm5, %ymm3 +; AVX1-NEXT: vpmulhuw %xmm2, %xmm1, %xmm1 +; AVX1-NEXT: vpmulhuw %xmm4, %xmm0, %xmm2 +; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3,4,5,6,7] +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1 +; AVX1-NEXT: vorps %ymm1, %ymm3, %ymm1 +; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [0,65535,65535,65535,65535,65535,65535,65535,65535,65535,65535,65535,65535,65535,65535,65535] +; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 +; AVX1-NEXT: vandnps %ymm0, %ymm2, %ymm0 +; AVX1-NEXT: vorps %ymm0, %ymm1, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: constant_funnnel_v16i16: ; AVX2: # %bb.0: -; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [1,32768,16384,8192,4096,2048,1024,512,256,128,64,32,16,8,4,2] +; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = ; AVX2-NEXT: vpmulhuw %ymm1, %ymm0, %ymm2 -; AVX2-NEXT: vpmullw %ymm1, %ymm0, %ymm0 -; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm0 +; AVX2-NEXT: vpblendw {{.*#+}} xmm3 = xmm0[0],xmm2[1,2,3,4,5,6,7] +; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7] +; AVX2-NEXT: vpmullw %ymm1, %ymm0, %ymm1 +; AVX2-NEXT: vpor %ymm2, %ymm1, %ymm1 +; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7] +; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7] ; AVX2-NEXT: retq ; ; AVX512F-LABEL: constant_funnnel_v16i16: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vmovdqa {{.*#+}} ymm1 = [1,32768,16384,8192,4096,2048,1024,512,256,128,64,32,16,8,4,2] +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm1 = ; AVX512F-NEXT: vpmulhuw %ymm1, %ymm0, %ymm2 -; AVX512F-NEXT: vpmullw %ymm1, %ymm0, %ymm0 -; AVX512F-NEXT: vpor %ymm2, %ymm0, %ymm0 +; AVX512F-NEXT: vpblendw {{.*#+}} xmm3 = xmm0[0],xmm2[1,2,3,4,5,6,7] +; AVX512F-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7] +; AVX512F-NEXT: vpmullw %ymm1, %ymm0, %ymm1 +; AVX512F-NEXT: vpor %ymm2, %ymm1, %ymm1 +; AVX512F-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7] +; AVX512F-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7] ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: constant_funnnel_v16i16: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm1 = [1,32768,16384,8192,4096,2048,1024,512,256,128,64,32,16,8,4,2] +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm1 = ; AVX512VL-NEXT: vpmulhuw %ymm1, %ymm0, %ymm2 -; AVX512VL-NEXT: vpmullw %ymm1, %ymm0, %ymm0 -; AVX512VL-NEXT: vpor %ymm2, %ymm0, %ymm0 +; AVX512VL-NEXT: vpblendw {{.*#+}} xmm3 = xmm0[0],xmm2[1,2,3,4,5,6,7] +; AVX512VL-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7] +; AVX512VL-NEXT: vpmullw %ymm1, %ymm0, %ymm1 +; AVX512VL-NEXT: vpor %ymm2, %ymm1, %ymm1 +; AVX512VL-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7] +; AVX512VL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7] ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: constant_funnnel_v16i16: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15] +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = ; AVX512BW-NEXT: vpsrlvw %zmm1, %zmm0, %zmm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [0,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1] -; AVX512BW-NEXT: vpsllvw %zmm2, %zmm0, %zmm0 -; AVX512BW-NEXT: vpor %ymm1, %ymm0, %ymm0 +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = +; AVX512BW-NEXT: vpsllvw %zmm2, %zmm0, %zmm2 +; AVX512BW-NEXT: vpor %ymm1, %ymm2, %ymm1 +; AVX512BW-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7] +; AVX512BW-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7] ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: constant_funnnel_v16i16: ; AVX512VLBW: # %bb.0: ; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %ymm0, %ymm1 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %ymm0, %ymm0 -; AVX512VLBW-NEXT: vpor %ymm1, %ymm0, %ymm0 +; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %ymm0, %ymm2 +; AVX512VLBW-NEXT: vpor %ymm1, %ymm2, %ymm2 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} ymm1 = [16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15] +; AVX512VLBW-NEXT: vpermi2w %ymm0, %ymm2, %ymm1 +; AVX512VLBW-NEXT: vmovdqa %ymm1, %ymm0 ; AVX512VLBW-NEXT: retq ; ; XOPAVX1-LABEL: constant_funnnel_v16i16: ; XOPAVX1: # %bb.0: -; XOPAVX1-NEXT: vprotw {{.*}}(%rip), %xmm0, %xmm1 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 -; XOPAVX1-NEXT: vprotw {{.*}}(%rip), %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX1-NEXT: vpshlw {{.*}}(%rip), %xmm0, %xmm1 +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 +; XOPAVX1-NEXT: vpshlw {{.*}}(%rip), %xmm2, %xmm3 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1 +; XOPAVX1-NEXT: vpshlw {{.*}}(%rip), %xmm0, %xmm3 +; XOPAVX1-NEXT: vpshlw {{.*}}(%rip), %xmm2, %xmm2 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2 +; XOPAVX1-NEXT: vorps %ymm1, %ymm2, %ymm1 +; XOPAVX1-NEXT: vpcmov {{.*}}(%rip), %ymm0, %ymm1, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: constant_funnnel_v16i16: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vprotw {{.*}}(%rip), %xmm0, %xmm1 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 -; XOPAVX2-NEXT: vprotw {{.*}}(%rip), %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} ymm1 = +; XOPAVX2-NEXT: vpmulhuw %ymm1, %ymm0, %ymm2 +; XOPAVX2-NEXT: vpblendw {{.*#+}} xmm3 = xmm0[0],xmm2[1,2,3,4,5,6,7] +; XOPAVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7] +; XOPAVX2-NEXT: vpmullw %ymm1, %ymm0, %ymm1 +; XOPAVX2-NEXT: vpor %ymm2, %ymm1, %ymm1 +; XOPAVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3,4,5,6,7] +; XOPAVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7] ; XOPAVX2-NEXT: retq %res = call <16 x i16> @llvm.fshr.v16i16(<16 x i16> %x, <16 x i16> %x, <16 x i16> ) ret <16 x i16> %res @@ -1216,48 +1598,52 @@ ; AVX1-LABEL: constant_funnnel_v32i8: ; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 -; AVX1-NEXT: vpxor %xmm8, %xmm8, %xmm8 -; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm1[8],xmm8[8],xmm1[9],xmm8[9],xmm1[10],xmm8[10],xmm1[11],xmm8[11],xmm1[12],xmm8[12],xmm1[13],xmm8[13],xmm1[14],xmm8[14],xmm1[15],xmm8[15] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm9 = [256,2,4,8,16,32,64,128] -; AVX1-NEXT: vpmullw %xmm3, %xmm9, %xmm3 +; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 +; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm1[8],xmm2[8],xmm1[9],xmm2[9],xmm1[10],xmm2[10],xmm1[11],xmm2[11],xmm1[12],xmm2[12],xmm1[13],xmm2[13],xmm1[14],xmm2[14],xmm1[15],xmm2[15] +; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [256,2,4,8,16,32,64,128] +; AVX1-NEXT: vpmullw %xmm4, %xmm3, %xmm3 ; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm3 ; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm5 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero ; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [256,128,64,32,16,8,4,2] ; AVX1-NEXT: vpmullw %xmm6, %xmm5, %xmm7 ; AVX1-NEXT: vpsrlw $8, %xmm7, %xmm7 ; AVX1-NEXT: vpackuswb %xmm3, %xmm7, %xmm3 +; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm0[8],xmm2[8],xmm0[9],xmm2[9],xmm0[10],xmm2[10],xmm0[11],xmm2[11],xmm0[12],xmm2[12],xmm0[13],xmm2[13],xmm0[14],xmm2[14],xmm0[15],xmm2[15] +; AVX1-NEXT: vpmullw %xmm4, %xmm2, %xmm2 +; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 +; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm4 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX1-NEXT: vpmullw %xmm6, %xmm4, %xmm6 +; AVX1-NEXT: vpsrlw $8, %xmm6, %xmm6 +; AVX1-NEXT: vpackuswb %xmm2, %xmm6, %xmm2 +; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2 ; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] -; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = [1,2,4,8,16,32,64,128] -; AVX1-NEXT: vpmullw %xmm7, %xmm1, %xmm1 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] -; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [1,128,64,32,16,8,4,2] -; AVX1-NEXT: vpmullw %xmm4, %xmm5, %xmm5 -; AVX1-NEXT: vpand %xmm2, %xmm5, %xmm5 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = +; AVX1-NEXT: vpmullw %xmm3, %xmm1, %xmm1 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [255,255,255,255,255,255,255,255] +; AVX1-NEXT: vpand %xmm6, %xmm1, %xmm1 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = +; AVX1-NEXT: vpmullw %xmm7, %xmm5, %xmm5 +; AVX1-NEXT: vpand %xmm6, %xmm5, %xmm5 ; AVX1-NEXT: vpackuswb %xmm1, %xmm5, %xmm1 -; AVX1-NEXT: vpor %xmm3, %xmm1, %xmm1 -; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm0[8],xmm8[8],xmm0[9],xmm8[9],xmm0[10],xmm8[10],xmm0[11],xmm8[11],xmm0[12],xmm8[12],xmm0[13],xmm8[13],xmm0[14],xmm8[14],xmm0[15],xmm8[15] -; AVX1-NEXT: vpmullw %xmm3, %xmm9, %xmm3 -; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm3 -; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm5 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero -; AVX1-NEXT: vpmullw %xmm6, %xmm5, %xmm6 -; AVX1-NEXT: vpsrlw $8, %xmm6, %xmm6 -; AVX1-NEXT: vpackuswb %xmm3, %xmm6, %xmm3 -; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] -; AVX1-NEXT: vpmullw %xmm7, %xmm0, %xmm0 -; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm0 -; AVX1-NEXT: vpmullw %xmm4, %xmm5, %xmm4 -; AVX1-NEXT: vpand %xmm2, %xmm4, %xmm2 -; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 -; AVX1-NEXT: vpor %xmm3, %xmm0, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm5 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] +; AVX1-NEXT: vpmullw %xmm3, %xmm5, %xmm3 +; AVX1-NEXT: vpand %xmm6, %xmm3, %xmm3 +; AVX1-NEXT: vpmullw %xmm7, %xmm4, %xmm4 +; AVX1-NEXT: vpand %xmm6, %xmm4, %xmm4 +; AVX1-NEXT: vpackuswb %xmm3, %xmm4, %xmm3 +; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm3, %ymm1 +; AVX1-NEXT: vorps %ymm2, %ymm1, %ymm1 +; AVX1-NEXT: vbroadcastsd {{.*#+}} ymm2 = [18446744073709551360,18446744073709551360,18446744073709551360,18446744073709551360] +; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 +; AVX1-NEXT: vandnps %ymm0, %ymm2, %ymm0 +; AVX1-NEXT: vorps %ymm0, %ymm1, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: constant_funnnel_v32i8: ; AVX2: # %bb.0: ; AVX2-NEXT: vpsllw $4, %ymm0, %ymm1 ; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 -; AVX2-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX2-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX2-NEXT: # ymm2 = mem[0,1,0,1] ; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm1 ; AVX2-NEXT: vpsllw $2, %ymm1, %ymm3 @@ -1271,18 +1657,20 @@ ; AVX2-NEXT: vpunpckhbw {{.*#+}} ymm3 = ymm0[8],ymm2[8],ymm0[9],ymm2[9],ymm0[10],ymm2[10],ymm0[11],ymm2[11],ymm0[12],ymm2[12],ymm0[13],ymm2[13],ymm0[14],ymm2[14],ymm0[15],ymm2[15],ymm0[24],ymm2[24],ymm0[25],ymm2[25],ymm0[26],ymm2[26],ymm0[27],ymm2[27],ymm0[28],ymm2[28],ymm0[29],ymm2[29],ymm0[30],ymm2[30],ymm0[31],ymm2[31] ; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm3, %ymm3 ; AVX2-NEXT: vpsrlw $8, %ymm3, %ymm3 -; AVX2-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[1],ymm2[1],ymm0[2],ymm2[2],ymm0[3],ymm2[3],ymm0[4],ymm2[4],ymm0[5],ymm2[5],ymm0[6],ymm2[6],ymm0[7],ymm2[7],ymm0[16],ymm2[16],ymm0[17],ymm2[17],ymm0[18],ymm2[18],ymm0[19],ymm2[19],ymm0[20],ymm2[20],ymm0[21],ymm2[21],ymm0[22],ymm2[22],ymm0[23],ymm2[23] -; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 -; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0 -; AVX2-NEXT: vpackuswb %ymm3, %ymm0, %ymm0 -; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0 +; AVX2-NEXT: vpunpcklbw {{.*#+}} ymm2 = ymm0[0],ymm2[0],ymm0[1],ymm2[1],ymm0[2],ymm2[2],ymm0[3],ymm2[3],ymm0[4],ymm2[4],ymm0[5],ymm2[5],ymm0[6],ymm2[6],ymm0[7],ymm2[7],ymm0[16],ymm2[16],ymm0[17],ymm2[17],ymm0[18],ymm2[18],ymm0[19],ymm2[19],ymm0[20],ymm2[20],ymm0[21],ymm2[21],ymm0[22],ymm2[22],ymm0[23],ymm2[23] +; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm2, %ymm2 +; AVX2-NEXT: vpsrlw $8, %ymm2, %ymm2 +; AVX2-NEXT: vpackuswb %ymm3, %ymm2, %ymm2 +; AVX2-NEXT: vpor %ymm2, %ymm1, %ymm1 +; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX2-NEXT: retq ; ; AVX512F-LABEL: constant_funnnel_v32i8: ; AVX512F: # %bb.0: ; AVX512F-NEXT: vpsllw $4, %ymm0, %ymm1 ; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 -; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512F-NEXT: # ymm2 = mem[0,1,0,1] ; AVX512F-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm1 ; AVX512F-NEXT: vpsllw $2, %ymm1, %ymm3 @@ -1296,18 +1684,20 @@ ; AVX512F-NEXT: vpunpckhbw {{.*#+}} ymm3 = ymm0[8],ymm2[8],ymm0[9],ymm2[9],ymm0[10],ymm2[10],ymm0[11],ymm2[11],ymm0[12],ymm2[12],ymm0[13],ymm2[13],ymm0[14],ymm2[14],ymm0[15],ymm2[15],ymm0[24],ymm2[24],ymm0[25],ymm2[25],ymm0[26],ymm2[26],ymm0[27],ymm2[27],ymm0[28],ymm2[28],ymm0[29],ymm2[29],ymm0[30],ymm2[30],ymm0[31],ymm2[31] ; AVX512F-NEXT: vpmullw {{.*}}(%rip), %ymm3, %ymm3 ; AVX512F-NEXT: vpsrlw $8, %ymm3, %ymm3 -; AVX512F-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm0[0],ymm2[0],ymm0[1],ymm2[1],ymm0[2],ymm2[2],ymm0[3],ymm2[3],ymm0[4],ymm2[4],ymm0[5],ymm2[5],ymm0[6],ymm2[6],ymm0[7],ymm2[7],ymm0[16],ymm2[16],ymm0[17],ymm2[17],ymm0[18],ymm2[18],ymm0[19],ymm2[19],ymm0[20],ymm2[20],ymm0[21],ymm2[21],ymm0[22],ymm2[22],ymm0[23],ymm2[23] -; AVX512F-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 -; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 -; AVX512F-NEXT: vpackuswb %ymm3, %ymm0, %ymm0 -; AVX512F-NEXT: vpor %ymm0, %ymm1, %ymm0 +; AVX512F-NEXT: vpunpcklbw {{.*#+}} ymm2 = ymm0[0],ymm2[0],ymm0[1],ymm2[1],ymm0[2],ymm2[2],ymm0[3],ymm2[3],ymm0[4],ymm2[4],ymm0[5],ymm2[5],ymm0[6],ymm2[6],ymm0[7],ymm2[7],ymm0[16],ymm2[16],ymm0[17],ymm2[17],ymm0[18],ymm2[18],ymm0[19],ymm2[19],ymm0[20],ymm2[20],ymm0[21],ymm2[21],ymm0[22],ymm2[22],ymm0[23],ymm2[23] +; AVX512F-NEXT: vpmullw {{.*}}(%rip), %ymm2, %ymm2 +; AVX512F-NEXT: vpsrlw $8, %ymm2, %ymm2 +; AVX512F-NEXT: vpackuswb %ymm3, %ymm2, %ymm2 +; AVX512F-NEXT: vpor %ymm2, %ymm1, %ymm1 +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512F-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: constant_funnnel_v32i8: ; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vpsllw $4, %ymm0, %ymm1 ; AVX512VL-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 -; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm2 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512VL-NEXT: # ymm2 = mem[0,1,0,1] ; AVX512VL-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm1 ; AVX512VL-NEXT: vpsllw $2, %ymm1, %ymm3 @@ -1321,48 +1711,70 @@ ; AVX512VL-NEXT: vpsrlw $8, %ymm2, %ymm2 ; AVX512VL-NEXT: vpmullw {{.*}}(%rip), %ymm2, %ymm2 ; AVX512VL-NEXT: vpsrlw $8, %ymm2, %ymm2 -; AVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23] -; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 -; AVX512VL-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 -; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 -; AVX512VL-NEXT: vpackuswb %ymm2, %ymm0, %ymm0 -; AVX512VL-NEXT: vpor %ymm0, %ymm1, %ymm0 +; AVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm3 = ymm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23] +; AVX512VL-NEXT: vpsrlw $8, %ymm3, %ymm3 +; AVX512VL-NEXT: vpmullw {{.*}}(%rip), %ymm3, %ymm3 +; AVX512VL-NEXT: vpsrlw $8, %ymm3, %ymm3 +; AVX512VL-NEXT: vpackuswb %ymm2, %ymm3, %ymm2 +; AVX512VL-NEXT: vpor %ymm2, %ymm1, %ymm1 +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512VL-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: constant_funnnel_v32i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero -; AVX512BW-NEXT: vpsrlvw {{.*}}(%rip), %zmm0, %zmm1 -; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero +; AVX512BW-NEXT: vpsrlvw {{.*}}(%rip), %zmm1, %zmm2 +; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm1, %zmm1 +; AVX512BW-NEXT: vporq %zmm2, %zmm1, %zmm1 +; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 +; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; AVX512BW-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: constant_funnnel_v32i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero -; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %zmm0, %zmm1 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vpmovwb %zmm0, %ymm0 +; AVX512VLBW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero +; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %zmm1, %zmm2 +; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm1, %zmm1 +; AVX512VLBW-NEXT: vporq %zmm2, %zmm1, %zmm1 +; AVX512VLBW-NEXT: vpmovwb %zmm1, %ymm1 +; AVX512VLBW-NEXT: movl $16843009, %eax # imm = 0x1010101 +; AVX512VLBW-NEXT: kmovd %eax, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %ymm0, %ymm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa %ymm1, %ymm0 ; AVX512VLBW-NEXT: retq ; ; XOPAVX1-LABEL: constant_funnnel_v32i8: ; XOPAVX1: # %bb.0: ; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 -; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,7,6,5,4,3,2,1,0,1,2,3,4,5,6,7] -; XOPAVX1-NEXT: vprotb %xmm2, %xmm1, %xmm1 -; XOPAVX1-NEXT: vprotb %xmm2, %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,254,253,252,251,250,249,0,249,250,251,252,253,254,255] +; XOPAVX1-NEXT: vpshlb %xmm2, %xmm1, %xmm3 +; XOPAVX1-NEXT: vpshlb %xmm2, %xmm0, %xmm2 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [8,7,6,5,4,3,2,1,8,1,2,3,4,5,6,7] +; XOPAVX1-NEXT: vpshlb %xmm3, %xmm1, %xmm1 +; XOPAVX1-NEXT: vpshlb %xmm3, %xmm0, %xmm3 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm3, %ymm1 +; XOPAVX1-NEXT: vorps %ymm2, %ymm1, %ymm1 +; XOPAVX1-NEXT: vbroadcastsd {{.*#+}} ymm2 = [18446744073709551360,18446744073709551360,18446744073709551360,18446744073709551360] +; XOPAVX1-NEXT: vpcmov %ymm2, %ymm0, %ymm1, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: constant_funnnel_v32i8: ; XOPAVX2: # %bb.0: ; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 -; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [0,7,6,5,4,3,2,1,0,1,2,3,4,5,6,7] -; XOPAVX2-NEXT: vprotb %xmm2, %xmm1, %xmm1 -; XOPAVX2-NEXT: vprotb %xmm2, %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [0,255,254,253,252,251,250,249,0,249,250,251,252,253,254,255] +; XOPAVX2-NEXT: vpshlb %xmm2, %xmm1, %xmm3 +; XOPAVX2-NEXT: vpshlb %xmm2, %xmm0, %xmm2 +; XOPAVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [8,7,6,5,4,3,2,1,8,1,2,3,4,5,6,7] +; XOPAVX2-NEXT: vpshlb %xmm3, %xmm1, %xmm1 +; XOPAVX2-NEXT: vpshlb %xmm3, %xmm0, %xmm3 +; XOPAVX2-NEXT: vinserti128 $1, %xmm1, %ymm3, %ymm1 +; XOPAVX2-NEXT: vpor %ymm2, %ymm1, %ymm1 +; XOPAVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] +; XOPAVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 ; XOPAVX2-NEXT: retq %res = call <32 x i8> @llvm.fshr.v32i8(<32 x i8> %x, <32 x i8> %x, <32 x i8> ) ret <32 x i8> %res @@ -1418,18 +1830,21 @@ ; ; XOPAVX1-LABEL: splatconstant_funnnel_v4i64: ; XOPAVX1: # %bb.0: -; XOPAVX1-NEXT: vprotq $50, %xmm0, %xmm1 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 -; XOPAVX1-NEXT: vprotq $50, %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX1-NEXT: vpsrlq $14, %xmm0, %xmm1 +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 +; XOPAVX1-NEXT: vpsrlq $14, %xmm2, %xmm3 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1 +; XOPAVX1-NEXT: vpsllq $50, %xmm0, %xmm0 +; XOPAVX1-NEXT: vpsllq $50, %xmm2, %xmm2 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: splatconstant_funnnel_v4i64: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vprotq $50, %xmm0, %xmm1 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 -; XOPAVX2-NEXT: vprotq $50, %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX2-NEXT: vpsrlq $14, %ymm0, %ymm1 +; XOPAVX2-NEXT: vpsllq $50, %ymm0, %ymm0 +; XOPAVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 ; XOPAVX2-NEXT: retq %res = call <4 x i64> @llvm.fshr.v4i64(<4 x i64> %x, <4 x i64> %x, <4 x i64> ) ret <4 x i64> %res @@ -1438,14 +1853,14 @@ define <8 x i32> @splatconstant_funnnel_v8i32(<8 x i32> %x) nounwind { ; AVX1-LABEL: splatconstant_funnnel_v8i32: ; AVX1: # %bb.0: -; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 -; AVX1-NEXT: vpsrld $4, %xmm1, %xmm2 -; AVX1-NEXT: vpslld $28, %xmm1, %xmm1 -; AVX1-NEXT: vpor %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vpsrld $4, %xmm0, %xmm2 +; AVX1-NEXT: vpsrld $4, %xmm0, %xmm1 +; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 +; AVX1-NEXT: vpsrld $4, %xmm2, %xmm3 +; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1 ; AVX1-NEXT: vpslld $28, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; AVX1-NEXT: vpslld $28, %xmm2, %xmm2 +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: splatconstant_funnnel_v8i32: @@ -1481,18 +1896,21 @@ ; ; XOPAVX1-LABEL: splatconstant_funnnel_v8i32: ; XOPAVX1: # %bb.0: -; XOPAVX1-NEXT: vprotd $28, %xmm0, %xmm1 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 -; XOPAVX1-NEXT: vprotd $28, %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX1-NEXT: vpsrld $4, %xmm0, %xmm1 +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 +; XOPAVX1-NEXT: vpsrld $4, %xmm2, %xmm3 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1 +; XOPAVX1-NEXT: vpslld $28, %xmm0, %xmm0 +; XOPAVX1-NEXT: vpslld $28, %xmm2, %xmm2 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: splatconstant_funnnel_v8i32: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vprotd $28, %xmm0, %xmm1 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 -; XOPAVX2-NEXT: vprotd $28, %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX2-NEXT: vpsrld $4, %ymm0, %ymm1 +; XOPAVX2-NEXT: vpslld $28, %ymm0, %ymm0 +; XOPAVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 ; XOPAVX2-NEXT: retq %res = call <8 x i32> @llvm.fshr.v8i32(<8 x i32> %x, <8 x i32> %x, <8 x i32> ) ret <8 x i32> %res @@ -1501,14 +1919,14 @@ define <16 x i16> @splatconstant_funnnel_v16i16(<16 x i16> %x) nounwind { ; AVX1-LABEL: splatconstant_funnnel_v16i16: ; AVX1: # %bb.0: -; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 -; AVX1-NEXT: vpsrlw $7, %xmm1, %xmm2 -; AVX1-NEXT: vpsllw $9, %xmm1, %xmm1 -; AVX1-NEXT: vpor %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vpsrlw $7, %xmm0, %xmm2 +; AVX1-NEXT: vpsrlw $7, %xmm0, %xmm1 +; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 +; AVX1-NEXT: vpsrlw $7, %xmm2, %xmm3 +; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1 ; AVX1-NEXT: vpsllw $9, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0 -; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; AVX1-NEXT: vpsllw $9, %xmm2, %xmm2 +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: splatconstant_funnnel_v16i16: @@ -1527,18 +1945,21 @@ ; ; XOPAVX1-LABEL: splatconstant_funnnel_v16i16: ; XOPAVX1: # %bb.0: -; XOPAVX1-NEXT: vprotw $9, %xmm0, %xmm1 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 -; XOPAVX1-NEXT: vprotw $9, %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX1-NEXT: vpsrlw $7, %xmm0, %xmm1 +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 +; XOPAVX1-NEXT: vpsrlw $7, %xmm2, %xmm3 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1 +; XOPAVX1-NEXT: vpsllw $9, %xmm0, %xmm0 +; XOPAVX1-NEXT: vpsllw $9, %xmm2, %xmm2 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 +; XOPAVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: splatconstant_funnnel_v16i16: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vprotw $9, %xmm0, %xmm1 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 -; XOPAVX2-NEXT: vprotw $9, %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX2-NEXT: vpsrlw $7, %ymm0, %ymm1 +; XOPAVX2-NEXT: vpsllw $9, %ymm0, %ymm0 +; XOPAVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 ; XOPAVX2-NEXT: retq %res = call <16 x i16> @llvm.fshr.v16i16(<16 x i16> %x, <16 x i16> %x, <16 x i16> ) ret <16 x i16> %res @@ -1549,17 +1970,18 @@ ; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vpsrlw $4, %xmm1, %xmm2 -; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240] -; AVX1-NEXT: vpandn %xmm2, %xmm3, %xmm2 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] +; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 +; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm4 +; AVX1-NEXT: vpand %xmm3, %xmm4, %xmm3 +; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm3, %ymm2 ; AVX1-NEXT: vpsllw $4, %xmm1, %xmm1 +; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240] ; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 -; AVX1-NEXT: vpor %xmm2, %xmm1, %xmm1 -; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm2 -; AVX1-NEXT: vpandn %xmm2, %xmm3, %xmm2 ; AVX1-NEXT: vpsllw $4, %xmm0, %xmm0 ; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 -; AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0 ; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: splatconstant_funnnel_v32i8: @@ -1605,18 +2027,23 @@ ; ; XOPAVX1-LABEL: splatconstant_funnnel_v32i8: ; XOPAVX1: # %bb.0: -; XOPAVX1-NEXT: vprotb $4, %xmm0, %xmm1 -; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 -; XOPAVX1-NEXT: vprotb $4, %xmm0, %xmm0 -; XOPAVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252] +; XOPAVX1-NEXT: vpshlb %xmm2, %xmm1, %xmm3 +; XOPAVX1-NEXT: vpshlb %xmm2, %xmm0, %xmm2 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2 +; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4] +; XOPAVX1-NEXT: vpshlb %xmm3, %xmm1, %xmm1 +; XOPAVX1-NEXT: vpshlb %xmm3, %xmm0, %xmm0 +; XOPAVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 +; XOPAVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 ; XOPAVX1-NEXT: retq ; ; XOPAVX2-LABEL: splatconstant_funnnel_v32i8: ; XOPAVX2: # %bb.0: -; XOPAVX2-NEXT: vprotb $4, %xmm0, %xmm1 -; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 -; XOPAVX2-NEXT: vprotb $4, %xmm0, %xmm0 -; XOPAVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 +; XOPAVX2-NEXT: vpsrlw $4, %ymm0, %ymm1 +; XOPAVX2-NEXT: vpsllw $4, %ymm0, %ymm0 +; XOPAVX2-NEXT: vpcmov {{.*}}(%rip), %ymm1, %ymm0, %ymm0 ; XOPAVX2-NEXT: retq %res = call <32 x i8> @llvm.fshr.v32i8(<32 x i8> %x, <32 x i8> %x, <32 x i8> ) ret <32 x i8> %res diff --git a/llvm/test/CodeGen/X86/vector-fshr-rot-512.ll b/llvm/test/CodeGen/X86/vector-fshr-rot-512.ll --- a/llvm/test/CodeGen/X86/vector-fshr-rot-512.ll +++ b/llvm/test/CodeGen/X86/vector-fshr-rot-512.ll @@ -36,29 +36,31 @@ ; AVX512F: # %bb.0: ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm2 ; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm3 -; AVX512F-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512F-NEXT: vpsubw %ymm3, %ymm4, %ymm3 -; AVX512F-NEXT: vmovdqa {{.*#+}} ymm5 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] -; AVX512F-NEXT: vpand %ymm5, %ymm3, %ymm3 -; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm6 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero -; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm2 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero -; AVX512F-NEXT: vpsllvd %zmm6, %zmm2, %zmm6 +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm4 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] +; AVX512F-NEXT: vpand %ymm4, %ymm3, %ymm3 +; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm5 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero +; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm6 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero +; AVX512F-NEXT: vpsrlvd %zmm5, %zmm6, %zmm5 ; AVX512F-NEXT: vmovdqa {{.*#+}} ymm7 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] -; AVX512F-NEXT: vpsubw %ymm3, %ymm7, %ymm3 -; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm3 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero -; AVX512F-NEXT: vpsrlvd %zmm3, %zmm2, %zmm2 -; AVX512F-NEXT: vpord %zmm2, %zmm6, %zmm2 -; AVX512F-NEXT: vpmovdw %zmm2, %ymm2 -; AVX512F-NEXT: vpsubw %ymm1, %ymm4, %ymm1 -; AVX512F-NEXT: vpand %ymm5, %ymm1, %ymm1 +; AVX512F-NEXT: vpsubw %ymm3, %ymm7, %ymm8 +; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm8 = ymm8[0],zero,ymm8[1],zero,ymm8[2],zero,ymm8[3],zero,ymm8[4],zero,ymm8[5],zero,ymm8[6],zero,ymm8[7],zero,ymm8[8],zero,ymm8[9],zero,ymm8[10],zero,ymm8[11],zero,ymm8[12],zero,ymm8[13],zero,ymm8[14],zero,ymm8[15],zero +; AVX512F-NEXT: vpsllvd %zmm8, %zmm6, %zmm6 +; AVX512F-NEXT: vpord %zmm5, %zmm6, %zmm5 +; AVX512F-NEXT: vpmovdw %zmm5, %ymm5 +; AVX512F-NEXT: vpxor %xmm6, %xmm6, %xmm6 +; AVX512F-NEXT: vpcmpeqw %ymm6, %ymm3, %ymm3 +; AVX512F-NEXT: vpblendvb %ymm3, %ymm2, %ymm5, %ymm2 +; AVX512F-NEXT: vpand %ymm4, %ymm1, %ymm1 ; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero -; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero -; AVX512F-NEXT: vpsllvd %zmm3, %zmm0, %zmm3 -; AVX512F-NEXT: vpsubw %ymm1, %ymm7, %ymm1 -; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero -; AVX512F-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0 -; AVX512F-NEXT: vpord %zmm0, %zmm3, %zmm0 -; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 +; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm4 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero +; AVX512F-NEXT: vpsrlvd %zmm3, %zmm4, %zmm3 +; AVX512F-NEXT: vpsubw %ymm1, %ymm7, %ymm5 +; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm5 = ymm5[0],zero,ymm5[1],zero,ymm5[2],zero,ymm5[3],zero,ymm5[4],zero,ymm5[5],zero,ymm5[6],zero,ymm5[7],zero,ymm5[8],zero,ymm5[9],zero,ymm5[10],zero,ymm5[11],zero,ymm5[12],zero,ymm5[13],zero,ymm5[14],zero,ymm5[15],zero +; AVX512F-NEXT: vpsllvd %zmm5, %zmm4, %zmm4 +; AVX512F-NEXT: vpord %zmm3, %zmm4, %zmm3 +; AVX512F-NEXT: vpmovdw %zmm3, %ymm3 +; AVX512F-NEXT: vpcmpeqw %ymm6, %ymm1, %ymm1 +; AVX512F-NEXT: vpblendvb %ymm1, %ymm0, %ymm3, %ymm0 ; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0 ; AVX512F-NEXT: retq ; @@ -66,54 +68,58 @@ ; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm2 ; AVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm3 -; AVX512VL-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VL-NEXT: vpsubw %ymm3, %ymm4, %ymm3 -; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm5 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] -; AVX512VL-NEXT: vpand %ymm5, %ymm3, %ymm3 -; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm6 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero -; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm2 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero -; AVX512VL-NEXT: vpsllvd %zmm6, %zmm2, %zmm6 +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm4 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] +; AVX512VL-NEXT: vpand %ymm4, %ymm3, %ymm3 +; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm5 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero +; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm6 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero +; AVX512VL-NEXT: vpsrlvd %zmm5, %zmm6, %zmm5 ; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm7 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] -; AVX512VL-NEXT: vpsubw %ymm3, %ymm7, %ymm3 -; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm3 = ymm3[0],zero,ymm3[1],zero,ymm3[2],zero,ymm3[3],zero,ymm3[4],zero,ymm3[5],zero,ymm3[6],zero,ymm3[7],zero,ymm3[8],zero,ymm3[9],zero,ymm3[10],zero,ymm3[11],zero,ymm3[12],zero,ymm3[13],zero,ymm3[14],zero,ymm3[15],zero -; AVX512VL-NEXT: vpsrlvd %zmm3, %zmm2, %zmm2 -; AVX512VL-NEXT: vpord %zmm2, %zmm6, %zmm2 -; AVX512VL-NEXT: vpmovdw %zmm2, %ymm2 -; AVX512VL-NEXT: vpsubw %ymm1, %ymm4, %ymm1 -; AVX512VL-NEXT: vpand %ymm5, %ymm1, %ymm1 +; AVX512VL-NEXT: vpsubw %ymm3, %ymm7, %ymm8 +; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm8 = ymm8[0],zero,ymm8[1],zero,ymm8[2],zero,ymm8[3],zero,ymm8[4],zero,ymm8[5],zero,ymm8[6],zero,ymm8[7],zero,ymm8[8],zero,ymm8[9],zero,ymm8[10],zero,ymm8[11],zero,ymm8[12],zero,ymm8[13],zero,ymm8[14],zero,ymm8[15],zero +; AVX512VL-NEXT: vpsllvd %zmm8, %zmm6, %zmm6 +; AVX512VL-NEXT: vpord %zmm5, %zmm6, %zmm5 +; AVX512VL-NEXT: vpmovdw %zmm5, %ymm5 +; AVX512VL-NEXT: vpxor %xmm6, %xmm6, %xmm6 +; AVX512VL-NEXT: vpcmpeqw %ymm6, %ymm3, %ymm3 +; AVX512VL-NEXT: vpblendvb %ymm3, %ymm2, %ymm5, %ymm2 +; AVX512VL-NEXT: vpand %ymm4, %ymm1, %ymm1 ; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm3 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero -; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero -; AVX512VL-NEXT: vpsllvd %zmm3, %zmm0, %zmm3 -; AVX512VL-NEXT: vpsubw %ymm1, %ymm7, %ymm1 -; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero -; AVX512VL-NEXT: vpsrlvd %zmm1, %zmm0, %zmm0 -; AVX512VL-NEXT: vpord %zmm0, %zmm3, %zmm0 -; AVX512VL-NEXT: vpmovdw %zmm0, %ymm0 +; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm4 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero +; AVX512VL-NEXT: vpsrlvd %zmm3, %zmm4, %zmm3 +; AVX512VL-NEXT: vpsubw %ymm1, %ymm7, %ymm5 +; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm5 = ymm5[0],zero,ymm5[1],zero,ymm5[2],zero,ymm5[3],zero,ymm5[4],zero,ymm5[5],zero,ymm5[6],zero,ymm5[7],zero,ymm5[8],zero,ymm5[9],zero,ymm5[10],zero,ymm5[11],zero,ymm5[12],zero,ymm5[13],zero,ymm5[14],zero,ymm5[15],zero +; AVX512VL-NEXT: vpsllvd %zmm5, %zmm4, %zmm4 +; AVX512VL-NEXT: vpord %zmm3, %zmm4, %zmm3 +; AVX512VL-NEXT: vpmovdw %zmm3, %ymm3 +; AVX512VL-NEXT: vpcmpeqw %ymm6, %ymm1, %ymm1 +; AVX512VL-NEXT: vpblendvb %ymm1, %ymm0, %ymm3, %ymm0 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: var_funnnel_v32i16: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa64 {{.*#+}} zmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] -; AVX512BW-NEXT: vpandq %zmm2, %zmm1, %zmm3 -; AVX512BW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubw %zmm1, %zmm4, %zmm1 -; AVX512BW-NEXT: vpandq %zmm2, %zmm1, %zmm1 -; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm3, %zmm0, %zmm0 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512BW-NEXT: vpsrlvw %zmm2, %zmm0, %zmm1 +; AVX512BW-NEXT: vmovdqa64 {{.*#+}} zmm3 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] +; AVX512BW-NEXT: vpsubw %zmm2, %zmm3, %zmm3 +; AVX512BW-NEXT: vpsllvw %zmm3, %zmm0, %zmm3 +; AVX512BW-NEXT: vporq %zmm1, %zmm3, %zmm1 +; AVX512BW-NEXT: vptestnmw %zmm2, %zmm2, %k1 +; AVX512BW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} +; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v32i16: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vmovdqa64 {{.*#+}} zmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] -; AVX512VLBW-NEXT: vpandq %zmm2, %zmm1, %zmm3 -; AVX512VLBW-NEXT: vpsrlvw %zmm3, %zmm0, %zmm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubw %zmm1, %zmm4, %zmm1 -; AVX512VLBW-NEXT: vpandq %zmm2, %zmm1, %zmm1 -; AVX512VLBW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm3, %zmm0, %zmm0 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512VLBW-NEXT: vpsrlvw %zmm2, %zmm0, %zmm1 +; AVX512VLBW-NEXT: vmovdqa64 {{.*#+}} zmm3 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] +; AVX512VLBW-NEXT: vpsubw %zmm2, %zmm3, %zmm3 +; AVX512VLBW-NEXT: vpsllvw %zmm3, %zmm0, %zmm3 +; AVX512VLBW-NEXT: vporq %zmm1, %zmm3, %zmm1 +; AVX512VLBW-NEXT: vptestnmw %zmm2, %zmm2, %k1 +; AVX512VLBW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512VLBW-NEXT: retq %res = call <32 x i16> @llvm.fshr.v32i16(<32 x i16> %x, <32 x i16> %x, <32 x i16> %amt) ret <32 x i16> %res @@ -122,176 +128,222 @@ define <64 x i8> @var_funnnel_v64i8(<64 x i8> %x, <64 x i8> %amt) nounwind { ; AVX512F-LABEL: var_funnnel_v64i8: ; AVX512F: # %bb.0: -; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm2 -; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm3 -; AVX512F-NEXT: vpsrlw $4, %ymm3, %ymm4 -; AVX512F-NEXT: vmovdqa {{.*#+}} ymm5 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240] -; AVX512F-NEXT: vpandn %ymm4, %ymm5, %ymm4 -; AVX512F-NEXT: vpsllw $4, %ymm3, %ymm6 -; AVX512F-NEXT: vpand %ymm5, %ymm6, %ymm6 -; AVX512F-NEXT: vpor %ymm4, %ymm6, %ymm4 -; AVX512F-NEXT: vpxor %xmm6, %xmm6, %xmm6 -; AVX512F-NEXT: vpsubb %ymm2, %ymm6, %ymm2 -; AVX512F-NEXT: vpsllw $5, %ymm2, %ymm2 -; AVX512F-NEXT: vpblendvb %ymm2, %ymm4, %ymm3, %ymm3 -; AVX512F-NEXT: vpsrlw $6, %ymm3, %ymm4 -; AVX512F-NEXT: vmovdqa {{.*#+}} ymm7 = [252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252] -; AVX512F-NEXT: vpandn %ymm4, %ymm7, %ymm4 -; AVX512F-NEXT: vpsllw $2, %ymm3, %ymm8 -; AVX512F-NEXT: vpand %ymm7, %ymm8, %ymm8 -; AVX512F-NEXT: vpor %ymm4, %ymm8, %ymm4 -; AVX512F-NEXT: vpaddb %ymm2, %ymm2, %ymm2 -; AVX512F-NEXT: vpblendvb %ymm2, %ymm4, %ymm3, %ymm3 -; AVX512F-NEXT: vpsrlw $7, %ymm3, %ymm4 -; AVX512F-NEXT: vmovdqa {{.*#+}} ymm8 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] -; AVX512F-NEXT: vpand %ymm4, %ymm8, %ymm4 -; AVX512F-NEXT: vpaddb %ymm3, %ymm3, %ymm9 -; AVX512F-NEXT: vpor %ymm4, %ymm9, %ymm4 -; AVX512F-NEXT: vpaddb %ymm2, %ymm2, %ymm2 -; AVX512F-NEXT: vpblendvb %ymm2, %ymm4, %ymm3, %ymm2 -; AVX512F-NEXT: vpsrlw $4, %ymm0, %ymm3 -; AVX512F-NEXT: vpandn %ymm3, %ymm5, %ymm3 +; AVX512F-NEXT: vextracti64x4 $1, %zmm1, %ymm5 +; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm2 +; AVX512F-NEXT: vpsrlw $4, %ymm2, %ymm4 +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm3 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] +; AVX512F-NEXT: vpand %ymm3, %ymm4, %ymm6 +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm4 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] +; AVX512F-NEXT: vpand %ymm4, %ymm5, %ymm7 +; AVX512F-NEXT: vpsllw $5, %ymm7, %ymm8 +; AVX512F-NEXT: vpblendvb %ymm8, %ymm6, %ymm2, %ymm6 +; AVX512F-NEXT: vpsrlw $2, %ymm6, %ymm9 +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm5 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63] +; AVX512F-NEXT: vpand %ymm5, %ymm9, %ymm9 +; AVX512F-NEXT: vpaddb %ymm8, %ymm8, %ymm8 +; AVX512F-NEXT: vpblendvb %ymm8, %ymm9, %ymm6, %ymm9 +; AVX512F-NEXT: vpsrlw $1, %ymm9, %ymm10 +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm6 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127] +; AVX512F-NEXT: vpand %ymm6, %ymm10, %ymm10 +; AVX512F-NEXT: vpaddb %ymm8, %ymm8, %ymm8 +; AVX512F-NEXT: vpblendvb %ymm8, %ymm10, %ymm9, %ymm8 +; AVX512F-NEXT: vpsllw $4, %ymm2, %ymm9 +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm10 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240] +; AVX512F-NEXT: vpand %ymm10, %ymm9, %ymm9 +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm11 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512F-NEXT: vpsubb %ymm7, %ymm11, %ymm12 +; AVX512F-NEXT: vpsllw $5, %ymm12, %ymm12 +; AVX512F-NEXT: vpblendvb %ymm12, %ymm9, %ymm2, %ymm9 +; AVX512F-NEXT: vpsllw $2, %ymm9, %ymm13 +; AVX512F-NEXT: vmovdqa {{.*#+}} ymm14 = [252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252] +; AVX512F-NEXT: vpand %ymm14, %ymm13, %ymm13 +; AVX512F-NEXT: vpaddb %ymm12, %ymm12, %ymm12 +; AVX512F-NEXT: vpblendvb %ymm12, %ymm13, %ymm9, %ymm9 +; AVX512F-NEXT: vpaddb %ymm9, %ymm9, %ymm13 +; AVX512F-NEXT: vpaddb %ymm12, %ymm12, %ymm12 +; AVX512F-NEXT: vpblendvb %ymm12, %ymm13, %ymm9, %ymm9 +; AVX512F-NEXT: vpor %ymm8, %ymm9, %ymm8 +; AVX512F-NEXT: vpxor %xmm9, %xmm9, %xmm9 +; AVX512F-NEXT: vpcmpeqb %ymm7, %ymm9, %ymm7 +; AVX512F-NEXT: vpblendvb %ymm7, %ymm2, %ymm8, %ymm2 +; AVX512F-NEXT: vpsrlw $4, %ymm0, %ymm7 +; AVX512F-NEXT: vpand %ymm3, %ymm7, %ymm3 +; AVX512F-NEXT: vpand %ymm4, %ymm1, %ymm1 +; AVX512F-NEXT: vpsllw $5, %ymm1, %ymm4 +; AVX512F-NEXT: vpblendvb %ymm4, %ymm3, %ymm0, %ymm3 +; AVX512F-NEXT: vpsrlw $2, %ymm3, %ymm7 +; AVX512F-NEXT: vpand %ymm5, %ymm7, %ymm5 +; AVX512F-NEXT: vpaddb %ymm4, %ymm4, %ymm4 +; AVX512F-NEXT: vpblendvb %ymm4, %ymm5, %ymm3, %ymm3 +; AVX512F-NEXT: vpsrlw $1, %ymm3, %ymm5 +; AVX512F-NEXT: vpand %ymm6, %ymm5, %ymm5 +; AVX512F-NEXT: vpaddb %ymm4, %ymm4, %ymm4 +; AVX512F-NEXT: vpblendvb %ymm4, %ymm5, %ymm3, %ymm3 ; AVX512F-NEXT: vpsllw $4, %ymm0, %ymm4 -; AVX512F-NEXT: vpand %ymm5, %ymm4, %ymm4 -; AVX512F-NEXT: vpor %ymm3, %ymm4, %ymm3 -; AVX512F-NEXT: vpsubb %ymm1, %ymm6, %ymm1 -; AVX512F-NEXT: vpsllw $5, %ymm1, %ymm1 -; AVX512F-NEXT: vpblendvb %ymm1, %ymm3, %ymm0, %ymm0 -; AVX512F-NEXT: vpsrlw $6, %ymm0, %ymm3 -; AVX512F-NEXT: vpandn %ymm3, %ymm7, %ymm3 -; AVX512F-NEXT: vpsllw $2, %ymm0, %ymm4 -; AVX512F-NEXT: vpand %ymm7, %ymm4, %ymm4 -; AVX512F-NEXT: vpor %ymm3, %ymm4, %ymm3 -; AVX512F-NEXT: vpaddb %ymm1, %ymm1, %ymm1 -; AVX512F-NEXT: vpblendvb %ymm1, %ymm3, %ymm0, %ymm0 -; AVX512F-NEXT: vpsrlw $7, %ymm0, %ymm3 -; AVX512F-NEXT: vpand %ymm3, %ymm8, %ymm3 -; AVX512F-NEXT: vpaddb %ymm0, %ymm0, %ymm4 +; AVX512F-NEXT: vpand %ymm4, %ymm10, %ymm4 +; AVX512F-NEXT: vpsubb %ymm1, %ymm11, %ymm5 +; AVX512F-NEXT: vpsllw $5, %ymm5, %ymm5 +; AVX512F-NEXT: vpblendvb %ymm5, %ymm4, %ymm0, %ymm4 +; AVX512F-NEXT: vpsllw $2, %ymm4, %ymm6 +; AVX512F-NEXT: vpand %ymm6, %ymm14, %ymm6 +; AVX512F-NEXT: vpaddb %ymm5, %ymm5, %ymm5 +; AVX512F-NEXT: vpblendvb %ymm5, %ymm6, %ymm4, %ymm4 +; AVX512F-NEXT: vpaddb %ymm4, %ymm4, %ymm6 +; AVX512F-NEXT: vpaddb %ymm5, %ymm5, %ymm5 +; AVX512F-NEXT: vpblendvb %ymm5, %ymm6, %ymm4, %ymm4 ; AVX512F-NEXT: vpor %ymm3, %ymm4, %ymm3 -; AVX512F-NEXT: vpaddb %ymm1, %ymm1, %ymm1 -; AVX512F-NEXT: vpblendvb %ymm1, %ymm3, %ymm0, %ymm0 +; AVX512F-NEXT: vpcmpeqb %ymm1, %ymm9, %ymm1 +; AVX512F-NEXT: vpblendvb %ymm1, %ymm0, %ymm3, %ymm0 ; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: var_funnnel_v64i8: ; AVX512VL: # %bb.0: -; AVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm2 -; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm3 -; AVX512VL-NEXT: vpsrlw $4, %ymm3, %ymm4 -; AVX512VL-NEXT: vpsllw $4, %ymm3, %ymm5 -; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm6 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240] -; AVX512VL-NEXT: vpternlogq $226, %ymm4, %ymm6, %ymm5 -; AVX512VL-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VL-NEXT: vpsubb %ymm2, %ymm4, %ymm2 -; AVX512VL-NEXT: vpsllw $5, %ymm2, %ymm2 -; AVX512VL-NEXT: vpblendvb %ymm2, %ymm5, %ymm3, %ymm3 -; AVX512VL-NEXT: vpsrlw $6, %ymm3, %ymm5 -; AVX512VL-NEXT: vpsllw $2, %ymm3, %ymm7 -; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm8 = [252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252] -; AVX512VL-NEXT: vpternlogq $226, %ymm5, %ymm8, %ymm7 -; AVX512VL-NEXT: vpaddb %ymm2, %ymm2, %ymm2 -; AVX512VL-NEXT: vpblendvb %ymm2, %ymm7, %ymm3, %ymm3 -; AVX512VL-NEXT: vpsrlw $7, %ymm3, %ymm5 -; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm7 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] -; AVX512VL-NEXT: vpand %ymm7, %ymm5, %ymm5 -; AVX512VL-NEXT: vpaddb %ymm3, %ymm3, %ymm9 -; AVX512VL-NEXT: vpor %ymm5, %ymm9, %ymm5 -; AVX512VL-NEXT: vpaddb %ymm2, %ymm2, %ymm2 -; AVX512VL-NEXT: vpblendvb %ymm2, %ymm5, %ymm3, %ymm2 +; AVX512VL-NEXT: vextracti64x4 $1, %zmm1, %ymm3 +; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm2 +; AVX512VL-NEXT: vpsrlw $4, %ymm2, %ymm4 +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm5 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] +; AVX512VL-NEXT: vpand %ymm5, %ymm4, %ymm4 +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm6 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] +; AVX512VL-NEXT: vpand %ymm6, %ymm3, %ymm3 +; AVX512VL-NEXT: vpsllw $5, %ymm3, %ymm7 +; AVX512VL-NEXT: vpblendvb %ymm7, %ymm4, %ymm2, %ymm4 +; AVX512VL-NEXT: vpsrlw $2, %ymm4, %ymm8 +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm9 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63] +; AVX512VL-NEXT: vpand %ymm9, %ymm8, %ymm8 +; AVX512VL-NEXT: vpaddb %ymm7, %ymm7, %ymm7 +; AVX512VL-NEXT: vpblendvb %ymm7, %ymm8, %ymm4, %ymm4 +; AVX512VL-NEXT: vpsrlw $1, %ymm4, %ymm8 +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm10 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127] +; AVX512VL-NEXT: vpand %ymm10, %ymm8, %ymm8 +; AVX512VL-NEXT: vpaddb %ymm7, %ymm7, %ymm7 +; AVX512VL-NEXT: vpblendvb %ymm7, %ymm8, %ymm4, %ymm4 +; AVX512VL-NEXT: vpsllw $4, %ymm2, %ymm7 +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm8 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240] +; AVX512VL-NEXT: vpand %ymm7, %ymm8, %ymm7 +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm11 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VL-NEXT: vpsubb %ymm3, %ymm11, %ymm12 +; AVX512VL-NEXT: vpsllw $5, %ymm12, %ymm12 +; AVX512VL-NEXT: vpblendvb %ymm12, %ymm7, %ymm2, %ymm7 +; AVX512VL-NEXT: vpsllw $2, %ymm7, %ymm13 +; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm14 = [252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252,252] +; AVX512VL-NEXT: vpand %ymm14, %ymm13, %ymm13 +; AVX512VL-NEXT: vpaddb %ymm12, %ymm12, %ymm12 +; AVX512VL-NEXT: vpblendvb %ymm12, %ymm13, %ymm7, %ymm7 +; AVX512VL-NEXT: vpaddb %ymm7, %ymm7, %ymm13 +; AVX512VL-NEXT: vpaddb %ymm12, %ymm12, %ymm12 +; AVX512VL-NEXT: vpblendvb %ymm12, %ymm13, %ymm7, %ymm7 +; AVX512VL-NEXT: vpor %ymm4, %ymm7, %ymm4 +; AVX512VL-NEXT: vpxor %xmm7, %xmm7, %xmm7 +; AVX512VL-NEXT: vpcmpeqb %ymm7, %ymm3, %ymm3 +; AVX512VL-NEXT: vpblendvb %ymm3, %ymm2, %ymm4, %ymm2 ; AVX512VL-NEXT: vpsrlw $4, %ymm0, %ymm3 -; AVX512VL-NEXT: vpsllw $4, %ymm0, %ymm5 -; AVX512VL-NEXT: vpternlogq $226, %ymm3, %ymm6, %ymm5 -; AVX512VL-NEXT: vpsubb %ymm1, %ymm4, %ymm1 -; AVX512VL-NEXT: vpsllw $5, %ymm1, %ymm1 -; AVX512VL-NEXT: vpblendvb %ymm1, %ymm5, %ymm0, %ymm0 -; AVX512VL-NEXT: vpsrlw $6, %ymm0, %ymm3 -; AVX512VL-NEXT: vpsllw $2, %ymm0, %ymm4 -; AVX512VL-NEXT: vpternlogq $226, %ymm3, %ymm8, %ymm4 -; AVX512VL-NEXT: vpaddb %ymm1, %ymm1, %ymm1 -; AVX512VL-NEXT: vpblendvb %ymm1, %ymm4, %ymm0, %ymm0 -; AVX512VL-NEXT: vpsrlw $7, %ymm0, %ymm3 -; AVX512VL-NEXT: vpand %ymm7, %ymm3, %ymm3 -; AVX512VL-NEXT: vpaddb %ymm0, %ymm0, %ymm4 +; AVX512VL-NEXT: vpand %ymm5, %ymm3, %ymm3 +; AVX512VL-NEXT: vpand %ymm6, %ymm1, %ymm1 +; AVX512VL-NEXT: vpsllw $5, %ymm1, %ymm4 +; AVX512VL-NEXT: vpblendvb %ymm4, %ymm3, %ymm0, %ymm3 +; AVX512VL-NEXT: vpsrlw $2, %ymm3, %ymm5 +; AVX512VL-NEXT: vpand %ymm5, %ymm9, %ymm5 +; AVX512VL-NEXT: vpaddb %ymm4, %ymm4, %ymm4 +; AVX512VL-NEXT: vpblendvb %ymm4, %ymm5, %ymm3, %ymm3 +; AVX512VL-NEXT: vpsrlw $1, %ymm3, %ymm5 +; AVX512VL-NEXT: vpand %ymm5, %ymm10, %ymm5 +; AVX512VL-NEXT: vpaddb %ymm4, %ymm4, %ymm4 +; AVX512VL-NEXT: vpblendvb %ymm4, %ymm5, %ymm3, %ymm3 +; AVX512VL-NEXT: vpsllw $4, %ymm0, %ymm4 +; AVX512VL-NEXT: vpand %ymm4, %ymm8, %ymm4 +; AVX512VL-NEXT: vpsubb %ymm1, %ymm11, %ymm5 +; AVX512VL-NEXT: vpsllw $5, %ymm5, %ymm5 +; AVX512VL-NEXT: vpblendvb %ymm5, %ymm4, %ymm0, %ymm4 +; AVX512VL-NEXT: vpsllw $2, %ymm4, %ymm6 +; AVX512VL-NEXT: vpand %ymm6, %ymm14, %ymm6 +; AVX512VL-NEXT: vpaddb %ymm5, %ymm5, %ymm5 +; AVX512VL-NEXT: vpblendvb %ymm5, %ymm6, %ymm4, %ymm4 +; AVX512VL-NEXT: vpaddb %ymm4, %ymm4, %ymm6 +; AVX512VL-NEXT: vpaddb %ymm5, %ymm5, %ymm5 +; AVX512VL-NEXT: vpblendvb %ymm5, %ymm6, %ymm4, %ymm4 ; AVX512VL-NEXT: vpor %ymm3, %ymm4, %ymm3 -; AVX512VL-NEXT: vpaddb %ymm1, %ymm1, %ymm1 -; AVX512VL-NEXT: vpblendvb %ymm1, %ymm3, %ymm0, %ymm0 +; AVX512VL-NEXT: vpcmpeqb %ymm7, %ymm1, %ymm1 +; AVX512VL-NEXT: vpblendvb %ymm1, %ymm0, %ymm3, %ymm0 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: var_funnnel_v64i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vmovdqa64 {{.*#+}} zmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512BW-NEXT: vpandq %zmm2, %zmm1, %zmm3 -; AVX512BW-NEXT: vpsllw $5, %zmm3, %zmm3 -; AVX512BW-NEXT: vpaddb %zmm3, %zmm3, %zmm4 -; AVX512BW-NEXT: vpmovb2m %zmm4, %k1 -; AVX512BW-NEXT: vpmovb2m %zmm3, %k2 -; AVX512BW-NEXT: vpsrlw $4, %zmm0, %zmm3 -; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm3, %zmm3 -; AVX512BW-NEXT: vpblendmb %zmm3, %zmm0, %zmm3 {%k2} -; AVX512BW-NEXT: vpsrlw $2, %zmm3, %zmm5 -; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm5, %zmm5 -; AVX512BW-NEXT: vmovdqu8 %zmm5, %zmm3 {%k1} -; AVX512BW-NEXT: vpsrlw $1, %zmm3, %zmm5 -; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm5, %zmm5 -; AVX512BW-NEXT: vpaddb %zmm4, %zmm4, %zmm4 -; AVX512BW-NEXT: vpmovb2m %zmm4, %k1 -; AVX512BW-NEXT: vmovdqu8 %zmm5, %zmm3 {%k1} -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubb %zmm1, %zmm4, %zmm1 -; AVX512BW-NEXT: vpandq %zmm2, %zmm1, %zmm1 +; AVX512BW-NEXT: vpsrlw $4, %zmm0, %zmm2 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm2, %zmm2 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm3 +; AVX512BW-NEXT: vpsllw $5, %zmm3, %zmm1 +; AVX512BW-NEXT: vpmovb2m %zmm1, %k1 +; AVX512BW-NEXT: vpblendmb %zmm2, %zmm0, %zmm2 {%k1} +; AVX512BW-NEXT: vpsrlw $2, %zmm2, %zmm4 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm4, %zmm4 +; AVX512BW-NEXT: vpaddb %zmm1, %zmm1, %zmm1 +; AVX512BW-NEXT: vpmovb2m %zmm1, %k1 +; AVX512BW-NEXT: vmovdqu8 %zmm4, %zmm2 {%k1} +; AVX512BW-NEXT: vpsrlw $1, %zmm2, %zmm4 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm4, %zmm4 +; AVX512BW-NEXT: vpaddb %zmm1, %zmm1, %zmm1 +; AVX512BW-NEXT: vpmovb2m %zmm1, %k1 +; AVX512BW-NEXT: vmovdqu8 %zmm4, %zmm2 {%k1} +; AVX512BW-NEXT: vmovdqa64 {{.*#+}} zmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512BW-NEXT: vpsubb %zmm3, %zmm1, %zmm1 ; AVX512BW-NEXT: vpsllw $5, %zmm1, %zmm1 -; AVX512BW-NEXT: vpaddb %zmm1, %zmm1, %zmm2 -; AVX512BW-NEXT: vpmovb2m %zmm2, %k1 +; AVX512BW-NEXT: vpaddb %zmm1, %zmm1, %zmm4 +; AVX512BW-NEXT: vpmovb2m %zmm4, %k1 ; AVX512BW-NEXT: vpmovb2m %zmm1, %k2 ; AVX512BW-NEXT: vpsllw $4, %zmm0, %zmm1 ; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm1 -; AVX512BW-NEXT: vmovdqu8 %zmm1, %zmm0 {%k2} -; AVX512BW-NEXT: vpsllw $2, %zmm0, %zmm1 -; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm1 -; AVX512BW-NEXT: vmovdqu8 %zmm1, %zmm0 {%k1} -; AVX512BW-NEXT: vpaddb %zmm2, %zmm2, %zmm1 -; AVX512BW-NEXT: vpmovb2m %zmm1, %k1 -; AVX512BW-NEXT: vpaddb %zmm0, %zmm0, %zmm0 {%k1} -; AVX512BW-NEXT: vporq %zmm3, %zmm0, %zmm0 +; AVX512BW-NEXT: vpblendmb %zmm1, %zmm0, %zmm1 {%k2} +; AVX512BW-NEXT: vpsllw $2, %zmm1, %zmm5 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm5, %zmm5 +; AVX512BW-NEXT: vmovdqu8 %zmm5, %zmm1 {%k1} +; AVX512BW-NEXT: vpaddb %zmm4, %zmm4, %zmm4 +; AVX512BW-NEXT: vpmovb2m %zmm4, %k1 +; AVX512BW-NEXT: vpaddb %zmm1, %zmm1, %zmm1 {%k1} +; AVX512BW-NEXT: vporq %zmm2, %zmm1, %zmm1 +; AVX512BW-NEXT: vptestnmb %zmm3, %zmm3, %k1 +; AVX512BW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} +; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: var_funnnel_v64i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vmovdqa64 {{.*#+}} zmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VLBW-NEXT: vpandq %zmm2, %zmm1, %zmm3 -; AVX512VLBW-NEXT: vpsllw $5, %zmm3, %zmm3 -; AVX512VLBW-NEXT: vpaddb %zmm3, %zmm3, %zmm4 -; AVX512VLBW-NEXT: vpmovb2m %zmm4, %k1 -; AVX512VLBW-NEXT: vpmovb2m %zmm3, %k2 -; AVX512VLBW-NEXT: vpsrlw $4, %zmm0, %zmm3 -; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm3, %zmm3 -; AVX512VLBW-NEXT: vpblendmb %zmm3, %zmm0, %zmm3 {%k2} -; AVX512VLBW-NEXT: vpsrlw $2, %zmm3, %zmm5 -; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm5, %zmm5 -; AVX512VLBW-NEXT: vmovdqu8 %zmm5, %zmm3 {%k1} -; AVX512VLBW-NEXT: vpsrlw $1, %zmm3, %zmm5 -; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm5, %zmm5 -; AVX512VLBW-NEXT: vpaddb %zmm4, %zmm4, %zmm4 -; AVX512VLBW-NEXT: vpmovb2m %zmm4, %k1 -; AVX512VLBW-NEXT: vmovdqu8 %zmm5, %zmm3 {%k1} -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubb %zmm1, %zmm4, %zmm1 -; AVX512VLBW-NEXT: vpandq %zmm2, %zmm1, %zmm1 +; AVX512VLBW-NEXT: vpsrlw $4, %zmm0, %zmm2 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm2, %zmm2 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm3 +; AVX512VLBW-NEXT: vpsllw $5, %zmm3, %zmm1 +; AVX512VLBW-NEXT: vpmovb2m %zmm1, %k1 +; AVX512VLBW-NEXT: vpblendmb %zmm2, %zmm0, %zmm2 {%k1} +; AVX512VLBW-NEXT: vpsrlw $2, %zmm2, %zmm4 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm4, %zmm4 +; AVX512VLBW-NEXT: vpaddb %zmm1, %zmm1, %zmm1 +; AVX512VLBW-NEXT: vpmovb2m %zmm1, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %zmm4, %zmm2 {%k1} +; AVX512VLBW-NEXT: vpsrlw $1, %zmm2, %zmm4 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm4, %zmm4 +; AVX512VLBW-NEXT: vpaddb %zmm1, %zmm1, %zmm1 +; AVX512VLBW-NEXT: vpmovb2m %zmm1, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %zmm4, %zmm2 {%k1} +; AVX512VLBW-NEXT: vmovdqa64 {{.*#+}} zmm1 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VLBW-NEXT: vpsubb %zmm3, %zmm1, %zmm1 ; AVX512VLBW-NEXT: vpsllw $5, %zmm1, %zmm1 -; AVX512VLBW-NEXT: vpaddb %zmm1, %zmm1, %zmm2 -; AVX512VLBW-NEXT: vpmovb2m %zmm2, %k1 +; AVX512VLBW-NEXT: vpaddb %zmm1, %zmm1, %zmm4 +; AVX512VLBW-NEXT: vpmovb2m %zmm4, %k1 ; AVX512VLBW-NEXT: vpmovb2m %zmm1, %k2 ; AVX512VLBW-NEXT: vpsllw $4, %zmm0, %zmm1 ; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm1 -; AVX512VLBW-NEXT: vmovdqu8 %zmm1, %zmm0 {%k2} -; AVX512VLBW-NEXT: vpsllw $2, %zmm0, %zmm1 -; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm1 -; AVX512VLBW-NEXT: vmovdqu8 %zmm1, %zmm0 {%k1} -; AVX512VLBW-NEXT: vpaddb %zmm2, %zmm2, %zmm1 -; AVX512VLBW-NEXT: vpmovb2m %zmm1, %k1 -; AVX512VLBW-NEXT: vpaddb %zmm0, %zmm0, %zmm0 {%k1} -; AVX512VLBW-NEXT: vporq %zmm3, %zmm0, %zmm0 +; AVX512VLBW-NEXT: vpblendmb %zmm1, %zmm0, %zmm1 {%k2} +; AVX512VLBW-NEXT: vpsllw $2, %zmm1, %zmm5 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm5, %zmm5 +; AVX512VLBW-NEXT: vmovdqu8 %zmm5, %zmm1 {%k1} +; AVX512VLBW-NEXT: vpaddb %zmm4, %zmm4, %zmm4 +; AVX512VLBW-NEXT: vpmovb2m %zmm4, %k1 +; AVX512VLBW-NEXT: vpaddb %zmm1, %zmm1, %zmm1 {%k1} +; AVX512VLBW-NEXT: vporq %zmm2, %zmm1, %zmm1 +; AVX512VLBW-NEXT: vptestnmb %zmm3, %zmm3, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512VLBW-NEXT: retq %res = call <64 x i8> @llvm.fshr.v64i8(<64 x i8> %x, <64 x i8> %x, <64 x i8> %amt) ret <64 x i8> %res @@ -327,71 +379,77 @@ ; AVX512F-LABEL: splatvar_funnnel_v32i16: ; AVX512F: # %bb.0: ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm2 -; AVX512F-NEXT: vpbroadcastw %xmm1, %xmm1 -; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 -; AVX512F-NEXT: vpsubw %xmm1, %xmm3, %xmm1 -; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512F-NEXT: vpbroadcastw %xmm1, %ymm1 +; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 ; AVX512F-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX512F-NEXT: vpsllw %xmm3, %ymm2, %ymm4 +; AVX512F-NEXT: vpsrlw %xmm3, %ymm2, %ymm4 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm5 = [16,16,16,16,16,16,16,16] -; AVX512F-NEXT: vpsubw %xmm1, %xmm5, %xmm1 -; AVX512F-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX512F-NEXT: vpsrlw %xmm1, %ymm2, %ymm2 -; AVX512F-NEXT: vpor %ymm2, %ymm4, %ymm2 -; AVX512F-NEXT: vpsllw %xmm3, %ymm0, %ymm3 -; AVX512F-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 -; AVX512F-NEXT: vpor %ymm0, %ymm3, %ymm0 +; AVX512F-NEXT: vpsubw %xmm1, %xmm5, %xmm5 +; AVX512F-NEXT: vpmovzxwq {{.*#+}} xmm5 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero +; AVX512F-NEXT: vpsllw %xmm5, %ymm2, %ymm6 +; AVX512F-NEXT: vpor %ymm4, %ymm6, %ymm4 +; AVX512F-NEXT: vpxor %xmm6, %xmm6, %xmm6 +; AVX512F-NEXT: vpcmpeqw %ymm6, %ymm1, %ymm1 +; AVX512F-NEXT: vpblendvb %ymm1, %ymm2, %ymm4, %ymm2 +; AVX512F-NEXT: vpsrlw %xmm3, %ymm0, %ymm3 +; AVX512F-NEXT: vpsllw %xmm5, %ymm0, %ymm4 +; AVX512F-NEXT: vpor %ymm3, %ymm4, %ymm3 +; AVX512F-NEXT: vpblendvb %ymm1, %ymm0, %ymm3, %ymm0 ; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: splatvar_funnnel_v32i16: ; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm2 -; AVX512VL-NEXT: vpbroadcastw %xmm1, %xmm1 -; AVX512VL-NEXT: vpxor %xmm3, %xmm3, %xmm3 -; AVX512VL-NEXT: vpsubw %xmm1, %xmm3, %xmm1 -; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512VL-NEXT: vpbroadcastw %xmm1, %ymm1 +; AVX512VL-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 ; AVX512VL-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX512VL-NEXT: vpsllw %xmm3, %ymm2, %ymm4 +; AVX512VL-NEXT: vpsrlw %xmm3, %ymm2, %ymm4 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm5 = [16,16,16,16,16,16,16,16] -; AVX512VL-NEXT: vpsubw %xmm1, %xmm5, %xmm1 -; AVX512VL-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX512VL-NEXT: vpsrlw %xmm1, %ymm2, %ymm2 -; AVX512VL-NEXT: vpor %ymm2, %ymm4, %ymm2 -; AVX512VL-NEXT: vpsllw %xmm3, %ymm0, %ymm3 -; AVX512VL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 -; AVX512VL-NEXT: vpor %ymm0, %ymm3, %ymm0 +; AVX512VL-NEXT: vpsubw %xmm1, %xmm5, %xmm5 +; AVX512VL-NEXT: vpmovzxwq {{.*#+}} xmm5 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero +; AVX512VL-NEXT: vpsllw %xmm5, %ymm2, %ymm6 +; AVX512VL-NEXT: vpor %ymm4, %ymm6, %ymm4 +; AVX512VL-NEXT: vpxor %xmm6, %xmm6, %xmm6 +; AVX512VL-NEXT: vpcmpeqw %ymm6, %ymm1, %ymm1 +; AVX512VL-NEXT: vpblendvb %ymm1, %ymm2, %ymm4, %ymm2 +; AVX512VL-NEXT: vpsrlw %xmm3, %ymm0, %ymm3 +; AVX512VL-NEXT: vpsllw %xmm5, %ymm0, %ymm4 +; AVX512VL-NEXT: vpor %ymm3, %ymm4, %ymm3 +; AVX512VL-NEXT: vpblendvb %ymm1, %ymm0, %ymm3, %ymm0 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: splatvar_funnnel_v32i16: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vpbroadcastw %xmm1, %xmm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15] -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm3 +; AVX512BW-NEXT: vpbroadcastw %xmm1, %zmm1 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero +; AVX512BW-NEXT: vpsrlw %xmm1, %zmm0, %zmm1 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; AVX512BW-NEXT: vpsubw %xmm2, %xmm3, %xmm3 ; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero -; AVX512BW-NEXT: vpsrlw %xmm3, %zmm0, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubw %xmm1, %xmm4, %xmm1 -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512BW-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX512BW-NEXT: vpsllw %xmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm3, %zmm0, %zmm0 +; AVX512BW-NEXT: vpsllw %xmm3, %zmm0, %zmm3 +; AVX512BW-NEXT: vporq %zmm1, %zmm3, %zmm1 +; AVX512BW-NEXT: vptestnmw %zmm2, %zmm2, %k1 +; AVX512BW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} +; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v32i16: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vpbroadcastw %xmm1, %xmm1 -; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15] -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm3 +; AVX512VLBW-NEXT: vpbroadcastw %xmm1, %zmm1 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512VLBW-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero +; AVX512VLBW-NEXT: vpsrlw %xmm1, %zmm0, %zmm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm3 = [16,16,16,16,16,16,16,16] +; AVX512VLBW-NEXT: vpsubw %xmm2, %xmm3, %xmm3 ; AVX512VLBW-NEXT: vpmovzxwq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero -; AVX512VLBW-NEXT: vpsrlw %xmm3, %zmm0, %zmm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubw %xmm1, %xmm4, %xmm1 -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512VLBW-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero -; AVX512VLBW-NEXT: vpsllw %xmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm3, %zmm0, %zmm0 +; AVX512VLBW-NEXT: vpsllw %xmm3, %zmm0, %zmm3 +; AVX512VLBW-NEXT: vporq %zmm1, %zmm3, %zmm1 +; AVX512VLBW-NEXT: vptestnmw %zmm2, %zmm2, %k1 +; AVX512VLBW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512VLBW-NEXT: retq %splat = shufflevector <32 x i16> %amt, <32 x i16> undef, <32 x i32> zeroinitializer %res = call <32 x i16> @llvm.fshr.v32i16(<32 x i16> %x, <32 x i16> %x, <32 x i16> %splat) @@ -402,107 +460,113 @@ ; AVX512F-LABEL: splatvar_funnnel_v64i8: ; AVX512F: # %bb.0: ; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm2 -; AVX512F-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512F-NEXT: vpxor %xmm3, %xmm3, %xmm3 -; AVX512F-NEXT: vpsubb %xmm1, %xmm3, %xmm1 -; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512F-NEXT: vpbroadcastb %xmm1, %ymm1 +; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 ; AVX512F-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX512F-NEXT: vpsllw %xmm3, %ymm2, %ymm4 +; AVX512F-NEXT: vpsrlw %xmm3, %ymm2, %ymm4 ; AVX512F-NEXT: vpcmpeqd %xmm5, %xmm5, %xmm5 -; AVX512F-NEXT: vpsllw %xmm3, %xmm5, %xmm6 +; AVX512F-NEXT: vpsrlw %xmm3, %xmm5, %xmm6 +; AVX512F-NEXT: vpsrlw $8, %xmm6, %xmm6 ; AVX512F-NEXT: vpbroadcastb %xmm6, %ymm6 ; AVX512F-NEXT: vpand %ymm6, %ymm4, %ymm4 ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm7 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] -; AVX512F-NEXT: vpsubb %xmm1, %xmm7, %xmm1 -; AVX512F-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX512F-NEXT: vpsrlw %xmm1, %ymm2, %ymm2 -; AVX512F-NEXT: vpsrlw %xmm1, %xmm5, %xmm5 -; AVX512F-NEXT: vpsrlw $8, %xmm5, %xmm5 +; AVX512F-NEXT: vpsubb %xmm1, %xmm7, %xmm7 +; AVX512F-NEXT: vpmovzxbq {{.*#+}} xmm7 = xmm7[0],zero,zero,zero,zero,zero,zero,zero,xmm7[1],zero,zero,zero,zero,zero,zero,zero +; AVX512F-NEXT: vpsllw %xmm7, %ymm2, %ymm8 +; AVX512F-NEXT: vpsllw %xmm7, %xmm5, %xmm5 ; AVX512F-NEXT: vpbroadcastb %xmm5, %ymm5 -; AVX512F-NEXT: vpand %ymm5, %ymm2, %ymm2 -; AVX512F-NEXT: vpor %ymm2, %ymm4, %ymm2 -; AVX512F-NEXT: vpsllw %xmm3, %ymm0, %ymm3 +; AVX512F-NEXT: vpand %ymm5, %ymm8, %ymm8 +; AVX512F-NEXT: vpor %ymm4, %ymm8, %ymm4 +; AVX512F-NEXT: vpxor %xmm8, %xmm8, %xmm8 +; AVX512F-NEXT: vpcmpeqb %ymm1, %ymm8, %ymm1 +; AVX512F-NEXT: vpblendvb %ymm1, %ymm2, %ymm4, %ymm2 +; AVX512F-NEXT: vpsrlw %xmm3, %ymm0, %ymm3 ; AVX512F-NEXT: vpand %ymm6, %ymm3, %ymm3 -; AVX512F-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 -; AVX512F-NEXT: vpand %ymm5, %ymm0, %ymm0 -; AVX512F-NEXT: vpor %ymm0, %ymm3, %ymm0 +; AVX512F-NEXT: vpsllw %xmm7, %ymm0, %ymm4 +; AVX512F-NEXT: vpand %ymm5, %ymm4, %ymm4 +; AVX512F-NEXT: vpor %ymm3, %ymm4, %ymm3 +; AVX512F-NEXT: vpblendvb %ymm1, %ymm0, %ymm3, %ymm0 ; AVX512F-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: splatvar_funnnel_v64i8: ; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm2 -; AVX512VL-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512VL-NEXT: vpxor %xmm3, %xmm3, %xmm3 -; AVX512VL-NEXT: vpsubb %xmm1, %xmm3, %xmm1 -; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 +; AVX512VL-NEXT: vpbroadcastb %xmm1, %ymm1 +; AVX512VL-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 ; AVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX512VL-NEXT: vpsllw %xmm3, %ymm2, %ymm4 +; AVX512VL-NEXT: vpsrlw %xmm3, %ymm2, %ymm4 ; AVX512VL-NEXT: vpcmpeqd %xmm5, %xmm5, %xmm5 -; AVX512VL-NEXT: vpsllw %xmm3, %xmm5, %xmm6 +; AVX512VL-NEXT: vpsrlw %xmm3, %xmm5, %xmm6 +; AVX512VL-NEXT: vpsrlw $8, %xmm6, %xmm6 ; AVX512VL-NEXT: vpbroadcastb %xmm6, %ymm6 ; AVX512VL-NEXT: vpand %ymm6, %ymm4, %ymm4 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm7 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] -; AVX512VL-NEXT: vpsubb %xmm1, %xmm7, %xmm1 -; AVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX512VL-NEXT: vpsrlw %xmm1, %ymm2, %ymm2 -; AVX512VL-NEXT: vpsrlw %xmm1, %xmm5, %xmm5 -; AVX512VL-NEXT: vpsrlw $8, %xmm5, %xmm5 +; AVX512VL-NEXT: vpsubb %xmm1, %xmm7, %xmm7 +; AVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm7 = xmm7[0],zero,zero,zero,zero,zero,zero,zero,xmm7[1],zero,zero,zero,zero,zero,zero,zero +; AVX512VL-NEXT: vpsllw %xmm7, %ymm2, %ymm8 +; AVX512VL-NEXT: vpsllw %xmm7, %xmm5, %xmm5 ; AVX512VL-NEXT: vpbroadcastb %xmm5, %ymm5 -; AVX512VL-NEXT: vpand %ymm5, %ymm2, %ymm2 -; AVX512VL-NEXT: vpor %ymm2, %ymm4, %ymm2 -; AVX512VL-NEXT: vpsllw %xmm3, %ymm0, %ymm3 +; AVX512VL-NEXT: vpand %ymm5, %ymm8, %ymm8 +; AVX512VL-NEXT: vpor %ymm4, %ymm8, %ymm4 +; AVX512VL-NEXT: vpxor %xmm8, %xmm8, %xmm8 +; AVX512VL-NEXT: vpcmpeqb %ymm1, %ymm8, %ymm1 +; AVX512VL-NEXT: vpblendvb %ymm1, %ymm2, %ymm4, %ymm2 +; AVX512VL-NEXT: vpsrlw %xmm3, %ymm0, %ymm3 ; AVX512VL-NEXT: vpand %ymm6, %ymm3, %ymm3 -; AVX512VL-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 -; AVX512VL-NEXT: vpand %ymm5, %ymm0, %ymm0 -; AVX512VL-NEXT: vpor %ymm0, %ymm3, %ymm0 +; AVX512VL-NEXT: vpsllw %xmm7, %ymm0, %ymm4 +; AVX512VL-NEXT: vpand %ymm5, %ymm4, %ymm4 +; AVX512VL-NEXT: vpor %ymm3, %ymm4, %ymm3 +; AVX512VL-NEXT: vpblendvb %ymm1, %ymm0, %ymm3, %ymm0 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: splatvar_funnnel_v64i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm3 +; AVX512BW-NEXT: vpbroadcastb %xmm1, %zmm1 +; AVX512BW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero +; AVX512BW-NEXT: vpsrlw %xmm1, %zmm0, %zmm3 +; AVX512BW-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4 +; AVX512BW-NEXT: vpsrlw %xmm1, %xmm4, %xmm1 +; AVX512BW-NEXT: vpsrlw $8, %xmm1, %xmm1 +; AVX512BW-NEXT: vpbroadcastb %xmm1, %zmm1 +; AVX512BW-NEXT: vpandq %zmm1, %zmm3, %zmm1 +; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512BW-NEXT: vpsubb %xmm2, %xmm3, %xmm3 ; AVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,zero,zero,zero,zero,xmm3[1],zero,zero,zero,zero,zero,zero,zero -; AVX512BW-NEXT: vpsrlw %xmm3, %zmm0, %zmm4 -; AVX512BW-NEXT: vpcmpeqd %xmm5, %xmm5, %xmm5 -; AVX512BW-NEXT: vpsrlw %xmm3, %xmm5, %xmm3 -; AVX512BW-NEXT: vpsrlw $8, %xmm3, %xmm3 +; AVX512BW-NEXT: vpsllw %xmm3, %zmm0, %zmm5 +; AVX512BW-NEXT: vpsllw %xmm3, %xmm4, %xmm3 ; AVX512BW-NEXT: vpbroadcastb %xmm3, %zmm3 -; AVX512BW-NEXT: vpandq %zmm3, %zmm4, %zmm3 -; AVX512BW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512BW-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512BW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512BW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX512BW-NEXT: vpsllw %xmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vpsllw %xmm1, %xmm5, %xmm1 -; AVX512BW-NEXT: vpbroadcastb %xmm1, %zmm1 -; AVX512BW-NEXT: vpandq %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm3, %zmm0, %zmm0 +; AVX512BW-NEXT: vpandq %zmm3, %zmm5, %zmm3 +; AVX512BW-NEXT: vporq %zmm1, %zmm3, %zmm1 +; AVX512BW-NEXT: vptestnmb %zmm2, %zmm2, %k1 +; AVX512BW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} +; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: splatvar_funnnel_v64i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %xmm1 -; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm2 = [7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7] -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm3 +; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %zmm1 +; AVX512VLBW-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm2 +; AVX512VLBW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm2[0],zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero,zero,zero,zero,zero,zero,zero +; AVX512VLBW-NEXT: vpsrlw %xmm1, %zmm0, %zmm3 +; AVX512VLBW-NEXT: vpcmpeqd %xmm4, %xmm4, %xmm4 +; AVX512VLBW-NEXT: vpsrlw %xmm1, %xmm4, %xmm1 +; AVX512VLBW-NEXT: vpsrlw $8, %xmm1, %xmm1 +; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %zmm1 +; AVX512VLBW-NEXT: vpandq %zmm1, %zmm3, %zmm1 +; AVX512VLBW-NEXT: vmovdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8] +; AVX512VLBW-NEXT: vpsubb %xmm2, %xmm3, %xmm3 ; AVX512VLBW-NEXT: vpmovzxbq {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,zero,zero,zero,zero,xmm3[1],zero,zero,zero,zero,zero,zero,zero -; AVX512VLBW-NEXT: vpsrlw %xmm3, %zmm0, %zmm4 -; AVX512VLBW-NEXT: vpcmpeqd %xmm5, %xmm5, %xmm5 -; AVX512VLBW-NEXT: vpsrlw %xmm3, %xmm5, %xmm3 -; AVX512VLBW-NEXT: vpsrlw $8, %xmm3, %xmm3 +; AVX512VLBW-NEXT: vpsllw %xmm3, %zmm0, %zmm5 +; AVX512VLBW-NEXT: vpsllw %xmm3, %xmm4, %xmm3 ; AVX512VLBW-NEXT: vpbroadcastb %xmm3, %zmm3 -; AVX512VLBW-NEXT: vpandq %zmm3, %zmm4, %zmm3 -; AVX512VLBW-NEXT: vpxor %xmm4, %xmm4, %xmm4 -; AVX512VLBW-NEXT: vpsubb %xmm1, %xmm4, %xmm1 -; AVX512VLBW-NEXT: vpand %xmm2, %xmm1, %xmm1 -; AVX512VLBW-NEXT: vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero -; AVX512VLBW-NEXT: vpsllw %xmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vpsllw %xmm1, %xmm5, %xmm1 -; AVX512VLBW-NEXT: vpbroadcastb %xmm1, %zmm1 -; AVX512VLBW-NEXT: vpandq %zmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm3, %zmm0, %zmm0 +; AVX512VLBW-NEXT: vpandq %zmm3, %zmm5, %zmm3 +; AVX512VLBW-NEXT: vporq %zmm1, %zmm3, %zmm1 +; AVX512VLBW-NEXT: vptestnmb %zmm2, %zmm2, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512VLBW-NEXT: retq %splat = shufflevector <64 x i8> %amt, <64 x i8> undef, <64 x i32> zeroinitializer %res = call <64 x i8> @llvm.fshr.v64i8(<64 x i8> %x, <64 x i8> %x, <64 x i8> %splat) @@ -539,14 +603,17 @@ ; AVX512F-NEXT: vpmulhuw %ymm2, %ymm1, %ymm3 ; AVX512F-NEXT: vpblendw {{.*#+}} xmm4 = xmm1[0],xmm3[1,2,3,4,5,6,7] ; AVX512F-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7] -; AVX512F-NEXT: vmovdqa {{.*#+}} ymm4 = [1,32768,16384,8192,4096,2048,1024,512,256,128,64,32,16,8,4,2] -; AVX512F-NEXT: vpmullw %ymm4, %ymm1, %ymm1 -; AVX512F-NEXT: vpor %ymm3, %ymm1, %ymm1 -; AVX512F-NEXT: vpmulhuw %ymm2, %ymm0, %ymm2 -; AVX512F-NEXT: vpblendw {{.*#+}} xmm3 = xmm0[0],xmm2[1,2,3,4,5,6,7] -; AVX512F-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7] -; AVX512F-NEXT: vpmullw %ymm4, %ymm0, %ymm0 -; AVX512F-NEXT: vpor %ymm2, %ymm0, %ymm0 +; AVX512F-NEXT: vpmullw %ymm2, %ymm1, %ymm4 +; AVX512F-NEXT: vpor %ymm3, %ymm4, %ymm3 +; AVX512F-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3,4,5,6,7] +; AVX512F-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm3[4,5,6,7] +; AVX512F-NEXT: vpmulhuw %ymm2, %ymm0, %ymm3 +; AVX512F-NEXT: vpblendw {{.*#+}} xmm4 = xmm0[0],xmm3[1,2,3,4,5,6,7] +; AVX512F-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7] +; AVX512F-NEXT: vpmullw %ymm2, %ymm0, %ymm2 +; AVX512F-NEXT: vpor %ymm3, %ymm2, %ymm2 +; AVX512F-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3,4,5,6,7] +; AVX512F-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm2[4,5,6,7] ; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 ; AVX512F-NEXT: retq ; @@ -557,29 +624,40 @@ ; AVX512VL-NEXT: vpmulhuw %ymm2, %ymm1, %ymm3 ; AVX512VL-NEXT: vpblendw {{.*#+}} xmm4 = xmm1[0],xmm3[1,2,3,4,5,6,7] ; AVX512VL-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7] -; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm4 = [1,32768,16384,8192,4096,2048,1024,512,256,128,64,32,16,8,4,2] -; AVX512VL-NEXT: vpmullw %ymm4, %ymm1, %ymm1 -; AVX512VL-NEXT: vpor %ymm3, %ymm1, %ymm1 -; AVX512VL-NEXT: vpmulhuw %ymm2, %ymm0, %ymm2 -; AVX512VL-NEXT: vpblendw {{.*#+}} xmm3 = xmm0[0],xmm2[1,2,3,4,5,6,7] -; AVX512VL-NEXT: vpblendd {{.*#+}} ymm2 = ymm3[0,1,2,3],ymm2[4,5,6,7] -; AVX512VL-NEXT: vpmullw %ymm4, %ymm0, %ymm0 -; AVX512VL-NEXT: vpor %ymm2, %ymm0, %ymm0 +; AVX512VL-NEXT: vpmullw %ymm2, %ymm1, %ymm4 +; AVX512VL-NEXT: vpor %ymm3, %ymm4, %ymm3 +; AVX512VL-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3,4,5,6,7] +; AVX512VL-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm3[4,5,6,7] +; AVX512VL-NEXT: vpmulhuw %ymm2, %ymm0, %ymm3 +; AVX512VL-NEXT: vpblendw {{.*#+}} xmm4 = xmm0[0],xmm3[1,2,3,4,5,6,7] +; AVX512VL-NEXT: vpblendd {{.*#+}} ymm3 = ymm4[0,1,2,3],ymm3[4,5,6,7] +; AVX512VL-NEXT: vpmullw %ymm2, %ymm0, %ymm2 +; AVX512VL-NEXT: vpor %ymm3, %ymm2, %ymm2 +; AVX512VL-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1,2,3,4,5,6,7] +; AVX512VL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm2[4,5,6,7] ; AVX512VL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: constant_funnnel_v32i16: ; AVX512BW: # %bb.0: ; AVX512BW-NEXT: vpsrlvw {{.*}}(%rip), %zmm0, %zmm1 -; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm1, %zmm0, %zmm0 +; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm2 +; AVX512BW-NEXT: vporq %zmm1, %zmm2, %zmm1 +; AVX512BW-NEXT: movl $65537, %eax # imm = 0x10001 +; AVX512BW-NEXT: kmovd %eax, %k1 +; AVX512BW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} +; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: constant_funnnel_v32i16: ; AVX512VLBW: # %bb.0: ; AVX512VLBW-NEXT: vpsrlvw {{.*}}(%rip), %zmm0, %zmm1 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm1, %zmm0, %zmm0 +; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm2 +; AVX512VLBW-NEXT: vporq %zmm1, %zmm2, %zmm1 +; AVX512VLBW-NEXT: movl $65537, %eax # imm = 0x10001 +; AVX512VLBW-NEXT: kmovd %eax, %k1 +; AVX512VLBW-NEXT: vmovdqu16 %zmm0, %zmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512VLBW-NEXT: retq %res = call <32 x i16> @llvm.fshr.v32i16(<32 x i16> %x, <32 x i16> %x, <32 x i16> ) ret <32 x i16> %res @@ -592,7 +670,7 @@ ; AVX512F-NEXT: vpsllw $4, %ymm1, %ymm2 ; AVX512F-NEXT: vmovdqa {{.*#+}} ymm3 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240] ; AVX512F-NEXT: vpand %ymm3, %ymm2, %ymm2 -; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512F-NEXT: # ymm4 = mem[0,1,0,1] ; AVX512F-NEXT: vpblendvb %ymm4, %ymm2, %ymm1, %ymm2 ; AVX512F-NEXT: vpsllw $2, %ymm2, %ymm5 @@ -609,13 +687,15 @@ ; AVX512F-NEXT: # ymm10 = mem[0,1,0,1] ; AVX512F-NEXT: vpmullw %ymm10, %ymm9, %ymm9 ; AVX512F-NEXT: vpsrlw $8, %ymm9, %ymm9 -; AVX512F-NEXT: vpunpcklbw {{.*#+}} ymm1 = ymm1[0],ymm5[0],ymm1[1],ymm5[1],ymm1[2],ymm5[2],ymm1[3],ymm5[3],ymm1[4],ymm5[4],ymm1[5],ymm5[5],ymm1[6],ymm5[6],ymm1[7],ymm5[7],ymm1[16],ymm5[16],ymm1[17],ymm5[17],ymm1[18],ymm5[18],ymm1[19],ymm5[19],ymm1[20],ymm5[20],ymm1[21],ymm5[21],ymm1[22],ymm5[22],ymm1[23],ymm5[23] -; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm11 = [256,128,64,32,16,8,4,2,256,128,64,32,16,8,4,2] -; AVX512F-NEXT: # ymm11 = mem[0,1,0,1] -; AVX512F-NEXT: vpmullw %ymm1, %ymm11, %ymm1 -; AVX512F-NEXT: vpsrlw $8, %ymm1, %ymm1 -; AVX512F-NEXT: vpackuswb %ymm9, %ymm1, %ymm1 -; AVX512F-NEXT: vpor %ymm1, %ymm2, %ymm1 +; AVX512F-NEXT: vpunpcklbw {{.*#+}} ymm11 = ymm1[0],ymm5[0],ymm1[1],ymm5[1],ymm1[2],ymm5[2],ymm1[3],ymm5[3],ymm1[4],ymm5[4],ymm1[5],ymm5[5],ymm1[6],ymm5[6],ymm1[7],ymm5[7],ymm1[16],ymm5[16],ymm1[17],ymm5[17],ymm1[18],ymm5[18],ymm1[19],ymm5[19],ymm1[20],ymm5[20],ymm1[21],ymm5[21],ymm1[22],ymm5[22],ymm1[23],ymm5[23] +; AVX512F-NEXT: vbroadcasti128 {{.*#+}} ymm12 = [256,128,64,32,16,8,4,2,256,128,64,32,16,8,4,2] +; AVX512F-NEXT: # ymm12 = mem[0,1,0,1] +; AVX512F-NEXT: vpmullw %ymm12, %ymm11, %ymm11 +; AVX512F-NEXT: vpsrlw $8, %ymm11, %ymm11 +; AVX512F-NEXT: vpackuswb %ymm9, %ymm11, %ymm9 +; AVX512F-NEXT: vpor %ymm2, %ymm9, %ymm2 +; AVX512F-NEXT: vpbroadcastq {{.*#+}} ymm9 = [255,255,255,255] +; AVX512F-NEXT: vpblendvb %ymm9, %ymm1, %ymm2, %ymm1 ; AVX512F-NEXT: vpsllw $4, %ymm0, %ymm2 ; AVX512F-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512F-NEXT: vpblendvb %ymm4, %ymm2, %ymm0, %ymm2 @@ -627,11 +707,12 @@ ; AVX512F-NEXT: vpunpckhbw {{.*#+}} ymm3 = ymm0[8],ymm5[8],ymm0[9],ymm5[9],ymm0[10],ymm5[10],ymm0[11],ymm5[11],ymm0[12],ymm5[12],ymm0[13],ymm5[13],ymm0[14],ymm5[14],ymm0[15],ymm5[15],ymm0[24],ymm5[24],ymm0[25],ymm5[25],ymm0[26],ymm5[26],ymm0[27],ymm5[27],ymm0[28],ymm5[28],ymm0[29],ymm5[29],ymm0[30],ymm5[30],ymm0[31],ymm5[31] ; AVX512F-NEXT: vpmullw %ymm3, %ymm10, %ymm3 ; AVX512F-NEXT: vpsrlw $8, %ymm3, %ymm3 -; AVX512F-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm0[0],ymm5[0],ymm0[1],ymm5[1],ymm0[2],ymm5[2],ymm0[3],ymm5[3],ymm0[4],ymm5[4],ymm0[5],ymm5[5],ymm0[6],ymm5[6],ymm0[7],ymm5[7],ymm0[16],ymm5[16],ymm0[17],ymm5[17],ymm0[18],ymm5[18],ymm0[19],ymm5[19],ymm0[20],ymm5[20],ymm0[21],ymm5[21],ymm0[22],ymm5[22],ymm0[23],ymm5[23] -; AVX512F-NEXT: vpmullw %ymm0, %ymm11, %ymm0 -; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 -; AVX512F-NEXT: vpackuswb %ymm3, %ymm0, %ymm0 -; AVX512F-NEXT: vpor %ymm0, %ymm2, %ymm0 +; AVX512F-NEXT: vpunpcklbw {{.*#+}} ymm4 = ymm0[0],ymm5[0],ymm0[1],ymm5[1],ymm0[2],ymm5[2],ymm0[3],ymm5[3],ymm0[4],ymm5[4],ymm0[5],ymm5[5],ymm0[6],ymm5[6],ymm0[7],ymm5[7],ymm0[16],ymm5[16],ymm0[17],ymm5[17],ymm0[18],ymm5[18],ymm0[19],ymm5[19],ymm0[20],ymm5[20],ymm0[21],ymm5[21],ymm0[22],ymm5[22],ymm0[23],ymm5[23] +; AVX512F-NEXT: vpmullw %ymm4, %ymm12, %ymm4 +; AVX512F-NEXT: vpsrlw $8, %ymm4, %ymm4 +; AVX512F-NEXT: vpackuswb %ymm3, %ymm4, %ymm3 +; AVX512F-NEXT: vpor %ymm3, %ymm2, %ymm2 +; AVX512F-NEXT: vpblendvb %ymm9, %ymm0, %ymm2, %ymm0 ; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 ; AVX512F-NEXT: retq ; @@ -641,7 +722,7 @@ ; AVX512VL-NEXT: vpsllw $4, %ymm1, %ymm2 ; AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240] ; AVX512VL-NEXT: vpand %ymm3, %ymm2, %ymm2 -; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm4 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512VL-NEXT: # ymm4 = mem[0,1,0,1] ; AVX512VL-NEXT: vpblendvb %ymm4, %ymm2, %ymm1, %ymm2 ; AVX512VL-NEXT: vpsllw $2, %ymm2, %ymm5 @@ -658,14 +739,16 @@ ; AVX512VL-NEXT: # ymm9 = mem[0,1,0,1] ; AVX512VL-NEXT: vpmullw %ymm5, %ymm9, %ymm5 ; AVX512VL-NEXT: vpsrlw $8, %ymm5, %ymm5 -; AVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm1 = ymm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23] -; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1 -; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm10 = [256,128,64,32,16,8,4,2,256,128,64,32,16,8,4,2] -; AVX512VL-NEXT: # ymm10 = mem[0,1,0,1] -; AVX512VL-NEXT: vpmullw %ymm1, %ymm10, %ymm1 -; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1 -; AVX512VL-NEXT: vpackuswb %ymm5, %ymm1, %ymm1 -; AVX512VL-NEXT: vpor %ymm1, %ymm2, %ymm1 +; AVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm10 = ymm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23] +; AVX512VL-NEXT: vpsrlw $8, %ymm10, %ymm10 +; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm11 = [256,128,64,32,16,8,4,2,256,128,64,32,16,8,4,2] +; AVX512VL-NEXT: # ymm11 = mem[0,1,0,1] +; AVX512VL-NEXT: vpmullw %ymm11, %ymm10, %ymm10 +; AVX512VL-NEXT: vpsrlw $8, %ymm10, %ymm10 +; AVX512VL-NEXT: vpackuswb %ymm5, %ymm10, %ymm5 +; AVX512VL-NEXT: vpor %ymm5, %ymm2, %ymm2 +; AVX512VL-NEXT: vpbroadcastq {{.*#+}} ymm5 = [255,255,255,255] +; AVX512VL-NEXT: vpblendvb %ymm5, %ymm1, %ymm2, %ymm1 ; AVX512VL-NEXT: vpsllw $4, %ymm0, %ymm2 ; AVX512VL-NEXT: vpand %ymm3, %ymm2, %ymm2 ; AVX512VL-NEXT: vpblendvb %ymm4, %ymm2, %ymm0, %ymm2 @@ -678,18 +761,19 @@ ; AVX512VL-NEXT: vpsrlw $8, %ymm3, %ymm3 ; AVX512VL-NEXT: vpmullw %ymm3, %ymm9, %ymm3 ; AVX512VL-NEXT: vpsrlw $8, %ymm3, %ymm3 -; AVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm0 = ymm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23] -; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 -; AVX512VL-NEXT: vpmullw %ymm0, %ymm10, %ymm0 -; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 -; AVX512VL-NEXT: vpackuswb %ymm3, %ymm0, %ymm0 -; AVX512VL-NEXT: vpor %ymm0, %ymm2, %ymm0 +; AVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm4 = ymm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23] +; AVX512VL-NEXT: vpsrlw $8, %ymm4, %ymm4 +; AVX512VL-NEXT: vpmullw %ymm4, %ymm11, %ymm4 +; AVX512VL-NEXT: vpsrlw $8, %ymm4, %ymm4 +; AVX512VL-NEXT: vpackuswb %ymm3, %ymm4, %ymm3 +; AVX512VL-NEXT: vpor %ymm3, %ymm2, %ymm2 +; AVX512VL-NEXT: vpblendvb %ymm5, %ymm0, %ymm2, %ymm0 ; AVX512VL-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: constant_funnnel_v64i8: ; AVX512BW: # %bb.0: -; AVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm1 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512BW-NEXT: vbroadcasti32x4 {{.*#+}} zmm1 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512BW-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3] ; AVX512BW-NEXT: vpmovb2m %zmm1, %k1 ; AVX512BW-NEXT: vpsllw $4, %zmm0, %zmm2 @@ -705,19 +789,23 @@ ; AVX512BW-NEXT: vpaddb %zmm2, %zmm2, %zmm2 {%k1} ; AVX512BW-NEXT: vpunpckhbw {{.*#+}} zmm1 = zmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31,40,40,41,41,42,42,43,43,44,44,45,45,46,46,47,47,56,56,57,57,58,58,59,59,60,60,61,61,62,62,63,63] ; AVX512BW-NEXT: vpsrlw $8, %zmm1, %zmm1 -; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm1, %zmm1 +; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %zmm1, %zmm1 ; AVX512BW-NEXT: vpsrlw $8, %zmm1, %zmm1 -; AVX512BW-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] -; AVX512BW-NEXT: vpsrlw $8, %zmm0, %zmm0 -; AVX512BW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 -; AVX512BW-NEXT: vpsrlw $8, %zmm0, %zmm0 -; AVX512BW-NEXT: vpackuswb %zmm1, %zmm0, %zmm0 -; AVX512BW-NEXT: vporq %zmm0, %zmm2, %zmm0 +; AVX512BW-NEXT: vpunpcklbw {{.*#+}} zmm3 = zmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] +; AVX512BW-NEXT: vpsrlw $8, %zmm3, %zmm3 +; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %zmm3, %zmm3 +; AVX512BW-NEXT: vpsrlw $8, %zmm3, %zmm3 +; AVX512BW-NEXT: vpackuswb %zmm1, %zmm3, %zmm1 +; AVX512BW-NEXT: vporq %zmm1, %zmm2, %zmm1 +; AVX512BW-NEXT: movabsq $72340172838076673, %rax # imm = 0x101010101010101 +; AVX512BW-NEXT: kmovq %rax, %k1 +; AVX512BW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} +; AVX512BW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512BW-NEXT: retq ; ; AVX512VLBW-LABEL: constant_funnnel_v64i8: ; AVX512VLBW: # %bb.0: -; AVX512VLBW-NEXT: vbroadcasti32x4 {{.*#+}} zmm1 = [57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536,57344,41152,24704,8256,8192,24640,41088,57536] +; AVX512VLBW-NEXT: vbroadcasti32x4 {{.*#+}} zmm1 = [57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536,57600,41152,24704,8256,8448,24640,41088,57536] ; AVX512VLBW-NEXT: # zmm1 = mem[0,1,2,3,0,1,2,3,0,1,2,3,0,1,2,3] ; AVX512VLBW-NEXT: vpmovb2m %zmm1, %k1 ; AVX512VLBW-NEXT: vpsllw $4, %zmm0, %zmm2 @@ -733,14 +821,18 @@ ; AVX512VLBW-NEXT: vpaddb %zmm2, %zmm2, %zmm2 {%k1} ; AVX512VLBW-NEXT: vpunpckhbw {{.*#+}} zmm1 = zmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31,40,40,41,41,42,42,43,43,44,44,45,45,46,46,47,47,56,56,57,57,58,58,59,59,60,60,61,61,62,62,63,63] ; AVX512VLBW-NEXT: vpsrlw $8, %zmm1, %zmm1 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm1, %zmm1 +; AVX512VLBW-NEXT: vpmullw {{.*}}(%rip), %zmm1, %zmm1 ; AVX512VLBW-NEXT: vpsrlw $8, %zmm1, %zmm1 -; AVX512VLBW-NEXT: vpunpcklbw {{.*#+}} zmm0 = zmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] -; AVX512VLBW-NEXT: vpsrlw $8, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm0 -; AVX512VLBW-NEXT: vpsrlw $8, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vpackuswb %zmm1, %zmm0, %zmm0 -; AVX512VLBW-NEXT: vporq %zmm0, %zmm2, %zmm0 +; AVX512VLBW-NEXT: vpunpcklbw {{.*#+}} zmm3 = zmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23,32,32,33,33,34,34,35,35,36,36,37,37,38,38,39,39,48,48,49,49,50,50,51,51,52,52,53,53,54,54,55,55] +; AVX512VLBW-NEXT: vpsrlw $8, %zmm3, %zmm3 +; AVX512VLBW-NEXT: vpmullw {{.*}}(%rip), %zmm3, %zmm3 +; AVX512VLBW-NEXT: vpsrlw $8, %zmm3, %zmm3 +; AVX512VLBW-NEXT: vpackuswb %zmm1, %zmm3, %zmm1 +; AVX512VLBW-NEXT: vporq %zmm1, %zmm2, %zmm1 +; AVX512VLBW-NEXT: movabsq $72340172838076673, %rax # imm = 0x101010101010101 +; AVX512VLBW-NEXT: kmovq %rax, %k1 +; AVX512VLBW-NEXT: vmovdqu8 %zmm0, %zmm1 {%k1} +; AVX512VLBW-NEXT: vmovdqa64 %zmm1, %zmm0 ; AVX512VLBW-NEXT: retq %res = call <64 x i8> @llvm.fshr.v64i8(<64 x i8> %x, <64 x i8> %x, <64 x i8> ) ret <64 x i8> %res diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll --- a/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll @@ -262,10 +262,40 @@ } define <16 x i8> @combine_shuffle_proti_v2i64(<2 x i64> %a0) { -; CHECK-LABEL: combine_shuffle_proti_v2i64: -; CHECK: # %bb.0: -; CHECK-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[13,12,11,10,9,8,15,14,5,4,3,2,1,0,7,6] -; CHECK-NEXT: ret{{[l|q]}} +; X86-AVX-LABEL: combine_shuffle_proti_v2i64: +; X86-AVX: # %bb.0: +; X86-AVX-NEXT: vmovddup {{.*#+}} xmm1 = [48,48] +; X86-AVX-NEXT: # xmm1 = mem[0,0] +; X86-AVX-NEXT: vpxor %xmm2, %xmm2, %xmm2 +; X86-AVX-NEXT: vpsubq %xmm1, %xmm2, %xmm3 +; X86-AVX-NEXT: vpshlq %xmm3, %xmm0, %xmm3 +; X86-AVX-NEXT: vmovdqa {{.*#+}} xmm4 = [64,0,64,0] +; X86-AVX-NEXT: vpsubq %xmm1, %xmm4, %xmm4 +; X86-AVX-NEXT: vpshlq %xmm4, %xmm0, %xmm4 +; X86-AVX-NEXT: vpor %xmm3, %xmm4, %xmm3 +; X86-AVX-NEXT: vpcomeqq %xmm2, %xmm1, %xmm1 +; X86-AVX-NEXT: vblendvpd %xmm1, %xmm0, %xmm3, %xmm0 +; X86-AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0] +; X86-AVX-NEXT: retl +; +; X86-AVX2-LABEL: combine_shuffle_proti_v2i64: +; X86-AVX2: # %bb.0: +; X86-AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 +; X86-AVX2-NEXT: vpbroadcastq {{.*#+}} xmm2 = [48,48] +; X86-AVX2-NEXT: vpcomeqq %xmm1, %xmm2, %xmm1 +; X86-AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [64,0,64,0] +; X86-AVX2-NEXT: vpsubq %xmm2, %xmm3, %xmm2 +; X86-AVX2-NEXT: vpsllvq %xmm2, %xmm0, %xmm2 +; X86-AVX2-NEXT: vpsrlq $48, %xmm0, %xmm3 +; X86-AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2 +; X86-AVX2-NEXT: vblendvpd %xmm1, %xmm0, %xmm2, %xmm0 +; X86-AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0] +; X86-AVX2-NEXT: retl +; +; X64-LABEL: combine_shuffle_proti_v2i64: +; X64: # %bb.0: +; X64-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[13,12,11,10,9,8,15,14,5,4,3,2,1,0,7,6] +; X64-NEXT: retq %1 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a0, <2 x i64> %a0, <2 x i64> ) %2 = bitcast <2 x i64> %1 to <16 x i8> %3 = shufflevector <16 x i8> %2, <16 x i8> undef, <16 x i32>