diff --git a/llvm/lib/Target/AMDGPU/SISchedule.td b/llvm/lib/Target/AMDGPU/SISchedule.td
--- a/llvm/lib/Target/AMDGPU/SISchedule.td
+++ b/llvm/lib/Target/AMDGPU/SISchedule.td
@@ -27,15 +27,20 @@
 def MIVGPRRead  : SchedRead;
 def MIMFMARead  : SchedRead;
 
-// Vector ALU instructions
-def Write32Bit         : SchedWrite;
-def WriteFloatCvt      : SchedWrite;
-def WriteQuarterRate32 : SchedWrite;
+// Vector ALU instructions. "Aux" forms are used for the second and subsequent
+// def operands of instructions with multiple results.
+def Write32Bit            : SchedWrite;
+def Write32BitAux         : SchedWrite;
+def WriteFloatCvt         : SchedWrite;
+def WriteQuarterRate32    : SchedWrite;
+def WriteQuarterRate32Aux : SchedWrite;
 
-def WriteFloatFMA   : SchedWrite;
+def WriteFloatFMA    : SchedWrite;
+def WriteFloatFMAAux : SchedWrite;
 
 // Slow quarter rate f64 instruction.
-def WriteDouble : SchedWrite;
+def WriteDouble    : SchedWrite;
+def WriteDoubleAux : SchedWrite;
 
 // half rate f64 instruction (same as v_add_f64)
 def WriteDoubleAdd  : SchedWrite;
@@ -94,14 +99,22 @@
   let BufferSize = 1;
 }
 
+// Define the resources and latency of a SchedWrite.
 class HWWriteRes<SchedWrite write, list<ProcResourceKind> resources,
                  int latency> : WriteRes<write, resources> {
   let Latency = latency;
+  // If no resources are specifed then assume that this is for the second or
+  // subsequent operand of an instruction, which we don't want to consume any
+  // additional issue resource.
+  let NumMicroOps = !if(!empty(resources), 0, 1);
 }
 
 class HWVALUWriteRes<SchedWrite write, int latency> :
   HWWriteRes<write, [HWVALU], latency>;
 
+class HWAuxWriteRes<SchedWrite write, int latency> :
+  HWWriteRes<write, [], latency>;
+
 def PredMIReadVGPR : SchedPredicate<[{TII->hasVGPRUses(*MI)}]>;
 
 def MIReadVGPR : SchedReadVariant<[
@@ -122,13 +135,15 @@
   def : HWWriteRes<WriteVMEM,    [HWVMEM],   80>;
   def : HWWriteRes<WriteBarrier, [HWBranch], 500>; // XXX: Guessed ???
 
-  def : HWVALUWriteRes<Write32Bit,         1>;
-  def : HWVALUWriteRes<Write64Bit,         2>;
-  def : HWVALUWriteRes<WriteFloatCvt,      4>;
-  def : HWVALUWriteRes<WriteQuarterRate32, 4>;
-  def : HWVALUWriteRes<Write2PassMAI,      2>;
-  def : HWVALUWriteRes<Write8PassMAI,      8>;
-  def : HWVALUWriteRes<Write16PassMAI,    16>;
+  def : HWVALUWriteRes<Write32Bit,           1>;
+  def : HWAuxWriteRes<Write32BitAux,         1>;
+  def : HWVALUWriteRes<Write64Bit,           2>;
+  def : HWVALUWriteRes<WriteFloatCvt,        4>;
+  def : HWVALUWriteRes<WriteQuarterRate32,   4>;
+  def : HWAuxWriteRes<WriteQuarterRate32Aux, 4>;
+  def : HWVALUWriteRes<Write2PassMAI,        2>;
+  def : HWVALUWriteRes<Write8PassMAI,        8>;
+  def : HWVALUWriteRes<Write16PassMAI,      16>;
 
   def : ReadAdvance<MIVGPRRead, -2>;
   def : InstRW<[Write64Bit, MIReadVGPR], (instregex "^V_ACCVGPR_WRITE_B32$")>;
@@ -158,7 +173,9 @@
 defm : SICommonWriteRes;
 
 def : HWVALUWriteRes<WriteFloatFMA,   1>;
+def : HWAuxWriteRes<WriteFloatFMAAux, 1>;
 def : HWVALUWriteRes<WriteDouble,     4>;
+def : HWAuxWriteRes<WriteDoubleAux,   4>;
 def : HWVALUWriteRes<WriteDoubleAdd,  2>;
 def : HWVALUWriteRes<WriteDoubleCvt,  4>;
 
@@ -170,10 +187,12 @@
 
 defm : SICommonWriteRes;
 
-def : HWVALUWriteRes<WriteFloatFMA, 16>;
-def : HWVALUWriteRes<WriteDouble,   16>;
-def : HWVALUWriteRes<WriteDoubleAdd, 8>;
-def : HWVALUWriteRes<WriteDoubleCvt, 4>;
+def : HWVALUWriteRes<WriteFloatFMA,   16>;
+def : HWAuxWriteRes<WriteFloatFMAAux, 16>;
+def : HWVALUWriteRes<WriteDouble,     16>;
+def : HWAuxWriteRes<WriteDoubleAux,   16>;
+def : HWVALUWriteRes<WriteDoubleAdd,   8>;
+def : HWVALUWriteRes<WriteDoubleCvt,   4>;
 
 def : InstRW<[WriteCopy], (instrs COPY)>;
 
@@ -184,11 +203,15 @@
 // The latency values are 1 / (operations / cycle).
 // Add 1 stall cycle for VGPR read.
 def : HWWriteRes<Write32Bit,         [HWVALU],   5>;
+def : HWWriteRes<Write32BitAux,      [],         5>;
 def : HWWriteRes<WriteFloatCvt,      [HWVALU],   5>;
 def : HWWriteRes<Write64Bit,         [HWVALU],   9>;
 def : HWWriteRes<WriteQuarterRate32, [HWVALU],   17>;
+def : HWWriteRes<WriteQuarterRate32Aux, [],      17>;
 def : HWWriteRes<WriteFloatFMA,      [HWVALU],   5>;
+def : HWWriteRes<WriteFloatFMAAux,   [],         5>;
 def : HWWriteRes<WriteDouble,        [HWVALU],   17>;
+def : HWWriteRes<WriteDoubleAux,     [],         17>;
 def : HWWriteRes<WriteDoubleAdd,     [HWVALU],   17>;
 def : HWWriteRes<WriteDoubleCvt,     [HWVALU],   17>;
 
diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
--- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
@@ -173,7 +173,7 @@
                       bit GFX9Renamed = 0,
                       bit useSGPRInput = !eq(P.NumSrcArgs, 3)> {
   let renamedInGFX9 = GFX9Renamed in {
-    let SchedRW = [Write32Bit, WriteSALU] in {
+    let SchedRW = [Write32Bit, Write32BitAux] in {
       let Uses = !if(useSGPRInput, [VCC, EXEC], [EXEC]), Defs = [VCC] in {
         def _e32 : VOP2_Pseudo <opName, P, VOPPatOrNull<node,P>.ret>,
                    Commutable_REV<revOp#"_e32", !eq(revOp, opName)> {
diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
--- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
@@ -367,13 +367,13 @@
 } // End SchedRW = [WriteDoubleAdd], FPDPRounding = 1
 
 def V_DIV_SCALE_F32 : VOP3_Pseudo <"v_div_scale_f32", VOP3b_F32_I1_F32_F32_F32, [], 1> {
-  let SchedRW = [WriteFloatFMA, WriteSALU];
+  let SchedRW = [WriteFloatFMA, WriteFloatFMAAux];
   let AsmMatchConverter = "";
 }
 
 // Double precision division pre-scale.
 def V_DIV_SCALE_F64 : VOP3_Pseudo <"v_div_scale_f64", VOP3b_F64_I1_F64_F64_F64, [], 1> {
-  let SchedRW = [WriteDouble, WriteSALU];
+  let SchedRW = [WriteDouble, WriteDoubleAux];
   let AsmMatchConverter = "";
   let FPDPRounding = 1;
 }
@@ -420,10 +420,10 @@
 } // End Constraints = "@earlyclobber $vdst", SchedRW = [WriteQuarterRate32]
 
 let isCommutable = 1 in {
-let SchedRW = [WriteQuarterRate32, WriteSALU] in {
+let SchedRW = [WriteQuarterRate32, WriteQuarterRate32Aux] in {
 def V_MAD_U64_U32 : VOP3Inst <"v_mad_u64_u32", VOP3b_I64_I1_I32_I32_I64>;
 def V_MAD_I64_I32 : VOP3Inst <"v_mad_i64_i32", VOP3b_I64_I1_I32_I32_I64>;
-} // End SchedRW = [WriteQuarterRate32, WriteSALU]
+} // End SchedRW = [WriteQuarterRate32, WriteQuarterRate32Aux]
 } // End isCommutable = 1
 
 } // End SubtargetPredicate = isGFX7Plus
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
--- a/llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
@@ -214,43 +214,44 @@
 ;
 ; GCN-LABEL: sdiv_i32:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0xb
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
+; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0xb
 ; GCN-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_ashr_i32 s8, s3, 31
-; GCN-NEXT:    s_add_i32 s3, s3, s8
-; GCN-NEXT:    s_xor_b32 s9, s3, s8
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s9
-; GCN-NEXT:    s_ashr_i32 s3, s2, 31
-; GCN-NEXT:    s_add_i32 s2, s2, s3
-; GCN-NEXT:    s_xor_b32 s2, s2, s3
+; GCN-NEXT:    s_ashr_i32 s8, s5, 31
+; GCN-NEXT:    s_add_i32 s2, s5, s8
+; GCN-NEXT:    s_xor_b32 s11, s2, s8
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s11
+; GCN-NEXT:    s_ashr_i32 s9, s4, 31
+; GCN-NEXT:    s_add_i32 s4, s4, s9
+; GCN-NEXT:    s_xor_b32 s10, s4, s9
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v0, v0
-; GCN-NEXT:    s_xor_b32 s3, s3, s8
+; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x4f800000, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_mul_lo_u32 v1, v0, s9
-; GCN-NEXT:    v_mul_hi_u32 v2, v0, s9
+; GCN-NEXT:    v_mul_lo_u32 v1, v0, s11
+; GCN-NEXT:    v_mul_hi_u32 v2, v0, s11
 ; GCN-NEXT:    v_sub_i32_e32 v3, vcc, 0, v1
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v2
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[0:1]
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v2
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[2:3]
 ; GCN-NEXT:    v_mul_hi_u32 v1, v1, v0
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v1, v0
 ; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v1, v0
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v0, v0, s2
-; GCN-NEXT:    v_mul_lo_u32 v1, v0, s9
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v0, v0, s10
+; GCN-NEXT:    s_xor_b32 s2, s9, s8
+; GCN-NEXT:    v_mul_lo_u32 v1, v0, s11
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, -1, v0
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s2, v1
-; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, s2, v1
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s9, v4
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s10, v1
+; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, s10, v1
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s11, v4
 ; GCN-NEXT:    s_and_b64 s[0:1], s[0:1], vcc
 ; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, v3, v0, vcc
-; GCN-NEXT:    v_xor_b32_e32 v0, s3, v0
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s3, v0
+; GCN-NEXT:    v_xor_b32_e32 v0, s2, v0
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s2, v0
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
 ; GCN-NEXT:    s_endpgm
   %r = sdiv i32 %x, %y
@@ -545,20 +546,20 @@
 ; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s2
 ; GCN-NEXT:    s_sext_i32_i16 s3, s4
 ; GCN-NEXT:    v_cvt_f32_i32_e32 v1, s3
-; GCN-NEXT:    s_xor_b32 s3, s3, s2
+; GCN-NEXT:    s_xor_b32 s5, s3, s2
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
-; GCN-NEXT:    s_ashr_i32 s3, s3, 30
+; GCN-NEXT:    s_ashr_i32 s3, s5, 30
 ; GCN-NEXT:    s_or_b32 s3, s3, 1
 ; GCN-NEXT:    v_mov_b32_e32 v3, s3
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_cvt_i32_f32_e32 v4, v2
 ; GCN-NEXT:    v_mad_f32 v1, -v2, v0, v1
-; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v0|
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
-; GCN-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
 ; GCN-NEXT:    v_mul_lo_u32 v0, v0, s2
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
 ; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s4, v0
 ; GCN-NEXT:    buffer_store_short v0, off, s[0:3], 0
@@ -592,21 +593,21 @@
 ;
 ; GCN-LABEL: udiv_i8:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dword s0, s[0:1], 0xb
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    s_load_dword s2, s[0:1], 0xb
+; GCN-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    v_cvt_f32_ubyte1_e32 v0, s0
+; GCN-NEXT:    v_cvt_f32_ubyte1_e32 v0, s2
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v0
-; GCN-NEXT:    v_cvt_f32_ubyte0_e32 v2, s0
+; GCN-NEXT:    v_cvt_f32_ubyte0_e32 v2, s2
+; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    v_mul_f32_e32 v1, v2, v1
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v1
 ; GCN-NEXT:    v_mad_f32 v1, -v1, v0, v2
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v3, vcc
-; GCN-NEXT:    buffer_store_byte v0, off, s[4:7], 0
+; GCN-NEXT:    buffer_store_byte v0, off, s[0:3], 0
 ; GCN-NEXT:    s_endpgm
   %r = udiv i8 %x, %y
   store i8 %r, i8 addrspace(1)* %out
@@ -749,31 +750,31 @@
 ;
 ; GCN-LABEL: srem_i8:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dword s0, s[0:1], 0xb
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    s_load_dword s4, s[0:1], 0xb
+; GCN-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_bfe_i32 s1, s0, 0x80008
-; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s1
-; GCN-NEXT:    s_sext_i32_i8 s3, s0
-; GCN-NEXT:    v_cvt_f32_i32_e32 v1, s3
-; GCN-NEXT:    s_xor_b32 s1, s3, s1
+; GCN-NEXT:    s_bfe_i32 s3, s4, 0x80008
+; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s3
+; GCN-NEXT:    s_sext_i32_i8 s5, s4
+; GCN-NEXT:    v_cvt_f32_i32_e32 v1, s5
+; GCN-NEXT:    s_xor_b32 s3, s5, s3
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
-; GCN-NEXT:    s_ashr_i32 s1, s1, 30
-; GCN-NEXT:    s_or_b32 s1, s1, 1
-; GCN-NEXT:    v_mov_b32_e32 v3, s1
+; GCN-NEXT:    s_ashr_i32 s3, s3, 30
+; GCN-NEXT:    s_or_b32 s3, s3, 1
+; GCN-NEXT:    v_mov_b32_e32 v3, s3
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_cvt_i32_f32_e32 v4, v2
 ; GCN-NEXT:    v_mad_f32 v1, -v2, v0, v1
-; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v0|
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
-; GCN-NEXT:    s_lshr_b32 s2, s0, 8
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    s_lshr_b32 s2, s4, 8
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
 ; GCN-NEXT:    v_mul_lo_u32 v0, v0, s2
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
-; GCN-NEXT:    buffer_store_byte v0, off, s[4:7], 0
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
+; GCN-NEXT:    s_mov_b32 s2, -1
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s4, v0
+; GCN-NEXT:    buffer_store_byte v0, off, s[0:3], 0
 ; GCN-NEXT:    s_endpgm
   %r = srem i8 %x, %y
   store i8 %r, i8 addrspace(1)* %out
@@ -947,105 +948,105 @@
 ;
 ; GCN-LABEL: udiv_v4i32:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx8 s[8:15], s[0:1], 0xd
-; GCN-NEXT:    s_mov_b32 s6, 0x4f800000
-; GCN-NEXT:    s_load_dwordx2 s[16:17], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s19, 0xf000
-; GCN-NEXT:    s_mov_b32 s18, -1
+; GCN-NEXT:    s_load_dwordx8 s[4:11], s[0:1], 0xd
+; GCN-NEXT:    s_mov_b32 s16, 0x4f800000
+; GCN-NEXT:    s_load_dwordx2 s[12:13], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s15, 0xf000
+; GCN-NEXT:    s_mov_b32 s14, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s12
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s13
-; GCN-NEXT:    v_cvt_f32_u32_e32 v7, s15
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s8
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s9
+; GCN-NEXT:    v_cvt_f32_u32_e32 v2, s10
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v0, v0
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v1
-; GCN-NEXT:    v_mul_f32_e32 v0, s6, v0
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v2
+; GCN-NEXT:    v_mul_f32_e32 v0, s16, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_mul_f32_e32 v1, s6, v1
+; GCN-NEXT:    v_mul_f32_e32 v1, s16, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    v_mul_hi_u32 v2, v0, s12
-; GCN-NEXT:    v_mul_lo_u32 v3, v0, s12
-; GCN-NEXT:    v_mul_hi_u32 v4, v1, s13
-; GCN-NEXT:    v_mul_lo_u32 v5, v1, s13
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v2
-; GCN-NEXT:    v_sub_i32_e32 v6, vcc, 0, v3
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v3, v6, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v2, v2, v0
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, 0, v5
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v2, v0
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v2, v0
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v6, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v0, v0, s8
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v4
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v5, v3, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v2, v2, v1
-; GCN-NEXT:    v_mul_lo_u32 v3, v0, s12
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, -1, v0
-; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s8, v3
-; GCN-NEXT:    v_cmp_le_u32_e64 s[4:5], s12, v5
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v2, v1
-; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v2, v1
-; GCN-NEXT:    v_cvt_f32_u32_e32 v2, s14
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v5, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v1, v1, s9
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s8, v3
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v2
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, 1, v0
-; GCN-NEXT:    s_and_b64 vcc, s[4:5], s[2:3]
-; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc
-; GCN-NEXT:    v_mul_f32_e32 v2, s6, v2
+; GCN-NEXT:    v_mul_f32_e32 v2, s16, v2
+; GCN-NEXT:    v_mul_lo_u32 v3, v0, s8
+; GCN-NEXT:    v_mul_hi_u32 v5, v0, s8
+; GCN-NEXT:    v_mul_lo_u32 v4, v1, s9
+; GCN-NEXT:    v_mul_hi_u32 v6, v1, s9
+; GCN-NEXT:    v_sub_i32_e32 v7, vcc, 0, v3
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v5
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v7, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v3, v3, v0
+; GCN-NEXT:    v_sub_i32_e32 v8, vcc, 0, v4
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v6
+; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v8, s[2:3]
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v3, v0
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v3, v0
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v5, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v4, v4, v1
+; GCN-NEXT:    v_mul_hi_u32 v0, v0, s4
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
-; GCN-NEXT:    v_mul_lo_u32 v3, v1, s13
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v4, v0, s[2:3]
-; GCN-NEXT:    v_mul_hi_u32 v6, v2, s14
-; GCN-NEXT:    v_mul_lo_u32 v5, v2, s14
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s9, v3
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s9, v3
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v6
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, 0, v5
-; GCN-NEXT:    v_cndmask_b32_e64 v3, v5, v3, s[4:5]
+; GCN-NEXT:    v_cvt_f32_u32_e32 v8, s11
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v1
+; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v4, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v4, v0, s8
+; GCN-NEXT:    v_mul_hi_u32 v1, v1, s5
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, -1, v0
+; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s4, v4
+; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s8, v5
+; GCN-NEXT:    v_mul_lo_u32 v5, v1, s9
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], s4, v4
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v0
+; GCN-NEXT:    s_and_b64 vcc, s[2:3], s[0:1]
+; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v4, vcc
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v3, v0, s[0:1]
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s5, v5
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, s10
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s9, v3
+; GCN-NEXT:    v_mul_hi_u32 v3, v2, s10
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], s5, v5
+; GCN-NEXT:    v_sub_i32_e32 v7, vcc, 0, v4
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, -1, v1
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v4, v7, s[2:3]
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v8
 ; GCN-NEXT:    v_mul_hi_u32 v3, v3, v2
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s13, v4
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, -1, v1
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, 1, v1
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v3, v2
+; GCN-NEXT:    v_mul_f32_e32 v4, s16, v4
+; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v4
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v3, v2
 ; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v7
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v6, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v2, v2, s10
-; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    v_mul_f32_e32 v3, s6, v3
-; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v7, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v3, v4, s11
+; GCN-NEXT:    v_mul_lo_u32 v7, v4, s11
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, s6
+; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[4:5]
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v5, v2, s14
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v4, v1, s[2:3]
-; GCN-NEXT:    v_mul_hi_u32 v7, v3, s15
-; GCN-NEXT:    v_mul_lo_u32 v6, v3, s15
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s10, v5
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s14, v4
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v7
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v6
-; GCN-NEXT:    v_cndmask_b32_e64 v4, v6, v4, s[2:3]
-; GCN-NEXT:    v_mul_hi_u32 v4, v4, v3
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, -1, v2
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v4, v3
-; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v4, v3
-; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v7, s[2:3]
-; GCN-NEXT:    v_mul_hi_u32 v3, v3, s11
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s10, v5
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v2
-; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    v_mul_lo_u32 v5, v3, s15
-; GCN-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v6, v2, s[2:3]
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s11, v5
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s15, v4
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s11, v5
+; GCN-NEXT:    v_sub_i32_e32 v8, vcc, 0, v7
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v7, v8, s[0:1]
+; GCN-NEXT:    v_mul_lo_u32 v5, v2, s10
+; GCN-NEXT:    v_mul_hi_u32 v3, v3, v4
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v6, v1, s[4:5]
+; GCN-NEXT:    v_sub_i32_e32 v6, vcc, s6, v5
+; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s10, v6
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v3, v4
+; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v3, v4
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v6, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v3, v3, s7
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], s6, v5
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, -1, v2
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, 1, v2
+; GCN-NEXT:    v_mul_lo_u32 v6, v3, s11
+; GCN-NEXT:    s_and_b64 vcc, s[2:3], s[0:1]
+; GCN-NEXT:    v_cndmask_b32_e32 v2, v2, v5, vcc
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v4, v2, s[0:1]
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s7, v6
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s11, v4
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, -1, v3
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s7, v6
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, 1, v3
 ; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
 ; GCN-NEXT:    v_cndmask_b32_e32 v3, v3, v5, vcc
 ; GCN-NEXT:    v_cndmask_b32_e64 v3, v4, v3, s[2:3]
-; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[16:19], 0
+; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[12:15], 0
 ; GCN-NEXT:    s_endpgm
   %r = udiv <4 x i32> %x, %y
   store <4 x i32> %r, <4 x i32> addrspace(1)* %out
@@ -1219,105 +1220,105 @@
 ;
 ; GCN-LABEL: urem_v4i32:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx8 s[8:15], s[0:1], 0xd
-; GCN-NEXT:    s_mov_b32 s6, 0x4f800000
-; GCN-NEXT:    s_load_dwordx2 s[16:17], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s19, 0xf000
-; GCN-NEXT:    s_mov_b32 s18, -1
+; GCN-NEXT:    s_load_dwordx8 s[4:11], s[0:1], 0xd
+; GCN-NEXT:    s_mov_b32 s16, 0x4f800000
+; GCN-NEXT:    s_load_dwordx2 s[12:13], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s15, 0xf000
+; GCN-NEXT:    s_mov_b32 s14, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s12
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s13
-; GCN-NEXT:    v_cvt_f32_u32_e32 v7, s15
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s8
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s9
+; GCN-NEXT:    v_cvt_f32_u32_e32 v2, s10
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v0, v0
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v1
-; GCN-NEXT:    v_mul_f32_e32 v0, s6, v0
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v2
+; GCN-NEXT:    v_mul_f32_e32 v0, s16, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_mul_f32_e32 v1, s6, v1
+; GCN-NEXT:    v_mul_f32_e32 v1, s16, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    v_mul_lo_u32 v2, v0, s12
-; GCN-NEXT:    v_mul_hi_u32 v3, v0, s12
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v2
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v3
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v4, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v2, v2, v0
-; GCN-NEXT:    v_mul_lo_u32 v3, v1, s13
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v2, v0
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v2, v0
-; GCN-NEXT:    v_mul_hi_u32 v2, v1, s13
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v4, s[0:1]
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v3
-; GCN-NEXT:    v_mul_hi_u32 v0, v0, s8
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v2
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v3, v4, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v2, v2, v1
-; GCN-NEXT:    v_mul_lo_u32 v0, v0, s12
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v2, v1
-; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v2, v1
-; GCN-NEXT:    v_cvt_f32_u32_e32 v2, s14
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v5, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v1, v1, s9
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s8, v0
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v2
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], s8, v0
-; GCN-NEXT:    v_mul_lo_u32 v1, v1, s13
-; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s12, v3
-; GCN-NEXT:    v_mul_f32_e32 v2, s6, v2
+; GCN-NEXT:    v_mul_f32_e32 v2, s16, v2
+; GCN-NEXT:    v_mul_lo_u32 v3, v0, s8
+; GCN-NEXT:    v_mul_hi_u32 v5, v0, s8
+; GCN-NEXT:    v_mul_lo_u32 v4, v1, s9
+; GCN-NEXT:    v_mul_hi_u32 v6, v1, s9
+; GCN-NEXT:    v_sub_i32_e32 v7, vcc, 0, v3
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v5
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v7, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v3, v3, v0
+; GCN-NEXT:    v_sub_i32_e32 v8, vcc, 0, v4
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v6
+; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v8, s[2:3]
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v3, v0
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v3, v0
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v5, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v0, v0, s4
+; GCN-NEXT:    v_mul_hi_u32 v4, v4, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, s12, v3
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s12, v3
-; GCN-NEXT:    s_and_b64 vcc, s[2:3], s[4:5]
-; GCN-NEXT:    v_mul_lo_u32 v5, v2, s14
-; GCN-NEXT:    v_mul_hi_u32 v6, v2, s14
-; GCN-NEXT:    v_cndmask_b32_e32 v0, v3, v0, vcc
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v4, v0, s[4:5]
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s9, v1
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s9, v1
-; GCN-NEXT:    v_sub_i32_e32 v1, vcc, 0, v5
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v6
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v5, v1, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v1, v1, v2
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s13, v3
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, s13, v3
-; GCN-NEXT:    v_subrev_i32_e32 v5, vcc, s13, v3
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v1, v2
-; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v1, v2
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v6, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v1, v1, s10
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v7
+; GCN-NEXT:    v_cvt_f32_u32_e32 v8, s11
+; GCN-NEXT:    v_mul_lo_u32 v0, v0, s8
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v1
+; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v4, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[2:3]
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s4, v0
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s4, v0
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s8, v3
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, s8, v3
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s8, v3
 ; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    v_cndmask_b32_e32 v3, v3, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v5, v1, s14
-; GCN-NEXT:    v_mul_f32_e32 v1, s6, v2
-; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v1
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v4, v3, s[2:3]
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s10, v5
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s14, v3
-; GCN-NEXT:    v_mul_lo_u32 v4, v2, s15
-; GCN-NEXT:    v_mul_hi_u32 v6, v2, s15
+; GCN-NEXT:    v_mul_hi_u32 v5, v2, s10
+; GCN-NEXT:    v_cndmask_b32_e32 v0, v3, v0, vcc
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v4, v0, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, s10
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v5
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v8
+; GCN-NEXT:    v_mul_hi_u32 v1, v1, s5
 ; GCN-NEXT:    v_sub_i32_e32 v7, vcc, 0, v4
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v6
 ; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v7, s[2:3]
+; GCN-NEXT:    v_mul_f32_e32 v5, s16, v5
 ; GCN-NEXT:    v_mul_hi_u32 v4, v4, v2
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, s14, v3
+; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v5
+; GCN-NEXT:    v_mul_lo_u32 v1, v1, s9
 ; GCN-NEXT:    v_add_i32_e32 v7, vcc, v4, v2
 ; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v4, v2
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v7, s[2:3]
-; GCN-NEXT:    v_mul_hi_u32 v2, v2, s11
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s10, v5
-; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, s14, v3
-; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    v_mul_lo_u32 v5, v2, s15
-; GCN-NEXT:    v_cndmask_b32_e32 v2, v3, v4, vcc
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v6, v2, s[2:3]
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s11, v5
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s11, v5
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s15, v3
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, s15, v3
-; GCN-NEXT:    v_subrev_i32_e32 v5, vcc, s15, v3
+; GCN-NEXT:    v_mul_hi_u32 v4, v5, s11
+; GCN-NEXT:    v_mul_lo_u32 v7, v5, s11
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s5, v1
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], s5, v1
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s9, v3
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, s9, v3
+; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, s9, v3
+; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[4:5]
+; GCN-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, 0, v7
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v4
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v7, v3, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v3, v3, v5
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, s6
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v6, v1, s[4:5]
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v3, v5
+; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v3, v5
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v6, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v3, v3, s7
+; GCN-NEXT:    v_mul_lo_u32 v2, v2, s10
+; GCN-NEXT:    v_mul_lo_u32 v3, v3, s11
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s6, v2
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], s6, v2
+; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s10, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, s10, v4
+; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, s10, v4
+; GCN-NEXT:    s_and_b64 vcc, s[2:3], s[0:1]
+; GCN-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s7, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v5, v2, s[0:1]
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s7, v3
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s11, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, s11, v4
+; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, s11, v4
 ; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    v_cndmask_b32_e32 v3, v3, v5, vcc
-; GCN-NEXT:    v_cndmask_b32_e64 v3, v4, v3, s[2:3]
-; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[16:19], 0
+; GCN-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v5, v3, s[2:3]
+; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[12:15], 0
 ; GCN-NEXT:    s_endpgm
   %r = urem <4 x i32> %x, %y
   store <4 x i32> %r, <4 x i32> addrspace(1)* %out
@@ -1534,130 +1535,130 @@
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    s_ashr_i32 s2, s16, 31
 ; GCN-NEXT:    s_add_i32 s3, s16, s2
-; GCN-NEXT:    s_xor_b32 s5, s3, s2
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s5
+; GCN-NEXT:    s_xor_b32 s6, s3, s2
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s6
 ; GCN-NEXT:    s_mov_b32 s16, 0x4f800000
-; GCN-NEXT:    s_ashr_i32 s6, s17, 31
-; GCN-NEXT:    s_add_i32 s0, s17, s6
+; GCN-NEXT:    s_ashr_i32 s4, s17, 31
+; GCN-NEXT:    s_add_i32 s0, s17, s4
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v0, v0
-; GCN-NEXT:    s_xor_b32 s17, s0, s6
-; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s17
+; GCN-NEXT:    s_xor_b32 s7, s0, s4
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s7
 ; GCN-NEXT:    s_ashr_i32 s3, s12, 31
 ; GCN-NEXT:    v_mul_f32_e32 v0, s16, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    s_add_i32 s4, s12, s3
-; GCN-NEXT:    s_xor_b32 s4, s4, s3
-; GCN-NEXT:    s_xor_b32 s7, s3, s2
-; GCN-NEXT:    v_mul_lo_u32 v1, v0, s5
-; GCN-NEXT:    v_mul_hi_u32 v2, v0, s5
-; GCN-NEXT:    s_ashr_i32 s12, s13, 31
-; GCN-NEXT:    s_add_i32 s13, s13, s12
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v1
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v2
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v4, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v1, v1, v0
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v3
-; GCN-NEXT:    s_xor_b32 s13, s13, s12
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v1, v0
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v1, v0
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v3, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v0, v0, s4
-; GCN-NEXT:    v_mul_f32_e32 v1, s16, v2
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v1
+; GCN-NEXT:    s_add_i32 s5, s12, s3
+; GCN-NEXT:    s_xor_b32 s5, s5, s3
+; GCN-NEXT:    v_mul_lo_u32 v2, v0, s6
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, s6
+; GCN-NEXT:    v_mul_f32_e32 v1, s16, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    v_mul_lo_u32 v2, v0, s5
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, -1, v0
-; GCN-NEXT:    v_mul_hi_u32 v5, v1, s17
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s4, v2
-; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s5, v4
-; GCN-NEXT:    v_mul_lo_u32 v4, v1, s17
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], s4, v2
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v5
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
-; GCN-NEXT:    v_sub_i32_e32 v6, vcc, 0, v4
-; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v6, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v4, v4, v1
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v4, v1
-; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v4, v1
-; GCN-NEXT:    s_and_b64 vcc, s[2:3], s[0:1]
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v5, s[4:5]
-; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
-; GCN-NEXT:    s_ashr_i32 s5, s18, 31
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v3, v0, s[0:1]
-; GCN-NEXT:    s_add_i32 s0, s18, s5
-; GCN-NEXT:    s_xor_b32 s4, s12, s6
-; GCN-NEXT:    s_xor_b32 s12, s0, s5
-; GCN-NEXT:    v_cvt_f32_u32_e32 v4, s12
-; GCN-NEXT:    v_mul_hi_u32 v1, v1, s13
-; GCN-NEXT:    v_xor_b32_e32 v0, s7, v0
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s7, v0
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v4
-; GCN-NEXT:    v_mul_lo_u32 v2, v1, s17
-; GCN-NEXT:    s_ashr_i32 s6, s19, 31
-; GCN-NEXT:    v_mul_f32_e32 v4, s16, v4
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s13, v2
-; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v4
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s17, v3
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s13, v2
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, -1, v1
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, 1, v1
-; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v3, v1, s[2:3]
-; GCN-NEXT:    v_mul_lo_u32 v2, v4, s12
-; GCN-NEXT:    v_mul_hi_u32 v3, v4, s12
-; GCN-NEXT:    s_ashr_i32 s2, s14, 31
-; GCN-NEXT:    s_add_i32 s3, s14, s2
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v2
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v4, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, v0
+; GCN-NEXT:    s_xor_b32 s2, s3, s2
+; GCN-NEXT:    s_ashr_i32 s3, s13, 31
+; GCN-NEXT:    s_xor_b32 s4, s3, s4
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v2, v0
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v2, v0
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v3, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v0, v0, s5
+; GCN-NEXT:    v_mul_lo_u32 v2, v1, s7
+; GCN-NEXT:    v_mul_hi_u32 v3, v1, s7
+; GCN-NEXT:    v_mul_lo_u32 v4, v0, s6
 ; GCN-NEXT:    v_sub_i32_e32 v5, vcc, 0, v2
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, 1, v0
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, -1, v0
+; GCN-NEXT:    v_sub_i32_e32 v8, vcc, s5, v4
+; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, s5, v4
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s6, v8
+; GCN-NEXT:    s_and_b64 s[0:1], s[0:1], vcc
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v6, s[0:1]
 ; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v3
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v5, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v2, v2, v4
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, v1
+; GCN-NEXT:    v_cndmask_b32_e32 v0, v7, v0, vcc
+; GCN-NEXT:    s_ashr_i32 s6, s18, 31
+; GCN-NEXT:    s_add_i32 s5, s13, s3
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v2, v1
+; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v2, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[0:1]
+; GCN-NEXT:    s_add_i32 s0, s18, s6
+; GCN-NEXT:    s_xor_b32 s12, s0, s6
+; GCN-NEXT:    v_cvt_f32_u32_e32 v2, s12
+; GCN-NEXT:    s_xor_b32 s5, s5, s3
+; GCN-NEXT:    v_mul_hi_u32 v1, v1, s5
+; GCN-NEXT:    v_xor_b32_e32 v0, s2, v0
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v2
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s2, v0
+; GCN-NEXT:    v_mul_lo_u32 v3, v1, s7
+; GCN-NEXT:    v_mul_f32_e32 v2, s16, v2
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s5, v3
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s7, v4
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s5, v3
+; GCN-NEXT:    v_mul_hi_u32 v5, v2, s12
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, s12
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, -1, v1
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, 1, v1
+; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
+; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, 0, v6
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v5
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v6, v3, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v3, v3, v2
+; GCN-NEXT:    s_ashr_i32 s7, s19, 31
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v4, v1, s[2:3]
+; GCN-NEXT:    s_ashr_i32 s2, s14, 31
+; GCN-NEXT:    s_add_i32 s5, s19, s7
+; GCN-NEXT:    s_add_i32 s3, s14, s2
+; GCN-NEXT:    s_xor_b32 s14, s5, s7
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v3, v2
+; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v3, v2
+; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s14
 ; GCN-NEXT:    s_xor_b32 s3, s3, s2
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v4, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, s3
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v3
 ; GCN-NEXT:    v_xor_b32_e32 v1, s4, v1
 ; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, s4, v1
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v2, v4
-; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v2, v4
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v3, s[0:1]
-; GCN-NEXT:    s_add_i32 s0, s19, s6
-; GCN-NEXT:    s_xor_b32 s14, s0, s6
-; GCN-NEXT:    v_cvt_f32_u32_e32 v4, s14
-; GCN-NEXT:    v_mul_hi_u32 v2, v2, s3
-; GCN-NEXT:    s_xor_b32 s7, s2, s5
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v4
-; GCN-NEXT:    v_mul_lo_u32 v3, v2, s12
-; GCN-NEXT:    v_mul_f32_e32 v4, s16, v4
-; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v4
-; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s3, v3
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, s12
+; GCN-NEXT:    v_mul_f32_e32 v3, s16, v3
+; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
+; GCN-NEXT:    s_xor_b32 s6, s2, s6
+; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s3, v4
 ; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s12, v5
+; GCN-NEXT:    v_mul_lo_u32 v6, v3, s14
+; GCN-NEXT:    v_mul_hi_u32 v7, v3, s14
 ; GCN-NEXT:    s_ashr_i32 s12, s15, 31
-; GCN-NEXT:    v_mul_lo_u32 v6, v4, s14
-; GCN-NEXT:    v_mul_hi_u32 v7, v4, s14
 ; GCN-NEXT:    s_add_i32 s13, s15, s12
-; GCN-NEXT:    s_xor_b32 s13, s13, s12
 ; GCN-NEXT:    v_sub_i32_e32 v8, vcc, 0, v6
 ; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v7
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, v6, v8, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v6, v6, v4
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s3, v3
+; GCN-NEXT:    v_mul_hi_u32 v6, v6, v3
+; GCN-NEXT:    s_xor_b32 s13, s13, s12
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s3, v4
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, -1, v2
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, 1, v2
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v6, v4
-; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v6, v4
-; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v7, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v4, v4, s13
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v6, v3
+; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v6, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v7, s[4:5]
+; GCN-NEXT:    v_mul_hi_u32 v3, v3, s13
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v2
 ; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    v_cndmask_b32_e32 v2, v2, v3, vcc
+; GCN-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v3, s14
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v5, v2, s[2:3]
-; GCN-NEXT:    v_mul_lo_u32 v3, v4, s14
-; GCN-NEXT:    v_xor_b32_e32 v2, s7, v2
-; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, s7, v2
-; GCN-NEXT:    s_xor_b32 s4, s12, s6
-; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s13, v3
+; GCN-NEXT:    v_xor_b32_e32 v2, s6, v2
+; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, s6, v2
+; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s13, v4
 ; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s14, v5
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s13, v3
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, -1, v4
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, 1, v4
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s13, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, -1, v3
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, 1, v3
 ; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
+; GCN-NEXT:    v_cndmask_b32_e32 v3, v3, v4, vcc
+; GCN-NEXT:    s_xor_b32 s4, s12, s7
 ; GCN-NEXT:    v_cndmask_b32_e64 v3, v5, v3, s[2:3]
 ; GCN-NEXT:    v_xor_b32_e32 v3, s4, v3
 ; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, s4, v3
@@ -1867,137 +1868,137 @@
 ;
 ; GCN-LABEL: srem_v4i32:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx8 s[12:19], s[0:1], 0xd
-; GCN-NEXT:    s_load_dwordx2 s[8:9], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s11, 0xf000
-; GCN-NEXT:    s_mov_b32 s10, -1
+; GCN-NEXT:    s_load_dwordx8 s[4:11], s[0:1], 0xd
+; GCN-NEXT:    s_mov_b32 s17, 0x4f800000
+; GCN-NEXT:    s_load_dwordx2 s[12:13], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s15, 0xf000
+; GCN-NEXT:    s_mov_b32 s14, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_ashr_i32 s2, s16, 31
-; GCN-NEXT:    s_add_i32 s3, s16, s2
-; GCN-NEXT:    s_xor_b32 s5, s3, s2
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s5
-; GCN-NEXT:    s_mov_b32 s16, 0x4f800000
-; GCN-NEXT:    s_ashr_i32 s6, s12, 31
-; GCN-NEXT:    s_ashr_i32 s2, s17, 31
+; GCN-NEXT:    s_ashr_i32 s2, s8, 31
+; GCN-NEXT:    s_add_i32 s3, s8, s2
+; GCN-NEXT:    s_xor_b32 s16, s3, s2
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s16
+; GCN-NEXT:    s_ashr_i32 s2, s9, 31
+; GCN-NEXT:    s_add_i32 s3, s9, s2
+; GCN-NEXT:    s_xor_b32 s9, s3, s2
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v0, v0
-; GCN-NEXT:    s_add_i32 s0, s12, s6
-; GCN-NEXT:    s_add_i32 s3, s17, s2
-; GCN-NEXT:    s_xor_b32 s4, s0, s6
-; GCN-NEXT:    v_mul_f32_e32 v0, s16, v0
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s9
+; GCN-NEXT:    s_ashr_i32 s8, s4, 31
+; GCN-NEXT:    s_add_i32 s4, s4, s8
+; GCN-NEXT:    v_mul_f32_e32 v0, s17, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    s_xor_b32 s17, s3, s2
-; GCN-NEXT:    s_ashr_i32 s7, s13, 31
-; GCN-NEXT:    s_add_i32 s12, s13, s7
-; GCN-NEXT:    v_mul_lo_u32 v1, v0, s5
-; GCN-NEXT:    v_mul_hi_u32 v2, v0, s5
-; GCN-NEXT:    s_xor_b32 s12, s12, s7
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, 0, v1
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v2
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v1, v1, v0
-; GCN-NEXT:    v_cvt_f32_u32_e32 v2, s17
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v1, v0
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v1, v0
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v2
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v3, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v0, v0, s4
-; GCN-NEXT:    v_mul_f32_e32 v1, s16, v1
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v1
+; GCN-NEXT:    s_xor_b32 s4, s4, s8
+; GCN-NEXT:    v_mul_lo_u32 v2, v0, s16
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, s16
+; GCN-NEXT:    v_mul_f32_e32 v1, s17, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    v_mul_lo_u32 v0, v0, s5
-; GCN-NEXT:    v_mul_lo_u32 v4, v1, s17
-; GCN-NEXT:    v_mul_hi_u32 v5, v1, s17
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s4, v0
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v2
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v4, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, v0
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v2, v0
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v2, v0
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v3, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v0, v0, s4
+; GCN-NEXT:    v_mul_lo_u32 v2, v1, s9
+; GCN-NEXT:    v_mul_hi_u32 v3, v1, s9
+; GCN-NEXT:    v_mul_lo_u32 v0, v0, s16
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v2
+; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s4, v0
 ; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s4, v0
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s5, v2
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, s5, v2
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s5, v2
-; GCN-NEXT:    v_sub_i32_e32 v6, vcc, 0, v4
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v5
-; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v6, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v4, v4, v1
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v4, v1
-; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v4, v1
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s16, v5
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, s16, v5
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s16, v5
 ; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    s_ashr_i32 s0, s18, 31
-; GCN-NEXT:    s_add_i32 s1, s18, s0
-; GCN-NEXT:    s_xor_b32 s13, s1, s0
-; GCN-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc
-; GCN-NEXT:    v_cvt_f32_u32_e32 v2, s13
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v5, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v1, v1, s12
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v3, v0, s[2:3]
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v4, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, v1
+; GCN-NEXT:    v_cndmask_b32_e32 v0, v5, v0, vcc
+; GCN-NEXT:    s_ashr_i32 s4, s5, 31
+; GCN-NEXT:    s_add_i32 s5, s5, s4
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v2, v1
+; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v2, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[0:1]
+; GCN-NEXT:    s_ashr_i32 s0, s10, 31
+; GCN-NEXT:    s_add_i32 s1, s10, s0
+; GCN-NEXT:    s_xor_b32 s10, s1, s0
+; GCN-NEXT:    v_cvt_f32_u32_e32 v2, s10
+; GCN-NEXT:    s_xor_b32 s5, s5, s4
+; GCN-NEXT:    v_mul_hi_u32 v1, v1, s5
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v6, v0, s[2:3]
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v2
-; GCN-NEXT:    v_xor_b32_e32 v0, s6, v0
-; GCN-NEXT:    v_mul_lo_u32 v1, v1, s17
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s6, v0
-; GCN-NEXT:    v_mul_f32_e32 v2, s16, v2
+; GCN-NEXT:    v_xor_b32_e32 v0, s8, v0
+; GCN-NEXT:    v_mul_lo_u32 v1, v1, s9
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s8, v0
+; GCN-NEXT:    v_mul_f32_e32 v2, s17, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s12, v1
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s12, v1
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s17, v3
-; GCN-NEXT:    v_mul_lo_u32 v5, v2, s13
-; GCN-NEXT:    v_mul_hi_u32 v6, v2, s13
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, s17, v3
-; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, s17, v3
-; GCN-NEXT:    v_sub_i32_e32 v7, vcc, 0, v5
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v6
-; GCN-NEXT:    v_cndmask_b32_e64 v5, v5, v7, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v5, v5, v2
-; GCN-NEXT:    s_ashr_i32 s6, s14, 31
-; GCN-NEXT:    s_add_i32 s12, s14, s6
-; GCN-NEXT:    s_xor_b32 s12, s12, s6
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v5, v2
-; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v5, v2
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s5, v1
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s5, v1
+; GCN-NEXT:    s_ashr_i32 s8, s6, 31
+; GCN-NEXT:    v_mul_lo_u32 v5, v2, s10
+; GCN-NEXT:    v_mul_hi_u32 v6, v2, s10
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s9, v3
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, s9, v3
+; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, s9, v3
+; GCN-NEXT:    s_add_i32 s5, s6, s8
 ; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    s_ashr_i32 s0, s19, 31
-; GCN-NEXT:    s_add_i32 s1, s19, s0
-; GCN-NEXT:    s_xor_b32 s14, s1, s0
+; GCN-NEXT:    s_ashr_i32 s6, s11, 31
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc
-; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s14
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v6, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v2, v2, s12
+; GCN-NEXT:    s_add_i32 s9, s11, s6
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, 0, v5
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v6
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v5, v3, s[0:1]
+; GCN-NEXT:    s_xor_b32 s9, s9, s6
+; GCN-NEXT:    v_mul_hi_u32 v3, v3, v2
+; GCN-NEXT:    v_cvt_f32_u32_e32 v6, s9
+; GCN-NEXT:    s_xor_b32 s5, s5, s8
 ; GCN-NEXT:    v_cndmask_b32_e64 v1, v4, v1, s[2:3]
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v3
-; GCN-NEXT:    v_xor_b32_e32 v1, s7, v1
-; GCN-NEXT:    v_mul_lo_u32 v2, v2, s13
-; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, s7, v1
-; GCN-NEXT:    v_mul_f32_e32 v3, s16, v3
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v3, v2
+; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v3, v2
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v6
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v5, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, s5
+; GCN-NEXT:    v_xor_b32_e32 v1, s4, v1
+; GCN-NEXT:    v_mul_f32_e32 v3, s17, v3
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
-; GCN-NEXT:    s_ashr_i32 s7, s15, 31
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s12, v2
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s12, v2
-; GCN-NEXT:    v_mul_lo_u32 v6, v3, s14
-; GCN-NEXT:    v_mul_hi_u32 v7, v3, s14
-; GCN-NEXT:    s_add_i32 s12, s15, s7
-; GCN-NEXT:    s_xor_b32 s12, s12, s7
-; GCN-NEXT:    v_sub_i32_e32 v8, vcc, 0, v6
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v7
-; GCN-NEXT:    v_cndmask_b32_e64 v6, v6, v8, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v6, v6, v3
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s13, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, s13, v4
-; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, s13, v4
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v6, v3
-; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v6, v3
-; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v7, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v3, v3, s12
-; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v5, v2, s[2:3]
-; GCN-NEXT:    v_mul_lo_u32 v3, v3, s14
-; GCN-NEXT:    v_xor_b32_e32 v2, s6, v2
-; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, s6, v2
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s12, v3
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s12, v3
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s14, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, s14, v4
-; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, s14, v4
+; GCN-NEXT:    v_mul_lo_u32 v2, v2, s10
+; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, s4, v1
+; GCN-NEXT:    s_ashr_i32 s6, s7, 31
+; GCN-NEXT:    v_mul_lo_u32 v5, v3, s9
+; GCN-NEXT:    v_mul_hi_u32 v6, v3, s9
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s5, v2
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s5, v2
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, 0, v5
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v6
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v5, v2, s[4:5]
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, v3
+; GCN-NEXT:    s_add_i32 s7, s7, s6
+; GCN-NEXT:    s_xor_b32 s7, s7, s6
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s10, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v2, v3
+; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v2, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v5, s[4:5]
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, s7
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, s10, v4
+; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, s10, v4
 ; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
 ; GCN-NEXT:    v_cndmask_b32_e32 v3, v4, v3, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, s9
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v7, v3, s[2:3]
+; GCN-NEXT:    v_xor_b32_e32 v2, s8, v2
+; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, s8, v2
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s7, v4
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s7, v4
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s9, v3
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, s9, v3
+; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, s9, v3
+; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
+; GCN-NEXT:    v_cndmask_b32_e32 v3, v3, v4, vcc
 ; GCN-NEXT:    v_cndmask_b32_e64 v3, v5, v3, s[2:3]
-; GCN-NEXT:    v_xor_b32_e32 v3, s7, v3
-; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, s7, v3
-; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[8:11], 0
+; GCN-NEXT:    v_xor_b32_e32 v3, s6, v3
+; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, s6, v3
+; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[12:15], 0
 ; GCN-NEXT:    s_endpgm
   %r = srem <4 x i32> %x, %y
   store <4 x i32> %r, <4 x i32> addrspace(1)* %out
@@ -2101,50 +2102,50 @@
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s9
 ; GCN-NEXT:    s_lshr_b32 s9, s0, 16
 ; GCN-NEXT:    s_and_b32 s0, s0, s8
-; GCN-NEXT:    s_lshr_b32 s2, s2, 16
-; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s2
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s0
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
-; GCN-NEXT:    v_cvt_f32_u32_e32 v4, s9
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v3
-; GCN-NEXT:    s_and_b32 s2, s3, s8
+; GCN-NEXT:    s_lshr_b32 s2, s2, 16
+; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s2
+; GCN-NEXT:    v_cvt_f32_u32_e32 v5, s9
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v2
 ; GCN-NEXT:    v_mad_f32 v1, -v2, v0, v1
-; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v6, v3
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
-; GCN-NEXT:    v_mul_f32_e32 v1, v4, v5
-; GCN-NEXT:    v_trunc_f32_e32 v1, v1
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
-; GCN-NEXT:    v_mad_f32 v2, -v1, v3, v4
+; GCN-NEXT:    s_and_b32 s2, s3, s8
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v4, vcc
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v4, s2
+; GCN-NEXT:    v_mul_f32_e32 v1, v5, v6
 ; GCN-NEXT:    s_lshr_b32 s0, s1, 16
-; GCN-NEXT:    s_and_b32 s1, s1, s8
 ; GCN-NEXT:    s_lshr_b32 s10, s3, 16
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v3
+; GCN-NEXT:    v_trunc_f32_e32 v1, v1
+; GCN-NEXT:    s_and_b32 s1, s1, s8
+; GCN-NEXT:    v_mad_f32 v2, -v1, v3, v5
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s10
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v5, s1
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v6, v4
+; GCN-NEXT:    v_cvt_f32_u32_e32 v7, s10
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v3
 ; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v1, vcc
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v7, v3
-; GCN-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
 ; GCN-NEXT:    v_mul_f32_e32 v1, v5, v6
-; GCN-NEXT:    v_cvt_f32_u32_e32 v6, s0
+; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s0
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v6, v7
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-NEXT:    v_mad_f32 v5, -v1, v4, v5
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v5|, v4
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    v_mul_f32_e32 v4, v6, v7
-; GCN-NEXT:    v_trunc_f32_e32 v4, v4
-; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v4
+; GCN-NEXT:    v_mul_f32_e32 v6, v3, v6
+; GCN-NEXT:    v_trunc_f32_e32 v6, v6
+; GCN-NEXT:    v_cvt_u32_f32_e32 v8, v6
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v5|, v4
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
-; GCN-NEXT:    v_mad_f32 v4, -v4, v3, v6
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, v3
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v5, vcc
-; GCN-NEXT:    v_and_b32_e32 v0, s8, v0
+; GCN-NEXT:    v_mad_f32 v3, -v6, v7, v3
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, v7
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v8, vcc
 ; GCN-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
 ; GCN-NEXT:    v_and_b32_e32 v1, s8, v1
+; GCN-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
+; GCN-NEXT:    v_and_b32_e32 v0, s8, v0
 ; GCN-NEXT:    v_or_b32_e32 v1, v1, v3
 ; GCN-NEXT:    v_or_b32_e32 v0, v0, v2
 ; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
@@ -2258,60 +2259,60 @@
 ; GCN-NEXT:    s_and_b32 s9, s2, s8
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s9
 ; GCN-NEXT:    s_and_b32 s10, s0, s8
-; GCN-NEXT:    s_lshr_b32 s11, s2, 16
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s10
+; GCN-NEXT:    s_lshr_b32 s11, s2, 16
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s11
 ; GCN-NEXT:    s_lshr_b32 s9, s0, 16
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v4, s9
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v3
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-NEXT:    v_mad_f32 v1, -v2, v0, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v3
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
-; GCN-NEXT:    v_mul_f32_e32 v1, v4, v5
-; GCN-NEXT:    v_trunc_f32_e32 v1, v1
+; GCN-NEXT:    s_lshr_b32 s12, s3, 16
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
-; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v1
-; GCN-NEXT:    v_mad_f32 v1, -v1, v3, v4
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v3
+; GCN-NEXT:    v_mul_f32_e32 v1, v4, v5
 ; GCN-NEXT:    v_mul_lo_u32 v0, v0, s2
+; GCN-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-NEXT:    s_and_b32 s2, s3, s8
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v2, vcc
-; GCN-NEXT:    v_cvt_f32_u32_e32 v2, s2
+; GCN-NEXT:    v_mad_f32 v2, -v1, v3, v4
+; GCN-NEXT:    v_cvt_f32_u32_e32 v4, s2
 ; GCN-NEXT:    s_and_b32 s2, s1, s8
-; GCN-NEXT:    v_mul_lo_u32 v1, v1, s11
-; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s2
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v2
-; GCN-NEXT:    s_lshr_b32 s12, s3, 16
-; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s9, v1
-; GCN-NEXT:    s_lshr_b32 s10, s1, 16
-; GCN-NEXT:    v_mul_f32_e32 v1, v3, v4
-; GCN-NEXT:    v_cvt_f32_u32_e32 v4, s12
-; GCN-NEXT:    v_cvt_f32_u32_e32 v6, s10
-; GCN-NEXT:    v_trunc_f32_e32 v1, v1
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v7, v4
-; GCN-NEXT:    v_mad_f32 v3, -v1, v2, v3
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, v2
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v3
+; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s12
+; GCN-NEXT:    v_cvt_f32_u32_e32 v5, s2
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v6, v4
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    v_mul_f32_e32 v2, v6, v7
+; GCN-NEXT:    s_lshr_b32 s10, s1, 16
+; GCN-NEXT:    v_cvt_f32_u32_e32 v7, s10
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v8, v3
+; GCN-NEXT:    v_mul_f32_e32 v2, v5, v6
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v2
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
-; GCN-NEXT:    v_mad_f32 v2, -v2, v4, v6
+; GCN-NEXT:    v_cvt_u32_f32_e32 v6, v2
+; GCN-NEXT:    v_mad_f32 v2, -v2, v4, v5
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v4
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v3, vcc
-; GCN-NEXT:    v_mul_lo_u32 v1, v1, s3
-; GCN-NEXT:    v_mul_lo_u32 v2, v2, s12
-; GCN-NEXT:    v_and_b32_e32 v0, s8, v0
-; GCN-NEXT:    v_sub_i32_e32 v1, vcc, s1, v1
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s10, v2
+; GCN-NEXT:    v_mul_f32_e32 v4, v7, v8
+; GCN-NEXT:    v_trunc_f32_e32 v4, v4
+; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v4
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v6, vcc
+; GCN-NEXT:    v_mad_f32 v4, -v4, v3, v7
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, v3
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v5, vcc
+; GCN-NEXT:    v_mul_lo_u32 v1, v1, s11
+; GCN-NEXT:    v_mul_lo_u32 v2, v2, s3
+; GCN-NEXT:    v_mul_lo_u32 v3, v3, s12
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s9, v1
+; GCN-NEXT:    v_sub_i32_e32 v1, vcc, s1, v2
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s10, v3
 ; GCN-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
 ; GCN-NEXT:    v_and_b32_e32 v1, s8, v1
 ; GCN-NEXT:    v_or_b32_e32 v1, v1, v2
-; GCN-NEXT:    v_lshlrev_b32_e32 v2, 16, v5
+; GCN-NEXT:    v_lshlrev_b32_e32 v2, 16, v4
+; GCN-NEXT:    v_and_b32_e32 v0, s8, v0
 ; GCN-NEXT:    v_or_b32_e32 v0, v0, v2
 ; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
 ; GCN-NEXT:    s_endpgm
@@ -2622,83 +2623,83 @@
 ; GCN-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_sext_i32_i16 s8, s2
-; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s8
-; GCN-NEXT:    s_sext_i32_i16 s9, s0
-; GCN-NEXT:    v_cvt_f32_i32_e32 v1, s9
-; GCN-NEXT:    s_xor_b32 s8, s9, s8
+; GCN-NEXT:    s_sext_i32_i16 s9, s2
+; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s9
+; GCN-NEXT:    s_sext_i32_i16 s8, s0
+; GCN-NEXT:    v_cvt_f32_i32_e32 v1, s8
+; GCN-NEXT:    s_xor_b32 s9, s8, s9
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
-; GCN-NEXT:    s_ashr_i32 s8, s8, 30
+; GCN-NEXT:    s_ashr_i32 s8, s9, 30
 ; GCN-NEXT:    s_or_b32 s8, s8, 1
-; GCN-NEXT:    v_mov_b32_e32 v3, s8
+; GCN-NEXT:    s_ashr_i32 s10, s2, 16
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_cvt_i32_f32_e32 v4, v2
 ; GCN-NEXT:    v_mad_f32 v1, -v2, v0, v1
-; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v0|
+; GCN-NEXT:    v_mov_b32_e32 v3, s8
+; GCN-NEXT:    v_cvt_f32_i32_e32 v1, s10
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
 ; GCN-NEXT:    v_mul_lo_u32 v0, v0, s2
-; GCN-NEXT:    s_ashr_i32 s2, s2, 16
-; GCN-NEXT:    v_cvt_f32_i32_e32 v1, s2
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
-; GCN-NEXT:    s_ashr_i32 s0, s0, 16
-; GCN-NEXT:    v_cvt_f32_i32_e32 v2, s0
+; GCN-NEXT:    s_ashr_i32 s2, s0, 16
+; GCN-NEXT:    v_cvt_f32_i32_e32 v2, s2
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v1
-; GCN-NEXT:    s_xor_b32 s8, s0, s2
+; GCN-NEXT:    s_xor_b32 s8, s2, s10
 ; GCN-NEXT:    s_ashr_i32 s8, s8, 30
 ; GCN-NEXT:    s_or_b32 s8, s8, 1
 ; GCN-NEXT:    v_mul_f32_e32 v3, v2, v3
 ; GCN-NEXT:    v_trunc_f32_e32 v3, v3
 ; GCN-NEXT:    v_mad_f32 v2, -v3, v1, v2
-; GCN-NEXT:    v_cvt_i32_f32_e32 v3, v3
 ; GCN-NEXT:    v_mov_b32_e32 v4, s8
+; GCN-NEXT:    s_sext_i32_i16 s8, s3
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v1|
+; GCN-NEXT:    v_cvt_i32_f32_e32 v3, v3
+; GCN-NEXT:    v_cvt_f32_i32_e32 v2, s8
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, 0, v4, vcc
+; GCN-NEXT:    s_sext_i32_i16 s9, s1
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    v_mul_lo_u32 v1, v1, s2
-; GCN-NEXT:    s_sext_i32_i16 s2, s3
-; GCN-NEXT:    v_cvt_f32_i32_e32 v2, s2
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s0, v1
-; GCN-NEXT:    s_sext_i32_i16 s0, s1
-; GCN-NEXT:    v_cvt_f32_i32_e32 v1, s0
+; GCN-NEXT:    v_cvt_f32_i32_e32 v3, s9
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v2
-; GCN-NEXT:    s_xor_b32 s0, s0, s2
-; GCN-NEXT:    s_ashr_i32 s0, s0, 30
-; GCN-NEXT:    s_or_b32 s0, s0, 1
-; GCN-NEXT:    v_mul_f32_e32 v4, v1, v4
+; GCN-NEXT:    s_xor_b32 s8, s9, s8
+; GCN-NEXT:    s_ashr_i32 s8, s8, 30
+; GCN-NEXT:    s_or_b32 s8, s8, 1
+; GCN-NEXT:    v_mul_f32_e32 v4, v3, v4
 ; GCN-NEXT:    v_trunc_f32_e32 v4, v4
-; GCN-NEXT:    v_mad_f32 v1, -v4, v2, v1
-; GCN-NEXT:    v_mov_b32_e32 v5, s0
-; GCN-NEXT:    s_ashr_i32 s0, s3, 16
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v2|
+; GCN-NEXT:    v_mad_f32 v3, -v4, v2, v3
 ; GCN-NEXT:    v_cvt_i32_f32_e32 v4, v4
-; GCN-NEXT:    v_cvt_f32_i32_e32 v2, s0
-; GCN-NEXT:    v_cndmask_b32_e32 v1, 0, v5, vcc
-; GCN-NEXT:    s_ashr_i32 s2, s1, 16
-; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v4
-; GCN-NEXT:    v_cvt_f32_i32_e32 v4, s2
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v2
-; GCN-NEXT:    v_mul_lo_u32 v1, v1, s3
-; GCN-NEXT:    s_xor_b32 s3, s2, s0
-; GCN-NEXT:    s_ashr_i32 s3, s3, 30
+; GCN-NEXT:    v_mov_b32_e32 v5, s8
+; GCN-NEXT:    s_ashr_i32 s8, s3, 16
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
+; GCN-NEXT:    v_cvt_f32_i32_e32 v3, s8
+; GCN-NEXT:    v_cndmask_b32_e32 v2, 0, v5, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
+; GCN-NEXT:    v_mul_lo_u32 v2, v2, s3
+; GCN-NEXT:    s_ashr_i32 s3, s1, 16
+; GCN-NEXT:    v_cvt_f32_i32_e32 v4, s3
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v3
+; GCN-NEXT:    s_xor_b32 s9, s3, s8
+; GCN-NEXT:    s_ashr_i32 s9, s9, 30
+; GCN-NEXT:    s_or_b32 s9, s9, 1
 ; GCN-NEXT:    v_mul_f32_e32 v5, v4, v5
 ; GCN-NEXT:    v_trunc_f32_e32 v5, v5
-; GCN-NEXT:    v_mad_f32 v4, -v5, v2, v4
+; GCN-NEXT:    v_mad_f32 v4, -v5, v3, v4
 ; GCN-NEXT:    v_cvt_i32_f32_e32 v5, v5
-; GCN-NEXT:    s_or_b32 s3, s3, 1
-; GCN-NEXT:    v_mov_b32_e32 v6, s3
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, |v2|
-; GCN-NEXT:    v_cndmask_b32_e32 v2, 0, v6, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
-; GCN-NEXT:    v_mul_lo_u32 v2, v2, s0
+; GCN-NEXT:    v_mov_b32_e32 v6, s9
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, |v3|
+; GCN-NEXT:    v_cndmask_b32_e32 v3, 0, v6, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
+; GCN-NEXT:    v_mul_lo_u32 v1, v1, s10
+; GCN-NEXT:    v_mul_lo_u32 v3, v3, s8
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
 ; GCN-NEXT:    s_mov_b32 s0, 0xffff
-; GCN-NEXT:    v_sub_i32_e32 v1, vcc, s1, v1
-; GCN-NEXT:    v_and_b32_e32 v1, s0, v1
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s2, v2
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s2, v1
+; GCN-NEXT:    v_sub_i32_e32 v1, vcc, s1, v2
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s3, v3
 ; GCN-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
+; GCN-NEXT:    v_and_b32_e32 v1, s0, v1
 ; GCN-NEXT:    v_or_b32_e32 v1, v1, v2
-; GCN-NEXT:    v_lshlrev_b32_e32 v2, 16, v3
+; GCN-NEXT:    v_lshlrev_b32_e32 v2, 16, v4
 ; GCN-NEXT:    v_and_b32_e32 v0, s0, v0
 ; GCN-NEXT:    v_or_b32_e32 v0, v0, v2
 ; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
@@ -2782,27 +2783,27 @@
 ;
 ; GCN-LABEL: urem_i3:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dword s0, s[0:1], 0xb
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    s_load_dword s4, s[0:1], 0xb
+; GCN-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_bfe_u32 s1, s0, 0x30008
-; GCN-NEXT:    v_cvt_f32_ubyte0_e32 v0, s1
+; GCN-NEXT:    s_bfe_u32 s2, s4, 0x30008
+; GCN-NEXT:    v_cvt_f32_ubyte0_e32 v0, s2
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v0
-; GCN-NEXT:    s_and_b32 s2, s0, 7
+; GCN-NEXT:    s_and_b32 s2, s4, 7
 ; GCN-NEXT:    v_cvt_f32_ubyte0_e32 v2, s2
-; GCN-NEXT:    s_lshr_b32 s1, s0, 8
+; GCN-NEXT:    s_lshr_b32 s2, s4, 8
 ; GCN-NEXT:    v_mul_f32_e32 v1, v2, v1
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v1
 ; GCN-NEXT:    v_mad_f32 v1, -v1, v0, v2
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v3, vcc
-; GCN-NEXT:    v_mul_lo_u32 v0, v0, s1
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
+; GCN-NEXT:    v_mul_lo_u32 v0, v0, s2
+; GCN-NEXT:    s_mov_b32 s2, -1
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s4, v0
 ; GCN-NEXT:    v_and_b32_e32 v0, 7, v0
-; GCN-NEXT:    buffer_store_byte v0, off, s[4:7], 0
+; GCN-NEXT:    buffer_store_byte v0, off, s[0:3], 0
 ; GCN-NEXT:    s_endpgm
   %r = urem i3 %x, %y
   store i3 %r, i3 addrspace(1)* %out
@@ -2896,32 +2897,32 @@
 ;
 ; GCN-LABEL: srem_i3:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dword s0, s[0:1], 0xb
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    s_load_dword s4, s[0:1], 0xb
+; GCN-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_bfe_i32 s1, s0, 0x30008
-; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s1
-; GCN-NEXT:    s_bfe_i32 s3, s0, 0x30000
-; GCN-NEXT:    v_cvt_f32_i32_e32 v1, s3
-; GCN-NEXT:    s_xor_b32 s1, s3, s1
+; GCN-NEXT:    s_bfe_i32 s2, s4, 0x30008
+; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s2
+; GCN-NEXT:    s_bfe_i32 s5, s4, 0x30000
+; GCN-NEXT:    v_cvt_f32_i32_e32 v1, s5
+; GCN-NEXT:    s_xor_b32 s2, s5, s2
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
-; GCN-NEXT:    s_ashr_i32 s1, s1, 30
-; GCN-NEXT:    s_or_b32 s1, s1, 1
-; GCN-NEXT:    v_mov_b32_e32 v3, s1
+; GCN-NEXT:    s_ashr_i32 s2, s2, 30
+; GCN-NEXT:    s_or_b32 s2, s2, 1
+; GCN-NEXT:    v_mov_b32_e32 v3, s2
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-NEXT:    v_mad_f32 v1, -v2, v0, v1
 ; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v0|
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
-; GCN-NEXT:    s_lshr_b32 s2, s0, 8
+; GCN-NEXT:    s_lshr_b32 s3, s4, 8
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
-; GCN-NEXT:    v_mul_lo_u32 v0, v0, s2
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
+; GCN-NEXT:    v_mul_lo_u32 v0, v0, s3
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
+; GCN-NEXT:    s_mov_b32 s2, -1
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s4, v0
 ; GCN-NEXT:    v_and_b32_e32 v0, 7, v0
-; GCN-NEXT:    buffer_store_byte v0, off, s[4:7], 0
+; GCN-NEXT:    buffer_store_byte v0, off, s[0:3], 0
 ; GCN-NEXT:    s_endpgm
   %r = srem i3 %x, %y
   store i3 %r, i3 addrspace(1)* %out
@@ -3004,41 +3005,41 @@
 ; GCN-NEXT:    s_and_b32 s6, s0, s8
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s6
 ; GCN-NEXT:    s_and_b32 s6, s2, s8
-; GCN-NEXT:    s_lshr_b32 s0, s0, 16
-; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s0
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s6
+; GCN-NEXT:    s_lshr_b32 s0, s0, 16
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
+; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s0
 ; GCN-NEXT:    s_lshr_b32 s0, s2, 16
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v4, s0
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v3
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-NEXT:    v_mad_f32 v1, -v2, v0, v1
-; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
-; GCN-NEXT:    v_mul_f32_e32 v1, v4, v5
-; GCN-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-NEXT:    s_and_b32 s0, s1, s8
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
-; GCN-NEXT:    v_mad_f32 v2, -v1, v3, v4
-; GCN-NEXT:    v_cvt_f32_u32_e32 v4, s0
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s0
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v3
 ; GCN-NEXT:    s_and_b32 s0, s3, s8
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v6, v1
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
+; GCN-NEXT:    v_mul_f32_e32 v2, v4, v5
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v5, s0
-; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v6, v4
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v3
-; GCN-NEXT:    s_mov_b32 s6, -1
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
-; GCN-NEXT:    v_mul_f32_e32 v2, v5, v6
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v2
-; GCN-NEXT:    v_mad_f32 v2, -v2, v4, v5
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v4
-; GCN-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
-; GCN-NEXT:    v_and_b32_e32 v0, s8, v0
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v3, vcc
-; GCN-NEXT:    v_or_b32_e32 v0, v0, v1
-; GCN-NEXT:    buffer_store_short v2, off, s[4:7], 0 offset:4
+; GCN-NEXT:    v_mad_f32 v4, -v2, v3, v4
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    v_mul_f32_e32 v6, v5, v6
+; GCN-NEXT:    v_trunc_f32_e32 v6, v6
+; GCN-NEXT:    v_cvt_u32_f32_e32 v7, v6
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, v3
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v2, vcc
+; GCN-NEXT:    v_mad_f32 v3, -v6, v1, v5
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, v1
+; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v7, vcc
+; GCN-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
+; GCN-NEXT:    v_and_b32_e32 v0, s8, v0
+; GCN-NEXT:    v_or_b32_e32 v0, v0, v2
+; GCN-NEXT:    buffer_store_short v1, off, s[4:7], 0 offset:4
 ; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
 ; GCN-NEXT:    s_endpgm
   %r = udiv <3 x i16> %x, %y
@@ -3125,52 +3126,52 @@
 ; GCN-NEXT:    s_mov_b32 s8, 0xffff
 ; GCN-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    v_mov_b32_e32 v1, s2
+; GCN-NEXT:    v_mov_b32_e32 v3, s2
 ; GCN-NEXT:    s_and_b32 s6, s0, s8
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s6
 ; GCN-NEXT:    s_and_b32 s6, s2, s8
-; GCN-NEXT:    v_cvt_f32_u32_e32 v2, s6
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s6
 ; GCN-NEXT:    v_mov_b32_e32 v4, s0
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v0
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
 ; GCN-NEXT:    v_alignbit_b32 v4, s1, v4, 16
 ; GCN-NEXT:    v_and_b32_e32 v5, s8, v4
-; GCN-NEXT:    v_alignbit_b32 v1, s3, v1, 16
-; GCN-NEXT:    v_mul_f32_e32 v3, v2, v3
-; GCN-NEXT:    v_trunc_f32_e32 v3, v3
-; GCN-NEXT:    v_mad_f32 v2, -v3, v0, v2
-; GCN-NEXT:    v_cvt_u32_f32_e32 v6, v3
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v0
-; GCN-NEXT:    v_cvt_f32_u32_e32 v2, v5
-; GCN-NEXT:    v_and_b32_e32 v3, s8, v1
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v6, vcc
+; GCN-NEXT:    v_cvt_f32_u32_e32 v5, v5
+; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
+; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_mad_f32 v1, -v2, v0, v1
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
+; GCN-NEXT:    v_alignbit_b32 v3, s3, v3, 16
+; GCN-NEXT:    v_and_b32_e32 v6, s8, v3
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v0, v0, s0
 ; GCN-NEXT:    s_and_b32 s0, s1, s8
-; GCN-NEXT:    v_cvt_f32_u32_e32 v3, v3
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v2
-; GCN-NEXT:    v_cvt_f32_u32_e32 v6, s0
+; GCN-NEXT:    v_cvt_f32_u32_e32 v2, s0
+; GCN-NEXT:    v_cvt_f32_u32_e32 v6, v6
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v7, v5
 ; GCN-NEXT:    s_and_b32 s0, s3, s8
-; GCN-NEXT:    v_cvt_f32_u32_e32 v7, s0
-; GCN-NEXT:    v_mul_f32_e32 v5, v3, v5
+; GCN-NEXT:    v_cvt_f32_u32_e32 v8, s0
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v9, v2
+; GCN-NEXT:    v_mul_f32_e32 v1, v6, v7
+; GCN-NEXT:    v_trunc_f32_e32 v1, v1
+; GCN-NEXT:    v_cvt_u32_f32_e32 v7, v1
+; GCN-NEXT:    v_mad_f32 v1, -v1, v5, v6
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v5
+; GCN-NEXT:    v_mul_f32_e32 v5, v8, v9
 ; GCN-NEXT:    v_trunc_f32_e32 v5, v5
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v8, v6
-; GCN-NEXT:    v_mad_f32 v3, -v5, v2, v3
-; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v5
+; GCN-NEXT:    v_cvt_u32_f32_e32 v6, v5
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v7, vcc
+; GCN-NEXT:    v_mul_lo_u32 v1, v1, v4
+; GCN-NEXT:    v_mad_f32 v4, -v5, v2, v8
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, v2
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v6, vcc
+; GCN-NEXT:    v_mul_lo_u32 v2, v2, s1
 ; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s2, v0
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, v2
-; GCN-NEXT:    v_mul_f32_e32 v3, v7, v8
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v5, vcc
-; GCN-NEXT:    v_trunc_f32_e32 v3, v3
-; GCN-NEXT:    v_mul_lo_u32 v2, v2, v4
-; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v3
-; GCN-NEXT:    v_mad_f32 v3, -v3, v6, v7
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, v6
+; GCN-NEXT:    v_sub_i32_e32 v1, vcc, v3, v1
 ; GCN-NEXT:    s_mov_b32 s6, -1
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v4, vcc
-; GCN-NEXT:    v_mul_lo_u32 v3, v3, s1
-; GCN-NEXT:    v_sub_i32_e32 v1, vcc, v1, v2
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s3, v2
 ; GCN-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
 ; GCN-NEXT:    v_and_b32_e32 v0, s8, v0
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s3, v3
 ; GCN-NEXT:    v_or_b32_e32 v0, v0, v1
 ; GCN-NEXT:    buffer_store_short v2, off, s[4:7], 0 offset:4
 ; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
@@ -3414,51 +3415,49 @@
 ; GCN-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0xd
 ; GCN-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_sext_i32_i16 s8, s2
-; GCN-NEXT:    s_sext_i32_i16 s6, s0
-; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s6
-; GCN-NEXT:    v_cvt_f32_i32_e32 v1, s8
-; GCN-NEXT:    s_xor_b32 s6, s8, s6
-; GCN-NEXT:    s_ashr_i32 s6, s6, 30
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
+; GCN-NEXT:    s_sext_i32_i16 s6, s2
+; GCN-NEXT:    s_sext_i32_i16 s8, s0
+; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s8
+; GCN-NEXT:    v_cvt_f32_i32_e32 v2, s6
+; GCN-NEXT:    s_xor_b32 s8, s6, s8
+; GCN-NEXT:    s_ashr_i32 s6, s8, 30
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v0
 ; GCN-NEXT:    s_or_b32 s6, s6, 1
-; GCN-NEXT:    v_mov_b32_e32 v3, s6
-; GCN-NEXT:    s_mov_b32 s6, -1
-; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
-; GCN-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-NEXT:    v_mad_f32 v1, -v2, v0, v1
-; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v0|
-; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
+; GCN-NEXT:    v_mov_b32_e32 v4, s6
 ; GCN-NEXT:    v_mov_b32_e32 v1, s2
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_mul_f32_e32 v3, v2, v3
+; GCN-NEXT:    v_trunc_f32_e32 v3, v3
+; GCN-NEXT:    v_mad_f32 v2, -v3, v0, v2
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v0|
 ; GCN-NEXT:    v_mov_b32_e32 v2, s0
 ; GCN-NEXT:    v_alignbit_b32 v2, s1, v2, 16
+; GCN-NEXT:    v_cvt_i32_f32_e32 v5, v3
 ; GCN-NEXT:    v_bfe_i32 v3, v2, 0, 16
+; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v4, vcc
 ; GCN-NEXT:    v_cvt_f32_i32_e32 v4, v3
 ; GCN-NEXT:    v_alignbit_b32 v1, s3, v1, 16
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v5
 ; GCN-NEXT:    v_bfe_i32 v5, v1, 0, 16
 ; GCN-NEXT:    v_cvt_f32_i32_e32 v6, v5
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v7, v4
-; GCN-NEXT:    v_mul_lo_u32 v0, v0, s0
 ; GCN-NEXT:    v_xor_b32_e32 v3, v5, v3
+; GCN-NEXT:    v_mul_lo_u32 v0, v0, s0
 ; GCN-NEXT:    s_sext_i32_i16 s0, s1
 ; GCN-NEXT:    v_mul_f32_e32 v5, v6, v7
 ; GCN-NEXT:    v_trunc_f32_e32 v5, v5
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s2, v0
-; GCN-NEXT:    v_mad_f32 v6, -v5, v4, v6
-; GCN-NEXT:    v_cvt_i32_f32_e32 v5, v5
+; GCN-NEXT:    v_cvt_i32_f32_e32 v7, v5
+; GCN-NEXT:    v_mad_f32 v5, -v5, v4, v6
 ; GCN-NEXT:    v_ashrrev_i32_e32 v3, 30, v3
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v6|, |v4|
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v5|, |v4|
 ; GCN-NEXT:    v_cvt_f32_i32_e32 v4, s0
 ; GCN-NEXT:    v_or_b32_e32 v3, 1, v3
 ; GCN-NEXT:    v_cndmask_b32_e32 v3, 0, v3, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
-; GCN-NEXT:    s_sext_i32_i16 s2, s3
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v7
+; GCN-NEXT:    s_sext_i32_i16 s6, s3
 ; GCN-NEXT:    v_mul_lo_u32 v2, v3, v2
-; GCN-NEXT:    v_cvt_f32_i32_e32 v3, s2
+; GCN-NEXT:    v_cvt_f32_i32_e32 v3, s6
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v4
-; GCN-NEXT:    s_xor_b32 s0, s2, s0
+; GCN-NEXT:    s_xor_b32 s0, s6, s0
 ; GCN-NEXT:    s_ashr_i32 s0, s0, 30
 ; GCN-NEXT:    s_or_b32 s0, s0, 1
 ; GCN-NEXT:    v_mul_f32_e32 v5, v3, v5
@@ -3471,9 +3470,11 @@
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
 ; GCN-NEXT:    v_mul_lo_u32 v3, v3, s1
 ; GCN-NEXT:    v_sub_i32_e32 v1, vcc, v1, v2
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s2, v0
+; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s3, v3
 ; GCN-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
 ; GCN-NEXT:    v_and_b32_e32 v0, 0xffff, v0
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s3, v3
 ; GCN-NEXT:    v_or_b32_e32 v0, v0, v1
 ; GCN-NEXT:    buffer_store_short v2, off, s[4:7], 0 offset:4
 ; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
@@ -3561,41 +3562,41 @@
 ; GCN-NEXT:    s_movk_i32 s3, 0x7fff
 ; GCN-NEXT:    s_and_b32 s9, s0, s3
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s9
-; GCN-NEXT:    v_mov_b32_e32 v2, s0
 ; GCN-NEXT:    s_and_b32 s8, s2, s3
-; GCN-NEXT:    s_bfe_u32 s0, s0, 0xf000f
-; GCN-NEXT:    v_cvt_f32_u32_e32 v5, s0
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s8
+; GCN-NEXT:    v_mov_b32_e32 v2, s0
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v1
-; GCN-NEXT:    s_bfe_u32 s2, s2, 0xf000f
+; GCN-NEXT:    s_bfe_u32 s0, s0, 0xf000f
 ; GCN-NEXT:    v_alignbit_b32 v2, s1, v2, 30
-; GCN-NEXT:    v_cvt_f32_u32_e32 v6, s2
+; GCN-NEXT:    v_cvt_f32_u32_e32 v5, s0
 ; GCN-NEXT:    v_mul_f32_e32 v4, v3, v4
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v7, v5
 ; GCN-NEXT:    v_and_b32_e32 v2, s3, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v4, v4
 ; GCN-NEXT:    v_mad_f32 v3, -v4, v1, v3
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v4
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v2, v2
+; GCN-NEXT:    s_bfe_u32 s2, s2, 0xf000f
+; GCN-NEXT:    v_cvt_f32_u32_e32 v6, s2
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v7, v5
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, v1
-; GCN-NEXT:    v_mul_f32_e32 v1, v6, v7
 ; GCN-NEXT:    v_and_b32_e32 v0, s3, v0
-; GCN-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v4, vcc
-; GCN-NEXT:    v_mad_f32 v4, -v1, v5, v6
-; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v0, v0
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v6, v2
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, v5
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, 0, v1, vcc
-; GCN-NEXT:    v_mul_f32_e32 v1, v0, v6
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v2
+; GCN-NEXT:    v_mul_f32_e32 v1, v6, v7
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
-; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v1
-; GCN-NEXT:    v_mad_f32 v0, -v1, v2, v0
+; GCN-NEXT:    v_mad_f32 v6, -v1, v5, v6
+; GCN-NEXT:    v_mul_f32_e32 v4, v0, v4
+; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
+; GCN-NEXT:    v_trunc_f32_e32 v4, v4
+; GCN-NEXT:    v_cvt_u32_f32_e32 v7, v4
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v6|, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, 0, v1, vcc
+; GCN-NEXT:    v_mad_f32 v0, -v4, v2, v0
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, v2
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v7, vcc
 ; GCN-NEXT:    v_and_b32_e32 v2, s3, v3
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v5, vcc
-; GCN-NEXT:    v_and_b32_e32 v3, s3, v4
+; GCN-NEXT:    v_and_b32_e32 v3, s3, v5
 ; GCN-NEXT:    v_lshl_b64 v[0:1], v[0:1], 30
 ; GCN-NEXT:    v_lshlrev_b32_e32 v3, 15, v3
 ; GCN-NEXT:    v_or_b32_e32 v2, v2, v3
@@ -3693,50 +3694,50 @@
 ; GCN-NEXT:    s_movk_i32 s3, 0x7fff
 ; GCN-NEXT:    s_and_b32 s10, s0, s3
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s10
-; GCN-NEXT:    s_and_b32 s9, s2, s3
-; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s9
-; GCN-NEXT:    v_mov_b32_e32 v2, s0
+; GCN-NEXT:    s_and_b32 s8, s2, s3
+; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s8
+; GCN-NEXT:    s_bfe_u32 s8, s0, 0xf000f
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v1
+; GCN-NEXT:    v_mov_b32_e32 v2, s0
+; GCN-NEXT:    v_cvt_f32_u32_e32 v5, s8
 ; GCN-NEXT:    v_alignbit_b32 v2, s1, v2, 30
-; GCN-NEXT:    s_bfe_u32 s1, s0, 0xf000f
-; GCN-NEXT:    v_cvt_f32_u32_e32 v5, s1
 ; GCN-NEXT:    v_mul_f32_e32 v4, v3, v4
 ; GCN-NEXT:    v_trunc_f32_e32 v4, v4
 ; GCN-NEXT:    v_mad_f32 v3, -v4, v1, v3
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v4
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, v1
-; GCN-NEXT:    s_bfe_u32 s10, s2, 0xf000f
-; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s10
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v4, vcc
-; GCN-NEXT:    v_mul_lo_u32 v1, v1, s0
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v5
 ; GCN-NEXT:    v_and_b32_e32 v2, s3, v2
-; GCN-NEXT:    v_and_b32_e32 v0, s3, v0
-; GCN-NEXT:    v_sub_i32_e32 v6, vcc, s2, v1
-; GCN-NEXT:    v_mul_f32_e32 v1, v3, v4
+; GCN-NEXT:    s_bfe_u32 s9, s2, 0xf000f
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v4, vcc
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v4, v2
-; GCN-NEXT:    v_cvt_f32_u32_e32 v7, v0
-; GCN-NEXT:    v_trunc_f32_e32 v1, v1
-; GCN-NEXT:    v_mad_f32 v3, -v1, v5, v3
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v8, v4
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, v5
-; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    s_lshr_b32 s0, s0, 15
-; GCN-NEXT:    v_mul_f32_e32 v3, v7, v8
+; GCN-NEXT:    v_cvt_f32_u32_e32 v6, s9
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v7, v5
+; GCN-NEXT:    v_and_b32_e32 v0, s3, v0
+; GCN-NEXT:    v_cvt_f32_u32_e32 v8, v0
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v9, v4
+; GCN-NEXT:    v_mul_f32_e32 v3, v6, v7
 ; GCN-NEXT:    v_trunc_f32_e32 v3, v3
-; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v3
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
-; GCN-NEXT:    v_mad_f32 v3, -v3, v4, v7
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, v4
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v5, vcc
+; GCN-NEXT:    v_cvt_u32_f32_e32 v7, v3
+; GCN-NEXT:    v_mad_f32 v3, -v3, v5, v6
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, v5
+; GCN-NEXT:    v_mul_f32_e32 v5, v8, v9
+; GCN-NEXT:    v_trunc_f32_e32 v5, v5
+; GCN-NEXT:    v_cvt_u32_f32_e32 v6, v5
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v7, vcc
+; GCN-NEXT:    v_mad_f32 v5, -v5, v4, v8
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v5|, v4
+; GCN-NEXT:    s_lshr_b32 s1, s0, 15
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, 0, v6, vcc
+; GCN-NEXT:    v_mul_lo_u32 v3, v3, s1
 ; GCN-NEXT:    v_mul_lo_u32 v1, v1, s0
-; GCN-NEXT:    v_mul_lo_u32 v2, v3, v2
-; GCN-NEXT:    s_lshr_b32 s8, s2, 15
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s8, v1
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v2, v0
+; GCN-NEXT:    v_mul_lo_u32 v2, v4, v2
+; GCN-NEXT:    s_lshr_b32 s0, s2, 15
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s0, v3
 ; GCN-NEXT:    v_and_b32_e32 v3, s3, v3
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s2, v1
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v2, v0
 ; GCN-NEXT:    v_lshl_b64 v[0:1], v[0:1], 30
-; GCN-NEXT:    v_and_b32_e32 v2, s3, v6
+; GCN-NEXT:    v_and_b32_e32 v2, s3, v4
 ; GCN-NEXT:    v_lshlrev_b32_e32 v3, 15, v3
 ; GCN-NEXT:    v_or_b32_e32 v2, v2, v3
 ; GCN-NEXT:    v_or_b32_e32 v0, v2, v0
@@ -3880,12 +3881,12 @@
 ; GCN-NEXT:    v_or_b32_e32 v0, 1, v0
 ; GCN-NEXT:    v_mul_f32_e32 v1, v5, v6
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
-; GCN-NEXT:    v_mad_f32 v5, -v1, v4, v5
-; GCN-NEXT:    v_cvt_i32_f32_e32 v1, v1
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v5|, |v4|
+; GCN-NEXT:    v_cvt_i32_f32_e32 v6, v1
+; GCN-NEXT:    v_mad_f32 v1, -v1, v4, v5
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v4|
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
 ; GCN-NEXT:    s_movk_i32 s0, 0x7fff
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v6
 ; GCN-NEXT:    v_and_b32_e32 v3, s0, v3
 ; GCN-NEXT:    v_lshl_b64 v[0:1], v[0:1], 30
 ; GCN-NEXT:    v_and_b32_e32 v2, s0, v2
@@ -3995,47 +3996,45 @@
 ; GCN-NEXT:    v_mov_b32_e32 v0, s2
 ; GCN-NEXT:    v_alignbit_b32 v0, s3, v0, 30
 ; GCN-NEXT:    s_movk_i32 s3, 0x7fff
-; GCN-NEXT:    s_and_b32 s11, s0, s3
-; GCN-NEXT:    s_bfe_i32 s11, s11, 0xf0000
-; GCN-NEXT:    v_cvt_f32_i32_e32 v2, s11
-; GCN-NEXT:    s_and_b32 s9, s2, s3
-; GCN-NEXT:    s_bfe_i32 s9, s9, 0xf0000
-; GCN-NEXT:    v_cvt_f32_i32_e32 v3, s9
+; GCN-NEXT:    s_and_b32 s10, s0, s3
+; GCN-NEXT:    s_bfe_i32 s10, s10, 0xf0000
+; GCN-NEXT:    v_cvt_f32_i32_e32 v2, s10
+; GCN-NEXT:    s_and_b32 s8, s2, s3
+; GCN-NEXT:    s_bfe_i32 s8, s8, 0xf0000
+; GCN-NEXT:    v_cvt_f32_i32_e32 v3, s8
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v2
-; GCN-NEXT:    s_xor_b32 s9, s9, s11
-; GCN-NEXT:    s_ashr_i32 s9, s9, 30
-; GCN-NEXT:    s_or_b32 s9, s9, 1
+; GCN-NEXT:    s_xor_b32 s8, s8, s10
+; GCN-NEXT:    s_ashr_i32 s8, s8, 30
+; GCN-NEXT:    s_or_b32 s8, s8, 1
 ; GCN-NEXT:    v_mul_f32_e32 v4, v3, v4
 ; GCN-NEXT:    v_trunc_f32_e32 v4, v4
 ; GCN-NEXT:    v_mad_f32 v3, -v4, v2, v3
+; GCN-NEXT:    s_bfe_u32 s11, s0, 0xf000f
 ; GCN-NEXT:    v_cvt_i32_f32_e32 v4, v4
-; GCN-NEXT:    v_mov_b32_e32 v5, s9
+; GCN-NEXT:    v_mov_b32_e32 v5, s8
+; GCN-NEXT:    s_bfe_i32 s8, s11, 0xf0000
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
+; GCN-NEXT:    v_cvt_f32_i32_e32 v3, s8
 ; GCN-NEXT:    v_cndmask_b32_e32 v2, 0, v5, vcc
 ; GCN-NEXT:    v_mov_b32_e32 v1, s0
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
-; GCN-NEXT:    s_bfe_u32 s12, s0, 0xf000f
+; GCN-NEXT:    s_bfe_u32 s9, s2, 0xf000f
 ; GCN-NEXT:    v_alignbit_b32 v1, s1, v1, 30
-; GCN-NEXT:    v_mul_lo_u32 v2, v2, s0
 ; GCN-NEXT:    s_lshr_b32 s1, s0, 15
-; GCN-NEXT:    s_bfe_i32 s0, s12, 0xf0000
-; GCN-NEXT:    v_cvt_f32_i32_e32 v3, s0
-; GCN-NEXT:    s_bfe_u32 s10, s2, 0xf000f
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s2, v2
-; GCN-NEXT:    s_lshr_b32 s8, s2, 15
-; GCN-NEXT:    s_bfe_i32 s2, s10, 0xf0000
-; GCN-NEXT:    v_cvt_f32_i32_e32 v4, s2
+; GCN-NEXT:    v_mul_lo_u32 v2, v2, s0
+; GCN-NEXT:    s_bfe_i32 s0, s9, 0xf0000
+; GCN-NEXT:    v_cvt_f32_i32_e32 v4, s0
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v3
-; GCN-NEXT:    s_xor_b32 s0, s2, s0
+; GCN-NEXT:    s_xor_b32 s0, s0, s8
 ; GCN-NEXT:    s_ashr_i32 s0, s0, 30
 ; GCN-NEXT:    s_or_b32 s0, s0, 1
 ; GCN-NEXT:    v_mul_f32_e32 v5, v4, v5
 ; GCN-NEXT:    v_trunc_f32_e32 v5, v5
 ; GCN-NEXT:    v_mad_f32 v4, -v5, v3, v4
 ; GCN-NEXT:    v_cvt_i32_f32_e32 v5, v5
-; GCN-NEXT:    v_and_b32_e32 v1, s3, v1
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, |v3|
 ; GCN-NEXT:    v_mov_b32_e32 v6, s0
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, |v3|
+; GCN-NEXT:    v_and_b32_e32 v1, s3, v1
 ; GCN-NEXT:    v_cndmask_b32_e32 v3, 0, v6, vcc
 ; GCN-NEXT:    v_bfe_i32 v4, v1, 0, 15
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
@@ -4049,18 +4048,20 @@
 ; GCN-NEXT:    v_or_b32_e32 v4, 1, v4
 ; GCN-NEXT:    v_mul_f32_e32 v6, v7, v8
 ; GCN-NEXT:    v_trunc_f32_e32 v6, v6
-; GCN-NEXT:    v_mad_f32 v7, -v6, v5, v7
-; GCN-NEXT:    v_cvt_i32_f32_e32 v6, v6
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v7|, |v5|
+; GCN-NEXT:    v_cvt_i32_f32_e32 v8, v6
+; GCN-NEXT:    v_mad_f32 v6, -v6, v5, v7
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v6|, |v5|
 ; GCN-NEXT:    v_cndmask_b32_e32 v4, 0, v4, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
 ; GCN-NEXT:    v_mul_lo_u32 v3, v3, s1
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v6
 ; GCN-NEXT:    v_mul_lo_u32 v1, v4, v1
-; GCN-NEXT:    v_and_b32_e32 v2, s3, v2
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s8, v3
-; GCN-NEXT:    v_and_b32_e32 v3, s3, v3
+; GCN-NEXT:    s_lshr_b32 s0, s2, 15
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s2, v2
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s0, v3
 ; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v1, v0
+; GCN-NEXT:    v_and_b32_e32 v3, s3, v3
 ; GCN-NEXT:    v_lshl_b64 v[0:1], v[0:1], 30
+; GCN-NEXT:    v_and_b32_e32 v2, s3, v2
 ; GCN-NEXT:    v_lshlrev_b32_e32 v3, 15, v3
 ; GCN-NEXT:    v_or_b32_e32 v2, v2, v3
 ; GCN-NEXT:    v_or_b32_e32 v0, v2, v0
@@ -4081,18 +4082,18 @@
 ;
 ; GCN-LABEL: udiv_i32_oddk_denom:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dword s0, s[0:1], 0xb
+; GCN-NEXT:    s_load_dword s4, s[0:1], 0xb
 ; GCN-NEXT:    v_mov_b32_e32 v0, 0xb2a50881
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
+; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    v_mul_hi_u32 v0, s0, v0
-; GCN-NEXT:    v_sub_i32_e32 v1, vcc, s0, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s4, v0
+; GCN-NEXT:    v_sub_i32_e32 v1, vcc, s4, v0
 ; GCN-NEXT:    v_lshrrev_b32_e32 v1, 1, v1
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
 ; GCN-NEXT:    v_lshrrev_b32_e32 v0, 20, v0
-; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
+; GCN-NEXT:    buffer_store_dword v0, off, s[0:3], 0
 ; GCN-NEXT:    s_endpgm
   %r = udiv i32 %x, 1235195
   store i32 %r, i32 addrspace(1)* %out
@@ -4301,51 +4302,51 @@
 ; GCN-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_lshl_b32 s2, s4, s2
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s2
+; GCN-NEXT:    s_lshl_b32 s11, s4, s2
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s11
 ; GCN-NEXT:    s_lshl_b32 s10, s4, s3
-; GCN-NEXT:    s_mov_b32 s3, 0x4f800000
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s10
+; GCN-NEXT:    s_mov_b32 s2, 0x4f800000
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v0, v0
 ; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
 ; GCN-NEXT:    s_load_dwordx2 s[8:9], s[0:1], 0xb
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v1
-; GCN-NEXT:    v_mul_f32_e32 v0, s3, v0
+; GCN-NEXT:    v_mul_f32_e32 v0, s2, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_mul_f32_e32 v1, s3, v1
+; GCN-NEXT:    v_mul_f32_e32 v1, s2, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    v_mul_lo_u32 v2, v0, s2
-; GCN-NEXT:    v_mul_hi_u32 v3, v0, s2
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v2
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v3
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v4, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v2, v2, v0
+; GCN-NEXT:    v_mul_lo_u32 v2, v0, s11
+; GCN-NEXT:    v_mul_hi_u32 v4, v0, s11
 ; GCN-NEXT:    v_mul_lo_u32 v3, v1, s10
+; GCN-NEXT:    v_mul_hi_u32 v5, v1, s10
+; GCN-NEXT:    v_sub_i32_e32 v6, vcc, 0, v2
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v4
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v6, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, v0
+; GCN-NEXT:    v_sub_i32_e32 v7, vcc, 0, v3
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v5
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v7, s[2:3]
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v2, v0
 ; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v2, v0
-; GCN-NEXT:    v_mul_hi_u32 v2, v1, s10
 ; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v4, s[0:1]
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v3
+; GCN-NEXT:    v_mul_hi_u32 v3, v3, v1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    v_mul_hi_u32 v0, v0, s8
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v2
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v3, v4, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v2, v2, v1
-; GCN-NEXT:    v_mul_lo_u32 v5, v0, s2
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v2, v1
-; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v2, v1
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v4, s[0:1]
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v1
+; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v3, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v2, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v3, v0, s11
 ; GCN-NEXT:    v_mul_hi_u32 v1, v1, s9
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s8, v5
-; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s2, v3
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, -1, v0
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, -1, v0
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s8, v3
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s11, v4
 ; GCN-NEXT:    v_mul_lo_u32 v4, v1, s10
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], s8, v5
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
-; GCN-NEXT:    s_and_b64 vcc, s[2:3], s[0:1]
-; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s8, v3
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, 1, v0
+; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
+; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v2, v0, s[2:3]
 ; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s9, v4
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v3, v0, s[0:1]
 ; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s10, v2
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, -1, v1
 ; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s9, v4
@@ -4369,20 +4370,20 @@
 ;
 ; GCN-LABEL: urem_i32_oddk_denom:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dword s0, s[0:1], 0xb
+; GCN-NEXT:    s_load_dword s4, s[0:1], 0xb
 ; GCN-NEXT:    v_mov_b32_e32 v0, 0xb2a50881
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
+; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    v_mul_hi_u32 v0, s0, v0
-; GCN-NEXT:    v_sub_i32_e32 v1, vcc, s0, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s4, v0
+; GCN-NEXT:    v_sub_i32_e32 v1, vcc, s4, v0
 ; GCN-NEXT:    v_lshrrev_b32_e32 v1, 1, v1
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
 ; GCN-NEXT:    v_lshrrev_b32_e32 v0, 20, v0
 ; GCN-NEXT:    v_mul_u32_u24_e32 v0, 0x12d8fb, v0
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
-; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s4, v0
+; GCN-NEXT:    buffer_store_dword v0, off, s[0:3], 0
 ; GCN-NEXT:    s_endpgm
   %r = urem i32 %x, 1235195
   store i32 %r, i32 addrspace(1)* %out
@@ -4560,11 +4561,11 @@
 ; GCN-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_lshl_b32 s10, s4, s2
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s10
+; GCN-NEXT:    s_lshl_b32 s11, s4, s2
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s11
+; GCN-NEXT:    s_lshl_b32 s10, s4, s3
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s10
 ; GCN-NEXT:    s_mov_b32 s2, 0x4f800000
-; GCN-NEXT:    s_lshl_b32 s11, s4, s3
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s11
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v0, v0
 ; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
 ; GCN-NEXT:    s_load_dwordx2 s[8:9], s[0:1], 0xb
@@ -4573,42 +4574,42 @@
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
 ; GCN-NEXT:    v_mul_f32_e32 v1, s2, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    v_mul_lo_u32 v2, v0, s10
-; GCN-NEXT:    v_mul_hi_u32 v3, v0, s10
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v2
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v3
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v4, s[0:1]
+; GCN-NEXT:    v_mul_lo_u32 v2, v0, s11
+; GCN-NEXT:    v_mul_hi_u32 v4, v0, s11
+; GCN-NEXT:    v_mul_lo_u32 v3, v1, s10
+; GCN-NEXT:    v_mul_hi_u32 v5, v1, s10
+; GCN-NEXT:    v_sub_i32_e32 v6, vcc, 0, v2
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v4
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v6, s[0:1]
 ; GCN-NEXT:    v_mul_hi_u32 v2, v2, v0
-; GCN-NEXT:    v_mul_lo_u32 v3, v1, s11
+; GCN-NEXT:    v_sub_i32_e32 v7, vcc, 0, v3
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v5
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v7, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v3, v3, v1
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v2, v0
 ; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v2, v0
-; GCN-NEXT:    v_mul_hi_u32 v2, v1, s11
 ; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v4, s[0:1]
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v3
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    v_mul_hi_u32 v0, v0, s8
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v2
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v3, v4, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v2, v2, v1
-; GCN-NEXT:    v_mul_lo_u32 v0, v0, s10
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v2, v1
-; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v2, v1
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v5, s[0:1]
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v1
+; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v3, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v2, s[2:3]
 ; GCN-NEXT:    v_mul_hi_u32 v1, v1, s9
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s8, v0
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], s8, v0
-; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s10, v3
-; GCN-NEXT:    v_mul_lo_u32 v1, v1, s11
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, s10, v3
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s10, v3
-; GCN-NEXT:    s_and_b64 vcc, s[2:3], s[0:1]
-; GCN-NEXT:    v_cndmask_b32_e32 v0, v3, v0, vcc
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s9, v1
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v4, v0, s[0:1]
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s9, v1
+; GCN-NEXT:    v_mul_lo_u32 v0, v0, s11
+; GCN-NEXT:    v_mul_lo_u32 v1, v1, s10
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s8, v0
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s8, v0
 ; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s11, v2
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, s11, v2
-; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, s11, v2
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s11, v2
+; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
+; GCN-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s9, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v3, v0, s[2:3]
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s9, v1
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s10, v2
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, s10, v2
+; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, s10, v2
 ; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v2, v1, vcc
 ; GCN-NEXT:    v_cndmask_b32_e64 v1, v3, v1, s[2:3]
@@ -4628,18 +4629,18 @@
 ;
 ; GCN-LABEL: sdiv_i32_oddk_denom:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dword s0, s[0:1], 0xb
+; GCN-NEXT:    s_load_dword s4, s[0:1], 0xb
 ; GCN-NEXT:    v_mov_b32_e32 v0, 0xd9528441
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
+; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    v_mul_hi_i32 v0, s0, v0
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, s0, v0
+; GCN-NEXT:    v_mul_hi_i32 v0, s4, v0
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, s4, v0
 ; GCN-NEXT:    v_lshrrev_b32_e32 v1, 31, v0
 ; GCN-NEXT:    v_ashrrev_i32_e32 v0, 20, v0
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v1, v0
-; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
+; GCN-NEXT:    buffer_store_dword v0, off, s[0:3], 0
 ; GCN-NEXT:    s_endpgm
   %r = sdiv i32 %x, 1235195
   store i32 %r, i32 addrspace(1)* %out
@@ -4680,44 +4681,45 @@
 ;
 ; GCN-LABEL: sdiv_i32_pow2_shl_denom:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0xb
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
+; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0xb
 ; GCN-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_lshl_b32 s3, 0x1000, s3
-; GCN-NEXT:    s_ashr_i32 s8, s3, 31
-; GCN-NEXT:    s_add_i32 s3, s3, s8
-; GCN-NEXT:    s_xor_b32 s9, s3, s8
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s9
-; GCN-NEXT:    s_ashr_i32 s3, s2, 31
-; GCN-NEXT:    s_add_i32 s2, s2, s3
-; GCN-NEXT:    s_xor_b32 s2, s2, s3
+; GCN-NEXT:    s_lshl_b32 s2, 0x1000, s5
+; GCN-NEXT:    s_ashr_i32 s8, s2, 31
+; GCN-NEXT:    s_add_i32 s2, s2, s8
+; GCN-NEXT:    s_xor_b32 s11, s2, s8
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s11
+; GCN-NEXT:    s_ashr_i32 s9, s4, 31
+; GCN-NEXT:    s_add_i32 s4, s4, s9
+; GCN-NEXT:    s_xor_b32 s10, s4, s9
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v0, v0
-; GCN-NEXT:    s_xor_b32 s3, s3, s8
+; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x4f800000, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_mul_lo_u32 v1, v0, s9
-; GCN-NEXT:    v_mul_hi_u32 v2, v0, s9
+; GCN-NEXT:    v_mul_lo_u32 v1, v0, s11
+; GCN-NEXT:    v_mul_hi_u32 v2, v0, s11
 ; GCN-NEXT:    v_sub_i32_e32 v3, vcc, 0, v1
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v2
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[0:1]
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v2
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[2:3]
 ; GCN-NEXT:    v_mul_hi_u32 v1, v1, v0
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v1, v0
 ; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v1, v0
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v0, v0, s2
-; GCN-NEXT:    v_mul_lo_u32 v1, v0, s9
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v0, v0, s10
+; GCN-NEXT:    v_mul_lo_u32 v1, v0, s11
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, -1, v0
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], s2, v1
-; GCN-NEXT:    v_sub_i32_e32 v1, vcc, s2, v1
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s9, v1
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], s10, v1
+; GCN-NEXT:    v_sub_i32_e32 v1, vcc, s10, v1
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s11, v1
 ; GCN-NEXT:    s_and_b64 vcc, vcc, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
 ; GCN-NEXT:    v_cndmask_b32_e64 v0, v3, v0, s[0:1]
-; GCN-NEXT:    v_xor_b32_e32 v0, s3, v0
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s3, v0
+; GCN-NEXT:    s_xor_b32 s0, s9, s8
+; GCN-NEXT:    v_xor_b32_e32 v0, s0, v0
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s0, v0
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
 ; GCN-NEXT:    s_endpgm
   %shl.y = shl i32 4096, %y
@@ -4905,7 +4907,7 @@
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0xd
 ; GCN-NEXT:    s_movk_i32 s4, 0x1000
-; GCN-NEXT:    s_mov_b32 s14, 0x4f800000
+; GCN-NEXT:    s_mov_b32 s10, 0x4f800000
 ; GCN-NEXT:    s_load_dwordx2 s[8:9], s[0:1], 0x9
 ; GCN-NEXT:    s_load_dwordx2 s[6:7], s[0:1], 0xb
 ; GCN-NEXT:    s_mov_b32 s11, 0xf000
@@ -4915,65 +4917,65 @@
 ; GCN-NEXT:    s_add_i32 s2, s2, s5
 ; GCN-NEXT:    s_xor_b32 s13, s2, s5
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s13
-; GCN-NEXT:    s_ashr_i32 s2, s6, 31
 ; GCN-NEXT:    s_lshl_b32 s0, s4, s3
-; GCN-NEXT:    s_add_i32 s1, s6, s2
+; GCN-NEXT:    s_ashr_i32 s12, s0, 31
+; GCN-NEXT:    s_add_i32 s0, s0, s12
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v0, v0
-; GCN-NEXT:    s_ashr_i32 s6, s0, 31
-; GCN-NEXT:    s_add_i32 s4, s0, s6
-; GCN-NEXT:    s_xor_b32 s3, s1, s2
-; GCN-NEXT:    v_mul_f32_e32 v0, s14, v0
+; GCN-NEXT:    s_xor_b32 s14, s0, s12
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s14
+; GCN-NEXT:    s_ashr_i32 s2, s6, 31
+; GCN-NEXT:    v_mul_f32_e32 v0, s10, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    s_xor_b32 s15, s4, s6
-; GCN-NEXT:    s_xor_b32 s12, s2, s5
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v1
+; GCN-NEXT:    s_add_i32 s3, s6, s2
+; GCN-NEXT:    s_xor_b32 s3, s3, s2
+; GCN-NEXT:    v_mul_lo_u32 v2, v0, s13
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, s13
+; GCN-NEXT:    v_mul_f32_e32 v1, s10, v1
+; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v2
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v4, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, v1, s14
+; GCN-NEXT:    s_xor_b32 s6, s2, s5
 ; GCN-NEXT:    s_mov_b32 s10, -1
-; GCN-NEXT:    v_mul_lo_u32 v1, v0, s13
-; GCN-NEXT:    v_mul_hi_u32 v2, v0, s13
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, 0, v1
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v2
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v1, v1, v0
-; GCN-NEXT:    v_cvt_f32_u32_e32 v2, s15
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v1, v0
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v1, v0
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v2, v0
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v2, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v3, s[0:1]
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v2
 ; GCN-NEXT:    v_mul_hi_u32 v0, v0, s3
-; GCN-NEXT:    v_mul_f32_e32 v1, s14, v1
+; GCN-NEXT:    v_mul_hi_u32 v3, v1, s14
 ; GCN-NEXT:    v_mul_lo_u32 v2, v0, s13
-; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, -1, v0
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s3, v2
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s13, v4
-; GCN-NEXT:    v_mul_lo_u32 v4, v1, s15
-; GCN-NEXT:    v_mul_hi_u32 v5, v1, s15
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v3
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, -1, v0
+; GCN-NEXT:    v_sub_i32_e32 v6, vcc, s3, v2
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], s3, v2
+; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s13, v6
+; GCN-NEXT:    v_sub_i32_e32 v6, vcc, 0, v4
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v4, v6, s[4:5]
+; GCN-NEXT:    v_mul_hi_u32 v3, v3, v1
 ; GCN-NEXT:    s_ashr_i32 s13, s7, 31
 ; GCN-NEXT:    s_add_i32 s7, s7, s13
-; GCN-NEXT:    v_sub_i32_e32 v6, vcc, 0, v4
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v5
-; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v6, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v4, v4, v1
 ; GCN-NEXT:    s_xor_b32 s7, s7, s13
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s3, v2
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v4, v1
-; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v4, v1
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v5, s[4:5]
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v3, v1
+; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v3, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v4, s[4:5]
 ; GCN-NEXT:    v_mul_hi_u32 v1, v1, s7
-; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
+; GCN-NEXT:    s_and_b64 vcc, s[2:3], s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v3, v0, s[2:3]
-; GCN-NEXT:    v_mul_lo_u32 v2, v1, s15
-; GCN-NEXT:    v_xor_b32_e32 v0, s12, v0
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s12, v0
-; GCN-NEXT:    s_xor_b32 s4, s13, s6
+; GCN-NEXT:    v_mul_lo_u32 v2, v1, s14
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v5, v0, s[0:1]
+; GCN-NEXT:    v_xor_b32_e32 v0, s6, v0
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s6, v0
 ; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s7, v2
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s15, v3
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s14, v3
 ; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s7, v2
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, -1, v1
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, 1, v1
 ; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc
+; GCN-NEXT:    s_xor_b32 s4, s13, s12
 ; GCN-NEXT:    v_cndmask_b32_e64 v1, v3, v1, s[2:3]
 ; GCN-NEXT:    v_xor_b32_e32 v1, s4, v1
 ; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, s4, v1
@@ -4993,20 +4995,20 @@
 ;
 ; GCN-LABEL: srem_i32_oddk_denom:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dword s0, s[0:1], 0xb
+; GCN-NEXT:    s_load_dword s4, s[0:1], 0xb
 ; GCN-NEXT:    v_mov_b32_e32 v0, 0xd9528441
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
+; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    v_mul_hi_i32 v0, s0, v0
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, s0, v0
+; GCN-NEXT:    v_mul_hi_i32 v0, s4, v0
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, s4, v0
 ; GCN-NEXT:    v_lshrrev_b32_e32 v1, 31, v0
 ; GCN-NEXT:    v_ashrrev_i32_e32 v0, 20, v0
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v1, v0
 ; GCN-NEXT:    v_mul_i32_i24_e32 v0, 0x12d8fb, v0
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
-; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s4, v0
+; GCN-NEXT:    buffer_store_dword v0, off, s[0:3], 0
 ; GCN-NEXT:    s_endpgm
   %r = srem i32 %x, 1235195
   store i32 %r, i32 addrspace(1)* %out
@@ -5238,73 +5240,73 @@
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0xd
 ; GCN-NEXT:    s_movk_i32 s4, 0x1000
-; GCN-NEXT:    s_mov_b32 s14, 0x4f800000
 ; GCN-NEXT:    s_load_dwordx2 s[6:7], s[0:1], 0xb
 ; GCN-NEXT:    s_load_dwordx2 s[8:9], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s11, 0xf000
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    s_lshl_b32 s2, s4, s2
 ; GCN-NEXT:    s_ashr_i32 s5, s2, 31
 ; GCN-NEXT:    s_add_i32 s2, s2, s5
 ; GCN-NEXT:    s_xor_b32 s13, s2, s5
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s13
+; GCN-NEXT:    s_mov_b32 s5, 0x4f800000
 ; GCN-NEXT:    s_lshl_b32 s2, s4, s3
-; GCN-NEXT:    s_ashr_i32 s12, s6, 31
-; GCN-NEXT:    s_add_i32 s3, s6, s12
+; GCN-NEXT:    s_ashr_i32 s3, s2, 31
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v0, v0
-; GCN-NEXT:    s_ashr_i32 s4, s2, 31
-; GCN-NEXT:    s_add_i32 s6, s2, s4
-; GCN-NEXT:    s_xor_b32 s5, s3, s12
-; GCN-NEXT:    v_mul_f32_e32 v0, s14, v0
+; GCN-NEXT:    s_add_i32 s2, s2, s3
+; GCN-NEXT:    s_xor_b32 s14, s2, s3
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s14
+; GCN-NEXT:    v_mul_f32_e32 v0, s5, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    s_xor_b32 s15, s6, s4
+; GCN-NEXT:    s_ashr_i32 s12, s6, 31
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v1
+; GCN-NEXT:    s_add_i32 s4, s6, s12
+; GCN-NEXT:    v_mul_lo_u32 v2, v0, s13
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, s13
+; GCN-NEXT:    v_mul_f32_e32 v1, s5, v1
+; GCN-NEXT:    s_xor_b32 s4, s4, s12
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v2
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v2, v4, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, v0
+; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
 ; GCN-NEXT:    s_ashr_i32 s6, s7, 31
 ; GCN-NEXT:    s_add_i32 s7, s7, s6
-; GCN-NEXT:    v_mul_lo_u32 v1, v0, s13
-; GCN-NEXT:    v_mul_hi_u32 v2, v0, s13
-; GCN-NEXT:    s_xor_b32 s7, s7, s6
-; GCN-NEXT:    s_mov_b32 s11, 0xf000
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, 0, v1
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v2
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[2:3]
-; GCN-NEXT:    v_mul_hi_u32 v1, v1, v0
-; GCN-NEXT:    v_cvt_f32_u32_e32 v2, s15
-; GCN-NEXT:    s_mov_b32 s10, -1
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v1, v0
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v1, v0
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v2
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v2, v0
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v2, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v3, s[2:3]
-; GCN-NEXT:    v_mul_hi_u32 v0, v0, s5
-; GCN-NEXT:    v_mul_f32_e32 v1, s14, v1
-; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
+; GCN-NEXT:    v_mul_hi_u32 v0, v0, s4
+; GCN-NEXT:    v_mul_lo_u32 v2, v1, s14
+; GCN-NEXT:    v_mul_hi_u32 v3, v1, s14
+; GCN-NEXT:    s_xor_b32 s7, s7, s6
 ; GCN-NEXT:    v_mul_lo_u32 v0, v0, s13
-; GCN-NEXT:    v_mul_lo_u32 v4, v1, s15
-; GCN-NEXT:    v_mul_hi_u32 v5, v1, s15
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s5, v0
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s5, v0
-; GCN-NEXT:    v_sub_i32_e32 v6, vcc, 0, v4
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v5
-; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v6, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v4, v4, v1
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s13, v2
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, s13, v2
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s13, v2
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v4, v1
-; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, v4, v1
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v5, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v1, v1, s7
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v2
+; GCN-NEXT:    s_mov_b32 s10, -1
+; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s4, v0
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s4, v0
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v2, v4, s[4:5]
+; GCN-NEXT:    v_mul_hi_u32 v0, v0, v1
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s13, v5
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, s13, v5
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v0, v1
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v0, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[4:5]
+; GCN-NEXT:    v_mul_hi_u32 v0, v0, s7
+; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, s13, v5
 ; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v3, v0, s[2:3]
-; GCN-NEXT:    v_mul_lo_u32 v1, v1, s15
+; GCN-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc
+; GCN-NEXT:    v_mul_lo_u32 v2, v0, s14
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v6, v1, s[2:3]
 ; GCN-NEXT:    v_xor_b32_e32 v0, s12, v0
 ; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s12, v0
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s7, v1
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s7, v1
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s15, v2
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, s15, v2
-; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, s15, v2
+; GCN-NEXT:    v_sub_i32_e32 v1, vcc, s7, v2
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], s7, v2
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s14, v1
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, s14, v1
+; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, s14, v1
 ; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    v_cndmask_b32_e32 v1, v2, v1, vcc
+; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc
 ; GCN-NEXT:    v_cndmask_b32_e64 v1, v3, v1, s[2:3]
 ; GCN-NEXT:    v_xor_b32_e32 v1, s6, v1
 ; GCN-NEXT:    v_subrev_i32_e32 v1, vcc, s6, v1
@@ -5328,8 +5330,8 @@
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0x4f800000
 ; GCN-NEXT:    v_madmk_f32 v0, v1, 0x438f8000, v0
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
-; GCN-NEXT:    s_movk_i32 s2, 0xfee0
-; GCN-NEXT:    s_mov_b32 s3, 0x68958c89
+; GCN-NEXT:    s_movk_i32 s4, 0xfee0
+; GCN-NEXT:    s_mov_b32 s5, 0x68958c89
 ; GCN-NEXT:    v_mov_b32_e32 v8, 0
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
 ; GCN-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
@@ -5338,59 +5340,56 @@
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
 ; GCN-NEXT:    v_mov_b32_e32 v7, 0
-; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-NEXT:    v_mul_lo_u32 v2, v0, s2
-; GCN-NEXT:    v_mul_hi_u32 v3, v0, s3
-; GCN-NEXT:    v_mul_lo_u32 v4, v1, s3
 ; GCN-NEXT:    s_mov_b32 s11, 0xf000
-; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_mov_b32 s8, s4
+; GCN-NEXT:    v_mul_lo_u32 v2, v0, s4
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, s5
+; GCN-NEXT:    v_mul_lo_u32 v5, v1, s5
+; GCN-NEXT:    v_mul_lo_u32 v4, v0, s5
+; GCN-NEXT:    s_mov_b32 s10, -1
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_mul_lo_u32 v3, v0, s3
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, v4
 ; GCN-NEXT:    v_mul_lo_u32 v5, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v4, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v6, v0, v3
+; GCN-NEXT:    v_mul_hi_u32 v6, v0, v2
 ; GCN-NEXT:    v_mul_hi_u32 v9, v1, v2
 ; GCN-NEXT:    v_mul_lo_u32 v2, v1, v2
-; GCN-NEXT:    s_mov_b32 s4, 0x976a7376
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_mul_lo_u32 v6, v1, v3
-; GCN-NEXT:    v_mul_hi_u32 v3, v1, v3
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v8, v4, vcc
-; GCN-NEXT:    s_mov_b32 s10, -1
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v4, v3, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v8, v6, vcc
+; GCN-NEXT:    v_mul_lo_u32 v6, v1, v4
+; GCN-NEXT:    v_mul_hi_u32 v4, v1, v4
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v6, v3
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v5, v4, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v9, v7, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v2
+; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v2
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v4, vcc
-; GCN-NEXT:    v_mul_lo_u32 v4, v0, s2
-; GCN-NEXT:    v_mul_hi_u32 v5, v0, s3
-; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v6, v2, s3
-; GCN-NEXT:    s_movk_i32 s2, 0x11f
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v4, v0, s4
+; GCN-NEXT:    v_mul_hi_u32 v5, v0, s5
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, s5
+; GCN-NEXT:    v_mul_lo_u32 v9, v0, s5
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_mul_lo_u32 v5, v0, s3
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v6
-; GCN-NEXT:    v_mul_lo_u32 v6, v0, v4
+; GCN-NEXT:    v_mul_lo_u32 v5, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v6, v0, v9
 ; GCN-NEXT:    v_mul_hi_u32 v10, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v9, v0, v5
 ; GCN-NEXT:    v_mul_hi_u32 v11, v2, v4
-; GCN-NEXT:    s_mov_b32 s3, 0x976a7377
-; GCN-NEXT:    s_mov_b32 s9, s5
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v9, v6
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v8, v10, vcc
-; GCN-NEXT:    v_mul_lo_u32 v10, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v5, v2, v5
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_mov_b32 s8, s4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v10, vcc
+; GCN-NEXT:    v_mul_lo_u32 v10, v2, v9
+; GCN-NEXT:    v_mul_hi_u32 v9, v2, v9
 ; GCN-NEXT:    v_mul_lo_u32 v2, v2, v4
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v10, v6
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v5, vcc
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v11, v7, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v8, v4, vcc
+; GCN-NEXT:    s_mov_b32 s4, 0x976a7376
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v10, v5
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v6, v9, vcc
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v11, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v8, v5, vcc
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v4, s[0:1]
+; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v4, s[2:3]
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, s6, v1
@@ -5402,6 +5401,8 @@
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v4, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v4, s7, v0
 ; GCN-NEXT:    v_mul_hi_u32 v0, s7, v0
+; GCN-NEXT:    s_movk_i32 s2, 0x11f
+; GCN-NEXT:    s_mov_b32 s3, 0x976a7377
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v0, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v5, v7, vcc
@@ -5411,6 +5412,7 @@
 ; GCN-NEXT:    v_mul_hi_u32 v3, v0, s3
 ; GCN-NEXT:    v_mul_lo_u32 v4, v1, s3
 ; GCN-NEXT:    v_mov_b32_e32 v5, s2
+; GCN-NEXT:    s_mov_b32 s9, s5
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
 ; GCN-NEXT:    v_mul_lo_u32 v3, v0, s3
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
@@ -5550,8 +5552,8 @@
 ; GCN-NEXT:    v_mov_b32_e32 v0, 0x4f800000
 ; GCN-NEXT:    v_madak_f32 v0, 0, v0, 0x457ff000
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
-; GCN-NEXT:    s_movk_i32 s6, 0xf001
-; GCN-NEXT:    v_mov_b32_e32 v7, 0
+; GCN-NEXT:    s_movk_i32 s4, 0xf001
+; GCN-NEXT:    v_mov_b32_e32 v6, 0
 ; GCN-NEXT:    v_mov_b32_e32 v2, 0
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
 ; GCN-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
@@ -5559,77 +5561,77 @@
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0xd
-; GCN-NEXT:    s_movk_i32 s0, 0xfff
-; GCN-NEXT:    v_mul_hi_u32 v3, v0, s6
-; GCN-NEXT:    v_mul_lo_u32 v5, v1, s6
-; GCN-NEXT:    v_mul_lo_u32 v4, v0, s6
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    s_load_dwordx2 s[8:9], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s11, 0xf000
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, s4
+; GCN-NEXT:    v_mul_lo_u32 v5, v1, s4
+; GCN-NEXT:    v_mul_lo_u32 v4, v0, s4
+; GCN-NEXT:    s_mov_b32 s10, -1
 ; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v0, v3
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
-; GCN-NEXT:    v_mul_hi_u32 v6, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v7, v0, v4
 ; GCN-NEXT:    v_mul_lo_u32 v5, v0, v3
 ; GCN-NEXT:    v_mul_hi_u32 v8, v0, v3
-; GCN-NEXT:    v_mul_hi_u32 v9, v1, v3
+; GCN-NEXT:    v_mul_hi_u32 v9, v1, v4
+; GCN-NEXT:    v_mul_lo_u32 v4, v1, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v6, v8, vcc
+; GCN-NEXT:    v_mul_hi_u32 v8, v1, v3
 ; GCN-NEXT:    v_mul_lo_u32 v3, v1, v3
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v7, v8, vcc
-; GCN-NEXT:    v_mul_lo_u32 v8, v1, v4
-; GCN-NEXT:    v_mul_hi_u32 v4, v1, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v6, v4, vcc
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v2, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v7, v9, vcc
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v8, v2, vcc
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
 ; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v3
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v7, v5, vcc
-; GCN-NEXT:    v_mul_hi_u32 v5, v0, s6
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v6, v5, vcc
+; GCN-NEXT:    v_mul_hi_u32 v5, v0, s4
 ; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v1, v4, s[2:3]
-; GCN-NEXT:    v_mul_lo_u32 v6, v3, s6
-; GCN-NEXT:    v_mul_lo_u32 v8, v0, s6
+; GCN-NEXT:    v_mul_lo_u32 v7, v3, s4
+; GCN-NEXT:    v_mul_lo_u32 v8, v0, s4
 ; GCN-NEXT:    v_subrev_i32_e32 v5, vcc, v0, v5
-; GCN-NEXT:    s_mov_b32 s6, -1
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
-; GCN-NEXT:    v_mul_lo_u32 v6, v0, v5
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0xd
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
+; GCN-NEXT:    v_mul_lo_u32 v7, v0, v5
 ; GCN-NEXT:    v_mul_hi_u32 v9, v0, v8
 ; GCN-NEXT:    v_mul_hi_u32 v10, v0, v5
 ; GCN-NEXT:    v_mul_hi_u32 v11, v3, v5
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v9, v6
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v7, v10, vcc
+; GCN-NEXT:    s_movk_i32 s0, 0xfff
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v9, v7
+; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v6, v10, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v10, v3, v8
 ; GCN-NEXT:    v_mul_hi_u32 v8, v3, v8
 ; GCN-NEXT:    v_mul_lo_u32 v3, v3, v5
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v10, v6
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v9, v8, vcc
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v11, v2, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v6, v3
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v5, vcc
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v10, v7
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v2, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v7, vcc
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v4
 ; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v5, s[2:3]
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    v_mul_lo_u32 v3, s10, v1
-; GCN-NEXT:    v_mul_hi_u32 v4, s10, v0
-; GCN-NEXT:    v_mul_hi_u32 v5, s10, v1
-; GCN-NEXT:    v_mul_hi_u32 v6, s11, v1
-; GCN-NEXT:    v_mul_lo_u32 v1, s11, v1
+; GCN-NEXT:    v_mul_lo_u32 v3, s6, v1
+; GCN-NEXT:    v_mul_hi_u32 v4, s6, v0
+; GCN-NEXT:    v_mul_hi_u32 v5, s6, v1
+; GCN-NEXT:    v_mul_hi_u32 v7, s7, v1
+; GCN-NEXT:    v_mul_lo_u32 v1, s7, v1
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v7, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v5, s11, v0
-; GCN-NEXT:    v_mul_hi_u32 v0, s11, v0
-; GCN-NEXT:    s_lshr_b64 s[2:3], s[8:9], 12
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v6, v5, vcc
+; GCN-NEXT:    v_mul_lo_u32 v5, s7, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s7, v0
+; GCN-NEXT:    s_lshr_b64 s[2:3], s[4:5], 12
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v4, v0, vcc
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v6, v2, vcc
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v7, v2, vcc
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v7, v2, vcc
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v6, v2, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, v1, s0
 ; GCN-NEXT:    v_mul_hi_u32 v3, v0, s0
 ; GCN-NEXT:    v_mul_lo_u32 v4, v0, s0
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_mov_b32_e32 v3, s11
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s10, v4
+; GCN-NEXT:    v_mov_b32_e32 v3, s7
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s6, v4
 ; GCN-NEXT:    v_subb_u32_e32 v2, vcc, v3, v2, vcc
 ; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, s0, v4
 ; GCN-NEXT:    v_subbrev_u32_e32 v5, vcc, 0, v2, vcc
@@ -5654,7 +5656,7 @@
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v0, v1, s[0:1]
 ; GCN-NEXT:    v_mov_b32_e32 v0, s2
 ; GCN-NEXT:    v_mov_b32_e32 v1, s3
-; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
+; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[8:11], 0
 ; GCN-NEXT:    s_endpgm
   %r = udiv <2 x i64> %x, <i64 4096, i64 4095>
   store <2 x i64> %r, <2 x i64> addrspace(1)* %out
@@ -5711,8 +5713,8 @@
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0x4f800000
 ; GCN-NEXT:    v_madmk_f32 v0, v1, 0x438f8000, v0
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
-; GCN-NEXT:    s_movk_i32 s2, 0xfee0
-; GCN-NEXT:    s_mov_b32 s3, 0x689e0837
+; GCN-NEXT:    s_movk_i32 s4, 0xfee0
+; GCN-NEXT:    s_mov_b32 s5, 0x689e0837
 ; GCN-NEXT:    v_mov_b32_e32 v8, 0
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
 ; GCN-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
@@ -5721,59 +5723,58 @@
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
 ; GCN-NEXT:    v_mov_b32_e32 v7, 0
-; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-NEXT:    v_mul_lo_u32 v2, v0, s2
-; GCN-NEXT:    v_mul_hi_u32 v3, v0, s3
-; GCN-NEXT:    v_mul_lo_u32 v4, v1, s3
-; GCN-NEXT:    s_mov_b32 s12, 0x9761f7c9
-; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_mov_b32 s8, s4
+; GCN-NEXT:    s_movk_i32 s12, 0x11f
+; GCN-NEXT:    v_mul_lo_u32 v2, v0, s4
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, s5
+; GCN-NEXT:    v_mul_lo_u32 v5, v1, s5
+; GCN-NEXT:    v_mul_lo_u32 v4, v0, s5
+; GCN-NEXT:    s_mov_b32 s13, 0x9761f7c9
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_mul_lo_u32 v3, v0, s3
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, v4
 ; GCN-NEXT:    v_mul_lo_u32 v5, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v4, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v6, v0, v3
+; GCN-NEXT:    v_mul_hi_u32 v6, v0, v2
 ; GCN-NEXT:    v_mul_hi_u32 v9, v1, v2
 ; GCN-NEXT:    v_mul_lo_u32 v2, v1, v2
-; GCN-NEXT:    s_movk_i32 s4, 0x11f
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_mul_lo_u32 v6, v1, v3
-; GCN-NEXT:    v_mul_hi_u32 v3, v1, v3
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v8, v4, vcc
-; GCN-NEXT:    s_mov_b32 s9, s5
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v4, v3, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v8, v6, vcc
+; GCN-NEXT:    v_mul_lo_u32 v6, v1, v4
+; GCN-NEXT:    v_mul_hi_u32 v4, v1, v4
+; GCN-NEXT:    s_mov_b32 s11, 0xf000
+; GCN-NEXT:    s_mov_b32 s10, -1
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v6, v3
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v5, v4, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v9, v7, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v2
+; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v2
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v4, vcc
-; GCN-NEXT:    v_mul_lo_u32 v4, v0, s2
-; GCN-NEXT:    v_mul_hi_u32 v5, v0, s3
-; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v6, v2, s3
-; GCN-NEXT:    s_movk_i32 s5, 0x11e
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v4, v0, s4
+; GCN-NEXT:    v_mul_hi_u32 v5, v0, s5
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, s5
+; GCN-NEXT:    v_mul_lo_u32 v9, v0, s5
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_mul_lo_u32 v5, v0, s3
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v6
-; GCN-NEXT:    v_mul_lo_u32 v6, v0, v4
+; GCN-NEXT:    v_mul_lo_u32 v5, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v6, v0, v9
 ; GCN-NEXT:    v_mul_hi_u32 v10, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v9, v0, v5
 ; GCN-NEXT:    v_mul_hi_u32 v11, v2, v4
-; GCN-NEXT:    s_mov_b32 s11, 0xf000
-; GCN-NEXT:    s_mov_b32 s10, -1
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v9, v6
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v8, v10, vcc
-; GCN-NEXT:    v_mul_lo_u32 v10, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v5, v2, v5
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_mov_b32 s8, s4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v10, vcc
+; GCN-NEXT:    v_mul_lo_u32 v10, v2, v9
+; GCN-NEXT:    v_mul_hi_u32 v9, v2, v9
 ; GCN-NEXT:    v_mul_lo_u32 v2, v2, v4
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v10, v6
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v5, vcc
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v11, v7, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v8, v4, vcc
+; GCN-NEXT:    s_movk_i32 s4, 0x11e
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v10, v5
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v6, v9, vcc
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v11, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v8, v5, vcc
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v4, s[0:1]
+; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v4, s[2:3]
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, s6, v1
@@ -5785,42 +5786,43 @@
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v4, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v4, s7, v0
 ; GCN-NEXT:    v_mul_hi_u32 v0, s7, v0
+; GCN-NEXT:    s_mov_b32 s9, s5
+; GCN-NEXT:    s_mov_b32 s5, 0x9761f7c8
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v0, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v5, v7, vcc
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v8, v2, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, v0, s4
-; GCN-NEXT:    v_mul_hi_u32 v3, v0, s12
-; GCN-NEXT:    v_mul_lo_u32 v1, v1, s12
-; GCN-NEXT:    v_mul_lo_u32 v0, v0, s12
+; GCN-NEXT:    v_mul_lo_u32 v2, v0, s12
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, s13
+; GCN-NEXT:    v_mul_lo_u32 v1, v1, s13
+; GCN-NEXT:    v_mul_lo_u32 v0, v0, s13
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
 ; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s7, v1
+; GCN-NEXT:    v_mov_b32_e32 v3, s12
 ; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s6, v0
-; GCN-NEXT:    v_mov_b32_e32 v3, s4
 ; GCN-NEXT:    v_subb_u32_e64 v2, s[0:1], v2, v3, vcc
-; GCN-NEXT:    v_subrev_i32_e64 v4, s[0:1], s12, v0
+; GCN-NEXT:    v_subrev_i32_e64 v4, s[0:1], s13, v0
 ; GCN-NEXT:    v_subbrev_u32_e64 v5, s[2:3], 0, v2, s[0:1]
-; GCN-NEXT:    v_cmp_lt_u32_e64 s[2:3], s5, v5
-; GCN-NEXT:    s_mov_b32 s6, 0x9761f7c8
+; GCN-NEXT:    v_cmp_lt_u32_e64 s[2:3], s4, v5
 ; GCN-NEXT:    v_subb_u32_e64 v2, s[0:1], v2, v3, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, s[2:3]
-; GCN-NEXT:    v_cmp_lt_u32_e64 s[2:3], s6, v4
-; GCN-NEXT:    v_subrev_i32_e64 v3, s[0:1], s12, v4
+; GCN-NEXT:    v_cmp_lt_u32_e64 s[2:3], s5, v4
+; GCN-NEXT:    v_subrev_i32_e64 v3, s[0:1], s13, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[2:3]
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], s4, v5
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], s12, v5
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, v6, v7, s[2:3]
 ; GCN-NEXT:    v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
 ; GCN-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, v6
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v5, v2, s[0:1]
 ; GCN-NEXT:    v_mov_b32_e32 v5, s7
 ; GCN-NEXT:    v_subb_u32_e32 v1, vcc, v5, v1, vcc
-; GCN-NEXT:    v_cmp_lt_u32_e32 vcc, s5, v1
+; GCN-NEXT:    v_cmp_lt_u32_e32 vcc, s4, v1
 ; GCN-NEXT:    v_cndmask_b32_e64 v5, 0, -1, vcc
-; GCN-NEXT:    v_cmp_lt_u32_e32 vcc, s6, v0
+; GCN-NEXT:    v_cmp_lt_u32_e32 vcc, s5, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, vcc
-; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s4, v1
+; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s12, v1
 ; GCN-NEXT:    v_cndmask_b32_e32 v5, v5, v6, vcc
 ; GCN-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v5
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc
@@ -5976,88 +5978,86 @@
 ; GCN-NEXT:    v_mov_b32_e32 v0, 0x4f800000
 ; GCN-NEXT:    v_madak_f32 v0, 0, v0, 0x4996c7d8
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
-; GCN-NEXT:    s_mov_b32 s2, 0xffed2705
-; GCN-NEXT:    v_mov_b32_e32 v8, 0
-; GCN-NEXT:    v_mov_b32_e32 v7, 0
+; GCN-NEXT:    s_mov_b32 s8, 0xffed2705
+; GCN-NEXT:    v_mov_b32_e32 v6, 0
+; GCN-NEXT:    v_mov_b32_e32 v5, 0
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
 ; GCN-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    v_mul_hi_u32 v3, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v2, v1, s2
-; GCN-NEXT:    v_mul_lo_u32 v4, v0, s2
-; GCN-NEXT:    s_mov_b32 s6, -1
-; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_mov_b32 s4, s8
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
+; GCN-NEXT:    v_mul_hi_u32 v3, s8, v0
+; GCN-NEXT:    v_mul_lo_u32 v2, v1, s8
+; GCN-NEXT:    v_mul_lo_u32 v4, v0, s8
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
 ; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v0, v2
-; GCN-NEXT:    v_mul_lo_u32 v5, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v6, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v3, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v9, v1, v2
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, v4
+; GCN-NEXT:    v_mul_lo_u32 v7, v0, v2
+; GCN-NEXT:    v_mul_hi_u32 v8, v0, v2
+; GCN-NEXT:    v_mul_hi_u32 v9, v1, v4
+; GCN-NEXT:    v_mul_lo_u32 v4, v1, v4
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v7
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v6, v8, vcc
+; GCN-NEXT:    v_mul_hi_u32 v8, v1, v2
 ; GCN-NEXT:    v_mul_lo_u32 v2, v1, v2
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_mul_lo_u32 v6, v1, v4
-; GCN-NEXT:    v_mul_hi_u32 v4, v1, v4
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v3, vcc
-; GCN-NEXT:    s_mov_b32 s5, s9
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v3, v4, vcc
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v9, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v7, v9, vcc
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v8, v5, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v2
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v4, vcc
-; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v4, v2, s2
-; GCN-NEXT:    v_mul_hi_u32 v5, s2, v0
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_mul_lo_u32 v5, v0, s2
+; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v2
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v6, v4, vcc
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, s8
+; GCN-NEXT:    v_mul_hi_u32 v7, s8, v0
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v7, v4
+; GCN-NEXT:    v_mul_lo_u32 v7, v0, s8
 ; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v0, v4
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v9, v2, v5
-; GCN-NEXT:    v_mul_lo_u32 v5, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v6, v2, v4
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v8, v12, vcc
+; GCN-NEXT:    v_mul_lo_u32 v9, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v2, v7
+; GCN-NEXT:    v_mul_lo_u32 v7, v2, v7
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v4
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v6, v11, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, v2, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v10
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v11, v9, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v8, v5, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
 ; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v6, v7, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v8, v4, vcc
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    s_ashr_i32 s2, s11, 31
-; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v4, s[0:1]
-; GCN-NEXT:    s_add_u32 s0, s10, s2
+; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v4, s[2:3]
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_ashr_i32 s2, s7, 31
+; GCN-NEXT:    s_add_u32 s0, s6, s2
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    s_addc_u32 s1, s7, s2
 ; GCN-NEXT:    s_mov_b32 s3, s2
-; GCN-NEXT:    s_addc_u32 s1, s11, s2
 ; GCN-NEXT:    s_xor_b64 s[0:1], s[0:1], s[2:3]
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, s0, v1
 ; GCN-NEXT:    v_mul_hi_u32 v3, s0, v0
 ; GCN-NEXT:    v_mul_hi_u32 v4, s0, v1
-; GCN-NEXT:    v_mul_hi_u32 v5, s1, v1
+; GCN-NEXT:    v_mul_hi_u32 v7, s1, v1
 ; GCN-NEXT:    v_mul_lo_u32 v1, s1, v1
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v4, vcc
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v6, v4, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v4, s1, v0
 ; GCN-NEXT:    v_mul_hi_u32 v0, s1, v0
 ; GCN-NEXT:    s_mov_b32 s3, 0x12d8fb
+; GCN-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v0, vcc
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v5, v7, vcc
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v7, v5, vcc
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v8, v2, vcc
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v6, v2, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, v1, s3
 ; GCN-NEXT:    v_mul_hi_u32 v3, s3, v0
 ; GCN-NEXT:    v_mul_lo_u32 v4, v0, s3
+; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
 ; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s0, v4
 ; GCN-NEXT:    v_mov_b32_e32 v3, s1
@@ -6135,114 +6135,113 @@
 ; GCN-NEXT:    s_load_dword s4, s[0:1], 0xd
 ; GCN-NEXT:    s_mov_b32 s3, 0
 ; GCN-NEXT:    s_movk_i32 s2, 0x1000
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    v_mov_b32_e32 v3, 0
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    s_lshl_b64 s[2:3], s[2:3], s4
-; GCN-NEXT:    s_ashr_i32 s12, s3, 31
-; GCN-NEXT:    s_add_u32 s2, s2, s12
-; GCN-NEXT:    s_mov_b32 s13, s12
-; GCN-NEXT:    s_addc_u32 s3, s3, s12
-; GCN-NEXT:    s_xor_b64 s[2:3], s[2:3], s[12:13]
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s2
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s3
-; GCN-NEXT:    s_sub_u32 s4, 0, s2
-; GCN-NEXT:    s_subb_u32 s5, 0, s3
-; GCN-NEXT:    s_ashr_i32 s14, s11, 31
+; GCN-NEXT:    s_ashr_i32 s8, s3, 31
+; GCN-NEXT:    s_add_u32 s2, s2, s8
+; GCN-NEXT:    s_mov_b32 s9, s8
+; GCN-NEXT:    s_addc_u32 s3, s3, s8
+; GCN-NEXT:    s_xor_b64 s[10:11], s[2:3], s[8:9]
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s10
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s11
+; GCN-NEXT:    s_sub_u32 s12, 0, s10
+; GCN-NEXT:    s_subb_u32 s4, 0, s11
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0x4f800000, v1
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
-; GCN-NEXT:    s_mov_b32 s15, s14
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_mov_b32_e32 v1, 0
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
-; GCN-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
-; GCN-NEXT:    v_trunc_f32_e32 v1, v1
-; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v1
+; GCN-NEXT:    v_mul_f32_e32 v2, 0x2f800000, v0
+; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    v_mul_hi_u32 v3, s4, v0
-; GCN-NEXT:    v_mul_lo_u32 v2, s4, v1
-; GCN-NEXT:    v_mul_lo_u32 v5, s5, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, s4, v0
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, s12, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, s12, v2
+; GCN-NEXT:    v_mul_lo_u32 v7, s4, v0
+; GCN-NEXT:    v_mul_lo_u32 v6, s12, v0
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v5, v0, v6
+; GCN-NEXT:    v_mul_lo_u32 v7, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v9, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, v6
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v4
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, 0, v9, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
+; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v4
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v2, v5, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v6, s12, v4
+; GCN-NEXT:    v_mul_hi_u32 v7, s12, v0
+; GCN-NEXT:    v_mul_lo_u32 v8, s4, v0
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
+; GCN-NEXT:    v_mul_lo_u32 v7, s12, v0
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
+; GCN-NEXT:    v_mul_lo_u32 v9, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v7
+; GCN-NEXT:    v_mul_lo_u32 v7, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v8, v4, v6
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, 0, v11, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v4, v6
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v8, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v3, v7, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v3, v0, v4
-; GCN-NEXT:    v_mul_lo_u32 v5, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v6, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v7, v1, v2
-; GCN-NEXT:    v_mul_lo_u32 v2, v1, v2
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v6, s[2:3]
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_ashr_i32 s2, s7, 31
+; GCN-NEXT:    s_add_u32 s0, s6, s2
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
+; GCN-NEXT:    s_addc_u32 s1, s7, s2
+; GCN-NEXT:    s_mov_b32 s3, s2
+; GCN-NEXT:    s_xor_b64 s[12:13], s[0:1], s[2:3]
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v2, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, s12, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, s12, v0
+; GCN-NEXT:    v_mul_hi_u32 v6, s12, v2
+; GCN-NEXT:    v_mul_hi_u32 v7, s13, v2
+; GCN-NEXT:    v_mul_lo_u32 v2, s13, v2
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
 ; GCN-NEXT:    v_addc_u32_e32 v5, vcc, 0, v6, vcc
-; GCN-NEXT:    v_mul_lo_u32 v6, v1, v4
-; GCN-NEXT:    v_mul_hi_u32 v4, v1, v4
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v6, v3
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v5, v4, vcc
-; GCN-NEXT:    v_mov_b32_e32 v4, 0
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v4, vcc
+; GCN-NEXT:    v_mul_lo_u32 v6, s13, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s13, v0
+; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v5, v0, vcc
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v7, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v3, v1, vcc
+; GCN-NEXT:    v_mul_lo_u32 v2, s10, v1
+; GCN-NEXT:    v_mul_hi_u32 v3, s10, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, s11, v0
+; GCN-NEXT:    v_mov_b32_e32 v5, s11
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_mov_b32_e32 v6, 0
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v2
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v6, v5, vcc
-; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v5, s4, v2
-; GCN-NEXT:    v_mul_hi_u32 v7, s4, v0
-; GCN-NEXT:    v_mul_lo_u32 v8, s5, v0
-; GCN-NEXT:    s_mov_b32 s5, s9
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
-; GCN-NEXT:    v_mul_lo_u32 v7, s4, v0
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v2, v7
-; GCN-NEXT:    v_mul_lo_u32 v7, v2, v7
-; GCN-NEXT:    v_mul_hi_u32 v8, v2, v5
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, 0, v12, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, v2, v5
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v8, v4, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v7, v2
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v5, vcc
-; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v5, s[0:1]
-; GCN-NEXT:    s_add_u32 s0, s10, s14
-; GCN-NEXT:    s_addc_u32 s1, s11, s14
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
-; GCN-NEXT:    s_xor_b64 s[10:11], s[0:1], s[14:15]
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, s10, v1
-; GCN-NEXT:    v_mul_hi_u32 v3, s10, v0
-; GCN-NEXT:    v_mul_hi_u32 v5, s10, v1
-; GCN-NEXT:    v_mul_hi_u32 v7, s11, v1
-; GCN-NEXT:    v_mul_lo_u32 v1, s11, v1
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v5, s11, v0
-; GCN-NEXT:    v_mul_hi_u32 v0, s11, v0
-; GCN-NEXT:    s_mov_b32 s4, s8
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v0, vcc
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v7, v4, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v6, v2, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, s2, v1
-; GCN-NEXT:    v_mul_hi_u32 v3, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, s3, v0
-; GCN-NEXT:    v_mov_b32_e32 v5, s3
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_mul_lo_u32 v3, s2, v0
+; GCN-NEXT:    v_mul_lo_u32 v3, s10, v0
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s11, v2
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s10, v3
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s13, v2
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s12, v3
 ; GCN-NEXT:    v_subb_u32_e64 v4, s[0:1], v4, v5, vcc
-; GCN-NEXT:    v_subrev_i32_e64 v5, s[0:1], s2, v3
+; GCN-NEXT:    v_subrev_i32_e64 v5, s[0:1], s10, v3
 ; GCN-NEXT:    v_subbrev_u32_e64 v4, s[0:1], 0, v4, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s3, v4
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s11, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s2, v5
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s10, v5
 ; GCN-NEXT:    v_cndmask_b32_e64 v5, 0, -1, s[0:1]
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], s3, v4
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], s11, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v4, v6, v5, s[0:1]
 ; GCN-NEXT:    v_add_i32_e64 v5, s[0:1], 2, v0
 ; GCN-NEXT:    v_addc_u32_e64 v6, s[0:1], 0, v1, s[0:1]
@@ -6250,18 +6249,18 @@
 ; GCN-NEXT:    v_addc_u32_e64 v8, s[0:1], 0, v1, s[0:1]
 ; GCN-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v4, v8, v6, s[0:1]
-; GCN-NEXT:    v_mov_b32_e32 v6, s11
+; GCN-NEXT:    v_mov_b32_e32 v6, s13
 ; GCN-NEXT:    v_subb_u32_e32 v2, vcc, v6, v2, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s3, v2
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s11, v2
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s2, v3
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s10, v3
 ; GCN-NEXT:    v_cndmask_b32_e64 v3, 0, -1, vcc
-; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s3, v2
+; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s11, v2
 ; GCN-NEXT:    v_cndmask_b32_e32 v2, v6, v3, vcc
 ; GCN-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v7, v5, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
-; GCN-NEXT:    s_xor_b64 s[0:1], s[14:15], s[12:13]
+; GCN-NEXT:    s_xor_b64 s[0:1], s[2:3], s[8:9]
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v4, vcc
 ; GCN-NEXT:    v_xor_b32_e32 v0, s0, v0
 ; GCN-NEXT:    v_xor_b32_e32 v1, s1, v1
@@ -6332,10 +6331,8 @@
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0x4f800000
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0, v1
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
-; GCN-NEXT:    s_movk_i32 s6, 0xf001
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0xd
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    s_movk_i32 s10, 0xf001
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0xd
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
 ; GCN-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
@@ -6343,86 +6340,88 @@
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_ashr_i32 s0, s9, 31
-; GCN-NEXT:    s_lshr_b32 s0, s0, 20
-; GCN-NEXT:    v_mul_hi_u32 v2, s6, v0
-; GCN-NEXT:    v_mul_lo_u32 v3, v1, s6
-; GCN-NEXT:    s_add_u32 s2, s8, s0
-; GCN-NEXT:    s_addc_u32 s3, s9, 0
-; GCN-NEXT:    s_ashr_i32 s8, s11, 31
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v3
-; GCN-NEXT:    v_mul_lo_u32 v3, v0, s6
+; GCN-NEXT:    s_ashr_i32 s2, s5, 31
+; GCN-NEXT:    s_lshr_b32 s8, s2, 20
+; GCN-NEXT:    v_mul_hi_u32 v3, s10, v0
+; GCN-NEXT:    v_mul_lo_u32 v2, v1, s10
+; GCN-NEXT:    v_mul_lo_u32 v4, v0, s10
+; GCN-NEXT:    s_add_u32 s4, s4, s8
+; GCN-NEXT:    s_addc_u32 s5, s5, 0
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
 ; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v0, v2
-; GCN-NEXT:    v_mul_lo_u32 v4, v0, v2
+; GCN-NEXT:    v_mul_lo_u32 v3, v0, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, v0, v4
 ; GCN-NEXT:    v_mul_hi_u32 v6, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v5, v0, v3
-; GCN-NEXT:    v_mul_hi_u32 v7, v1, v2
-; GCN-NEXT:    v_mul_lo_u32 v2, v1, v2
-; GCN-NEXT:    s_ashr_i64 s[2:3], s[2:3], 12
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
+; GCN-NEXT:    v_mul_hi_u32 v7, v1, v4
+; GCN-NEXT:    v_mul_lo_u32 v4, v1, v4
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
 ; GCN-NEXT:    v_addc_u32_e32 v5, vcc, 0, v6, vcc
-; GCN-NEXT:    v_mul_lo_u32 v6, v1, v3
-; GCN-NEXT:    v_mul_hi_u32 v3, v1, v3
-; GCN-NEXT:    s_mov_b32 s9, s8
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v5, v3, vcc
+; GCN-NEXT:    v_mul_hi_u32 v6, v1, v2
+; GCN-NEXT:    v_mul_lo_u32 v2, v1, v2
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v5, v7, vcc
 ; GCN-NEXT:    v_mov_b32_e32 v4, 0
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v4, vcc
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v4, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
 ; GCN-NEXT:    v_mov_b32_e32 v6, 0
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v2
+; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v2
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v6, v5, vcc
-; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v5, v2, s6
-; GCN-NEXT:    v_mul_hi_u32 v7, s6, v0
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v5, v2, s10
+; GCN-NEXT:    v_mul_hi_u32 v7, s10, v0
+; GCN-NEXT:    s_ashr_i64 s[8:9], s[4:5], 12
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
-; GCN-NEXT:    v_mul_lo_u32 v7, v0, s6
+; GCN-NEXT:    v_mul_lo_u32 v7, v0, s10
 ; GCN-NEXT:    v_subrev_i32_e32 v5, vcc, v0, v5
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v2, v7
+; GCN-NEXT:    v_mul_lo_u32 v9, v0, v5
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v5
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v2, v7
 ; GCN-NEXT:    v_mul_lo_u32 v7, v2, v7
 ; GCN-NEXT:    v_mul_hi_u32 v8, v2, v5
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, 0, v12, vcc
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, 0, v11, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, v2, v5
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v8, v4, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v7, v2
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v5, vcc
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v8, v4, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v7, vcc
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v5, s[0:1]
-; GCN-NEXT:    s_add_u32 s0, s10, s8
-; GCN-NEXT:    s_addc_u32 s1, s11, s8
+; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v5, s[2:3]
+; GCN-NEXT:    s_ashr_i32 s2, s7, 31
+; GCN-NEXT:    s_add_u32 s4, s6, s2
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
-; GCN-NEXT:    s_xor_b64 s[0:1], s[0:1], s[8:9]
+; GCN-NEXT:    s_addc_u32 s5, s7, s2
+; GCN-NEXT:    s_mov_b32 s3, s2
+; GCN-NEXT:    s_xor_b64 s[10:11], s[4:5], s[2:3]
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, s0, v1
-; GCN-NEXT:    v_mul_hi_u32 v3, s0, v0
-; GCN-NEXT:    v_mul_hi_u32 v5, s0, v1
-; GCN-NEXT:    v_mul_hi_u32 v7, s1, v1
-; GCN-NEXT:    v_mul_lo_u32 v1, s1, v1
+; GCN-NEXT:    v_mul_lo_u32 v2, s10, v1
+; GCN-NEXT:    v_mul_hi_u32 v3, s10, v0
+; GCN-NEXT:    v_mul_hi_u32 v5, s10, v1
+; GCN-NEXT:    v_mul_hi_u32 v7, s11, v1
+; GCN-NEXT:    v_mul_lo_u32 v1, s11, v1
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v5, s1, v0
-; GCN-NEXT:    v_mul_hi_u32 v0, s1, v0
-; GCN-NEXT:    s_movk_i32 s9, 0xfff
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_mul_lo_u32 v5, s11, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s11, v0
+; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
+; GCN-NEXT:    s_movk_i32 s0, 0xfff
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v0, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v7, v4, vcc
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v6, v2, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, v1, s9
-; GCN-NEXT:    v_mul_hi_u32 v3, s9, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, v0, s9
+; GCN-NEXT:    v_mul_lo_u32 v2, v1, s0
+; GCN-NEXT:    v_mul_hi_u32 v3, s0, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, v0, s0
+; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s0, v4
-; GCN-NEXT:    v_mov_b32_e32 v3, s1
+; GCN-NEXT:    v_mov_b32_e32 v3, s11
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s10, v4
 ; GCN-NEXT:    v_subb_u32_e32 v2, vcc, v3, v2, vcc
-; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, s9, v4
+; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, s0, v4
 ; GCN-NEXT:    v_subbrev_u32_e32 v5, vcc, 0, v2, vcc
 ; GCN-NEXT:    s_movk_i32 s0, 0xffe
 ; GCN-NEXT:    v_cmp_lt_u32_e32 vcc, s0, v3
@@ -6443,13 +6442,14 @@
 ; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v3, v8, v6, vcc
 ; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[0:1]
-; GCN-NEXT:    v_xor_b32_e32 v0, s8, v0
-; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, s8, v0
-; GCN-NEXT:    v_xor_b32_e32 v1, s8, v1
-; GCN-NEXT:    v_mov_b32_e32 v3, s8
+; GCN-NEXT:    v_xor_b32_e32 v0, s2, v0
+; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, s2, v0
+; GCN-NEXT:    v_xor_b32_e32 v1, s2, v1
+; GCN-NEXT:    v_mov_b32_e32 v3, s2
 ; GCN-NEXT:    v_subb_u32_e32 v3, vcc, v1, v3, vcc
-; GCN-NEXT:    v_mov_b32_e32 v0, s2
-; GCN-NEXT:    v_mov_b32_e32 v1, s3
+; GCN-NEXT:    v_mov_b32_e32 v0, s8
+; GCN-NEXT:    v_mov_b32_e32 v1, s9
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
 ; GCN-NEXT:    s_endpgm
   %r = sdiv <2 x i64> %x, <i64 4096, i64 4095>
@@ -6476,243 +6476,243 @@
 ; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x11
 ; GCN-NEXT:    s_mov_b32 s3, 0
 ; GCN-NEXT:    s_movk_i32 s2, 0x1000
-; GCN-NEXT:    s_mov_b32 s18, 0x4f800000
-; GCN-NEXT:    s_mov_b32 s19, 0x5f7ffffc
+; GCN-NEXT:    s_mov_b32 s20, 0x4f800000
+; GCN-NEXT:    s_mov_b32 s21, 0x5f7ffffc
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_lshl_b64 s[12:13], s[2:3], s6
+; GCN-NEXT:    s_lshl_b64 s[10:11], s[2:3], s6
 ; GCN-NEXT:    s_lshl_b64 s[2:3], s[2:3], s4
 ; GCN-NEXT:    s_ashr_i32 s16, s3, 31
 ; GCN-NEXT:    s_add_u32 s2, s2, s16
 ; GCN-NEXT:    s_mov_b32 s17, s16
 ; GCN-NEXT:    s_addc_u32 s3, s3, s16
-; GCN-NEXT:    s_xor_b64 s[14:15], s[2:3], s[16:17]
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s14
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s15
-; GCN-NEXT:    s_mov_b32 s20, 0x2f800000
-; GCN-NEXT:    s_mov_b32 s21, 0xcf800000
-; GCN-NEXT:    s_sub_u32 s6, 0, s14
-; GCN-NEXT:    v_mac_f32_e32 v0, s18, v1
+; GCN-NEXT:    s_xor_b64 s[8:9], s[2:3], s[16:17]
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s8
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s9
+; GCN-NEXT:    s_mov_b32 s22, 0x2f800000
+; GCN-NEXT:    s_mov_b32 s23, 0xcf800000
+; GCN-NEXT:    s_sub_u32 s4, 0, s8
+; GCN-NEXT:    v_mac_f32_e32 v0, s20, v1
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
-; GCN-NEXT:    s_subb_u32 s7, 0, s15
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0xd
-; GCN-NEXT:    v_mul_f32_e32 v0, s19, v0
-; GCN-NEXT:    v_mul_f32_e32 v1, s20, v0
+; GCN-NEXT:    s_subb_u32 s5, 0, s9
+; GCN-NEXT:    s_load_dwordx4 s[12:15], s[0:1], 0xd
+; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    v_mul_f32_e32 v0, s21, v0
+; GCN-NEXT:    v_mul_f32_e32 v1, s22, v0
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
-; GCN-NEXT:    v_mac_f32_e32 v0, s21, v1
+; GCN-NEXT:    v_mac_f32_e32 v0, s23, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    v_mul_hi_u32 v3, s6, v0
-; GCN-NEXT:    v_mul_lo_u32 v2, s6, v1
-; GCN-NEXT:    v_mul_lo_u32 v4, s7, v0
-; GCN-NEXT:    v_mul_lo_u32 v5, s6, v0
+; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_mul_hi_u32 v3, s4, v0
+; GCN-NEXT:    v_mul_lo_u32 v2, s4, v1
+; GCN-NEXT:    v_mul_lo_u32 v5, s5, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, s4, v0
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
-; GCN-NEXT:    v_mul_lo_u32 v3, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v4, v0, v5
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, v4
+; GCN-NEXT:    v_mul_lo_u32 v5, v0, v2
 ; GCN-NEXT:    v_mul_hi_u32 v6, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v7, v1, v2
+; GCN-NEXT:    v_mul_hi_u32 v7, v1, v4
+; GCN-NEXT:    v_mul_lo_u32 v4, v1, v4
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, 0, v6, vcc
+; GCN-NEXT:    v_mul_hi_u32 v6, v1, v2
 ; GCN-NEXT:    v_mul_lo_u32 v2, v1, v2
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, 0, v6, vcc
-; GCN-NEXT:    v_mul_lo_u32 v6, v1, v5
-; GCN-NEXT:    v_mul_hi_u32 v5, v1, v5
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v6, v3
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v4, v5, vcc
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v5, v7, vcc
 ; GCN-NEXT:    v_mov_b32_e32 v4, 0
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v4, vcc
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v4, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
 ; GCN-NEXT:    v_mov_b32_e32 v6, 0
 ; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v2
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v6, v5, vcc
 ; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[2:3]
-; GCN-NEXT:    v_mul_lo_u32 v5, s6, v2
-; GCN-NEXT:    v_mul_hi_u32 v7, s6, v0
-; GCN-NEXT:    v_mul_lo_u32 v8, s7, v0
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    v_mul_lo_u32 v5, s4, v2
+; GCN-NEXT:    v_mul_hi_u32 v7, s4, v0
+; GCN-NEXT:    v_mul_lo_u32 v8, s5, v0
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
-; GCN-NEXT:    v_mul_lo_u32 v7, s6, v0
+; GCN-NEXT:    v_mul_lo_u32 v7, s4, v0
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v2, v7
+; GCN-NEXT:    v_mul_lo_u32 v9, v0, v5
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v5
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v2, v7
 ; GCN-NEXT:    v_mul_lo_u32 v7, v2, v7
 ; GCN-NEXT:    v_mul_hi_u32 v8, v2, v5
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, 0, v12, vcc
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, 0, v11, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, v2, v5
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v8, v4, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v7, v2
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v5, vcc
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v8, v4, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v7, vcc
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
 ; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v5, s[2:3]
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_ashr_i32 s2, s9, 31
-; GCN-NEXT:    s_add_u32 s0, s8, s2
+; GCN-NEXT:    s_ashr_i32 s2, s13, 31
+; GCN-NEXT:    s_add_u32 s4, s12, s2
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    s_addc_u32 s5, s13, s2
 ; GCN-NEXT:    s_mov_b32 s3, s2
-; GCN-NEXT:    s_addc_u32 s1, s9, s2
-; GCN-NEXT:    s_xor_b64 s[8:9], s[0:1], s[2:3]
+; GCN-NEXT:    s_xor_b64 s[12:13], s[4:5], s[2:3]
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, s8, v1
-; GCN-NEXT:    v_mul_hi_u32 v3, s8, v0
-; GCN-NEXT:    v_mul_hi_u32 v5, s8, v1
-; GCN-NEXT:    v_mul_hi_u32 v7, s9, v1
-; GCN-NEXT:    v_mul_lo_u32 v1, s9, v1
+; GCN-NEXT:    v_mul_lo_u32 v2, s12, v1
+; GCN-NEXT:    v_mul_hi_u32 v3, s12, v0
+; GCN-NEXT:    v_mul_hi_u32 v5, s12, v1
+; GCN-NEXT:    v_mul_hi_u32 v7, s13, v1
+; GCN-NEXT:    v_mul_lo_u32 v1, s13, v1
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v5, s9, v0
-; GCN-NEXT:    v_mul_hi_u32 v0, s9, v0
-; GCN-NEXT:    s_xor_b64 s[2:3], s[2:3], s[16:17]
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_mul_lo_u32 v5, s13, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s13, v0
+; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
+; GCN-NEXT:    s_ashr_i32 s18, s11, 31
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v0, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v7, v4, vcc
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v6, v2, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, s14, v1
-; GCN-NEXT:    v_mul_hi_u32 v3, s14, v0
-; GCN-NEXT:    v_mul_lo_u32 v5, s15, v0
-; GCN-NEXT:    v_mov_b32_e32 v7, s15
+; GCN-NEXT:    v_mul_lo_u32 v2, s8, v1
+; GCN-NEXT:    v_mul_hi_u32 v3, s8, v0
+; GCN-NEXT:    v_mul_lo_u32 v5, s9, v0
+; GCN-NEXT:    v_mov_b32_e32 v7, s9
+; GCN-NEXT:    s_xor_b64 s[16:17], s[2:3], s[16:17]
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_mul_lo_u32 v3, s14, v0
+; GCN-NEXT:    v_mul_lo_u32 v3, s8, v0
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
-; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s9, v2
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s8, v3
+; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s13, v2
+; GCN-NEXT:    s_mov_b32 s19, s18
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s12, v3
 ; GCN-NEXT:    v_subb_u32_e64 v5, s[0:1], v5, v7, vcc
-; GCN-NEXT:    v_subrev_i32_e64 v7, s[0:1], s14, v3
+; GCN-NEXT:    v_subrev_i32_e64 v7, s[0:1], s8, v3
 ; GCN-NEXT:    v_subbrev_u32_e64 v5, s[0:1], 0, v5, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s15, v5
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s9, v5
 ; GCN-NEXT:    v_cndmask_b32_e64 v8, 0, -1, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s14, v7
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s8, v7
 ; GCN-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[0:1]
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], s15, v5
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], s9, v5
 ; GCN-NEXT:    v_cndmask_b32_e64 v5, v8, v7, s[0:1]
 ; GCN-NEXT:    v_add_i32_e64 v7, s[0:1], 2, v0
 ; GCN-NEXT:    v_addc_u32_e64 v8, s[0:1], 0, v1, s[0:1]
 ; GCN-NEXT:    v_add_i32_e64 v9, s[0:1], 1, v0
 ; GCN-NEXT:    v_addc_u32_e64 v10, s[0:1], 0, v1, s[0:1]
-; GCN-NEXT:    s_ashr_i32 s8, s13, 31
+; GCN-NEXT:    s_add_u32 s0, s10, s18
+; GCN-NEXT:    s_addc_u32 s1, s11, s18
+; GCN-NEXT:    s_xor_b64 s[10:11], s[0:1], s[18:19]
+; GCN-NEXT:    v_cvt_f32_u32_e32 v11, s10
+; GCN-NEXT:    v_cvt_f32_u32_e32 v12, s11
 ; GCN-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, v5
-; GCN-NEXT:    s_add_u32 s12, s12, s8
 ; GCN-NEXT:    v_cndmask_b32_e64 v5, v10, v8, s[0:1]
-; GCN-NEXT:    v_mov_b32_e32 v8, s9
-; GCN-NEXT:    s_mov_b32 s9, s8
-; GCN-NEXT:    s_addc_u32 s13, s13, s8
-; GCN-NEXT:    s_xor_b64 s[12:13], s[12:13], s[8:9]
-; GCN-NEXT:    v_cvt_f32_u32_e32 v10, s12
-; GCN-NEXT:    v_cvt_f32_u32_e32 v11, s13
+; GCN-NEXT:    v_mov_b32_e32 v8, s13
+; GCN-NEXT:    v_mac_f32_e32 v11, s20, v12
 ; GCN-NEXT:    v_subb_u32_e32 v2, vcc, v8, v2, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s15, v2
-; GCN-NEXT:    v_cndmask_b32_e64 v8, 0, -1, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s14, v3
+; GCN-NEXT:    v_rcp_f32_e32 v8, v11
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s9, v2
+; GCN-NEXT:    v_cndmask_b32_e64 v10, 0, -1, vcc
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s8, v3
+; GCN-NEXT:    v_mul_f32_e32 v8, s21, v8
+; GCN-NEXT:    v_mul_f32_e32 v11, s22, v8
+; GCN-NEXT:    v_trunc_f32_e32 v11, v11
+; GCN-NEXT:    v_mac_f32_e32 v8, s23, v11
+; GCN-NEXT:    v_cvt_u32_f32_e32 v8, v8
+; GCN-NEXT:    v_cvt_u32_f32_e32 v11, v11
+; GCN-NEXT:    s_sub_u32 s8, 0, s10
+; GCN-NEXT:    s_subb_u32 s12, 0, s11
+; GCN-NEXT:    v_mul_hi_u32 v12, s8, v8
+; GCN-NEXT:    v_mul_lo_u32 v13, s8, v11
 ; GCN-NEXT:    v_cndmask_b32_e64 v3, 0, -1, vcc
-; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s15, v2
-; GCN-NEXT:    v_mac_f32_e32 v10, s18, v11
-; GCN-NEXT:    v_cndmask_b32_e32 v2, v8, v3, vcc
-; GCN-NEXT:    v_rcp_f32_e32 v3, v10
-; GCN-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
-; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v5, vcc
-; GCN-NEXT:    s_sub_u32 s14, 0, s12
-; GCN-NEXT:    v_mul_f32_e32 v3, s19, v3
-; GCN-NEXT:    v_mul_f32_e32 v5, s20, v3
-; GCN-NEXT:    v_trunc_f32_e32 v5, v5
-; GCN-NEXT:    v_mac_f32_e32 v3, s21, v5
-; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
-; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v5
+; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s9, v2
+; GCN-NEXT:    v_mul_lo_u32 v14, s12, v8
+; GCN-NEXT:    v_cndmask_b32_e32 v2, v10, v3, vcc
+; GCN-NEXT:    v_mul_lo_u32 v10, s8, v8
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v12, v13
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v14
+; GCN-NEXT:    v_mul_lo_u32 v13, v8, v3
+; GCN-NEXT:    v_mul_hi_u32 v14, v8, v10
+; GCN-NEXT:    v_mul_hi_u32 v12, v8, v3
+; GCN-NEXT:    v_cmp_ne_u32_e64 s[2:3], 0, v2
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v9, v7, s[0:1]
-; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
-; GCN-NEXT:    v_mul_hi_u32 v2, s14, v3
-; GCN-NEXT:    v_mul_lo_u32 v7, s14, v5
-; GCN-NEXT:    s_subb_u32 s15, 0, s13
-; GCN-NEXT:    v_mul_lo_u32 v8, s15, v3
-; GCN-NEXT:    v_xor_b32_e32 v0, s2, v0
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v7
-; GCN-NEXT:    v_mul_lo_u32 v7, s14, v3
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v8
-; GCN-NEXT:    v_mul_lo_u32 v8, v3, v2
-; GCN-NEXT:    v_mul_hi_u32 v10, v3, v2
-; GCN-NEXT:    v_mul_hi_u32 v9, v3, v7
-; GCN-NEXT:    v_mul_hi_u32 v11, v5, v2
-; GCN-NEXT:    v_mul_lo_u32 v2, v5, v2
-; GCN-NEXT:    v_xor_b32_e32 v1, s3, v1
+; GCN-NEXT:    v_mul_lo_u32 v9, v11, v10
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v5, s[2:3]
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v14, v13
+; GCN-NEXT:    v_mul_hi_u32 v10, v11, v10
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, 0, v12, vcc
+; GCN-NEXT:    v_mul_hi_u32 v12, v11, v3
+; GCN-NEXT:    v_mul_lo_u32 v3, v11, v3
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v9, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v10, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v12, v4, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
+; GCN-NEXT:    v_add_i32_e64 v3, s[0:1], v8, v3
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v7, vcc
+; GCN-NEXT:    v_addc_u32_e64 v7, vcc, v11, v5, s[0:1]
+; GCN-NEXT:    v_mul_lo_u32 v8, s8, v7
+; GCN-NEXT:    v_mul_hi_u32 v9, s8, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v2, s12, v3
+; GCN-NEXT:    s_ashr_i32 s2, s15, 31
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, 0, v10, vcc
-; GCN-NEXT:    v_mul_lo_u32 v10, v5, v7
-; GCN-NEXT:    v_mul_hi_u32 v7, v5, v7
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v9, v7, vcc
-; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v11, v4, vcc
+; GCN-NEXT:    v_mul_lo_u32 v9, s8, v3
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v8
+; GCN-NEXT:    v_mul_lo_u32 v10, v3, v2
+; GCN-NEXT:    v_mul_hi_u32 v13, v3, v2
+; GCN-NEXT:    v_mul_hi_u32 v12, v3, v9
+; GCN-NEXT:    v_mul_hi_u32 v14, v7, v9
+; GCN-NEXT:    v_mul_lo_u32 v9, v7, v9
+; GCN-NEXT:    v_mul_hi_u32 v8, v7, v2
+; GCN-NEXT:    v_add_i32_e32 v10, vcc, v12, v10
+; GCN-NEXT:    v_addc_u32_e32 v12, vcc, 0, v13, vcc
+; GCN-NEXT:    v_mul_lo_u32 v2, v7, v2
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v9, v10
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v12, v14, vcc
+; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v8, v4, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v7, v2
-; GCN-NEXT:    v_add_i32_e64 v2, s[0:1], v3, v2
 ; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v6, v8, vcc
-; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v5, v7, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v8, s14, v3
-; GCN-NEXT:    v_mul_hi_u32 v9, s14, v2
-; GCN-NEXT:    v_mul_lo_u32 v10, s15, v2
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
-; GCN-NEXT:    v_mul_lo_u32 v9, s14, v2
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
-; GCN-NEXT:    v_mul_lo_u32 v12, v2, v8
-; GCN-NEXT:    v_mul_hi_u32 v14, v2, v8
-; GCN-NEXT:    v_mul_hi_u32 v13, v2, v9
-; GCN-NEXT:    v_mul_hi_u32 v11, v3, v9
-; GCN-NEXT:    v_mul_lo_u32 v9, v3, v9
-; GCN-NEXT:    v_mul_hi_u32 v10, v3, v8
-; GCN-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
-; GCN-NEXT:    v_addc_u32_e32 v13, vcc, 0, v14, vcc
-; GCN-NEXT:    v_mul_lo_u32 v3, v3, v8
-; GCN-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v13, v11, vcc
-; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v10, v4, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v9, v3
-; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v6, v8, vcc
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
-; GCN-NEXT:    s_ashr_i32 s14, s11, 31
-; GCN-NEXT:    v_addc_u32_e64 v5, vcc, v5, v8, s[0:1]
-; GCN-NEXT:    s_add_u32 s0, s10, s14
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v3
-; GCN-NEXT:    s_mov_b32 s15, s14
-; GCN-NEXT:    s_addc_u32 s1, s11, s14
-; GCN-NEXT:    s_xor_b64 s[10:11], s[0:1], s[14:15]
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v11, v5
+; GCN-NEXT:    v_addc_u32_e64 v5, vcc, v5, v7, s[0:1]
+; GCN-NEXT:    s_add_u32 s0, s14, s2
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
+; GCN-NEXT:    s_mov_b32 s3, s2
+; GCN-NEXT:    s_addc_u32 s1, s15, s2
+; GCN-NEXT:    s_xor_b64 s[8:9], s[0:1], s[2:3]
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v5, s10, v3
-; GCN-NEXT:    v_mul_hi_u32 v7, s10, v2
-; GCN-NEXT:    v_mul_hi_u32 v9, s10, v3
-; GCN-NEXT:    v_mul_hi_u32 v10, s11, v3
-; GCN-NEXT:    v_mul_lo_u32 v3, s11, v3
+; GCN-NEXT:    v_mul_lo_u32 v5, s8, v3
+; GCN-NEXT:    v_mul_hi_u32 v7, s8, v2
+; GCN-NEXT:    v_mul_hi_u32 v8, s8, v3
+; GCN-NEXT:    v_mul_hi_u32 v10, s9, v3
+; GCN-NEXT:    v_mul_lo_u32 v3, s9, v3
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, 0, v9, vcc
-; GCN-NEXT:    v_mul_lo_u32 v9, s11, v2
-; GCN-NEXT:    v_mul_hi_u32 v2, s11, v2
-; GCN-NEXT:    v_mov_b32_e32 v8, s3
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v9, v5
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, 0, v8, vcc
+; GCN-NEXT:    v_mul_lo_u32 v8, s9, v2
+; GCN-NEXT:    v_mul_hi_u32 v2, s9, v2
+; GCN-NEXT:    v_xor_b32_e32 v0, s16, v0
+; GCN-NEXT:    v_xor_b32_e32 v1, s17, v1
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
 ; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v7, v2, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v10, v4, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v3
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v6, v4, vcc
-; GCN-NEXT:    v_mul_lo_u32 v4, s12, v3
-; GCN-NEXT:    v_mul_hi_u32 v5, s12, v2
-; GCN-NEXT:    v_mul_lo_u32 v6, s13, v2
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s2, v0
-; GCN-NEXT:    v_subb_u32_e32 v1, vcc, v1, v8, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, s10, v3
+; GCN-NEXT:    v_mul_hi_u32 v5, s10, v2
+; GCN-NEXT:    v_mul_lo_u32 v6, s11, v2
+; GCN-NEXT:    v_mov_b32_e32 v9, s17
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s16, v0
+; GCN-NEXT:    v_subb_u32_e32 v1, vcc, v1, v9, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_mul_lo_u32 v5, s12, v2
+; GCN-NEXT:    v_mul_lo_u32 v5, s10, v2
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v6
-; GCN-NEXT:    v_sub_i32_e32 v6, vcc, s11, v4
-; GCN-NEXT:    v_mov_b32_e32 v7, s13
-; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s10, v5
+; GCN-NEXT:    v_sub_i32_e32 v6, vcc, s9, v4
+; GCN-NEXT:    v_mov_b32_e32 v7, s11
+; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s8, v5
 ; GCN-NEXT:    v_subb_u32_e64 v6, s[0:1], v6, v7, vcc
-; GCN-NEXT:    v_subrev_i32_e64 v7, s[0:1], s12, v5
+; GCN-NEXT:    v_subrev_i32_e64 v7, s[0:1], s10, v5
 ; GCN-NEXT:    v_subbrev_u32_e64 v6, s[0:1], 0, v6, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s13, v6
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s11, v6
 ; GCN-NEXT:    v_cndmask_b32_e64 v8, 0, -1, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s12, v7
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s10, v7
 ; GCN-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[0:1]
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], s13, v6
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], s11, v6
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, v8, v7, s[0:1]
 ; GCN-NEXT:    v_add_i32_e64 v7, s[0:1], 2, v2
 ; GCN-NEXT:    v_addc_u32_e64 v8, s[0:1], 0, v3, s[0:1]
@@ -6720,24 +6720,25 @@
 ; GCN-NEXT:    v_addc_u32_e64 v10, s[0:1], 0, v3, s[0:1]
 ; GCN-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, v6
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, v10, v8, s[0:1]
-; GCN-NEXT:    v_mov_b32_e32 v8, s11
+; GCN-NEXT:    v_mov_b32_e32 v8, s9
 ; GCN-NEXT:    v_subb_u32_e32 v4, vcc, v8, v4, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s13, v4
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s11, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v8, 0, -1, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s12, v5
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s10, v5
 ; GCN-NEXT:    v_cndmask_b32_e64 v5, 0, -1, vcc
-; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s13, v4
+; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s11, v4
 ; GCN-NEXT:    v_cndmask_b32_e32 v4, v8, v5, vcc
 ; GCN-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v4, v9, v7, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc
-; GCN-NEXT:    s_xor_b64 s[0:1], s[14:15], s[8:9]
+; GCN-NEXT:    s_xor_b64 s[0:1], s[2:3], s[18:19]
 ; GCN-NEXT:    v_cndmask_b32_e32 v3, v3, v6, vcc
 ; GCN-NEXT:    v_xor_b32_e32 v2, s0, v2
 ; GCN-NEXT:    v_xor_b32_e32 v3, s1, v3
 ; GCN-NEXT:    v_mov_b32_e32 v4, s1
 ; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, s0, v2
 ; GCN-NEXT:    v_subb_u32_e32 v3, vcc, v3, v4, vcc
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
 ; GCN-NEXT:    s_endpgm
   %shl.y = shl <2 x i64> <i64 4096, i64 4096>, %y
@@ -6757,88 +6758,86 @@
 ; GCN-NEXT:    v_mov_b32_e32 v0, 0x4f800000
 ; GCN-NEXT:    v_madak_f32 v0, 0, v0, 0x4996c7d8
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
-; GCN-NEXT:    s_mov_b32 s2, 0xffed2705
-; GCN-NEXT:    v_mov_b32_e32 v8, 0
-; GCN-NEXT:    v_mov_b32_e32 v7, 0
+; GCN-NEXT:    s_mov_b32 s8, 0xffed2705
+; GCN-NEXT:    v_mov_b32_e32 v6, 0
+; GCN-NEXT:    v_mov_b32_e32 v5, 0
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
 ; GCN-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    v_mul_hi_u32 v3, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v2, v1, s2
-; GCN-NEXT:    v_mul_lo_u32 v4, v0, s2
-; GCN-NEXT:    s_mov_b32 s6, -1
-; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_mov_b32 s4, s8
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
+; GCN-NEXT:    v_mul_hi_u32 v3, s8, v0
+; GCN-NEXT:    v_mul_lo_u32 v2, v1, s8
+; GCN-NEXT:    v_mul_lo_u32 v4, v0, s8
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
 ; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v0, v2
-; GCN-NEXT:    v_mul_lo_u32 v5, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v6, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v3, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v9, v1, v2
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, v4
+; GCN-NEXT:    v_mul_lo_u32 v7, v0, v2
+; GCN-NEXT:    v_mul_hi_u32 v8, v0, v2
+; GCN-NEXT:    v_mul_hi_u32 v9, v1, v4
+; GCN-NEXT:    v_mul_lo_u32 v4, v1, v4
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v7
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v6, v8, vcc
+; GCN-NEXT:    v_mul_hi_u32 v8, v1, v2
 ; GCN-NEXT:    v_mul_lo_u32 v2, v1, v2
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_mul_lo_u32 v6, v1, v4
-; GCN-NEXT:    v_mul_hi_u32 v4, v1, v4
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v3, vcc
-; GCN-NEXT:    s_mov_b32 s5, s9
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v3, v4, vcc
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v9, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v7, v9, vcc
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v8, v5, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v2
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v4, vcc
-; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v4, v2, s2
-; GCN-NEXT:    v_mul_hi_u32 v5, s2, v0
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_mul_lo_u32 v5, v0, s2
+; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v2
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v6, v4, vcc
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, s8
+; GCN-NEXT:    v_mul_hi_u32 v7, s8, v0
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v7, v4
+; GCN-NEXT:    v_mul_lo_u32 v7, v0, s8
 ; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v0, v4
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v9, v2, v5
-; GCN-NEXT:    v_mul_lo_u32 v5, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v6, v2, v4
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v8, v12, vcc
+; GCN-NEXT:    v_mul_lo_u32 v9, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v2, v7
+; GCN-NEXT:    v_mul_lo_u32 v7, v2, v7
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v4
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v6, v11, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, v2, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v10
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v11, v9, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v8, v5, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
 ; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v6, v7, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v8, v4, vcc
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    s_ashr_i32 s2, s11, 31
-; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v4, s[0:1]
-; GCN-NEXT:    s_add_u32 s0, s10, s2
+; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v4, s[2:3]
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_ashr_i32 s2, s7, 31
+; GCN-NEXT:    s_add_u32 s0, s6, s2
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    s_addc_u32 s1, s7, s2
 ; GCN-NEXT:    s_mov_b32 s3, s2
-; GCN-NEXT:    s_addc_u32 s1, s11, s2
 ; GCN-NEXT:    s_xor_b64 s[0:1], s[0:1], s[2:3]
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, s0, v1
 ; GCN-NEXT:    v_mul_hi_u32 v3, s0, v0
 ; GCN-NEXT:    v_mul_hi_u32 v4, s0, v1
-; GCN-NEXT:    v_mul_hi_u32 v5, s1, v1
+; GCN-NEXT:    v_mul_hi_u32 v7, s1, v1
 ; GCN-NEXT:    v_mul_lo_u32 v1, s1, v1
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v4, vcc
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v6, v4, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v4, s1, v0
 ; GCN-NEXT:    v_mul_hi_u32 v0, s1, v0
 ; GCN-NEXT:    s_mov_b32 s3, 0x12d8fb
+; GCN-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v0, vcc
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v5, v7, vcc
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v7, v5, vcc
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v8, v2, vcc
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v6, v2, vcc
 ; GCN-NEXT:    v_mul_hi_u32 v2, s3, v0
 ; GCN-NEXT:    v_mul_lo_u32 v1, v1, s3
 ; GCN-NEXT:    v_mul_lo_u32 v0, v0, s3
+; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
 ; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
 ; GCN-NEXT:    v_mov_b32_e32 v2, s1
@@ -6916,136 +6915,135 @@
 ; GCN-NEXT:    s_load_dword s4, s[0:1], 0xd
 ; GCN-NEXT:    s_mov_b32 s3, 0
 ; GCN-NEXT:    s_movk_i32 s2, 0x1000
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    v_mov_b32_e32 v3, 0
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    s_lshl_b64 s[2:3], s[2:3], s4
 ; GCN-NEXT:    s_ashr_i32 s4, s3, 31
 ; GCN-NEXT:    s_add_u32 s2, s2, s4
 ; GCN-NEXT:    s_mov_b32 s5, s4
 ; GCN-NEXT:    s_addc_u32 s3, s3, s4
-; GCN-NEXT:    s_xor_b64 s[12:13], s[2:3], s[4:5]
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s12
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s13
-; GCN-NEXT:    s_sub_u32 s2, 0, s12
-; GCN-NEXT:    s_subb_u32 s3, 0, s13
-; GCN-NEXT:    s_ashr_i32 s14, s11, 31
+; GCN-NEXT:    s_xor_b64 s[8:9], s[2:3], s[4:5]
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s8
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s9
+; GCN-NEXT:    s_sub_u32 s10, 0, s8
+; GCN-NEXT:    s_subb_u32 s4, 0, s9
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0x4f800000, v1
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
-; GCN-NEXT:    s_mov_b32 s15, s14
-; GCN-NEXT:    s_mov_b32 s6, -1
-; GCN-NEXT:    s_mov_b32 s4, s8
+; GCN-NEXT:    v_mov_b32_e32 v1, 0
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
-; GCN-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
-; GCN-NEXT:    v_trunc_f32_e32 v1, v1
-; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v1
+; GCN-NEXT:    v_mul_f32_e32 v2, 0x2f800000, v0
+; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    s_mov_b32 s5, s9
-; GCN-NEXT:    v_mul_hi_u32 v3, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v2, s2, v1
-; GCN-NEXT:    v_mul_lo_u32 v5, s3, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, s2, v0
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, s10, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, s10, v2
+; GCN-NEXT:    v_mul_lo_u32 v7, s4, v0
+; GCN-NEXT:    v_mul_lo_u32 v6, s10, v0
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v5, v0, v6
+; GCN-NEXT:    v_mul_lo_u32 v7, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v9, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, v6
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v4
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, 0, v9, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
+; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v4
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v2, v5, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v6, s10, v4
+; GCN-NEXT:    v_mul_hi_u32 v7, s10, v0
+; GCN-NEXT:    v_mul_lo_u32 v8, s4, v0
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
+; GCN-NEXT:    v_mul_lo_u32 v7, s10, v0
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
+; GCN-NEXT:    v_mul_lo_u32 v9, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v7
+; GCN-NEXT:    v_mul_lo_u32 v7, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v8, v4, v6
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, 0, v11, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v4, v6
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v8, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_ashr_i32 s10, s7, 31
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v3, v7, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v3, v0, v4
-; GCN-NEXT:    v_mul_lo_u32 v5, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v6, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v7, v1, v2
-; GCN-NEXT:    v_mul_lo_u32 v2, v1, v2
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
+; GCN-NEXT:    s_add_u32 s0, s6, s10
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v6, s[2:3]
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
+; GCN-NEXT:    s_addc_u32 s1, s7, s10
+; GCN-NEXT:    s_mov_b32 s11, s10
+; GCN-NEXT:    s_xor_b64 s[12:13], s[0:1], s[10:11]
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v2, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, s12, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, s12, v0
+; GCN-NEXT:    v_mul_hi_u32 v6, s12, v2
+; GCN-NEXT:    v_mul_hi_u32 v7, s13, v2
+; GCN-NEXT:    v_mul_lo_u32 v2, s13, v2
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
 ; GCN-NEXT:    v_addc_u32_e32 v5, vcc, 0, v6, vcc
-; GCN-NEXT:    v_mul_lo_u32 v6, v1, v4
-; GCN-NEXT:    v_mul_hi_u32 v4, v1, v4
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v6, v3
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v5, v4, vcc
-; GCN-NEXT:    v_mov_b32_e32 v4, 0
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v4, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_mov_b32_e32 v6, 0
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v2
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v6, v5, vcc
-; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v5, s2, v2
-; GCN-NEXT:    v_mul_hi_u32 v7, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v8, s3, v0
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
-; GCN-NEXT:    v_mul_lo_u32 v7, s2, v0
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v2, v7
-; GCN-NEXT:    v_mul_lo_u32 v7, v2, v7
-; GCN-NEXT:    v_mul_hi_u32 v8, v2, v5
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, 0, v12, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, v2, v5
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v8, v4, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v7, v2
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v5, vcc
-; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v5, s[0:1]
-; GCN-NEXT:    s_add_u32 s0, s10, s14
-; GCN-NEXT:    s_addc_u32 s1, s11, s14
+; GCN-NEXT:    v_mul_lo_u32 v6, s13, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s13, v0
+; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v5, v0, vcc
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v7, v1, vcc
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
-; GCN-NEXT:    s_xor_b64 s[10:11], s[0:1], s[14:15]
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, s10, v1
-; GCN-NEXT:    v_mul_hi_u32 v3, s10, v0
-; GCN-NEXT:    v_mul_hi_u32 v5, s10, v1
-; GCN-NEXT:    v_mul_hi_u32 v7, s11, v1
-; GCN-NEXT:    v_mul_lo_u32 v1, s11, v1
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v5, s11, v0
-; GCN-NEXT:    v_mul_hi_u32 v0, s11, v0
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v0, vcc
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v7, v4, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v6, v2, vcc
-; GCN-NEXT:    v_mul_lo_u32 v1, s12, v1
-; GCN-NEXT:    v_mul_hi_u32 v2, s12, v0
-; GCN-NEXT:    v_mul_lo_u32 v3, s13, v0
-; GCN-NEXT:    v_mul_lo_u32 v0, s12, v0
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v3, v1, vcc
+; GCN-NEXT:    v_mul_lo_u32 v1, s8, v1
+; GCN-NEXT:    v_mul_hi_u32 v2, s8, v0
+; GCN-NEXT:    v_mul_lo_u32 v3, s9, v0
+; GCN-NEXT:    v_mul_lo_u32 v0, s8, v0
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s11, v1
-; GCN-NEXT:    v_mov_b32_e32 v3, s13
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s10, v0
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s13, v1
+; GCN-NEXT:    v_mov_b32_e32 v3, s9
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s12, v0
 ; GCN-NEXT:    v_subb_u32_e64 v2, s[0:1], v2, v3, vcc
-; GCN-NEXT:    v_subrev_i32_e64 v4, s[0:1], s12, v0
+; GCN-NEXT:    v_subrev_i32_e64 v4, s[0:1], s8, v0
 ; GCN-NEXT:    v_subbrev_u32_e64 v5, s[2:3], 0, v2, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s13, v5
+; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s9, v5
 ; GCN-NEXT:    v_subb_u32_e64 v2, s[0:1], v2, v3, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, s[2:3]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s12, v4
-; GCN-NEXT:    v_subrev_i32_e64 v3, s[0:1], s12, v4
+; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s8, v4
+; GCN-NEXT:    v_subrev_i32_e64 v3, s[0:1], s8, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[2:3]
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], s13, v5
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], s9, v5
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, v6, v7, s[2:3]
 ; GCN-NEXT:    v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
 ; GCN-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, v6
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v5, v2, s[0:1]
-; GCN-NEXT:    v_mov_b32_e32 v5, s11
+; GCN-NEXT:    v_mov_b32_e32 v5, s13
 ; GCN-NEXT:    v_subb_u32_e32 v1, vcc, v5, v1, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s13, v1
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s9, v1
 ; GCN-NEXT:    v_cndmask_b32_e64 v5, 0, -1, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s12, v0
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s8, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, vcc
-; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s13, v1
+; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s9, v1
 ; GCN-NEXT:    v_cndmask_b32_e32 v5, v5, v6, vcc
 ; GCN-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v5
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v4, v3, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
-; GCN-NEXT:    v_xor_b32_e32 v0, s14, v0
-; GCN-NEXT:    v_xor_b32_e32 v1, s14, v1
-; GCN-NEXT:    v_mov_b32_e32 v2, s14
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s14, v0
+; GCN-NEXT:    v_xor_b32_e32 v0, s10, v0
+; GCN-NEXT:    v_xor_b32_e32 v1, s10, v1
+; GCN-NEXT:    v_mov_b32_e32 v2, s10
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s10, v0
 ; GCN-NEXT:    v_subb_u32_e32 v1, vcc, v1, v2, vcc
 ; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
 ; GCN-NEXT:    s_endpgm
@@ -7121,23 +7119,23 @@
 ; GCN-NEXT:    s_mov_b32 s18, 0x4f800000
 ; GCN-NEXT:    s_mov_b32 s19, 0x5f7ffffc
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_lshl_b64 s[14:15], s[2:3], s6
+; GCN-NEXT:    s_lshl_b64 s[16:17], s[2:3], s6
 ; GCN-NEXT:    s_lshl_b64 s[2:3], s[2:3], s4
 ; GCN-NEXT:    s_ashr_i32 s4, s3, 31
 ; GCN-NEXT:    s_add_u32 s2, s2, s4
 ; GCN-NEXT:    s_mov_b32 s5, s4
 ; GCN-NEXT:    s_addc_u32 s3, s3, s4
-; GCN-NEXT:    s_xor_b64 s[16:17], s[2:3], s[4:5]
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s16
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s17
+; GCN-NEXT:    s_xor_b64 s[10:11], s[2:3], s[4:5]
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s10
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s11
 ; GCN-NEXT:    s_mov_b32 s20, 0x2f800000
 ; GCN-NEXT:    s_mov_b32 s21, 0xcf800000
-; GCN-NEXT:    s_sub_u32 s6, 0, s16
+; GCN-NEXT:    s_sub_u32 s4, 0, s10
 ; GCN-NEXT:    v_mac_f32_e32 v0, s18, v1
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
-; GCN-NEXT:    s_subb_u32 s7, 0, s17
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0xd
+; GCN-NEXT:    s_subb_u32 s5, 0, s11
+; GCN-NEXT:    s_load_dwordx4 s[12:15], s[0:1], 0xd
+; GCN-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-NEXT:    v_mul_f32_e32 v0, s19, v0
 ; GCN-NEXT:    v_mul_f32_e32 v1, s20, v0
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
@@ -7145,237 +7143,238 @@
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_ashr_i32 s12, s9, 31
-; GCN-NEXT:    s_add_u32 s0, s8, s12
-; GCN-NEXT:    v_mul_hi_u32 v3, s6, v0
-; GCN-NEXT:    v_mul_lo_u32 v2, s6, v1
-; GCN-NEXT:    v_mul_lo_u32 v4, s7, v0
-; GCN-NEXT:    v_mul_lo_u32 v5, s6, v0
-; GCN-NEXT:    s_mov_b32 s13, s12
+; GCN-NEXT:    s_ashr_i32 s8, s13, 31
+; GCN-NEXT:    s_mov_b32 s9, s8
+; GCN-NEXT:    v_mul_hi_u32 v3, s4, v0
+; GCN-NEXT:    v_mul_lo_u32 v2, s4, v1
+; GCN-NEXT:    v_mul_lo_u32 v5, s5, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, s4, v0
+; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
-; GCN-NEXT:    v_mul_lo_u32 v3, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v4, v0, v5
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, v4
+; GCN-NEXT:    v_mul_lo_u32 v5, v0, v2
 ; GCN-NEXT:    v_mul_hi_u32 v6, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v7, v1, v2
+; GCN-NEXT:    v_mul_hi_u32 v7, v1, v4
+; GCN-NEXT:    v_mul_lo_u32 v4, v1, v4
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, 0, v6, vcc
+; GCN-NEXT:    v_mul_hi_u32 v6, v1, v2
 ; GCN-NEXT:    v_mul_lo_u32 v2, v1, v2
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, 0, v6, vcc
-; GCN-NEXT:    v_mul_lo_u32 v6, v1, v5
-; GCN-NEXT:    v_mul_hi_u32 v5, v1, v5
-; GCN-NEXT:    s_addc_u32 s1, s9, s12
-; GCN-NEXT:    s_xor_b64 s[8:9], s[0:1], s[12:13]
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v6, v3
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v4, v5, vcc
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v5, v7, vcc
 ; GCN-NEXT:    v_mov_b32_e32 v4, 0
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v4, vcc
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v4, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
 ; GCN-NEXT:    v_mov_b32_e32 v6, 0
 ; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v2
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v6, v5, vcc
 ; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[2:3]
-; GCN-NEXT:    v_mul_lo_u32 v5, s6, v2
-; GCN-NEXT:    v_mul_hi_u32 v7, s6, v0
-; GCN-NEXT:    v_mul_lo_u32 v8, s7, v0
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    v_mul_lo_u32 v5, s4, v2
+; GCN-NEXT:    v_mul_hi_u32 v7, s4, v0
+; GCN-NEXT:    v_mul_lo_u32 v8, s5, v0
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
-; GCN-NEXT:    v_mul_lo_u32 v7, s6, v0
+; GCN-NEXT:    v_mul_lo_u32 v7, s4, v0
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v2, v7
+; GCN-NEXT:    v_mul_lo_u32 v9, v0, v5
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v5
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v2, v7
 ; GCN-NEXT:    v_mul_lo_u32 v7, v2, v7
 ; GCN-NEXT:    v_mul_hi_u32 v8, v2, v5
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, 0, v12, vcc
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, 0, v11, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, v2, v5
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v8, v4, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v7, v2
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v5, vcc
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v8, v4, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v7, vcc
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
 ; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v5, s[2:3]
+; GCN-NEXT:    s_add_u32 s2, s12, s8
+; GCN-NEXT:    s_addc_u32 s3, s13, s8
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    s_xor_b64 s[12:13], s[2:3], s[8:9]
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, s8, v1
-; GCN-NEXT:    v_mul_hi_u32 v3, s8, v0
-; GCN-NEXT:    v_mul_hi_u32 v5, s8, v1
-; GCN-NEXT:    v_mul_hi_u32 v7, s9, v1
-; GCN-NEXT:    v_mul_lo_u32 v1, s9, v1
+; GCN-NEXT:    v_mul_lo_u32 v2, s12, v1
+; GCN-NEXT:    v_mul_hi_u32 v3, s12, v0
+; GCN-NEXT:    v_mul_hi_u32 v5, s12, v1
+; GCN-NEXT:    v_mul_hi_u32 v7, s13, v1
+; GCN-NEXT:    v_mul_lo_u32 v1, s13, v1
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v5, s9, v0
-; GCN-NEXT:    v_mul_hi_u32 v0, s9, v0
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_mul_lo_u32 v5, s13, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s13, v0
+; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v0, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v7, v4, vcc
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v6, v2, vcc
-; GCN-NEXT:    v_mul_lo_u32 v1, s16, v1
-; GCN-NEXT:    v_mul_hi_u32 v2, s16, v0
-; GCN-NEXT:    v_mul_lo_u32 v3, s17, v0
-; GCN-NEXT:    v_mul_lo_u32 v0, s16, v0
+; GCN-NEXT:    v_mul_lo_u32 v1, s10, v1
+; GCN-NEXT:    v_mul_hi_u32 v2, s10, v0
+; GCN-NEXT:    v_mul_lo_u32 v3, s11, v0
+; GCN-NEXT:    v_mul_lo_u32 v0, s10, v0
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s9, v1
-; GCN-NEXT:    v_mov_b32_e32 v3, s17
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s8, v0
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s13, v1
+; GCN-NEXT:    v_mov_b32_e32 v3, s11
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s12, v0
 ; GCN-NEXT:    v_subb_u32_e64 v2, s[0:1], v2, v3, vcc
-; GCN-NEXT:    v_subrev_i32_e64 v5, s[0:1], s16, v0
+; GCN-NEXT:    v_subrev_i32_e64 v5, s[0:1], s10, v0
 ; GCN-NEXT:    v_subbrev_u32_e64 v7, s[2:3], 0, v2, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s17, v7
 ; GCN-NEXT:    v_subb_u32_e64 v2, s[0:1], v2, v3, s[0:1]
+; GCN-NEXT:    v_subrev_i32_e64 v3, s[0:1], s10, v5
+; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s11, v7
+; GCN-NEXT:    v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e64 v8, 0, -1, s[2:3]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s16, v5
-; GCN-NEXT:    v_subrev_i32_e64 v3, s[0:1], s16, v5
+; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s10, v5
 ; GCN-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[2:3]
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], s17, v7
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], s11, v7
+; GCN-NEXT:    s_ashr_i32 s0, s17, 31
 ; GCN-NEXT:    v_cndmask_b32_e64 v8, v8, v9, s[2:3]
-; GCN-NEXT:    s_ashr_i32 s2, s15, 31
-; GCN-NEXT:    v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
+; GCN-NEXT:    s_add_u32 s2, s16, s0
+; GCN-NEXT:    s_mov_b32 s1, s0
+; GCN-NEXT:    s_addc_u32 s3, s17, s0
+; GCN-NEXT:    s_xor_b64 s[16:17], s[2:3], s[0:1]
+; GCN-NEXT:    v_cvt_f32_u32_e32 v9, s16
+; GCN-NEXT:    v_cvt_f32_u32_e32 v10, s17
 ; GCN-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, v8
-; GCN-NEXT:    s_add_u32 s8, s14, s2
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v7, v2, s[0:1]
-; GCN-NEXT:    v_mov_b32_e32 v7, s9
-; GCN-NEXT:    s_mov_b32 s3, s2
-; GCN-NEXT:    s_addc_u32 s9, s15, s2
-; GCN-NEXT:    s_xor_b64 s[8:9], s[8:9], s[2:3]
-; GCN-NEXT:    v_cvt_f32_u32_e32 v8, s8
-; GCN-NEXT:    v_cvt_f32_u32_e32 v9, s9
+; GCN-NEXT:    v_mov_b32_e32 v7, s13
+; GCN-NEXT:    v_mac_f32_e32 v9, s18, v10
 ; GCN-NEXT:    v_subb_u32_e32 v1, vcc, v7, v1, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s17, v1
-; GCN-NEXT:    v_cndmask_b32_e64 v7, 0, -1, vcc
-; GCN-NEXT:    v_mac_f32_e32 v8, s18, v9
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s16, v0
-; GCN-NEXT:    v_rcp_f32_e32 v8, v8
-; GCN-NEXT:    v_cndmask_b32_e64 v10, 0, -1, vcc
-; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s17, v1
-; GCN-NEXT:    v_cndmask_b32_e32 v7, v7, v10, vcc
-; GCN-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
-; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc
+; GCN-NEXT:    v_rcp_f32_e32 v7, v9
+; GCN-NEXT:    s_sub_u32 s9, 0, s16
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s11, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v8, 0, -1, vcc
+; GCN-NEXT:    v_mul_f32_e32 v7, s19, v7
+; GCN-NEXT:    v_mul_f32_e32 v10, s20, v7
+; GCN-NEXT:    v_trunc_f32_e32 v10, v10
+; GCN-NEXT:    v_mac_f32_e32 v7, s21, v10
+; GCN-NEXT:    v_cvt_u32_f32_e32 v7, v7
+; GCN-NEXT:    v_cvt_u32_f32_e32 v10, v10
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s10, v0
+; GCN-NEXT:    s_subb_u32 s10, 0, s17
+; GCN-NEXT:    v_mul_hi_u32 v11, s9, v7
+; GCN-NEXT:    v_mul_lo_u32 v12, s9, v10
+; GCN-NEXT:    v_cndmask_b32_e64 v9, 0, -1, vcc
+; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s11, v1
+; GCN-NEXT:    v_mul_lo_u32 v13, s10, v7
+; GCN-NEXT:    v_cndmask_b32_e32 v8, v8, v9, vcc
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v11, v12
+; GCN-NEXT:    v_mul_lo_u32 v11, s9, v7
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v9, v13
+; GCN-NEXT:    v_mul_lo_u32 v13, v7, v9
+; GCN-NEXT:    v_mul_hi_u32 v12, v7, v9
+; GCN-NEXT:    v_mul_hi_u32 v14, v7, v11
+; GCN-NEXT:    v_cmp_ne_u32_e64 s[2:3], 0, v8
+; GCN-NEXT:    v_mul_lo_u32 v8, v10, v11
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v2, s[2:3]
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v5, v3, s[0:1]
-; GCN-NEXT:    v_mul_f32_e32 v3, s19, v8
-; GCN-NEXT:    v_mul_f32_e32 v5, s20, v3
-; GCN-NEXT:    v_trunc_f32_e32 v5, v5
-; GCN-NEXT:    v_mac_f32_e32 v3, s21, v5
-; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
-; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v5
-; GCN-NEXT:    s_sub_u32 s2, 0, s8
-; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
-; GCN-NEXT:    v_mul_hi_u32 v2, s2, v3
-; GCN-NEXT:    v_mul_lo_u32 v7, s2, v5
-; GCN-NEXT:    s_subb_u32 s3, 0, s9
-; GCN-NEXT:    v_mul_lo_u32 v8, s3, v3
-; GCN-NEXT:    s_ashr_i32 s14, s11, 31
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v7
-; GCN-NEXT:    v_mul_lo_u32 v7, s2, v3
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v8
-; GCN-NEXT:    v_mul_lo_u32 v8, v3, v2
-; GCN-NEXT:    v_mul_hi_u32 v10, v3, v2
-; GCN-NEXT:    v_mul_hi_u32 v9, v3, v7
-; GCN-NEXT:    v_mul_hi_u32 v11, v5, v2
-; GCN-NEXT:    v_mul_lo_u32 v2, v5, v2
-; GCN-NEXT:    s_mov_b32 s15, s14
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v14, v13
+; GCN-NEXT:    v_mul_hi_u32 v11, v10, v11
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, 0, v12, vcc
+; GCN-NEXT:    v_mul_hi_u32 v12, v10, v9
+; GCN-NEXT:    v_mul_lo_u32 v9, v10, v9
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v8, v3
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v5, v11, vcc
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v12, v4, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v9
+; GCN-NEXT:    v_add_i32_e64 v3, s[0:1], v7, v3
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v5, vcc
+; GCN-NEXT:    v_addc_u32_e64 v7, vcc, v10, v5, s[0:1]
+; GCN-NEXT:    v_mul_lo_u32 v8, s9, v7
+; GCN-NEXT:    v_mul_hi_u32 v9, s9, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v2, s10, v3
+; GCN-NEXT:    s_ashr_i32 s10, s15, 31
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, 0, v10, vcc
-; GCN-NEXT:    v_mul_lo_u32 v10, v5, v7
-; GCN-NEXT:    v_mul_hi_u32 v7, v5, v7
-; GCN-NEXT:    v_xor_b32_e32 v0, s12, v0
-; GCN-NEXT:    v_xor_b32_e32 v1, s12, v1
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v9, v7, vcc
-; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v11, v4, vcc
+; GCN-NEXT:    v_mul_lo_u32 v9, s9, v3
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v8
+; GCN-NEXT:    v_mul_lo_u32 v11, v3, v2
+; GCN-NEXT:    v_mul_hi_u32 v13, v3, v2
+; GCN-NEXT:    v_mul_hi_u32 v12, v3, v9
+; GCN-NEXT:    v_mul_hi_u32 v14, v7, v9
+; GCN-NEXT:    v_mul_lo_u32 v9, v7, v9
+; GCN-NEXT:    v_mul_hi_u32 v8, v7, v2
+; GCN-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
+; GCN-NEXT:    v_addc_u32_e32 v12, vcc, 0, v13, vcc
+; GCN-NEXT:    v_mul_lo_u32 v2, v7, v2
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v9, v11
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v12, v14, vcc
+; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v8, v4, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v7, v2
-; GCN-NEXT:    v_add_i32_e64 v2, s[0:1], v3, v2
 ; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v6, v8, vcc
-; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v5, v7, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v8, s2, v3
-; GCN-NEXT:    v_mul_hi_u32 v9, s2, v2
-; GCN-NEXT:    v_mul_lo_u32 v10, s3, v2
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
-; GCN-NEXT:    v_mul_lo_u32 v9, s2, v2
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
-; GCN-NEXT:    v_mul_lo_u32 v12, v2, v8
-; GCN-NEXT:    v_mul_hi_u32 v14, v2, v8
-; GCN-NEXT:    v_mul_hi_u32 v13, v2, v9
-; GCN-NEXT:    v_mul_hi_u32 v11, v3, v9
-; GCN-NEXT:    v_mul_lo_u32 v9, v3, v9
-; GCN-NEXT:    v_mul_hi_u32 v10, v3, v8
-; GCN-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
-; GCN-NEXT:    v_addc_u32_e32 v13, vcc, 0, v14, vcc
-; GCN-NEXT:    v_mul_lo_u32 v3, v3, v8
-; GCN-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v13, v11, vcc
-; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v10, v4, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v9, v3
-; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v6, v8, vcc
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
-; GCN-NEXT:    v_addc_u32_e64 v5, vcc, v5, v8, s[0:1]
-; GCN-NEXT:    s_add_u32 s0, s10, s14
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v3
-; GCN-NEXT:    s_addc_u32 s1, s11, s14
-; GCN-NEXT:    s_xor_b64 s[10:11], s[0:1], s[14:15]
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v10, v5
+; GCN-NEXT:    v_addc_u32_e64 v5, vcc, v5, v7, s[0:1]
+; GCN-NEXT:    s_add_u32 s0, s14, s10
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
+; GCN-NEXT:    s_mov_b32 s11, s10
+; GCN-NEXT:    s_addc_u32 s1, s15, s10
+; GCN-NEXT:    s_xor_b64 s[12:13], s[0:1], s[10:11]
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v5, s10, v3
-; GCN-NEXT:    v_mul_hi_u32 v7, s10, v2
-; GCN-NEXT:    v_mul_hi_u32 v9, s10, v3
-; GCN-NEXT:    v_mul_hi_u32 v10, s11, v3
-; GCN-NEXT:    v_mul_lo_u32 v3, s11, v3
+; GCN-NEXT:    v_mul_lo_u32 v5, s12, v3
+; GCN-NEXT:    v_mul_hi_u32 v7, s12, v2
+; GCN-NEXT:    v_mul_hi_u32 v8, s12, v3
+; GCN-NEXT:    v_mul_hi_u32 v10, s13, v3
+; GCN-NEXT:    v_mul_lo_u32 v3, s13, v3
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, 0, v9, vcc
-; GCN-NEXT:    v_mul_lo_u32 v9, s11, v2
-; GCN-NEXT:    v_mul_hi_u32 v2, s11, v2
-; GCN-NEXT:    v_mov_b32_e32 v8, s12
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v9, v5
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, 0, v8, vcc
+; GCN-NEXT:    v_mul_lo_u32 v8, s13, v2
+; GCN-NEXT:    v_mul_hi_u32 v2, s13, v2
+; GCN-NEXT:    v_xor_b32_e32 v0, s8, v0
+; GCN-NEXT:    v_xor_b32_e32 v1, s8, v1
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
 ; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v7, v2, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v10, v4, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v3
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v6, v4, vcc
-; GCN-NEXT:    v_mul_lo_u32 v3, s8, v3
-; GCN-NEXT:    v_mul_hi_u32 v4, s8, v2
-; GCN-NEXT:    v_mul_lo_u32 v5, s9, v2
-; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s12, v0
-; GCN-NEXT:    v_mul_lo_u32 v2, s8, v2
-; GCN-NEXT:    v_subb_u32_e32 v1, vcc, v1, v8, vcc
+; GCN-NEXT:    v_mul_lo_u32 v3, s16, v3
+; GCN-NEXT:    v_mul_hi_u32 v4, s16, v2
+; GCN-NEXT:    v_mul_lo_u32 v5, s17, v2
+; GCN-NEXT:    v_mov_b32_e32 v9, s8
+; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, s8, v0
+; GCN-NEXT:    v_mul_lo_u32 v2, s16, v2
+; GCN-NEXT:    v_subb_u32_e32 v1, vcc, v1, v9, vcc
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s11, v3
-; GCN-NEXT:    v_mov_b32_e32 v5, s9
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s10, v2
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s13, v3
+; GCN-NEXT:    v_mov_b32_e32 v5, s17
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s12, v2
 ; GCN-NEXT:    v_subb_u32_e64 v4, s[0:1], v4, v5, vcc
-; GCN-NEXT:    v_subrev_i32_e64 v6, s[0:1], s8, v2
+; GCN-NEXT:    v_subrev_i32_e64 v6, s[0:1], s16, v2
 ; GCN-NEXT:    v_subbrev_u32_e64 v7, s[2:3], 0, v4, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s9, v7
+; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s17, v7
 ; GCN-NEXT:    v_subb_u32_e64 v4, s[0:1], v4, v5, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e64 v8, 0, -1, s[2:3]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s8, v6
-; GCN-NEXT:    v_subrev_i32_e64 v5, s[0:1], s8, v6
+; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s16, v6
+; GCN-NEXT:    v_subrev_i32_e64 v5, s[0:1], s16, v6
 ; GCN-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[2:3]
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], s9, v7
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], s17, v7
 ; GCN-NEXT:    v_cndmask_b32_e64 v8, v8, v9, s[2:3]
 ; GCN-NEXT:    v_subbrev_u32_e64 v4, s[0:1], 0, v4, s[0:1]
 ; GCN-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, v8
 ; GCN-NEXT:    v_cndmask_b32_e64 v4, v7, v4, s[0:1]
-; GCN-NEXT:    v_mov_b32_e32 v7, s11
+; GCN-NEXT:    v_mov_b32_e32 v7, s13
 ; GCN-NEXT:    v_subb_u32_e32 v3, vcc, v7, v3, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s9, v3
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s17, v3
 ; GCN-NEXT:    v_cndmask_b32_e64 v7, 0, -1, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s8, v2
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s16, v2
 ; GCN-NEXT:    v_cndmask_b32_e64 v8, 0, -1, vcc
-; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s9, v3
+; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s17, v3
 ; GCN-NEXT:    v_cndmask_b32_e32 v7, v7, v8, vcc
 ; GCN-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
 ; GCN-NEXT:    v_cndmask_b32_e32 v3, v3, v4, vcc
 ; GCN-NEXT:    v_cndmask_b32_e64 v4, v6, v5, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc
-; GCN-NEXT:    v_xor_b32_e32 v2, s14, v2
-; GCN-NEXT:    v_xor_b32_e32 v3, s14, v3
-; GCN-NEXT:    v_mov_b32_e32 v4, s14
-; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, s14, v2
+; GCN-NEXT:    v_xor_b32_e32 v2, s10, v2
+; GCN-NEXT:    v_xor_b32_e32 v3, s10, v3
+; GCN-NEXT:    v_mov_b32_e32 v4, s10
+; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, s10, v2
 ; GCN-NEXT:    v_subb_u32_e32 v3, vcc, v3, v4, vcc
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
 ; GCN-NEXT:    s_endpgm
   %shl.y = shl <2 x i64> <i64 4096, i64 4096>, %y
diff --git a/llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll b/llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
--- a/llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
+++ b/llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
@@ -1312,12 +1312,12 @@
 ; GFX8-NEXT:    s_bcnt1_i32_b64 s6, s[6:7]
 ; GFX8-NEXT:    v_mov_b32_e32 v1, s6
 ; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX8-NEXT:    v_mul_hi_u32 v1, s2, v1
+; GFX8-NEXT:    v_mul_hi_u32 v2, s2, v1
 ; GFX8-NEXT:    s_mul_i32 s7, s3, s6
 ; GFX8-NEXT:    s_mul_i32 s6, s2, s6
-; GFX8-NEXT:    v_mov_b32_e32 v3, local_var64@abs32@lo
-; GFX8-NEXT:    v_add_u32_e32 v2, vcc, s7, v1
 ; GFX8-NEXT:    v_mov_b32_e32 v1, s6
+; GFX8-NEXT:    v_add_u32_e32 v2, vcc, s7, v2
+; GFX8-NEXT:    v_mov_b32_e32 v3, local_var64@abs32@lo
 ; GFX8-NEXT:    s_mov_b32 m0, -1
 ; GFX8-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 ; GFX8-NEXT:    ds_add_rtn_u64 v[1:2], v3, v[1:2]
@@ -1326,14 +1326,14 @@
 ; GFX8-NEXT:  BB6_2:
 ; GFX8-NEXT:    s_or_b64 exec, exec, s[4:5]
 ; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX8-NEXT:    s_mov_b32 s4, s0
-; GFX8-NEXT:    v_readfirstlane_b32 s0, v1
-; GFX8-NEXT:    v_mul_lo_u32 v1, s3, v0
-; GFX8-NEXT:    v_mul_hi_u32 v3, s2, v0
+; GFX8-NEXT:    v_mul_lo_u32 v3, s3, v0
+; GFX8-NEXT:    v_mul_hi_u32 v4, s2, v0
 ; GFX8-NEXT:    v_mul_lo_u32 v0, s2, v0
+; GFX8-NEXT:    s_mov_b32 s4, s0
 ; GFX8-NEXT:    s_mov_b32 s5, s1
 ; GFX8-NEXT:    v_readfirstlane_b32 s1, v2
-; GFX8-NEXT:    v_add_u32_e32 v1, vcc, v3, v1
+; GFX8-NEXT:    v_readfirstlane_b32 s0, v1
+; GFX8-NEXT:    v_add_u32_e32 v1, vcc, v4, v3
 ; GFX8-NEXT:    v_mov_b32_e32 v2, s1
 ; GFX8-NEXT:    v_add_u32_e32 v0, vcc, s0, v0
 ; GFX8-NEXT:    s_mov_b32 s7, 0xf000
@@ -2399,12 +2399,12 @@
 ; GFX8-NEXT:    s_bcnt1_i32_b64 s6, s[6:7]
 ; GFX8-NEXT:    v_mov_b32_e32 v1, s6
 ; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX8-NEXT:    v_mul_hi_u32 v1, s2, v1
+; GFX8-NEXT:    v_mul_hi_u32 v2, s2, v1
 ; GFX8-NEXT:    s_mul_i32 s7, s3, s6
 ; GFX8-NEXT:    s_mul_i32 s6, s2, s6
-; GFX8-NEXT:    v_mov_b32_e32 v3, local_var64@abs32@lo
-; GFX8-NEXT:    v_add_u32_e32 v2, vcc, s7, v1
 ; GFX8-NEXT:    v_mov_b32_e32 v1, s6
+; GFX8-NEXT:    v_add_u32_e32 v2, vcc, s7, v2
+; GFX8-NEXT:    v_mov_b32_e32 v3, local_var64@abs32@lo
 ; GFX8-NEXT:    s_mov_b32 m0, -1
 ; GFX8-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 ; GFX8-NEXT:    ds_sub_rtn_u64 v[1:2], v3, v[1:2]
@@ -2413,14 +2413,14 @@
 ; GFX8-NEXT:  BB12_2:
 ; GFX8-NEXT:    s_or_b64 exec, exec, s[4:5]
 ; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX8-NEXT:    s_mov_b32 s4, s0
-; GFX8-NEXT:    v_readfirstlane_b32 s0, v1
-; GFX8-NEXT:    v_mul_lo_u32 v1, s3, v0
-; GFX8-NEXT:    v_mul_hi_u32 v3, s2, v0
+; GFX8-NEXT:    v_mul_lo_u32 v3, s3, v0
+; GFX8-NEXT:    v_mul_hi_u32 v4, s2, v0
 ; GFX8-NEXT:    v_mul_lo_u32 v0, s2, v0
+; GFX8-NEXT:    s_mov_b32 s4, s0
 ; GFX8-NEXT:    s_mov_b32 s5, s1
 ; GFX8-NEXT:    v_readfirstlane_b32 s1, v2
-; GFX8-NEXT:    v_add_u32_e32 v1, vcc, v3, v1
+; GFX8-NEXT:    v_readfirstlane_b32 s0, v1
+; GFX8-NEXT:    v_add_u32_e32 v1, vcc, v4, v3
 ; GFX8-NEXT:    v_mov_b32_e32 v2, s1
 ; GFX8-NEXT:    v_sub_u32_e32 v0, vcc, s0, v0
 ; GFX8-NEXT:    s_mov_b32 s7, 0xf000
diff --git a/llvm/test/CodeGen/AMDGPU/bypass-div.ll b/llvm/test/CodeGen/AMDGPU/bypass-div.ll
--- a/llvm/test/CodeGen/AMDGPU/bypass-div.ll
+++ b/llvm/test/CodeGen/AMDGPU/bypass-div.ll
@@ -26,79 +26,79 @@
 ; GFX9-NEXT:    v_cvt_f32_u32_e32 v7, v5
 ; GFX9-NEXT:    v_sub_co_u32_e32 v8, vcc, 0, v4
 ; GFX9-NEXT:    v_subb_co_u32_e32 v9, vcc, 0, v5, vcc
-; GFX9-NEXT:    v_mov_b32_e32 v16, 0
+; GFX9-NEXT:    v_mov_b32_e32 v14, 0
 ; GFX9-NEXT:    v_mac_f32_e32 v6, 0x4f800000, v7
 ; GFX9-NEXT:    v_rcp_f32_e32 v6, v6
-; GFX9-NEXT:    v_mov_b32_e32 v15, 0
 ; GFX9-NEXT:    v_mul_f32_e32 v6, 0x5f7ffffc, v6
 ; GFX9-NEXT:    v_mul_f32_e32 v7, 0x2f800000, v6
 ; GFX9-NEXT:    v_trunc_f32_e32 v7, v7
 ; GFX9-NEXT:    v_mac_f32_e32 v6, 0xcf800000, v7
 ; GFX9-NEXT:    v_cvt_u32_f32_e32 v6, v6
 ; GFX9-NEXT:    v_cvt_u32_f32_e32 v7, v7
-; GFX9-NEXT:    v_mul_lo_u32 v10, v9, v6
-; GFX9-NEXT:    v_mul_hi_u32 v11, v8, v6
-; GFX9-NEXT:    v_mul_lo_u32 v12, v8, v7
+; GFX9-NEXT:    v_mul_lo_u32 v11, v9, v6
+; GFX9-NEXT:    v_mul_lo_u32 v10, v8, v7
+; GFX9-NEXT:    v_mul_hi_u32 v12, v8, v6
 ; GFX9-NEXT:    v_mul_lo_u32 v13, v8, v6
-; GFX9-NEXT:    v_add3_u32 v10, v11, v12, v10
+; GFX9-NEXT:    v_add3_u32 v10, v12, v10, v11
+; GFX9-NEXT:    v_mul_hi_u32 v11, v6, v13
 ; GFX9-NEXT:    v_mul_lo_u32 v12, v6, v10
-; GFX9-NEXT:    v_mul_hi_u32 v14, v6, v13
-; GFX9-NEXT:    v_mul_hi_u32 v11, v6, v10
-; GFX9-NEXT:    v_add_co_u32_e32 v12, vcc, v14, v12
-; GFX9-NEXT:    v_mul_lo_u32 v14, v7, v13
-; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, v16, v11, vcc
+; GFX9-NEXT:    v_mul_hi_u32 v15, v6, v10
+; GFX9-NEXT:    v_mul_lo_u32 v16, v7, v13
 ; GFX9-NEXT:    v_mul_hi_u32 v13, v7, v13
-; GFX9-NEXT:    v_add_co_u32_e32 v12, vcc, v14, v12
+; GFX9-NEXT:    v_add_co_u32_e32 v11, vcc, v11, v12
 ; GFX9-NEXT:    v_mul_hi_u32 v12, v7, v10
+; GFX9-NEXT:    v_addc_co_u32_e32 v15, vcc, v14, v15, vcc
 ; GFX9-NEXT:    v_mul_lo_u32 v10, v7, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, v11, v13, vcc
-; GFX9-NEXT:    v_addc_co_u32_e32 v12, vcc, v12, v15, vcc
-; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v11, v10
+; GFX9-NEXT:    v_add_co_u32_e32 v11, vcc, v16, v11
+; GFX9-NEXT:    v_mov_b32_e32 v11, 0
+; GFX9-NEXT:    v_addc_co_u32_e32 v13, vcc, v15, v13, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v12, vcc, v12, v11, vcc
+; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v13, v10
 ; GFX9-NEXT:    v_add_co_u32_e64 v6, s[4:5], v6, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, v16, v12, vcc
-; GFX9-NEXT:    v_addc_co_u32_e64 v10, vcc, v7, v11, s[4:5]
-; GFX9-NEXT:    v_mul_lo_u32 v12, v8, v10
-; GFX9-NEXT:    v_mul_hi_u32 v13, v8, v6
+; GFX9-NEXT:    v_addc_co_u32_e32 v12, vcc, v14, v12, vcc
+; GFX9-NEXT:    v_addc_co_u32_e64 v10, vcc, v7, v12, s[4:5]
+; GFX9-NEXT:    v_mul_lo_u32 v13, v8, v10
+; GFX9-NEXT:    v_mul_hi_u32 v15, v8, v6
 ; GFX9-NEXT:    v_mul_lo_u32 v9, v9, v6
 ; GFX9-NEXT:    v_mul_lo_u32 v8, v8, v6
-; GFX9-NEXT:    v_add_u32_e32 v7, v7, v11
-; GFX9-NEXT:    v_add3_u32 v9, v13, v12, v9
-; GFX9-NEXT:    v_mul_lo_u32 v12, v6, v9
-; GFX9-NEXT:    v_mul_hi_u32 v13, v6, v8
-; GFX9-NEXT:    v_mul_hi_u32 v14, v6, v9
-; GFX9-NEXT:    v_add_co_u32_e32 v12, vcc, v13, v12
-; GFX9-NEXT:    v_mul_hi_u32 v13, v10, v8
-; GFX9-NEXT:    v_mul_lo_u32 v8, v10, v8
-; GFX9-NEXT:    v_addc_co_u32_e32 v14, vcc, v16, v14, vcc
-; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v8, v12
-; GFX9-NEXT:    v_mul_hi_u32 v8, v10, v9
-; GFX9-NEXT:    v_mul_lo_u32 v9, v10, v9
-; GFX9-NEXT:    v_addc_co_u32_e32 v12, vcc, v14, v13, vcc
-; GFX9-NEXT:    v_addc_co_u32_e32 v8, vcc, v8, v15, vcc
-; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v12, v9
-; GFX9-NEXT:    v_addc_co_u32_e32 v8, vcc, v16, v8, vcc
-; GFX9-NEXT:    v_addc_co_u32_e64 v7, vcc, v7, v8, s[4:5]
-; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, v6, v9
+; GFX9-NEXT:    v_add_u32_e32 v7, v7, v12
+; GFX9-NEXT:    v_add3_u32 v9, v15, v13, v9
+; GFX9-NEXT:    v_mul_hi_u32 v15, v10, v8
+; GFX9-NEXT:    v_mul_lo_u32 v16, v10, v8
+; GFX9-NEXT:    v_mul_hi_u32 v8, v6, v8
+; GFX9-NEXT:    v_mul_lo_u32 v17, v6, v9
+; GFX9-NEXT:    v_mul_hi_u32 v13, v10, v9
+; GFX9-NEXT:    v_mul_lo_u32 v10, v10, v9
+; GFX9-NEXT:    v_mul_hi_u32 v9, v6, v9
+; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v8, v17
+; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v14, v9, vcc
+; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v16, v8
+; GFX9-NEXT:    v_addc_co_u32_e32 v8, vcc, v9, v15, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v13, v11, vcc
+; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v8, v10
+; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v14, v9, vcc
+; GFX9-NEXT:    v_addc_co_u32_e64 v7, vcc, v7, v9, s[4:5]
+; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, v6, v8
 ; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, 0, v7, vcc
 ; GFX9-NEXT:    v_ashrrev_i32_e32 v8, 31, v1
 ; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v0, v8
 ; GFX9-NEXT:    v_xor_b32_e32 v9, v9, v8
 ; GFX9-NEXT:    v_mul_lo_u32 v10, v9, v7
-; GFX9-NEXT:    v_mul_hi_u32 v11, v9, v6
-; GFX9-NEXT:    v_mul_hi_u32 v12, v9, v7
+; GFX9-NEXT:    v_mul_hi_u32 v12, v9, v6
+; GFX9-NEXT:    v_mul_hi_u32 v13, v9, v7
 ; GFX9-NEXT:    v_addc_co_u32_e32 v1, vcc, v1, v8, vcc
 ; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v8
-; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v11, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, v16, v12, vcc
-; GFX9-NEXT:    v_mul_lo_u32 v12, v1, v6
+; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v12, v10
+; GFX9-NEXT:    v_addc_co_u32_e32 v12, vcc, v14, v13, vcc
+; GFX9-NEXT:    v_mul_lo_u32 v13, v1, v6
 ; GFX9-NEXT:    v_mul_hi_u32 v6, v1, v6
-; GFX9-NEXT:    v_mul_hi_u32 v13, v1, v7
+; GFX9-NEXT:    v_mul_hi_u32 v15, v1, v7
 ; GFX9-NEXT:    v_mul_lo_u32 v7, v1, v7
-; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v12, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v6, vcc, v11, v6, vcc
-; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v13, v15, vcc
+; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v13, v10
+; GFX9-NEXT:    v_addc_co_u32_e32 v6, vcc, v12, v6, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v15, v11, vcc
 ; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, v6, v7
-; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, v16, v10, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, v14, v10, vcc
 ; GFX9-NEXT:    v_mul_lo_u32 v10, v5, v6
 ; GFX9-NEXT:    v_mul_lo_u32 v11, v4, v7
 ; GFX9-NEXT:    v_mul_hi_u32 v12, v4, v6
@@ -208,16 +208,16 @@
 ; GFX9-NEXT:    v_add3_u32 v8, v10, v8, v9
 ; GFX9-NEXT:    v_mul_hi_u32 v9, v4, v11
 ; GFX9-NEXT:    v_mul_lo_u32 v10, v4, v8
-; GFX9-NEXT:    v_mul_hi_u32 v14, v4, v8
-; GFX9-NEXT:    v_mul_hi_u32 v15, v5, v8
-; GFX9-NEXT:    v_mul_lo_u32 v8, v5, v8
+; GFX9-NEXT:    v_mul_hi_u32 v15, v4, v8
+; GFX9-NEXT:    v_mul_hi_u32 v14, v5, v11
+; GFX9-NEXT:    v_mul_lo_u32 v11, v5, v11
 ; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v9, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v13, v14, vcc
-; GFX9-NEXT:    v_mul_lo_u32 v14, v5, v11
-; GFX9-NEXT:    v_mul_hi_u32 v11, v5, v11
-; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v14, v9
-; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v10, v11, vcc
-; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v15, v12, vcc
+; GFX9-NEXT:    v_mul_hi_u32 v10, v5, v8
+; GFX9-NEXT:    v_addc_co_u32_e32 v15, vcc, v13, v15, vcc
+; GFX9-NEXT:    v_mul_lo_u32 v8, v5, v8
+; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v11, v9
+; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v15, v14, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v10, v12, vcc
 ; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v9, v8
 ; GFX9-NEXT:    v_add_co_u32_e64 v4, s[4:5], v4, v8
 ; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v13, v10, vcc
@@ -234,11 +234,11 @@
 ; GFX9-NEXT:    v_mul_hi_u32 v14, v8, v7
 ; GFX9-NEXT:    v_mul_lo_u32 v7, v8, v7
 ; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v11, v10
-; GFX9-NEXT:    v_mul_hi_u32 v11, v8, v6
-; GFX9-NEXT:    v_mul_lo_u32 v6, v8, v6
+; GFX9-NEXT:    v_mul_lo_u32 v11, v8, v6
+; GFX9-NEXT:    v_mul_hi_u32 v6, v8, v6
 ; GFX9-NEXT:    v_addc_co_u32_e32 v15, vcc, v13, v15, vcc
-; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, v6, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v6, vcc, v15, v11, vcc
+; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v11, v10
+; GFX9-NEXT:    v_addc_co_u32_e32 v6, vcc, v15, v6, vcc
 ; GFX9-NEXT:    v_addc_co_u32_e32 v8, vcc, v14, v12, vcc
 ; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, v6, v7
 ; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, v13, v8, vcc
@@ -355,30 +355,30 @@
 ; GFX9-NEXT:    v_mov_b32_e32 v15, 0
 ; GFX9-NEXT:    v_mac_f32_e32 v4, 0x4f800000, v6
 ; GFX9-NEXT:    v_rcp_f32_e32 v4, v4
-; GFX9-NEXT:    v_mov_b32_e32 v14, 0
+; GFX9-NEXT:    v_mov_b32_e32 v13, 0
 ; GFX9-NEXT:    v_mul_f32_e32 v4, 0x5f7ffffc, v4
 ; GFX9-NEXT:    v_mul_f32_e32 v6, 0x2f800000, v4
 ; GFX9-NEXT:    v_trunc_f32_e32 v6, v6
 ; GFX9-NEXT:    v_mac_f32_e32 v4, 0xcf800000, v6
 ; GFX9-NEXT:    v_cvt_u32_f32_e32 v4, v4
 ; GFX9-NEXT:    v_cvt_u32_f32_e32 v6, v6
-; GFX9-NEXT:    v_mul_lo_u32 v9, v8, v4
-; GFX9-NEXT:    v_mul_hi_u32 v10, v7, v4
-; GFX9-NEXT:    v_mul_lo_u32 v11, v7, v6
+; GFX9-NEXT:    v_mul_lo_u32 v10, v8, v4
+; GFX9-NEXT:    v_mul_lo_u32 v9, v7, v6
+; GFX9-NEXT:    v_mul_hi_u32 v11, v7, v4
 ; GFX9-NEXT:    v_mul_lo_u32 v12, v7, v4
-; GFX9-NEXT:    v_add3_u32 v9, v10, v11, v9
+; GFX9-NEXT:    v_add3_u32 v9, v11, v9, v10
+; GFX9-NEXT:    v_mul_hi_u32 v10, v4, v12
 ; GFX9-NEXT:    v_mul_lo_u32 v11, v4, v9
-; GFX9-NEXT:    v_mul_hi_u32 v13, v4, v12
-; GFX9-NEXT:    v_mul_hi_u32 v10, v4, v9
-; GFX9-NEXT:    v_mul_hi_u32 v16, v6, v9
-; GFX9-NEXT:    v_mul_lo_u32 v9, v6, v9
-; GFX9-NEXT:    v_add_co_u32_e32 v11, vcc, v13, v11
-; GFX9-NEXT:    v_mul_lo_u32 v13, v6, v12
+; GFX9-NEXT:    v_mul_hi_u32 v14, v4, v9
+; GFX9-NEXT:    v_mul_lo_u32 v16, v6, v12
 ; GFX9-NEXT:    v_mul_hi_u32 v12, v6, v12
-; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v15, v10, vcc
-; GFX9-NEXT:    v_add_co_u32_e32 v11, vcc, v13, v11
-; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v10, v12, vcc
-; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, v16, v14, vcc
+; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v10, v11
+; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, v15, v14, vcc
+; GFX9-NEXT:    v_mul_hi_u32 v14, v6, v9
+; GFX9-NEXT:    v_mul_lo_u32 v9, v6, v9
+; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v16, v10
+; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v11, v12, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, v14, v13, vcc
 ; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v10, v9
 ; GFX9-NEXT:    v_add_co_u32_e64 v4, s[4:5], v4, v9
 ; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v15, v11, vcc
@@ -392,15 +392,15 @@
 ; GFX9-NEXT:    v_mul_lo_u32 v11, v4, v8
 ; GFX9-NEXT:    v_mul_hi_u32 v12, v4, v7
 ; GFX9-NEXT:    v_mul_hi_u32 v16, v4, v8
-; GFX9-NEXT:    v_mul_hi_u32 v13, v9, v8
+; GFX9-NEXT:    v_mul_hi_u32 v14, v9, v8
 ; GFX9-NEXT:    v_mul_lo_u32 v8, v9, v8
 ; GFX9-NEXT:    v_add_co_u32_e32 v11, vcc, v12, v11
-; GFX9-NEXT:    v_mul_hi_u32 v12, v9, v7
-; GFX9-NEXT:    v_mul_lo_u32 v7, v9, v7
+; GFX9-NEXT:    v_mul_lo_u32 v12, v9, v7
+; GFX9-NEXT:    v_mul_hi_u32 v7, v9, v7
 ; GFX9-NEXT:    v_addc_co_u32_e32 v16, vcc, v15, v16, vcc
-; GFX9-NEXT:    v_add_co_u32_e32 v7, vcc, v7, v11
-; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, v16, v12, vcc
-; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v13, v14, vcc
+; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v12, v11
+; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, v16, v7, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v14, v13, vcc
 ; GFX9-NEXT:    v_add_co_u32_e32 v7, vcc, v7, v8
 ; GFX9-NEXT:    v_addc_co_u32_e32 v8, vcc, v15, v9, vcc
 ; GFX9-NEXT:    v_addc_co_u32_e64 v6, vcc, v6, v8, s[4:5]
@@ -422,7 +422,7 @@
 ; GFX9-NEXT:    v_mul_lo_u32 v6, v1, v6
 ; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v11, v9
 ; GFX9-NEXT:    v_addc_co_u32_e32 v4, vcc, v10, v4, vcc
-; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v12, v14, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v12, v13, vcc
 ; GFX9-NEXT:    v_add_co_u32_e32 v4, vcc, v4, v6
 ; GFX9-NEXT:    v_addc_co_u32_e32 v6, vcc, v15, v9, vcc
 ; GFX9-NEXT:    v_mul_lo_u32 v9, v5, v4
@@ -532,16 +532,16 @@
 ; GFX9-NEXT:    v_add3_u32 v8, v10, v8, v9
 ; GFX9-NEXT:    v_mul_hi_u32 v9, v4, v11
 ; GFX9-NEXT:    v_mul_lo_u32 v10, v4, v8
-; GFX9-NEXT:    v_mul_hi_u32 v14, v4, v8
-; GFX9-NEXT:    v_mul_hi_u32 v15, v5, v8
-; GFX9-NEXT:    v_mul_lo_u32 v8, v5, v8
+; GFX9-NEXT:    v_mul_hi_u32 v15, v4, v8
+; GFX9-NEXT:    v_mul_hi_u32 v14, v5, v11
+; GFX9-NEXT:    v_mul_lo_u32 v11, v5, v11
 ; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v9, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v13, v14, vcc
-; GFX9-NEXT:    v_mul_lo_u32 v14, v5, v11
-; GFX9-NEXT:    v_mul_hi_u32 v11, v5, v11
-; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v14, v9
-; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v10, v11, vcc
-; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v15, v12, vcc
+; GFX9-NEXT:    v_mul_hi_u32 v10, v5, v8
+; GFX9-NEXT:    v_addc_co_u32_e32 v15, vcc, v13, v15, vcc
+; GFX9-NEXT:    v_mul_lo_u32 v8, v5, v8
+; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v11, v9
+; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v15, v14, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v10, v12, vcc
 ; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v9, v8
 ; GFX9-NEXT:    v_add_co_u32_e64 v4, s[4:5], v4, v8
 ; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v13, v10, vcc
@@ -558,11 +558,11 @@
 ; GFX9-NEXT:    v_mul_hi_u32 v14, v8, v7
 ; GFX9-NEXT:    v_mul_lo_u32 v7, v8, v7
 ; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v11, v10
-; GFX9-NEXT:    v_mul_hi_u32 v11, v8, v6
-; GFX9-NEXT:    v_mul_lo_u32 v6, v8, v6
+; GFX9-NEXT:    v_mul_lo_u32 v11, v8, v6
+; GFX9-NEXT:    v_mul_hi_u32 v6, v8, v6
 ; GFX9-NEXT:    v_addc_co_u32_e32 v15, vcc, v13, v15, vcc
-; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, v6, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v6, vcc, v15, v11, vcc
+; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v11, v10
+; GFX9-NEXT:    v_addc_co_u32_e32 v6, vcc, v15, v6, vcc
 ; GFX9-NEXT:    v_addc_co_u32_e32 v8, vcc, v14, v12, vcc
 ; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, v6, v7
 ; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, v13, v8, vcc
@@ -821,79 +821,79 @@
 ; GFX9-NEXT:    v_cvt_f32_u32_e32 v7, v5
 ; GFX9-NEXT:    v_sub_co_u32_e32 v8, vcc, 0, v6
 ; GFX9-NEXT:    v_subb_co_u32_e32 v9, vcc, 0, v5, vcc
-; GFX9-NEXT:    v_mov_b32_e32 v16, 0
+; GFX9-NEXT:    v_mov_b32_e32 v14, 0
 ; GFX9-NEXT:    v_mac_f32_e32 v4, 0x4f800000, v7
 ; GFX9-NEXT:    v_rcp_f32_e32 v4, v4
-; GFX9-NEXT:    v_mov_b32_e32 v15, 0
 ; GFX9-NEXT:    v_mul_f32_e32 v4, 0x5f7ffffc, v4
 ; GFX9-NEXT:    v_mul_f32_e32 v7, 0x2f800000, v4
 ; GFX9-NEXT:    v_trunc_f32_e32 v7, v7
 ; GFX9-NEXT:    v_mac_f32_e32 v4, 0xcf800000, v7
 ; GFX9-NEXT:    v_cvt_u32_f32_e32 v4, v4
 ; GFX9-NEXT:    v_cvt_u32_f32_e32 v7, v7
-; GFX9-NEXT:    v_mul_lo_u32 v10, v9, v4
-; GFX9-NEXT:    v_mul_hi_u32 v11, v8, v4
-; GFX9-NEXT:    v_mul_lo_u32 v12, v8, v7
+; GFX9-NEXT:    v_mul_lo_u32 v11, v9, v4
+; GFX9-NEXT:    v_mul_lo_u32 v10, v8, v7
+; GFX9-NEXT:    v_mul_hi_u32 v12, v8, v4
 ; GFX9-NEXT:    v_mul_lo_u32 v13, v8, v4
-; GFX9-NEXT:    v_add3_u32 v10, v11, v12, v10
+; GFX9-NEXT:    v_add3_u32 v10, v12, v10, v11
+; GFX9-NEXT:    v_mul_hi_u32 v11, v4, v13
 ; GFX9-NEXT:    v_mul_lo_u32 v12, v4, v10
-; GFX9-NEXT:    v_mul_hi_u32 v14, v4, v13
-; GFX9-NEXT:    v_mul_hi_u32 v11, v4, v10
-; GFX9-NEXT:    v_add_co_u32_e32 v12, vcc, v14, v12
-; GFX9-NEXT:    v_mul_lo_u32 v14, v7, v13
-; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, v16, v11, vcc
+; GFX9-NEXT:    v_mul_hi_u32 v15, v4, v10
+; GFX9-NEXT:    v_mul_lo_u32 v16, v7, v13
 ; GFX9-NEXT:    v_mul_hi_u32 v13, v7, v13
-; GFX9-NEXT:    v_add_co_u32_e32 v12, vcc, v14, v12
+; GFX9-NEXT:    v_add_co_u32_e32 v11, vcc, v11, v12
 ; GFX9-NEXT:    v_mul_hi_u32 v12, v7, v10
+; GFX9-NEXT:    v_addc_co_u32_e32 v15, vcc, v14, v15, vcc
 ; GFX9-NEXT:    v_mul_lo_u32 v10, v7, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, v11, v13, vcc
-; GFX9-NEXT:    v_addc_co_u32_e32 v12, vcc, v12, v15, vcc
-; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v11, v10
+; GFX9-NEXT:    v_add_co_u32_e32 v11, vcc, v16, v11
+; GFX9-NEXT:    v_mov_b32_e32 v11, 0
+; GFX9-NEXT:    v_addc_co_u32_e32 v13, vcc, v15, v13, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v12, vcc, v12, v11, vcc
+; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v13, v10
 ; GFX9-NEXT:    v_add_co_u32_e64 v4, s[4:5], v4, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, v16, v12, vcc
-; GFX9-NEXT:    v_addc_co_u32_e64 v10, vcc, v7, v11, s[4:5]
-; GFX9-NEXT:    v_mul_lo_u32 v12, v8, v10
-; GFX9-NEXT:    v_mul_hi_u32 v13, v8, v4
+; GFX9-NEXT:    v_addc_co_u32_e32 v12, vcc, v14, v12, vcc
+; GFX9-NEXT:    v_addc_co_u32_e64 v10, vcc, v7, v12, s[4:5]
+; GFX9-NEXT:    v_mul_lo_u32 v13, v8, v10
+; GFX9-NEXT:    v_mul_hi_u32 v15, v8, v4
 ; GFX9-NEXT:    v_mul_lo_u32 v9, v9, v4
 ; GFX9-NEXT:    v_mul_lo_u32 v8, v8, v4
-; GFX9-NEXT:    v_add_u32_e32 v7, v7, v11
-; GFX9-NEXT:    v_add3_u32 v9, v13, v12, v9
-; GFX9-NEXT:    v_mul_lo_u32 v12, v4, v9
-; GFX9-NEXT:    v_mul_hi_u32 v13, v4, v8
-; GFX9-NEXT:    v_mul_hi_u32 v14, v4, v9
-; GFX9-NEXT:    v_add_co_u32_e32 v12, vcc, v13, v12
-; GFX9-NEXT:    v_mul_hi_u32 v13, v10, v8
-; GFX9-NEXT:    v_mul_lo_u32 v8, v10, v8
-; GFX9-NEXT:    v_addc_co_u32_e32 v14, vcc, v16, v14, vcc
-; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v8, v12
-; GFX9-NEXT:    v_mul_hi_u32 v8, v10, v9
-; GFX9-NEXT:    v_mul_lo_u32 v9, v10, v9
-; GFX9-NEXT:    v_addc_co_u32_e32 v12, vcc, v14, v13, vcc
-; GFX9-NEXT:    v_addc_co_u32_e32 v8, vcc, v8, v15, vcc
-; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v12, v9
-; GFX9-NEXT:    v_addc_co_u32_e32 v8, vcc, v16, v8, vcc
-; GFX9-NEXT:    v_addc_co_u32_e64 v7, vcc, v7, v8, s[4:5]
-; GFX9-NEXT:    v_add_co_u32_e32 v4, vcc, v4, v9
+; GFX9-NEXT:    v_add_u32_e32 v7, v7, v12
+; GFX9-NEXT:    v_add3_u32 v9, v15, v13, v9
+; GFX9-NEXT:    v_mul_hi_u32 v15, v10, v8
+; GFX9-NEXT:    v_mul_lo_u32 v16, v10, v8
+; GFX9-NEXT:    v_mul_hi_u32 v8, v4, v8
+; GFX9-NEXT:    v_mul_lo_u32 v17, v4, v9
+; GFX9-NEXT:    v_mul_hi_u32 v13, v10, v9
+; GFX9-NEXT:    v_mul_lo_u32 v10, v10, v9
+; GFX9-NEXT:    v_mul_hi_u32 v9, v4, v9
+; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v8, v17
+; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v14, v9, vcc
+; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v16, v8
+; GFX9-NEXT:    v_addc_co_u32_e32 v8, vcc, v9, v15, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v13, v11, vcc
+; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v8, v10
+; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v14, v9, vcc
+; GFX9-NEXT:    v_addc_co_u32_e64 v7, vcc, v7, v9, s[4:5]
+; GFX9-NEXT:    v_add_co_u32_e32 v4, vcc, v4, v8
 ; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, 0, v7, vcc
 ; GFX9-NEXT:    v_ashrrev_i32_e32 v8, 31, v1
 ; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v0, v8
 ; GFX9-NEXT:    v_xor_b32_e32 v9, v9, v8
 ; GFX9-NEXT:    v_mul_lo_u32 v10, v9, v7
-; GFX9-NEXT:    v_mul_hi_u32 v11, v9, v4
-; GFX9-NEXT:    v_mul_hi_u32 v12, v9, v7
+; GFX9-NEXT:    v_mul_hi_u32 v12, v9, v4
+; GFX9-NEXT:    v_mul_hi_u32 v13, v9, v7
 ; GFX9-NEXT:    v_addc_co_u32_e32 v1, vcc, v1, v8, vcc
 ; GFX9-NEXT:    v_xor_b32_e32 v1, v1, v8
-; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v11, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v11, vcc, v16, v12, vcc
-; GFX9-NEXT:    v_mul_lo_u32 v12, v1, v4
+; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v12, v10
+; GFX9-NEXT:    v_addc_co_u32_e32 v12, vcc, v14, v13, vcc
+; GFX9-NEXT:    v_mul_lo_u32 v13, v1, v4
 ; GFX9-NEXT:    v_mul_hi_u32 v4, v1, v4
-; GFX9-NEXT:    v_mul_hi_u32 v13, v1, v7
+; GFX9-NEXT:    v_mul_hi_u32 v15, v1, v7
 ; GFX9-NEXT:    v_mul_lo_u32 v7, v1, v7
-; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v12, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v4, vcc, v11, v4, vcc
-; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v13, v15, vcc
+; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v13, v10
+; GFX9-NEXT:    v_addc_co_u32_e32 v4, vcc, v12, v4, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v15, v11, vcc
 ; GFX9-NEXT:    v_add_co_u32_e32 v4, vcc, v4, v7
-; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, v16, v10, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, v14, v10, vcc
 ; GFX9-NEXT:    v_mul_lo_u32 v10, v5, v4
 ; GFX9-NEXT:    v_mul_lo_u32 v11, v6, v7
 ; GFX9-NEXT:    v_mul_hi_u32 v12, v6, v4
@@ -1025,16 +1025,16 @@
 ; GFX9-NEXT:    v_add3_u32 v8, v10, v8, v9
 ; GFX9-NEXT:    v_mul_hi_u32 v9, v4, v11
 ; GFX9-NEXT:    v_mul_lo_u32 v10, v4, v8
-; GFX9-NEXT:    v_mul_hi_u32 v14, v4, v8
-; GFX9-NEXT:    v_mul_hi_u32 v15, v5, v8
-; GFX9-NEXT:    v_mul_lo_u32 v8, v5, v8
+; GFX9-NEXT:    v_mul_hi_u32 v15, v4, v8
+; GFX9-NEXT:    v_mul_hi_u32 v14, v5, v11
+; GFX9-NEXT:    v_mul_lo_u32 v11, v5, v11
 ; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v9, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v13, v14, vcc
-; GFX9-NEXT:    v_mul_lo_u32 v14, v5, v11
-; GFX9-NEXT:    v_mul_hi_u32 v11, v5, v11
-; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v14, v9
-; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v10, v11, vcc
-; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v15, v12, vcc
+; GFX9-NEXT:    v_mul_hi_u32 v10, v5, v8
+; GFX9-NEXT:    v_addc_co_u32_e32 v15, vcc, v13, v15, vcc
+; GFX9-NEXT:    v_mul_lo_u32 v8, v5, v8
+; GFX9-NEXT:    v_add_co_u32_e32 v9, vcc, v11, v9
+; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v15, v14, vcc
+; GFX9-NEXT:    v_addc_co_u32_e32 v10, vcc, v10, v12, vcc
 ; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v9, v8
 ; GFX9-NEXT:    v_add_co_u32_e64 v4, s[4:5], v4, v8
 ; GFX9-NEXT:    v_addc_co_u32_e32 v9, vcc, v13, v10, vcc
@@ -1051,11 +1051,11 @@
 ; GFX9-NEXT:    v_mul_hi_u32 v14, v8, v7
 ; GFX9-NEXT:    v_mul_lo_u32 v7, v8, v7
 ; GFX9-NEXT:    v_add_co_u32_e32 v10, vcc, v11, v10
-; GFX9-NEXT:    v_mul_hi_u32 v11, v8, v6
-; GFX9-NEXT:    v_mul_lo_u32 v6, v8, v6
+; GFX9-NEXT:    v_mul_lo_u32 v11, v8, v6
+; GFX9-NEXT:    v_mul_hi_u32 v6, v8, v6
 ; GFX9-NEXT:    v_addc_co_u32_e32 v15, vcc, v13, v15, vcc
-; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, v6, v10
-; GFX9-NEXT:    v_addc_co_u32_e32 v6, vcc, v15, v11, vcc
+; GFX9-NEXT:    v_add_co_u32_e32 v8, vcc, v11, v10
+; GFX9-NEXT:    v_addc_co_u32_e32 v6, vcc, v15, v6, vcc
 ; GFX9-NEXT:    v_addc_co_u32_e32 v8, vcc, v14, v12, vcc
 ; GFX9-NEXT:    v_add_co_u32_e32 v6, vcc, v6, v7
 ; GFX9-NEXT:    v_addc_co_u32_e32 v7, vcc, v13, v8, vcc
diff --git a/llvm/test/CodeGen/AMDGPU/idot4u.ll b/llvm/test/CodeGen/AMDGPU/idot4u.ll
--- a/llvm/test/CodeGen/AMDGPU/idot4u.ll
+++ b/llvm/test/CodeGen/AMDGPU/idot4u.ll
@@ -2001,42 +2001,42 @@
 ; GFX7-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0xd
 ; GFX7-NEXT:    s_mov_b32 s3, 0xf000
 ; GFX7-NEXT:    s_mov_b32 s2, -1
-; GFX7-NEXT:    s_movk_i32 s8, 0xff
 ; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX7-NEXT:    buffer_load_ubyte v0, off, s[0:3], 0
 ; GFX7-NEXT:    s_load_dword s4, s[4:5], 0x0
 ; GFX7-NEXT:    s_load_dword s5, s[6:7], 0x0
+; GFX7-NEXT:    buffer_load_ubyte v3, off, s[0:3], 0
 ; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX7-NEXT:    s_bfe_u32 s6, s4, 0x80008
-; GFX7-NEXT:    s_bfe_u32 s10, s5, 0x80008
-; GFX7-NEXT:    s_lshr_b32 s11, s5, 16
-; GFX7-NEXT:    s_lshr_b32 s12, s5, 24
-; GFX7-NEXT:    v_mov_b32_e32 v3, s10
 ; GFX7-NEXT:    s_lshr_b32 s7, s4, 16
-; GFX7-NEXT:    v_mov_b32_e32 v2, s11
-; GFX7-NEXT:    s_lshr_b32 s9, s4, 24
-; GFX7-NEXT:    v_mov_b32_e32 v1, s12
+; GFX7-NEXT:    s_lshr_b32 s10, s5, 16
+; GFX7-NEXT:    s_lshr_b32 s11, s5, 24
+; GFX7-NEXT:    v_mov_b32_e32 v1, s10
+; GFX7-NEXT:    s_lshr_b32 s8, s4, 24
+; GFX7-NEXT:    v_mov_b32_e32 v0, s11
+; GFX7-NEXT:    v_mul_u32_u24_e32 v0, s8, v0
+; GFX7-NEXT:    v_mul_u32_u24_e32 v1, s7, v1
+; GFX7-NEXT:    s_movk_i32 s7, 0xff
+; GFX7-NEXT:    s_bfe_u32 s9, s5, 0x80008
+; GFX7-NEXT:    v_lshlrev_b32_e32 v0, 8, v0
+; GFX7-NEXT:    v_and_b32_e32 v1, s7, v1
+; GFX7-NEXT:    v_or_b32_e32 v0, v1, v0
+; GFX7-NEXT:    s_bfe_u32 s6, s4, 0x80008
+; GFX7-NEXT:    v_mov_b32_e32 v1, s9
 ; GFX7-NEXT:    s_mul_i32 s4, s4, s5
-; GFX7-NEXT:    v_mul_u32_u24_e32 v1, s9, v1
-; GFX7-NEXT:    v_mul_u32_u24_e32 v2, s7, v2
-; GFX7-NEXT:    v_mul_u32_u24_e32 v3, s6, v3
-; GFX7-NEXT:    s_and_b32 s5, s4, s8
+; GFX7-NEXT:    v_mul_u32_u24_e32 v1, s6, v1
+; GFX7-NEXT:    s_and_b32 s5, s4, s7
 ; GFX7-NEXT:    v_lshlrev_b32_e32 v1, 8, v1
-; GFX7-NEXT:    v_and_b32_e32 v2, s8, v2
-; GFX7-NEXT:    v_lshlrev_b32_e32 v3, 8, v3
-; GFX7-NEXT:    v_or_b32_e32 v1, v2, v1
-; GFX7-NEXT:    v_or_b32_e32 v2, s5, v3
-; GFX7-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
-; GFX7-NEXT:    v_and_b32_e32 v2, 0xffff, v2
-; GFX7-NEXT:    v_or_b32_e32 v1, v2, v1
-; GFX7-NEXT:    v_lshrrev_b32_e32 v2, 8, v1
-; GFX7-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
-; GFX7-NEXT:    v_lshrrev_b32_e32 v1, 24, v1
+; GFX7-NEXT:    v_or_b32_e32 v1, s5, v1
+; GFX7-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
+; GFX7-NEXT:    v_and_b32_e32 v1, 0xffff, v1
+; GFX7-NEXT:    v_or_b32_e32 v0, v1, v0
+; GFX7-NEXT:    v_lshrrev_b32_e32 v1, 8, v0
+; GFX7-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
+; GFX7-NEXT:    v_lshrrev_b32_e32 v0, 24, v0
 ; GFX7-NEXT:    s_waitcnt vmcnt(0)
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, s4, v0
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
+; GFX7-NEXT:    v_add_i32_e32 v3, vcc, s4, v3
+; GFX7-NEXT:    v_add_i32_e32 v1, vcc, v3, v1
+; GFX7-NEXT:    v_add_i32_e32 v1, vcc, v1, v2
+; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v1, v0
 ; GFX7-NEXT:    buffer_store_byte v0, off, s[0:3], 0
 ; GFX7-NEXT:    s_endpgm
 ;
@@ -2045,38 +2045,38 @@
 ; GFX8-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
 ; GFX8-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x34
 ; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX8-NEXT:    s_load_dword s2, s[4:5], 0x0
+; GFX8-NEXT:    s_load_dword s3, s[6:7], 0x0
+; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
+; GFX8-NEXT:    s_lshr_b32 s4, s2, 24
+; GFX8-NEXT:    s_lshr_b32 s6, s3, 24
+; GFX8-NEXT:    s_lshr_b32 s7, s3, 16
+; GFX8-NEXT:    v_mov_b32_e32 v0, s2
+; GFX8-NEXT:    v_mov_b32_e32 v1, s3
+; GFX8-NEXT:    s_lshr_b32 s5, s2, 16
+; GFX8-NEXT:    v_mul_u32_u24_sdwa v0, v0, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:BYTE_1
+; GFX8-NEXT:    v_mov_b32_e32 v1, s7
+; GFX8-NEXT:    v_mov_b32_e32 v2, s6
+; GFX8-NEXT:    v_mov_b32_e32 v3, s4
+; GFX8-NEXT:    s_mul_i32 s2, s2, s3
+; GFX8-NEXT:    v_mul_u32_u24_e32 v1, s5, v1
+; GFX8-NEXT:    v_mul_u32_u24_sdwa v2, v3, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
+; GFX8-NEXT:    s_movk_i32 s3, 0xff
+; GFX8-NEXT:    v_or_b32_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
+; GFX8-NEXT:    v_mov_b32_e32 v2, s3
+; GFX8-NEXT:    v_and_b32_e32 v2, s2, v2
+; GFX8-NEXT:    v_or_b32_e32 v0, v2, v0
+; GFX8-NEXT:    v_and_b32_e32 v2, 0xffff, v0
+; GFX8-NEXT:    v_or_b32_e32 v3, v2, v1
 ; GFX8-NEXT:    v_mov_b32_e32 v0, s0
 ; GFX8-NEXT:    v_mov_b32_e32 v1, s1
-; GFX8-NEXT:    flat_load_ubyte v2, v[0:1]
-; GFX8-NEXT:    s_movk_i32 s0, 0xff
-; GFX8-NEXT:    v_mov_b32_e32 v3, s0
-; GFX8-NEXT:    s_load_dword s0, s[4:5], 0x0
-; GFX8-NEXT:    s_load_dword s1, s[6:7], 0x0
-; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX8-NEXT:    s_lshr_b32 s2, s0, 24
-; GFX8-NEXT:    s_lshr_b32 s4, s1, 24
-; GFX8-NEXT:    s_lshr_b32 s3, s0, 16
-; GFX8-NEXT:    v_mov_b32_e32 v4, s0
-; GFX8-NEXT:    v_mov_b32_e32 v5, s1
-; GFX8-NEXT:    s_mul_i32 s0, s0, s1
-; GFX8-NEXT:    s_lshr_b32 s5, s1, 16
-; GFX8-NEXT:    v_mul_u32_u24_sdwa v4, v4, v5 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:BYTE_1
-; GFX8-NEXT:    v_mov_b32_e32 v5, s5
-; GFX8-NEXT:    v_and_b32_e32 v3, s0, v3
-; GFX8-NEXT:    v_mov_b32_e32 v6, s4
-; GFX8-NEXT:    v_mov_b32_e32 v7, s2
-; GFX8-NEXT:    v_or_b32_e32 v3, v3, v4
-; GFX8-NEXT:    v_mul_u32_u24_e32 v5, s3, v5
-; GFX8-NEXT:    v_mul_u32_u24_sdwa v6, v7, v6 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT:    v_and_b32_e32 v3, 0xffff, v3
-; GFX8-NEXT:    v_or_b32_sdwa v4, v5, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
-; GFX8-NEXT:    v_or_b32_e32 v4, v3, v4
-; GFX8-NEXT:    v_lshrrev_b32_e32 v5, 8, v4
-; GFX8-NEXT:    s_waitcnt vmcnt(0)
-; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v2, v3
-; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v2, v5
-; GFX8-NEXT:    v_add_u32_sdwa v2, vcc, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
-; GFX8-NEXT:    v_add_u32_sdwa v2, vcc, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
+; GFX8-NEXT:    flat_load_ubyte v5, v[0:1]
+; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 8, v3
+; GFX8-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
+; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v5, v2
+; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v2, v4
+; GFX8-NEXT:    v_add_u32_sdwa v2, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
+; GFX8-NEXT:    v_add_u32_sdwa v2, vcc, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_3
 ; GFX8-NEXT:    flat_store_byte v[0:1], v2
 ; GFX8-NEXT:    s_endpgm
 ;
diff --git a/llvm/test/CodeGen/AMDGPU/idot8s.ll b/llvm/test/CodeGen/AMDGPU/idot8s.ll
--- a/llvm/test/CodeGen/AMDGPU/idot8s.ll
+++ b/llvm/test/CodeGen/AMDGPU/idot8s.ll
@@ -1937,78 +1937,78 @@
 ; GFX7-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0xd
 ; GFX7-NEXT:    s_mov_b32 s7, 0xf000
 ; GFX7-NEXT:    s_mov_b32 s6, -1
-; GFX7-NEXT:    s_movk_i32 s0, 0xff
-; GFX7-NEXT:    s_mov_b32 s1, 0xffff
 ; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX7-NEXT:    buffer_load_ubyte v0, off, s[4:7], 0
-; GFX7-NEXT:    s_load_dword s2, s[8:9], 0x0
-; GFX7-NEXT:    s_load_dword s8, s[10:11], 0x0
+; GFX7-NEXT:    s_load_dword s0, s[8:9], 0x0
+; GFX7-NEXT:    s_load_dword s1, s[10:11], 0x0
+; GFX7-NEXT:    buffer_load_ubyte v8, off, s[4:7], 0
 ; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX7-NEXT:    s_bfe_i32 s9, s2, 0x40000
-; GFX7-NEXT:    s_bfe_i32 s16, s8, 0x40000
-; GFX7-NEXT:    s_bfe_i32 s17, s8, 0x40004
-; GFX7-NEXT:    s_bfe_i32 s18, s8, 0x40008
-; GFX7-NEXT:    s_bfe_i32 s19, s8, 0x4000c
-; GFX7-NEXT:    s_bfe_i32 s20, s8, 0x40010
-; GFX7-NEXT:    s_bfe_i32 s21, s8, 0x40014
-; GFX7-NEXT:    s_bfe_i32 s22, s8, 0x40018
-; GFX7-NEXT:    s_ashr_i32 s8, s8, 28
-; GFX7-NEXT:    v_mov_b32_e32 v8, s16
-; GFX7-NEXT:    s_bfe_i32 s10, s2, 0x40004
-; GFX7-NEXT:    v_mov_b32_e32 v7, s17
-; GFX7-NEXT:    s_bfe_i32 s11, s2, 0x40008
-; GFX7-NEXT:    v_mov_b32_e32 v6, s18
-; GFX7-NEXT:    s_bfe_i32 s12, s2, 0x4000c
-; GFX7-NEXT:    v_mov_b32_e32 v5, s19
-; GFX7-NEXT:    s_bfe_i32 s13, s2, 0x40010
-; GFX7-NEXT:    v_mov_b32_e32 v4, s20
-; GFX7-NEXT:    s_bfe_i32 s14, s2, 0x40014
-; GFX7-NEXT:    v_mov_b32_e32 v3, s21
-; GFX7-NEXT:    s_bfe_i32 s15, s2, 0x40018
-; GFX7-NEXT:    v_mov_b32_e32 v2, s22
-; GFX7-NEXT:    s_ashr_i32 s2, s2, 28
-; GFX7-NEXT:    v_mov_b32_e32 v1, s8
-; GFX7-NEXT:    v_mul_i32_i24_e32 v1, s2, v1
-; GFX7-NEXT:    v_mul_i32_i24_e32 v2, s15, v2
-; GFX7-NEXT:    v_mul_i32_i24_e32 v3, s14, v3
-; GFX7-NEXT:    v_mul_i32_i24_e32 v9, s13, v4
-; GFX7-NEXT:    v_mul_i32_i24_e32 v5, s12, v5
-; GFX7-NEXT:    v_mul_i32_i24_e32 v6, s11, v6
-; GFX7-NEXT:    v_mul_i32_i24_e32 v7, s10, v7
-; GFX7-NEXT:    v_mul_i32_i24_e32 v8, s9, v8
+; GFX7-NEXT:    s_bfe_i32 s2, s0, 0x40000
+; GFX7-NEXT:    s_bfe_i32 s14, s1, 0x40000
+; GFX7-NEXT:    s_bfe_i32 s18, s1, 0x40010
+; GFX7-NEXT:    s_bfe_i32 s20, s1, 0x40018
+; GFX7-NEXT:    s_bfe_i32 s15, s1, 0x40004
+; GFX7-NEXT:    s_bfe_i32 s16, s1, 0x40008
+; GFX7-NEXT:    s_bfe_i32 s17, s1, 0x4000c
+; GFX7-NEXT:    s_bfe_i32 s19, s1, 0x40014
+; GFX7-NEXT:    s_ashr_i32 s1, s1, 28
+; GFX7-NEXT:    v_mov_b32_e32 v0, s1
+; GFX7-NEXT:    s_bfe_i32 s8, s0, 0x40004
+; GFX7-NEXT:    s_bfe_i32 s9, s0, 0x40008
+; GFX7-NEXT:    s_bfe_i32 s10, s0, 0x4000c
+; GFX7-NEXT:    s_bfe_i32 s11, s0, 0x40010
+; GFX7-NEXT:    s_bfe_i32 s12, s0, 0x40014
+; GFX7-NEXT:    s_bfe_i32 s13, s0, 0x40018
+; GFX7-NEXT:    v_mov_b32_e32 v1, s20
+; GFX7-NEXT:    s_ashr_i32 s0, s0, 28
+; GFX7-NEXT:    v_mul_i32_i24_e32 v0, s0, v0
+; GFX7-NEXT:    v_mul_i32_i24_e32 v1, s13, v1
+; GFX7-NEXT:    s_movk_i32 s0, 0xff
+; GFX7-NEXT:    v_lshlrev_b32_e32 v0, 8, v0
+; GFX7-NEXT:    v_and_b32_e32 v1, s0, v1
+; GFX7-NEXT:    v_or_b32_e32 v0, v1, v0
+; GFX7-NEXT:    v_mov_b32_e32 v1, s19
+; GFX7-NEXT:    v_mov_b32_e32 v2, s18
+; GFX7-NEXT:    v_mul_i32_i24_e32 v1, s12, v1
+; GFX7-NEXT:    v_mul_i32_i24_e32 v3, s11, v2
 ; GFX7-NEXT:    v_lshlrev_b32_e32 v1, 8, v1
-; GFX7-NEXT:    v_and_b32_e32 v2, s0, v2
+; GFX7-NEXT:    v_and_b32_e32 v3, s0, v3
+; GFX7-NEXT:    v_or_b32_e32 v1, v3, v1
+; GFX7-NEXT:    s_mov_b32 s1, 0xffff
+; GFX7-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
+; GFX7-NEXT:    v_and_b32_e32 v1, s1, v1
+; GFX7-NEXT:    v_or_b32_e32 v0, v1, v0
+; GFX7-NEXT:    v_mov_b32_e32 v1, s17
+; GFX7-NEXT:    v_mov_b32_e32 v3, s16
+; GFX7-NEXT:    v_mul_i32_i24_e32 v1, s10, v1
+; GFX7-NEXT:    v_mul_i32_i24_e32 v3, s9, v3
+; GFX7-NEXT:    v_lshlrev_b32_e32 v1, 8, v1
+; GFX7-NEXT:    v_and_b32_e32 v3, s0, v3
+; GFX7-NEXT:    v_or_b32_e32 v1, v3, v1
+; GFX7-NEXT:    v_mov_b32_e32 v3, s15
+; GFX7-NEXT:    v_mov_b32_e32 v4, s14
+; GFX7-NEXT:    v_mul_i32_i24_e32 v3, s8, v3
+; GFX7-NEXT:    v_mul_i32_i24_e32 v4, s2, v4
 ; GFX7-NEXT:    v_lshlrev_b32_e32 v3, 8, v3
-; GFX7-NEXT:    v_and_b32_e32 v9, s0, v9
-; GFX7-NEXT:    v_lshlrev_b32_e32 v5, 8, v5
-; GFX7-NEXT:    v_and_b32_e32 v6, s0, v6
-; GFX7-NEXT:    v_lshlrev_b32_e32 v7, 8, v7
-; GFX7-NEXT:    v_and_b32_e32 v8, s0, v8
-; GFX7-NEXT:    v_or_b32_e32 v1, v2, v1
-; GFX7-NEXT:    v_or_b32_e32 v2, v9, v3
-; GFX7-NEXT:    v_or_b32_e32 v3, v6, v5
-; GFX7-NEXT:    v_or_b32_e32 v5, v8, v7
+; GFX7-NEXT:    v_and_b32_e32 v4, s0, v4
+; GFX7-NEXT:    v_or_b32_e32 v3, v4, v3
 ; GFX7-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
-; GFX7-NEXT:    v_and_b32_e32 v2, s1, v2
-; GFX7-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
-; GFX7-NEXT:    v_and_b32_e32 v5, s1, v5
-; GFX7-NEXT:    v_or_b32_e32 v1, v2, v1
-; GFX7-NEXT:    v_or_b32_e32 v2, v5, v3
-; GFX7-NEXT:    v_alignbit_b32 v3, v1, v2, 8
-; GFX7-NEXT:    v_alignbit_b32 v5, v1, v2, 16
-; GFX7-NEXT:    v_lshrrev_b32_e32 v6, 24, v2
-; GFX7-NEXT:    v_lshrrev_b32_e32 v7, 8, v1
-; GFX7-NEXT:    v_lshrrev_b32_e32 v8, 16, v1
-; GFX7-NEXT:    v_lshrrev_b32_e32 v1, 24, v1
+; GFX7-NEXT:    v_and_b32_e32 v3, s1, v3
+; GFX7-NEXT:    v_or_b32_e32 v1, v3, v1
+; GFX7-NEXT:    v_alignbit_b32 v3, v0, v1, 8
+; GFX7-NEXT:    v_alignbit_b32 v4, v0, v1, 16
+; GFX7-NEXT:    v_lshrrev_b32_e32 v5, 24, v1
+; GFX7-NEXT:    v_lshrrev_b32_e32 v6, 8, v0
+; GFX7-NEXT:    v_lshrrev_b32_e32 v7, 16, v0
+; GFX7-NEXT:    v_lshrrev_b32_e32 v0, 24, v0
 ; GFX7-NEXT:    s_waitcnt vmcnt(0)
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v3, v0
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v5, v0
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v6, v0
-; GFX7-NEXT:    v_mad_i32_i24 v0, s13, v4, v0
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v0, v7
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v0, v8
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
+; GFX7-NEXT:    v_add_i32_e32 v1, vcc, v8, v1
+; GFX7-NEXT:    v_add_i32_e32 v1, vcc, v3, v1
+; GFX7-NEXT:    v_add_i32_e32 v1, vcc, v4, v1
+; GFX7-NEXT:    v_add_i32_e32 v1, vcc, v5, v1
+; GFX7-NEXT:    v_mad_i32_i24 v1, s11, v2, v1
+; GFX7-NEXT:    v_add_i32_e32 v1, vcc, v1, v6
+; GFX7-NEXT:    v_add_i32_e32 v1, vcc, v1, v7
+; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v1, v0
 ; GFX7-NEXT:    buffer_store_byte v0, off, s[4:7], 0
 ; GFX7-NEXT:    s_endpgm
 ;
@@ -2083,14 +2083,14 @@
 ; GFX8-NEXT:    v_or_b32_sdwa v3, v9, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
 ; GFX8-NEXT:    v_and_b32_e32 v4, s2, v4
 ; GFX8-NEXT:    v_or_b32_e32 v3, v4, v3
-; GFX8-NEXT:    v_lshrrev_b32_e32 v8, 8, v3
 ; GFX8-NEXT:    s_waitcnt vmcnt(0)
 ; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v2, v6
 ; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v7, v2
 ; GFX8-NEXT:    v_add_u32_sdwa v2, vcc, v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:BYTE_0
 ; GFX8-NEXT:    v_add_u32_sdwa v2, vcc, v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
 ; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v2, v4
-; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v8, v2
+; GFX8-NEXT:    v_lshrrev_b32_e32 v4, 8, v3
+; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v4, v2
 ; GFX8-NEXT:    v_add_u32_sdwa v2, vcc, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
 ; GFX8-NEXT:    v_add_u32_sdwa v2, vcc, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
 ; GFX8-NEXT:    flat_store_byte v[0:1], v2
diff --git a/llvm/test/CodeGen/AMDGPU/idot8u.ll b/llvm/test/CodeGen/AMDGPU/idot8u.ll
--- a/llvm/test/CodeGen/AMDGPU/idot8u.ll
+++ b/llvm/test/CodeGen/AMDGPU/idot8u.ll
@@ -2280,69 +2280,69 @@
 ; GFX7-NEXT:    s_mov_b32 s7, 0xf000
 ; GFX7-NEXT:    s_mov_b32 s6, -1
 ; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX7-NEXT:    buffer_load_ubyte v0, off, s[4:7], 0
+; GFX7-NEXT:    s_load_dword s10, s[10:11], 0x0
+; GFX7-NEXT:    buffer_load_ubyte v8, off, s[4:7], 0
 ; GFX7-NEXT:    s_load_dword s0, s[8:9], 0x0
-; GFX7-NEXT:    s_load_dword s1, s[10:11], 0x0
 ; GFX7-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX7-NEXT:    s_bfe_u32 s2, s0, 0x4000c
-; GFX7-NEXT:    s_bfe_u32 s14, s1, 0x4000c
-; GFX7-NEXT:    s_bfe_u32 s16, s1, 0x40004
-; GFX7-NEXT:    s_lshr_b32 s18, s1, 28
-; GFX7-NEXT:    v_mov_b32_e32 v8, s14
-; GFX7-NEXT:    s_bfe_u32 s15, s1, 0x40008
-; GFX7-NEXT:    s_and_b32 s17, s1, 15
-; GFX7-NEXT:    s_bfe_u32 s19, s1, 0x40018
-; GFX7-NEXT:    s_bfe_u32 s20, s1, 0x40014
-; GFX7-NEXT:    s_bfe_u32 s9, s0, 0x40004
-; GFX7-NEXT:    v_mov_b32_e32 v6, s16
-; GFX7-NEXT:    s_lshr_b32 s11, s0, 28
-; GFX7-NEXT:    v_mov_b32_e32 v4, s18
-; GFX7-NEXT:    v_mul_u32_u24_e32 v4, s11, v4
-; GFX7-NEXT:    v_mul_u32_u24_e32 v6, s9, v6
-; GFX7-NEXT:    v_mul_u32_u24_e32 v8, s2, v8
-; GFX7-NEXT:    s_bfe_u32 s1, s1, 0x40010
-; GFX7-NEXT:    s_bfe_u32 s8, s0, 0x40008
-; GFX7-NEXT:    v_mov_b32_e32 v7, s15
-; GFX7-NEXT:    s_and_b32 s10, s0, 15
-; GFX7-NEXT:    v_mov_b32_e32 v5, s17
-; GFX7-NEXT:    s_bfe_u32 s12, s0, 0x40018
-; GFX7-NEXT:    v_mov_b32_e32 v3, s19
-; GFX7-NEXT:    s_bfe_u32 s13, s0, 0x40014
+; GFX7-NEXT:    s_bfe_u32 s20, s10, 0x40014
+; GFX7-NEXT:    s_bfe_u32 s11, s10, 0x4000c
+; GFX7-NEXT:    s_lshr_b32 s18, s10, 28
+; GFX7-NEXT:    s_bfe_u32 s14, s0, 0x40014
 ; GFX7-NEXT:    v_mov_b32_e32 v2, s20
-; GFX7-NEXT:    v_mul_u32_u24_e32 v2, s13, v2
+; GFX7-NEXT:    s_bfe_u32 s15, s10, 0x40008
+; GFX7-NEXT:    s_bfe_u32 s16, s10, 0x40004
+; GFX7-NEXT:    s_and_b32 s17, s10, 15
+; GFX7-NEXT:    s_bfe_u32 s19, s10, 0x40018
+; GFX7-NEXT:    s_bfe_u32 s10, s10, 0x40010
+; GFX7-NEXT:    v_mul_u32_u24_e32 v2, s14, v2
+; GFX7-NEXT:    s_bfe_u32 s1, s0, 0x4000c
+; GFX7-NEXT:    s_bfe_u32 s2, s0, 0x40008
+; GFX7-NEXT:    s_bfe_u32 s8, s0, 0x40004
+; GFX7-NEXT:    s_and_b32 s9, s0, 15
+; GFX7-NEXT:    s_lshr_b32 s12, s0, 28
+; GFX7-NEXT:    s_bfe_u32 s13, s0, 0x40018
 ; GFX7-NEXT:    s_bfe_u32 s0, s0, 0x40010
-; GFX7-NEXT:    v_mov_b32_e32 v1, s1
+; GFX7-NEXT:    v_mov_b32_e32 v0, s10
+; GFX7-NEXT:    v_mov_b32_e32 v3, s18
+; GFX7-NEXT:    v_mul_u32_u24_e32 v1, s0, v0
+; GFX7-NEXT:    v_lshlrev_b32_e32 v2, 8, v2
 ; GFX7-NEXT:    v_mul_u32_u24_e32 v3, s12, v3
+; GFX7-NEXT:    v_or_b32_e32 v1, v1, v2
+; GFX7-NEXT:    v_mov_b32_e32 v2, s19
+; GFX7-NEXT:    v_mul_u32_u24_e32 v2, s13, v2
+; GFX7-NEXT:    v_lshlrev_b32_e32 v3, 8, v3
+; GFX7-NEXT:    v_or_b32_e32 v2, v2, v3
+; GFX7-NEXT:    v_mov_b32_e32 v3, s16
+; GFX7-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
+; GFX7-NEXT:    v_or_b32_e32 v1, v1, v2
+; GFX7-NEXT:    v_mov_b32_e32 v2, s17
+; GFX7-NEXT:    v_mul_u32_u24_e32 v3, s8, v3
+; GFX7-NEXT:    v_mov_b32_e32 v4, s11
+; GFX7-NEXT:    v_mul_u32_u24_e32 v2, s9, v2
+; GFX7-NEXT:    v_lshlrev_b32_e32 v3, 8, v3
+; GFX7-NEXT:    v_mul_u32_u24_e32 v4, s1, v4
+; GFX7-NEXT:    v_or_b32_e32 v2, v2, v3
+; GFX7-NEXT:    v_mov_b32_e32 v3, s15
+; GFX7-NEXT:    v_mul_u32_u24_e32 v3, s2, v3
 ; GFX7-NEXT:    v_lshlrev_b32_e32 v4, 8, v4
-; GFX7-NEXT:    v_mul_u32_u24_e32 v5, s10, v5
-; GFX7-NEXT:    v_mul_u32_u24_e32 v7, s8, v7
-; GFX7-NEXT:    v_lshlrev_b32_e32 v6, 8, v6
-; GFX7-NEXT:    v_lshlrev_b32_e32 v8, 8, v8
 ; GFX7-NEXT:    v_or_b32_e32 v3, v3, v4
-; GFX7-NEXT:    v_or_b32_e32 v4, v5, v6
-; GFX7-NEXT:    v_or_b32_e32 v5, v7, v8
-; GFX7-NEXT:    v_mul_u32_u24_e32 v9, s0, v1
-; GFX7-NEXT:    v_lshlrev_b32_e32 v2, 8, v2
-; GFX7-NEXT:    v_or_b32_e32 v2, v9, v2
 ; GFX7-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
-; GFX7-NEXT:    v_lshlrev_b32_e32 v5, 16, v5
 ; GFX7-NEXT:    v_or_b32_e32 v2, v2, v3
-; GFX7-NEXT:    v_or_b32_e32 v3, v4, v5
-; GFX7-NEXT:    v_alignbit_b32 v4, v2, v3, 8
-; GFX7-NEXT:    v_alignbit_b32 v5, v2, v3, 16
-; GFX7-NEXT:    v_lshrrev_b32_e32 v6, 24, v3
-; GFX7-NEXT:    v_lshrrev_b32_e32 v7, 8, v2
-; GFX7-NEXT:    v_lshrrev_b32_e32 v8, 16, v2
-; GFX7-NEXT:    v_lshrrev_b32_e32 v2, 24, v2
+; GFX7-NEXT:    v_alignbit_b32 v3, v1, v2, 8
+; GFX7-NEXT:    v_alignbit_b32 v4, v1, v2, 16
+; GFX7-NEXT:    v_lshrrev_b32_e32 v5, 24, v2
+; GFX7-NEXT:    v_lshrrev_b32_e32 v6, 8, v1
+; GFX7-NEXT:    v_lshrrev_b32_e32 v7, 16, v1
+; GFX7-NEXT:    v_lshrrev_b32_e32 v1, 24, v1
 ; GFX7-NEXT:    s_waitcnt vmcnt(0)
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v4, v0
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v5, v0
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v6, v0
-; GFX7-NEXT:    v_mad_u32_u24 v0, s0, v1, v0
+; GFX7-NEXT:    v_add_i32_e32 v2, vcc, v8, v2
+; GFX7-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
+; GFX7-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
+; GFX7-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
+; GFX7-NEXT:    v_mad_u32_u24 v0, s0, v0, v2
+; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v0, v6
 ; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v0, v7
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v0, v8
-; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GFX7-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
 ; GFX7-NEXT:    buffer_store_byte v0, off, s[4:7], 0
 ; GFX7-NEXT:    s_endpgm
 ;
@@ -2350,27 +2350,27 @@
 ; GFX8:       ; %bb.0: ; %entry
 ; GFX8-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
 ; GFX8-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x34
+; GFX8-NEXT:    s_mov_b32 s2, 0xffff
 ; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
 ; GFX8-NEXT:    v_mov_b32_e32 v0, s0
 ; GFX8-NEXT:    v_mov_b32_e32 v1, s1
 ; GFX8-NEXT:    flat_load_ubyte v2, v[0:1]
-; GFX8-NEXT:    s_load_dword s1, s[4:5], 0x0
-; GFX8-NEXT:    s_load_dword s2, s[6:7], 0x0
-; GFX8-NEXT:    s_mov_b32 s0, 0xffff
+; GFX8-NEXT:    s_load_dword s0, s[4:5], 0x0
+; GFX8-NEXT:    s_load_dword s1, s[6:7], 0x0
 ; GFX8-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX8-NEXT:    s_bfe_u32 s8, s1, 0x40004
-; GFX8-NEXT:    s_bfe_u32 s10, s1, 0x4000c
-; GFX8-NEXT:    s_bfe_u32 s15, s2, 0x40004
-; GFX8-NEXT:    s_and_b32 s16, s2, 15
-; GFX8-NEXT:    s_bfe_u32 s17, s2, 0x4000c
-; GFX8-NEXT:    s_bfe_u32 s4, s1, 0x40014
-; GFX8-NEXT:    s_lshr_b32 s6, s1, 28
-; GFX8-NEXT:    s_bfe_u32 s11, s2, 0x40014
-; GFX8-NEXT:    s_bfe_u32 s12, s2, 0x40010
-; GFX8-NEXT:    s_lshr_b32 s13, s2, 28
-; GFX8-NEXT:    s_bfe_u32 s14, s2, 0x40018
-; GFX8-NEXT:    s_bfe_u32 s2, s2, 0x40008
-; GFX8-NEXT:    s_and_b32 s9, s1, 15
+; GFX8-NEXT:    s_bfe_u32 s8, s0, 0x40004
+; GFX8-NEXT:    s_bfe_u32 s10, s0, 0x4000c
+; GFX8-NEXT:    s_bfe_u32 s15, s1, 0x40004
+; GFX8-NEXT:    s_and_b32 s16, s1, 15
+; GFX8-NEXT:    s_bfe_u32 s17, s1, 0x4000c
+; GFX8-NEXT:    s_bfe_u32 s4, s0, 0x40014
+; GFX8-NEXT:    s_lshr_b32 s6, s0, 28
+; GFX8-NEXT:    s_bfe_u32 s11, s1, 0x40014
+; GFX8-NEXT:    s_bfe_u32 s12, s1, 0x40010
+; GFX8-NEXT:    s_lshr_b32 s13, s1, 28
+; GFX8-NEXT:    s_bfe_u32 s14, s1, 0x40018
+; GFX8-NEXT:    s_bfe_u32 s1, s1, 0x40008
+; GFX8-NEXT:    s_and_b32 s9, s0, 15
 ; GFX8-NEXT:    v_mov_b32_e32 v4, s17
 ; GFX8-NEXT:    v_mov_b32_e32 v5, s10
 ; GFX8-NEXT:    v_mov_b32_e32 v6, s16
@@ -2379,38 +2379,38 @@
 ; GFX8-NEXT:    v_mul_u32_u24_sdwa v4, v5, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 ; GFX8-NEXT:    v_mul_u32_u24_e32 v5, s9, v6
 ; GFX8-NEXT:    v_mul_u32_u24_sdwa v6, v8, v7 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT:    s_bfe_u32 s5, s1, 0x40010
-; GFX8-NEXT:    s_bfe_u32 s7, s1, 0x40018
+; GFX8-NEXT:    s_bfe_u32 s5, s0, 0x40010
+; GFX8-NEXT:    s_bfe_u32 s7, s0, 0x40018
 ; GFX8-NEXT:    v_mov_b32_e32 v9, s14
-; GFX8-NEXT:    s_bfe_u32 s1, s1, 0x40008
-; GFX8-NEXT:    v_mov_b32_e32 v3, s2
+; GFX8-NEXT:    s_bfe_u32 s0, s0, 0x40008
+; GFX8-NEXT:    v_mov_b32_e32 v3, s1
 ; GFX8-NEXT:    v_mov_b32_e32 v10, s13
 ; GFX8-NEXT:    v_mov_b32_e32 v11, s6
 ; GFX8-NEXT:    v_mov_b32_e32 v12, s12
 ; GFX8-NEXT:    v_mov_b32_e32 v13, s11
 ; GFX8-NEXT:    v_mov_b32_e32 v14, s4
-; GFX8-NEXT:    v_mul_u32_u24_e32 v3, s1, v3
+; GFX8-NEXT:    v_mul_u32_u24_e32 v3, s0, v3
 ; GFX8-NEXT:    v_or_b32_e32 v5, v5, v6
 ; GFX8-NEXT:    v_mul_u32_u24_e32 v7, s7, v9
 ; GFX8-NEXT:    v_mul_u32_u24_sdwa v8, v11, v10 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 ; GFX8-NEXT:    v_mul_u32_u24_e32 v9, s5, v12
 ; GFX8-NEXT:    v_mul_u32_u24_sdwa v10, v14, v13 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT:    v_and_b32_e32 v5, s0, v5
+; GFX8-NEXT:    v_and_b32_e32 v5, s2, v5
 ; GFX8-NEXT:    v_or_b32_sdwa v3, v3, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
 ; GFX8-NEXT:    v_or_b32_e32 v9, v9, v10
 ; GFX8-NEXT:    v_or_b32_sdwa v7, v7, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
-; GFX8-NEXT:    v_and_b32_e32 v4, s0, v9
+; GFX8-NEXT:    v_and_b32_e32 v4, s2, v9
 ; GFX8-NEXT:    v_or_b32_e32 v3, v5, v3
 ; GFX8-NEXT:    v_or_b32_e32 v6, v4, v7
 ; GFX8-NEXT:    v_lshrrev_b32_e32 v7, 8, v3
-; GFX8-NEXT:    v_lshrrev_b32_e32 v8, 8, v6
 ; GFX8-NEXT:    s_waitcnt vmcnt(0)
 ; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v2, v5
 ; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v7, v2
 ; GFX8-NEXT:    v_add_u32_sdwa v2, vcc, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:BYTE_0
 ; GFX8-NEXT:    v_add_u32_sdwa v2, vcc, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
 ; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v2, v4
-; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v8, v2
+; GFX8-NEXT:    v_lshrrev_b32_e32 v3, 8, v6
+; GFX8-NEXT:    v_add_u32_e32 v2, vcc, v3, v2
 ; GFX8-NEXT:    v_add_u32_sdwa v2, vcc, v6, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
 ; GFX8-NEXT:    v_add_u32_sdwa v2, vcc, v6, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
 ; GFX8-NEXT:    flat_store_byte v[0:1], v2
diff --git a/llvm/test/CodeGen/AMDGPU/mul.ll b/llvm/test/CodeGen/AMDGPU/mul.ll
--- a/llvm/test/CodeGen/AMDGPU/mul.ll
+++ b/llvm/test/CodeGen/AMDGPU/mul.ll
@@ -230,9 +230,9 @@
 ; VI: s_mul_i32
 ; VI: v_mul_hi_u32
 ; VI: v_mul_hi_u32
-; VI: s_mul_i32
 ; VI: v_mad_u64_u32
 ; VI: s_mul_i32
+; VI: s_mul_i32
 ; VI: v_mad_u64_u32
 ; VI: s_mul_i32
 ; VI: s_mul_i32
diff --git a/llvm/test/CodeGen/AMDGPU/sdiv.ll b/llvm/test/CodeGen/AMDGPU/sdiv.ll
--- a/llvm/test/CodeGen/AMDGPU/sdiv.ll
+++ b/llvm/test/CodeGen/AMDGPU/sdiv.ll
@@ -32,23 +32,23 @@
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
 ; GCN-NEXT:    v_xor_b32_e32 v1, v1, v2
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v3, v1
-; GCN-NEXT:    v_ashrrev_i32_e32 v6, 31, v0
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v6, v0
-; GCN-NEXT:    v_xor_b32_e32 v0, v0, v6
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v3
-; GCN-NEXT:    v_xor_b32_e32 v2, v6, v2
 ; GCN-NEXT:    v_mul_f32_e32 v3, 0x4f800000, v3
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
 ; GCN-NEXT:    v_mul_lo_u32 v4, v3, v1
 ; GCN-NEXT:    v_mul_hi_u32 v5, v3, v1
-; GCN-NEXT:    v_sub_i32_e32 v7, vcc, 0, v4
+; GCN-NEXT:    v_sub_i32_e32 v6, vcc, 0, v4
 ; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v5
-; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v7, s[0:1]
+; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v6, s[0:1]
 ; GCN-NEXT:    v_mul_hi_u32 v4, v4, v3
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v4, v3
+; GCN-NEXT:    v_ashrrev_i32_e32 v5, 31, v0
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v5, v0
+; GCN-NEXT:    v_xor_b32_e32 v0, v0, v5
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v4, v3
 ; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v4, v3
-; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v5, s[0:1]
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v6, s[0:1]
 ; GCN-NEXT:    v_mul_hi_u32 v3, v3, v0
+; GCN-NEXT:    v_xor_b32_e32 v2, v5, v2
 ; GCN-NEXT:    v_mul_lo_u32 v4, v3, v1
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, 1, v3
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, -1, v3
@@ -81,23 +81,23 @@
 ; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v2, v1
 ; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v2
 ; TONGA-NEXT:    v_cvt_f32_u32_e32 v3, v1
-; TONGA-NEXT:    v_ashrrev_i32_e32 v6, 31, v0
-; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v6, v0
-; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v6
 ; TONGA-NEXT:    v_rcp_iflag_f32_e32 v3, v3
-; TONGA-NEXT:    v_xor_b32_e32 v2, v6, v2
 ; TONGA-NEXT:    v_mul_f32_e32 v3, 0x4f800000, v3
 ; TONGA-NEXT:    v_cvt_u32_f32_e32 v3, v3
 ; TONGA-NEXT:    v_mul_lo_u32 v4, v3, v1
 ; TONGA-NEXT:    v_mul_hi_u32 v5, v3, v1
-; TONGA-NEXT:    v_sub_u32_e32 v7, vcc, 0, v4
+; TONGA-NEXT:    v_sub_u32_e32 v6, vcc, 0, v4
 ; TONGA-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v5
-; TONGA-NEXT:    v_cndmask_b32_e64 v4, v4, v7, s[0:1]
+; TONGA-NEXT:    v_cndmask_b32_e64 v4, v4, v6, s[0:1]
 ; TONGA-NEXT:    v_mul_hi_u32 v4, v4, v3
-; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v4, v3
+; TONGA-NEXT:    v_ashrrev_i32_e32 v5, 31, v0
+; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v5, v0
+; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v5
+; TONGA-NEXT:    v_add_u32_e32 v6, vcc, v4, v3
 ; TONGA-NEXT:    v_subrev_u32_e32 v3, vcc, v4, v3
-; TONGA-NEXT:    v_cndmask_b32_e64 v3, v3, v5, s[0:1]
+; TONGA-NEXT:    v_cndmask_b32_e64 v3, v3, v6, s[0:1]
 ; TONGA-NEXT:    v_mul_hi_u32 v3, v3, v0
+; TONGA-NEXT:    v_xor_b32_e32 v2, v5, v2
 ; TONGA-NEXT:    v_mul_lo_u32 v4, v3, v1
 ; TONGA-NEXT:    v_add_u32_e32 v5, vcc, 1, v3
 ; TONGA-NEXT:    v_add_u32_e32 v6, vcc, -1, v3
@@ -422,69 +422,69 @@
 ; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[0:3], 0
 ; GCN-NEXT:    s_waitcnt vmcnt(0)
 ; GCN-NEXT:    v_ashrrev_i32_e32 v5, 31, v2
-; GCN-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
+; GCN-NEXT:    v_ashrrev_i32_e32 v6, 31, v3
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
-; GCN-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v7, v3
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v6, v3
 ; GCN-NEXT:    v_xor_b32_e32 v2, v2, v5
-; GCN-NEXT:    v_ashrrev_i32_e32 v6, 31, v1
-; GCN-NEXT:    v_xor_b32_e32 v8, v4, v5
-; GCN-NEXT:    v_cvt_f32_u32_e32 v5, v2
-; GCN-NEXT:    v_xor_b32_e32 v3, v3, v7
-; GCN-NEXT:    v_xor_b32_e32 v9, v6, v7
-; GCN-NEXT:    v_cvt_f32_u32_e32 v7, v3
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v5, v5
+; GCN-NEXT:    v_cvt_f32_u32_e32 v7, v2
+; GCN-NEXT:    v_xor_b32_e32 v3, v3, v6
+; GCN-NEXT:    v_cvt_f32_u32_e32 v8, v3
+; GCN-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v7, v7
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v4, v0
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v8, v8
+; GCN-NEXT:    v_xor_b32_e32 v5, v4, v5
+; GCN-NEXT:    v_mul_f32_e32 v7, s4, v7
+; GCN-NEXT:    v_cvt_u32_f32_e32 v7, v7
+; GCN-NEXT:    v_mul_f32_e32 v8, s4, v8
+; GCN-NEXT:    v_cvt_u32_f32_e32 v8, v8
 ; GCN-NEXT:    v_xor_b32_e32 v0, v0, v4
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v7, v7
-; GCN-NEXT:    v_mul_f32_e32 v4, s4, v5
-; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v4
-; GCN-NEXT:    v_add_i32_e32 v1, vcc, v6, v1
-; GCN-NEXT:    v_mul_f32_e32 v5, s4, v7
-; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v5
-; GCN-NEXT:    v_xor_b32_e32 v1, v1, v6
-; GCN-NEXT:    v_mul_hi_u32 v6, v4, v2
-; GCN-NEXT:    v_mul_lo_u32 v7, v4, v2
-; GCN-NEXT:    v_mul_hi_u32 v10, v5, v3
-; GCN-NEXT:    v_mul_lo_u32 v11, v5, v3
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v6
-; GCN-NEXT:    v_sub_i32_e32 v12, vcc, 0, v7
-; GCN-NEXT:    v_cndmask_b32_e64 v6, v7, v12, s[0:1]
-; GCN-NEXT:    v_sub_i32_e32 v13, vcc, 0, v11
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v10
-; GCN-NEXT:    v_cndmask_b32_e64 v7, v11, v13, s[2:3]
-; GCN-NEXT:    v_mul_hi_u32 v6, v6, v4
-; GCN-NEXT:    v_mul_hi_u32 v7, v7, v5
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v6, v4
-; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v6, v4
-; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v10, s[0:1]
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v5
-; GCN-NEXT:    v_subrev_i32_e32 v5, vcc, v7, v5
+; GCN-NEXT:    v_mul_lo_u32 v4, v7, v2
+; GCN-NEXT:    v_mul_hi_u32 v11, v7, v2
+; GCN-NEXT:    v_mul_lo_u32 v10, v8, v3
+; GCN-NEXT:    v_mul_hi_u32 v12, v8, v3
+; GCN-NEXT:    v_sub_i32_e32 v13, vcc, 0, v4
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v11
+; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v13, s[0:1]
+; GCN-NEXT:    v_sub_i32_e32 v14, vcc, 0, v10
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v12
+; GCN-NEXT:    v_cndmask_b32_e64 v10, v10, v14, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v4, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v10, v10, v8
+; GCN-NEXT:    v_ashrrev_i32_e32 v9, 31, v1
+; GCN-NEXT:    v_add_i32_e32 v1, vcc, v9, v1
+; GCN-NEXT:    v_xor_b32_e32 v6, v9, v6
+; GCN-NEXT:    v_xor_b32_e32 v1, v1, v9
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v4, v7
+; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v4, v7
+; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v9, s[0:1]
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v10, v8
+; GCN-NEXT:    v_subrev_i32_e32 v8, vcc, v10, v8
 ; GCN-NEXT:    v_mul_hi_u32 v4, v4, v0
-; GCN-NEXT:    v_cndmask_b32_e64 v5, v5, v6, s[2:3]
-; GCN-NEXT:    v_mul_hi_u32 v5, v5, v1
-; GCN-NEXT:    v_mul_lo_u32 v6, v4, v2
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, 1, v4
-; GCN-NEXT:    v_mul_lo_u32 v11, v5, v3
+; GCN-NEXT:    v_cndmask_b32_e64 v7, v8, v7, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v7, v7, v1
+; GCN-NEXT:    v_mul_lo_u32 v8, v4, v2
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, 1, v4
+; GCN-NEXT:    v_mul_lo_u32 v11, v7, v3
 ; GCN-NEXT:    v_add_i32_e32 v10, vcc, -1, v4
-; GCN-NEXT:    v_subrev_i32_e32 v14, vcc, v6, v0
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v6
+; GCN-NEXT:    v_subrev_i32_e32 v14, vcc, v8, v0
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v8
 ; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], v14, v2
 ; GCN-NEXT:    v_subrev_i32_e32 v0, vcc, v11, v1
-; GCN-NEXT:    v_add_i32_e32 v12, vcc, 1, v5
-; GCN-NEXT:    v_add_i32_e32 v13, vcc, -1, v5
+; GCN-NEXT:    v_add_i32_e32 v12, vcc, 1, v7
+; GCN-NEXT:    v_add_i32_e32 v13, vcc, -1, v7
 ; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v11
 ; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v0, v3
 ; GCN-NEXT:    s_and_b64 s[2:3], s[2:3], s[0:1]
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v4, v7, s[2:3]
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v4, v9, s[2:3]
 ; GCN-NEXT:    s_and_b64 s[2:3], s[4:5], vcc
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v5, v12, s[2:3]
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v7, v12, s[2:3]
 ; GCN-NEXT:    v_cndmask_b32_e64 v0, v10, v0, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v13, v1, vcc
-; GCN-NEXT:    v_xor_b32_e32 v0, v0, v8
-; GCN-NEXT:    v_xor_b32_e32 v1, v1, v9
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v8
-; GCN-NEXT:    v_sub_i32_e32 v1, vcc, v1, v9
+; GCN-NEXT:    v_xor_b32_e32 v0, v0, v5
+; GCN-NEXT:    v_xor_b32_e32 v1, v1, v6
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v5
+; GCN-NEXT:    v_sub_i32_e32 v1, vcc, v1, v6
 ; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[8:11], 0
 ; GCN-NEXT:    s_endpgm
 ;
@@ -504,69 +504,69 @@
 ; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[0:3], 0
 ; TONGA-NEXT:    s_waitcnt vmcnt(0)
 ; TONGA-NEXT:    v_ashrrev_i32_e32 v5, 31, v2
-; TONGA-NEXT:    v_ashrrev_i32_e32 v7, 31, v3
+; TONGA-NEXT:    v_ashrrev_i32_e32 v6, 31, v3
 ; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v5, v2
-; TONGA-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
-; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v7, v3
+; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v6, v3
 ; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v5
-; TONGA-NEXT:    v_ashrrev_i32_e32 v6, 31, v1
-; TONGA-NEXT:    v_xor_b32_e32 v8, v4, v5
-; TONGA-NEXT:    v_cvt_f32_u32_e32 v5, v2
-; TONGA-NEXT:    v_xor_b32_e32 v3, v3, v7
-; TONGA-NEXT:    v_xor_b32_e32 v9, v6, v7
-; TONGA-NEXT:    v_cvt_f32_u32_e32 v7, v3
-; TONGA-NEXT:    v_rcp_iflag_f32_e32 v5, v5
+; TONGA-NEXT:    v_cvt_f32_u32_e32 v7, v2
+; TONGA-NEXT:    v_xor_b32_e32 v3, v3, v6
+; TONGA-NEXT:    v_cvt_f32_u32_e32 v8, v3
+; TONGA-NEXT:    v_ashrrev_i32_e32 v4, 31, v0
+; TONGA-NEXT:    v_rcp_iflag_f32_e32 v7, v7
 ; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v4, v0
+; TONGA-NEXT:    v_rcp_iflag_f32_e32 v8, v8
+; TONGA-NEXT:    v_xor_b32_e32 v5, v4, v5
+; TONGA-NEXT:    v_mul_f32_e32 v7, s4, v7
+; TONGA-NEXT:    v_cvt_u32_f32_e32 v7, v7
+; TONGA-NEXT:    v_mul_f32_e32 v8, s4, v8
+; TONGA-NEXT:    v_cvt_u32_f32_e32 v8, v8
 ; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v4
-; TONGA-NEXT:    v_rcp_iflag_f32_e32 v7, v7
-; TONGA-NEXT:    v_mul_f32_e32 v4, s4, v5
-; TONGA-NEXT:    v_cvt_u32_f32_e32 v4, v4
-; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v6, v1
-; TONGA-NEXT:    v_mul_f32_e32 v5, s4, v7
-; TONGA-NEXT:    v_cvt_u32_f32_e32 v5, v5
-; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v6
-; TONGA-NEXT:    v_mul_hi_u32 v6, v4, v2
-; TONGA-NEXT:    v_mul_lo_u32 v7, v4, v2
-; TONGA-NEXT:    v_mul_hi_u32 v10, v5, v3
-; TONGA-NEXT:    v_mul_lo_u32 v11, v5, v3
-; TONGA-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v6
-; TONGA-NEXT:    v_sub_u32_e32 v12, vcc, 0, v7
-; TONGA-NEXT:    v_cndmask_b32_e64 v6, v7, v12, s[0:1]
-; TONGA-NEXT:    v_sub_u32_e32 v13, vcc, 0, v11
-; TONGA-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v10
-; TONGA-NEXT:    v_cndmask_b32_e64 v7, v11, v13, s[2:3]
-; TONGA-NEXT:    v_mul_hi_u32 v6, v6, v4
-; TONGA-NEXT:    v_mul_hi_u32 v7, v7, v5
-; TONGA-NEXT:    v_add_u32_e32 v10, vcc, v6, v4
-; TONGA-NEXT:    v_subrev_u32_e32 v4, vcc, v6, v4
-; TONGA-NEXT:    v_cndmask_b32_e64 v4, v4, v10, s[0:1]
-; TONGA-NEXT:    v_add_u32_e32 v6, vcc, v7, v5
-; TONGA-NEXT:    v_subrev_u32_e32 v5, vcc, v7, v5
+; TONGA-NEXT:    v_mul_lo_u32 v4, v7, v2
+; TONGA-NEXT:    v_mul_hi_u32 v11, v7, v2
+; TONGA-NEXT:    v_mul_lo_u32 v10, v8, v3
+; TONGA-NEXT:    v_mul_hi_u32 v12, v8, v3
+; TONGA-NEXT:    v_sub_u32_e32 v13, vcc, 0, v4
+; TONGA-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v11
+; TONGA-NEXT:    v_cndmask_b32_e64 v4, v4, v13, s[0:1]
+; TONGA-NEXT:    v_sub_u32_e32 v14, vcc, 0, v10
+; TONGA-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v12
+; TONGA-NEXT:    v_cndmask_b32_e64 v10, v10, v14, s[2:3]
+; TONGA-NEXT:    v_mul_hi_u32 v4, v4, v7
+; TONGA-NEXT:    v_mul_hi_u32 v10, v10, v8
+; TONGA-NEXT:    v_ashrrev_i32_e32 v9, 31, v1
+; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v9, v1
+; TONGA-NEXT:    v_xor_b32_e32 v6, v9, v6
+; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v9
+; TONGA-NEXT:    v_add_u32_e32 v9, vcc, v4, v7
+; TONGA-NEXT:    v_subrev_u32_e32 v4, vcc, v4, v7
+; TONGA-NEXT:    v_cndmask_b32_e64 v4, v4, v9, s[0:1]
+; TONGA-NEXT:    v_add_u32_e32 v7, vcc, v10, v8
+; TONGA-NEXT:    v_subrev_u32_e32 v8, vcc, v10, v8
 ; TONGA-NEXT:    v_mul_hi_u32 v4, v4, v0
-; TONGA-NEXT:    v_cndmask_b32_e64 v5, v5, v6, s[2:3]
-; TONGA-NEXT:    v_mul_hi_u32 v5, v5, v1
-; TONGA-NEXT:    v_mul_lo_u32 v6, v4, v2
-; TONGA-NEXT:    v_add_u32_e32 v7, vcc, 1, v4
-; TONGA-NEXT:    v_mul_lo_u32 v11, v5, v3
+; TONGA-NEXT:    v_cndmask_b32_e64 v7, v8, v7, s[2:3]
+; TONGA-NEXT:    v_mul_hi_u32 v7, v7, v1
+; TONGA-NEXT:    v_mul_lo_u32 v8, v4, v2
+; TONGA-NEXT:    v_add_u32_e32 v9, vcc, 1, v4
+; TONGA-NEXT:    v_mul_lo_u32 v11, v7, v3
 ; TONGA-NEXT:    v_add_u32_e32 v10, vcc, -1, v4
-; TONGA-NEXT:    v_subrev_u32_e32 v14, vcc, v6, v0
-; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v6
+; TONGA-NEXT:    v_subrev_u32_e32 v14, vcc, v8, v0
+; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v8
 ; TONGA-NEXT:    v_cmp_ge_u32_e64 s[2:3], v14, v2
 ; TONGA-NEXT:    v_subrev_u32_e32 v0, vcc, v11, v1
-; TONGA-NEXT:    v_add_u32_e32 v12, vcc, 1, v5
-; TONGA-NEXT:    v_add_u32_e32 v13, vcc, -1, v5
+; TONGA-NEXT:    v_add_u32_e32 v12, vcc, 1, v7
+; TONGA-NEXT:    v_add_u32_e32 v13, vcc, -1, v7
 ; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v11
 ; TONGA-NEXT:    v_cmp_ge_u32_e64 s[4:5], v0, v3
 ; TONGA-NEXT:    s_and_b64 s[2:3], s[2:3], s[0:1]
-; TONGA-NEXT:    v_cndmask_b32_e64 v0, v4, v7, s[2:3]
+; TONGA-NEXT:    v_cndmask_b32_e64 v0, v4, v9, s[2:3]
 ; TONGA-NEXT:    s_and_b64 s[2:3], s[4:5], vcc
-; TONGA-NEXT:    v_cndmask_b32_e64 v1, v5, v12, s[2:3]
+; TONGA-NEXT:    v_cndmask_b32_e64 v1, v7, v12, s[2:3]
 ; TONGA-NEXT:    v_cndmask_b32_e64 v0, v10, v0, s[0:1]
 ; TONGA-NEXT:    v_cndmask_b32_e32 v1, v13, v1, vcc
-; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v8
-; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v9
-; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v0, v8
-; TONGA-NEXT:    v_sub_u32_e32 v1, vcc, v1, v9
+; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v5
+; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v6
+; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v0, v5
+; TONGA-NEXT:    v_sub_u32_e32 v1, vcc, v1, v6
 ; TONGA-NEXT:    buffer_store_dwordx2 v[0:1], off, s[8:11], 0
 ; TONGA-NEXT:    s_endpgm
 ;
@@ -846,298 +846,298 @@
 define amdgpu_kernel void @sdiv_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
 ; GCN-LABEL: sdiv_v4i32:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx4 s[12:15], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s11, 0xf000
-; GCN-NEXT:    s_mov_b32 s10, -1
-; GCN-NEXT:    s_mov_b32 s2, s10
-; GCN-NEXT:    s_mov_b32 s3, s11
+; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s15, 0xf000
+; GCN-NEXT:    s_mov_b32 s14, -1
+; GCN-NEXT:    s_mov_b32 s2, s14
+; GCN-NEXT:    s_mov_b32 s3, s15
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_mov_b32 s0, s14
-; GCN-NEXT:    s_mov_b32 s1, s15
+; GCN-NEXT:    s_mov_b32 s0, s10
+; GCN-NEXT:    s_mov_b32 s1, s11
 ; GCN-NEXT:    buffer_load_dwordx4 v[0:3], off, s[0:3], 0
 ; GCN-NEXT:    buffer_load_dwordx4 v[4:7], off, s[0:3], 0 offset:16
-; GCN-NEXT:    s_mov_b32 s14, 0x4f800000
-; GCN-NEXT:    s_mov_b32 s8, s12
-; GCN-NEXT:    s_mov_b32 s9, s13
+; GCN-NEXT:    s_mov_b32 s6, 0x4f800000
+; GCN-NEXT:    s_mov_b32 s12, s8
+; GCN-NEXT:    s_mov_b32 s13, s9
 ; GCN-NEXT:    s_waitcnt vmcnt(1)
 ; GCN-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
 ; GCN-NEXT:    s_waitcnt vmcnt(0)
 ; GCN-NEXT:    v_ashrrev_i32_e32 v9, 31, v4
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v9, v4
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v8, v0
 ; GCN-NEXT:    v_xor_b32_e32 v4, v4, v9
-; GCN-NEXT:    v_xor_b32_e32 v15, v8, v9
-; GCN-NEXT:    v_cvt_f32_u32_e32 v9, v4
+; GCN-NEXT:    v_xor_b32_e32 v16, v8, v9
+; GCN-NEXT:    v_xor_b32_e32 v0, v0, v8
+; GCN-NEXT:    v_cvt_f32_u32_e32 v8, v4
 ; GCN-NEXT:    v_ashrrev_i32_e32 v11, 31, v5
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v11, v5
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v8, v0
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v9, v9
 ; GCN-NEXT:    v_xor_b32_e32 v5, v5, v11
-; GCN-NEXT:    v_xor_b32_e32 v0, v0, v8
-; GCN-NEXT:    v_cvt_f32_u32_e32 v8, v5
-; GCN-NEXT:    v_mul_f32_e32 v9, s14, v9
-; GCN-NEXT:    v_cvt_u32_f32_e32 v9, v9
-; GCN-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
+; GCN-NEXT:    v_cvt_f32_u32_e32 v9, v5
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v8, v8
+; GCN-NEXT:    v_ashrrev_i32_e32 v13, 31, v6
+; GCN-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v13, v6
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v10, v1
-; GCN-NEXT:    v_xor_b32_e32 v16, v10, v11
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v9, v9
+; GCN-NEXT:    v_mul_f32_e32 v8, s6, v8
+; GCN-NEXT:    v_xor_b32_e32 v6, v6, v13
+; GCN-NEXT:    v_xor_b32_e32 v17, v10, v11
 ; GCN-NEXT:    v_xor_b32_e32 v1, v1, v10
-; GCN-NEXT:    v_mul_f32_e32 v8, s14, v8
-; GCN-NEXT:    v_mul_hi_u32 v11, v9, v4
-; GCN-NEXT:    v_mul_lo_u32 v10, v9, v4
+; GCN-NEXT:    v_cvt_f32_u32_e32 v10, v6
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v8, v8
 ; GCN-NEXT:    v_ashrrev_i32_e32 v12, 31, v2
-; GCN-NEXT:    v_ashrrev_i32_e32 v13, 31, v6
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v12, v2
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v11
-; GCN-NEXT:    v_xor_b32_e32 v17, v12, v13
+; GCN-NEXT:    v_mul_f32_e32 v9, s6, v9
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v10, v10
+; GCN-NEXT:    v_xor_b32_e32 v18, v12, v13
 ; GCN-NEXT:    v_xor_b32_e32 v2, v2, v12
-; GCN-NEXT:    v_sub_i32_e32 v12, vcc, 0, v10
-; GCN-NEXT:    v_cndmask_b32_e64 v10, v10, v12, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v12, v8, v5
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v13, v6
-; GCN-NEXT:    v_xor_b32_e32 v6, v6, v13
-; GCN-NEXT:    v_mul_lo_u32 v11, v8, v5
+; GCN-NEXT:    v_cvt_u32_f32_e32 v9, v9
+; GCN-NEXT:    v_mul_hi_u32 v12, v8, v4
+; GCN-NEXT:    v_mul_lo_u32 v11, v8, v4
+; GCN-NEXT:    v_mul_f32_e32 v10, s6, v10
+; GCN-NEXT:    v_mul_lo_u32 v13, v9, v5
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v12
+; GCN-NEXT:    v_mul_hi_u32 v12, v9, v5
+; GCN-NEXT:    v_cvt_u32_f32_e32 v10, v10
+; GCN-NEXT:    v_sub_i32_e32 v19, vcc, 0, v11
+; GCN-NEXT:    v_cndmask_b32_e64 v11, v11, v19, s[0:1]
 ; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v12
-; GCN-NEXT:    v_cvt_f32_u32_e32 v12, v6
-; GCN-NEXT:    v_mul_hi_u32 v10, v10, v9
-; GCN-NEXT:    v_sub_i32_e32 v13, vcc, 0, v11
-; GCN-NEXT:    v_cndmask_b32_e64 v11, v11, v13, s[2:3]
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v12, v12
-; GCN-NEXT:    v_ashrrev_i32_e32 v14, 31, v7
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v14, v7
-; GCN-NEXT:    v_xor_b32_e32 v7, v7, v14
-; GCN-NEXT:    v_mul_f32_e32 v12, s14, v12
-; GCN-NEXT:    v_cvt_u32_f32_e32 v12, v12
-; GCN-NEXT:    v_mul_hi_u32 v18, v12, v6
-; GCN-NEXT:    v_mul_lo_u32 v13, v12, v6
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v18
-; GCN-NEXT:    v_add_i32_e32 v18, vcc, v10, v9
-; GCN-NEXT:    v_subrev_i32_e32 v9, vcc, v10, v9
-; GCN-NEXT:    v_mul_hi_u32 v10, v11, v8
-; GCN-NEXT:    v_cndmask_b32_e64 v9, v9, v18, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v9, v9, v0
 ; GCN-NEXT:    v_sub_i32_e32 v19, vcc, 0, v13
-; GCN-NEXT:    v_add_i32_e32 v11, vcc, v10, v8
-; GCN-NEXT:    v_subrev_i32_e32 v8, vcc, v10, v8
-; GCN-NEXT:    v_cndmask_b32_e64 v13, v13, v19, s[4:5]
-; GCN-NEXT:    v_cndmask_b32_e64 v8, v8, v11, s[2:3]
-; GCN-NEXT:    v_mul_hi_u32 v10, v13, v12
-; GCN-NEXT:    v_mul_lo_u32 v11, v9, v4
-; GCN-NEXT:    v_mul_hi_u32 v8, v8, v1
-; GCN-NEXT:    v_add_i32_e32 v13, vcc, v10, v12
-; GCN-NEXT:    v_subrev_i32_e32 v10, vcc, v10, v12
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v11
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v11
+; GCN-NEXT:    v_cndmask_b32_e64 v13, v13, v19, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v19, v10, v6
+; GCN-NEXT:    v_ashrrev_i32_e32 v15, 31, v7
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v15, v7
+; GCN-NEXT:    v_xor_b32_e32 v7, v7, v15
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v19
+; GCN-NEXT:    v_cvt_f32_u32_e32 v19, v7
+; GCN-NEXT:    v_mul_hi_u32 v11, v11, v8
+; GCN-NEXT:    v_mul_lo_u32 v12, v10, v6
+; GCN-NEXT:    v_ashrrev_i32_e32 v14, 31, v3
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v19, v19
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v14, v3
+; GCN-NEXT:    v_sub_i32_e32 v20, vcc, 0, v12
+; GCN-NEXT:    v_cndmask_b32_e64 v12, v12, v20, s[4:5]
+; GCN-NEXT:    v_mul_f32_e32 v19, s6, v19
+; GCN-NEXT:    v_cvt_u32_f32_e32 v19, v19
+; GCN-NEXT:    v_xor_b32_e32 v3, v3, v14
+; GCN-NEXT:    v_mul_hi_u32 v21, v19, v7
+; GCN-NEXT:    v_mul_lo_u32 v20, v19, v7
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[6:7], 0, v21
+; GCN-NEXT:    v_add_i32_e32 v21, vcc, v11, v8
+; GCN-NEXT:    v_subrev_i32_e32 v8, vcc, v11, v8
+; GCN-NEXT:    v_mul_hi_u32 v11, v13, v9
+; GCN-NEXT:    v_cndmask_b32_e64 v8, v8, v21, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v8, v8, v0
+; GCN-NEXT:    v_sub_i32_e32 v22, vcc, 0, v20
+; GCN-NEXT:    v_add_i32_e32 v13, vcc, v11, v9
+; GCN-NEXT:    v_subrev_i32_e32 v9, vcc, v11, v9
+; GCN-NEXT:    v_mul_hi_u32 v11, v12, v10
+; GCN-NEXT:    v_cndmask_b32_e64 v9, v9, v13, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v9, v9, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v20, v20, v22, s[6:7]
+; GCN-NEXT:    v_add_i32_e32 v12, vcc, v11, v10
+; GCN-NEXT:    v_subrev_i32_e32 v10, vcc, v11, v10
+; GCN-NEXT:    v_cndmask_b32_e64 v10, v10, v12, s[4:5]
+; GCN-NEXT:    v_mul_lo_u32 v12, v8, v4
+; GCN-NEXT:    v_mul_hi_u32 v11, v20, v19
+; GCN-NEXT:    v_mul_hi_u32 v10, v10, v2
+; GCN-NEXT:    v_add_i32_e32 v13, vcc, 1, v8
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v12
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v12
+; GCN-NEXT:    v_mul_lo_u32 v12, v9, v5
+; GCN-NEXT:    v_add_i32_e32 v20, vcc, v11, v19
+; GCN-NEXT:    v_subrev_i32_e32 v11, vcc, v11, v19
+; GCN-NEXT:    v_cndmask_b32_e64 v11, v11, v20, s[6:7]
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v1, v12
+; GCN-NEXT:    v_sub_i32_e32 v1, vcc, v1, v12
+; GCN-NEXT:    v_mul_lo_u32 v12, v10, v6
+; GCN-NEXT:    v_mul_hi_u32 v11, v11, v3
 ; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], v0, v4
-; GCN-NEXT:    v_cndmask_b32_e64 v10, v10, v13, s[4:5]
-; GCN-NEXT:    v_mul_lo_u32 v0, v8, v5
-; GCN-NEXT:    v_mul_hi_u32 v4, v10, v2
-; GCN-NEXT:    v_add_i32_e32 v12, vcc, -1, v9
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, -1, v8
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v1, v0
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v1, v0
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[6:7], v0, v5
-; GCN-NEXT:    v_mul_lo_u32 v5, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v1, vcc, 1, v9
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, 1, v8
-; GCN-NEXT:    s_and_b64 vcc, s[2:3], s[0:1]
-; GCN-NEXT:    v_cndmask_b32_e32 v1, v9, v1, vcc
-; GCN-NEXT:    v_sub_i32_e32 v9, vcc, v2, v5
-; GCN-NEXT:    s_and_b64 vcc, s[6:7], s[4:5]
-; GCN-NEXT:    v_cvt_f32_u32_e32 v11, v7
-; GCN-NEXT:    v_cndmask_b32_e32 v0, v8, v0, vcc
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v12, v1, s[0:1]
-; GCN-NEXT:    v_cndmask_b32_e64 v0, v10, v0, s[4:5]
-; GCN-NEXT:    v_xor_b32_e32 v1, v1, v15
-; GCN-NEXT:    v_xor_b32_e32 v8, v0, v16
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v1, v15
-; GCN-NEXT:    v_sub_i32_e32 v1, vcc, v8, v16
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v8, v11
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v9, v6
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], v2, v5
-; GCN-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
-; GCN-NEXT:    v_mul_f32_e32 v8, s14, v8
-; GCN-NEXT:    v_cvt_u32_f32_e32 v8, v8
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v10, v3
-; GCN-NEXT:    v_xor_b32_e32 v3, v3, v10
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, -1, v4
-; GCN-NEXT:    v_mul_lo_u32 v5, v8, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v8, v7
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, 1, v4
-; GCN-NEXT:    v_sub_i32_e32 v11, vcc, 0, v5
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v9
-; GCN-NEXT:    v_cndmask_b32_e64 v5, v5, v11, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v5, v5, v8
-; GCN-NEXT:    v_add_i32_e32 v9, vcc, v5, v8
-; GCN-NEXT:    v_subrev_i32_e32 v5, vcc, v5, v8
-; GCN-NEXT:    v_cndmask_b32_e64 v5, v5, v9, s[4:5]
-; GCN-NEXT:    v_mul_hi_u32 v5, v5, v3
-; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
-; GCN-NEXT:    v_cndmask_b32_e64 v2, v6, v2, s[2:3]
-; GCN-NEXT:    v_mul_lo_u32 v4, v5, v7
-; GCN-NEXT:    v_xor_b32_e32 v2, v2, v17
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, v2, v17
-; GCN-NEXT:    v_xor_b32_e32 v6, v10, v14
-; GCN-NEXT:    v_sub_i32_e32 v8, vcc, v3, v4
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v8, v7
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], v3, v4
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, -1, v5
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, 1, v5
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[6:7], v1, v5
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[8:9], v2, v12
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, v2, v12
+; GCN-NEXT:    v_add_i32_e32 v19, vcc, -1, v8
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, 1, v9
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, -1, v9
+; GCN-NEXT:    v_add_i32_e32 v1, vcc, 1, v10
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, -1, v10
+; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
+; GCN-NEXT:    s_and_b64 s[2:3], s[2:3], s[0:1]
+; GCN-NEXT:    s_and_b64 vcc, vcc, s[8:9]
+; GCN-NEXT:    v_mul_lo_u32 v12, v11, v7
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v8, v13, s[2:3]
+; GCN-NEXT:    v_cndmask_b32_e32 v1, v10, v1, vcc
+; GCN-NEXT:    s_and_b64 s[2:3], s[6:7], s[4:5]
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v9, v0, s[2:3]
+; GCN-NEXT:    v_cndmask_b32_e64 v2, v19, v2, s[0:1]
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v5, v1, s[8:9]
+; GCN-NEXT:    v_cndmask_b32_e64 v0, v4, v0, s[4:5]
+; GCN-NEXT:    v_xor_b32_e32 v2, v2, v16
+; GCN-NEXT:    v_xor_b32_e32 v5, v1, v18
+; GCN-NEXT:    v_xor_b32_e32 v4, v0, v17
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v2, v16
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, v5, v18
+; GCN-NEXT:    v_sub_i32_e32 v5, vcc, v3, v12
+; GCN-NEXT:    v_sub_i32_e32 v1, vcc, v4, v17
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v5, v7
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[2:3], v3, v12
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, -1, v11
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, 1, v11
 ; GCN-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; GCN-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
-; GCN-NEXT:    v_cndmask_b32_e64 v3, v7, v3, s[2:3]
-; GCN-NEXT:    v_xor_b32_e32 v3, v3, v6
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, v3, v6
-; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[8:11], 0
+; GCN-NEXT:    v_cndmask_b32_e32 v3, v11, v3, vcc
+; GCN-NEXT:    v_xor_b32_e32 v4, v14, v15
+; GCN-NEXT:    v_cndmask_b32_e64 v3, v5, v3, s[2:3]
+; GCN-NEXT:    v_xor_b32_e32 v3, v3, v4
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, v3, v4
+; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[12:15], 0
 ; GCN-NEXT:    s_endpgm
 ;
 ; TONGA-LABEL: sdiv_v4i32:
 ; TONGA:       ; %bb.0:
-; TONGA-NEXT:    s_load_dwordx4 s[12:15], s[0:1], 0x24
-; TONGA-NEXT:    s_mov_b32 s11, 0xf000
-; TONGA-NEXT:    s_mov_b32 s10, -1
-; TONGA-NEXT:    s_mov_b32 s2, s10
-; TONGA-NEXT:    s_mov_b32 s3, s11
+; TONGA-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x24
+; TONGA-NEXT:    s_mov_b32 s15, 0xf000
+; TONGA-NEXT:    s_mov_b32 s14, -1
+; TONGA-NEXT:    s_mov_b32 s2, s14
+; TONGA-NEXT:    s_mov_b32 s3, s15
 ; TONGA-NEXT:    s_waitcnt lgkmcnt(0)
-; TONGA-NEXT:    s_mov_b32 s0, s14
-; TONGA-NEXT:    s_mov_b32 s1, s15
+; TONGA-NEXT:    s_mov_b32 s0, s10
+; TONGA-NEXT:    s_mov_b32 s1, s11
 ; TONGA-NEXT:    buffer_load_dwordx4 v[0:3], off, s[0:3], 0
 ; TONGA-NEXT:    buffer_load_dwordx4 v[4:7], off, s[0:3], 0 offset:16
-; TONGA-NEXT:    s_mov_b32 s14, 0x4f800000
-; TONGA-NEXT:    s_mov_b32 s8, s12
-; TONGA-NEXT:    s_mov_b32 s9, s13
+; TONGA-NEXT:    s_mov_b32 s6, 0x4f800000
+; TONGA-NEXT:    s_mov_b32 s12, s8
+; TONGA-NEXT:    s_mov_b32 s13, s9
 ; TONGA-NEXT:    s_waitcnt vmcnt(1)
 ; TONGA-NEXT:    v_ashrrev_i32_e32 v8, 31, v0
 ; TONGA-NEXT:    s_waitcnt vmcnt(0)
 ; TONGA-NEXT:    v_ashrrev_i32_e32 v9, 31, v4
 ; TONGA-NEXT:    v_add_u32_e32 v4, vcc, v9, v4
+; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v8, v0
 ; TONGA-NEXT:    v_xor_b32_e32 v4, v4, v9
-; TONGA-NEXT:    v_xor_b32_e32 v15, v8, v9
-; TONGA-NEXT:    v_cvt_f32_u32_e32 v9, v4
+; TONGA-NEXT:    v_xor_b32_e32 v16, v8, v9
+; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v8
+; TONGA-NEXT:    v_cvt_f32_u32_e32 v8, v4
 ; TONGA-NEXT:    v_ashrrev_i32_e32 v11, 31, v5
 ; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v11, v5
-; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v8, v0
-; TONGA-NEXT:    v_rcp_iflag_f32_e32 v9, v9
 ; TONGA-NEXT:    v_xor_b32_e32 v5, v5, v11
-; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v8
-; TONGA-NEXT:    v_cvt_f32_u32_e32 v8, v5
-; TONGA-NEXT:    v_mul_f32_e32 v9, s14, v9
-; TONGA-NEXT:    v_cvt_u32_f32_e32 v9, v9
-; TONGA-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
+; TONGA-NEXT:    v_cvt_f32_u32_e32 v9, v5
 ; TONGA-NEXT:    v_rcp_iflag_f32_e32 v8, v8
+; TONGA-NEXT:    v_ashrrev_i32_e32 v13, 31, v6
+; TONGA-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
+; TONGA-NEXT:    v_add_u32_e32 v6, vcc, v13, v6
 ; TONGA-NEXT:    v_add_u32_e32 v1, vcc, v10, v1
-; TONGA-NEXT:    v_xor_b32_e32 v16, v10, v11
+; TONGA-NEXT:    v_rcp_iflag_f32_e32 v9, v9
+; TONGA-NEXT:    v_mul_f32_e32 v8, s6, v8
+; TONGA-NEXT:    v_xor_b32_e32 v6, v6, v13
+; TONGA-NEXT:    v_xor_b32_e32 v17, v10, v11
 ; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v10
-; TONGA-NEXT:    v_mul_f32_e32 v8, s14, v8
-; TONGA-NEXT:    v_mul_hi_u32 v11, v9, v4
-; TONGA-NEXT:    v_mul_lo_u32 v10, v9, v4
+; TONGA-NEXT:    v_cvt_f32_u32_e32 v10, v6
 ; TONGA-NEXT:    v_cvt_u32_f32_e32 v8, v8
 ; TONGA-NEXT:    v_ashrrev_i32_e32 v12, 31, v2
-; TONGA-NEXT:    v_ashrrev_i32_e32 v13, 31, v6
 ; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v12, v2
-; TONGA-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v11
-; TONGA-NEXT:    v_xor_b32_e32 v17, v12, v13
+; TONGA-NEXT:    v_mul_f32_e32 v9, s6, v9
+; TONGA-NEXT:    v_rcp_iflag_f32_e32 v10, v10
+; TONGA-NEXT:    v_xor_b32_e32 v18, v12, v13
 ; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v12
-; TONGA-NEXT:    v_sub_u32_e32 v12, vcc, 0, v10
-; TONGA-NEXT:    v_cndmask_b32_e64 v10, v10, v12, s[0:1]
-; TONGA-NEXT:    v_mul_hi_u32 v12, v8, v5
-; TONGA-NEXT:    v_add_u32_e32 v6, vcc, v13, v6
-; TONGA-NEXT:    v_xor_b32_e32 v6, v6, v13
-; TONGA-NEXT:    v_mul_lo_u32 v11, v8, v5
+; TONGA-NEXT:    v_cvt_u32_f32_e32 v9, v9
+; TONGA-NEXT:    v_mul_hi_u32 v12, v8, v4
+; TONGA-NEXT:    v_mul_lo_u32 v11, v8, v4
+; TONGA-NEXT:    v_mul_f32_e32 v10, s6, v10
+; TONGA-NEXT:    v_mul_lo_u32 v13, v9, v5
+; TONGA-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v12
+; TONGA-NEXT:    v_mul_hi_u32 v12, v9, v5
+; TONGA-NEXT:    v_cvt_u32_f32_e32 v10, v10
+; TONGA-NEXT:    v_sub_u32_e32 v19, vcc, 0, v11
+; TONGA-NEXT:    v_cndmask_b32_e64 v11, v11, v19, s[0:1]
 ; TONGA-NEXT:    v_cmp_eq_u32_e64 s[2:3], 0, v12
-; TONGA-NEXT:    v_cvt_f32_u32_e32 v12, v6
-; TONGA-NEXT:    v_mul_hi_u32 v10, v10, v9
-; TONGA-NEXT:    v_sub_u32_e32 v13, vcc, 0, v11
-; TONGA-NEXT:    v_cndmask_b32_e64 v11, v11, v13, s[2:3]
-; TONGA-NEXT:    v_rcp_iflag_f32_e32 v12, v12
-; TONGA-NEXT:    v_ashrrev_i32_e32 v14, 31, v7
-; TONGA-NEXT:    v_add_u32_e32 v7, vcc, v14, v7
-; TONGA-NEXT:    v_xor_b32_e32 v7, v7, v14
-; TONGA-NEXT:    v_mul_f32_e32 v12, s14, v12
-; TONGA-NEXT:    v_cvt_u32_f32_e32 v12, v12
-; TONGA-NEXT:    v_mul_hi_u32 v18, v12, v6
-; TONGA-NEXT:    v_mul_lo_u32 v13, v12, v6
-; TONGA-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v18
-; TONGA-NEXT:    v_add_u32_e32 v18, vcc, v10, v9
-; TONGA-NEXT:    v_subrev_u32_e32 v9, vcc, v10, v9
-; TONGA-NEXT:    v_mul_hi_u32 v10, v11, v8
-; TONGA-NEXT:    v_cndmask_b32_e64 v9, v9, v18, s[0:1]
-; TONGA-NEXT:    v_mul_hi_u32 v9, v9, v0
 ; TONGA-NEXT:    v_sub_u32_e32 v19, vcc, 0, v13
-; TONGA-NEXT:    v_add_u32_e32 v11, vcc, v10, v8
-; TONGA-NEXT:    v_subrev_u32_e32 v8, vcc, v10, v8
-; TONGA-NEXT:    v_cndmask_b32_e64 v13, v13, v19, s[4:5]
-; TONGA-NEXT:    v_cndmask_b32_e64 v8, v8, v11, s[2:3]
-; TONGA-NEXT:    v_mul_hi_u32 v10, v13, v12
-; TONGA-NEXT:    v_mul_lo_u32 v11, v9, v4
-; TONGA-NEXT:    v_mul_hi_u32 v8, v8, v1
-; TONGA-NEXT:    v_add_u32_e32 v13, vcc, v10, v12
-; TONGA-NEXT:    v_subrev_u32_e32 v10, vcc, v10, v12
-; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v11
-; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v0, v11
+; TONGA-NEXT:    v_cndmask_b32_e64 v13, v13, v19, s[2:3]
+; TONGA-NEXT:    v_mul_hi_u32 v19, v10, v6
+; TONGA-NEXT:    v_ashrrev_i32_e32 v15, 31, v7
+; TONGA-NEXT:    v_add_u32_e32 v7, vcc, v15, v7
+; TONGA-NEXT:    v_xor_b32_e32 v7, v7, v15
+; TONGA-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v19
+; TONGA-NEXT:    v_cvt_f32_u32_e32 v19, v7
+; TONGA-NEXT:    v_mul_hi_u32 v11, v11, v8
+; TONGA-NEXT:    v_mul_lo_u32 v12, v10, v6
+; TONGA-NEXT:    v_ashrrev_i32_e32 v14, 31, v3
+; TONGA-NEXT:    v_rcp_iflag_f32_e32 v19, v19
+; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v14, v3
+; TONGA-NEXT:    v_sub_u32_e32 v20, vcc, 0, v12
+; TONGA-NEXT:    v_cndmask_b32_e64 v12, v12, v20, s[4:5]
+; TONGA-NEXT:    v_mul_f32_e32 v19, s6, v19
+; TONGA-NEXT:    v_cvt_u32_f32_e32 v19, v19
+; TONGA-NEXT:    v_xor_b32_e32 v3, v3, v14
+; TONGA-NEXT:    v_mul_hi_u32 v21, v19, v7
+; TONGA-NEXT:    v_mul_lo_u32 v20, v19, v7
+; TONGA-NEXT:    v_cmp_eq_u32_e64 s[6:7], 0, v21
+; TONGA-NEXT:    v_add_u32_e32 v21, vcc, v11, v8
+; TONGA-NEXT:    v_subrev_u32_e32 v8, vcc, v11, v8
+; TONGA-NEXT:    v_mul_hi_u32 v11, v13, v9
+; TONGA-NEXT:    v_cndmask_b32_e64 v8, v8, v21, s[0:1]
+; TONGA-NEXT:    v_mul_hi_u32 v8, v8, v0
+; TONGA-NEXT:    v_sub_u32_e32 v22, vcc, 0, v20
+; TONGA-NEXT:    v_add_u32_e32 v13, vcc, v11, v9
+; TONGA-NEXT:    v_subrev_u32_e32 v9, vcc, v11, v9
+; TONGA-NEXT:    v_mul_hi_u32 v11, v12, v10
+; TONGA-NEXT:    v_cndmask_b32_e64 v9, v9, v13, s[2:3]
+; TONGA-NEXT:    v_mul_hi_u32 v9, v9, v1
+; TONGA-NEXT:    v_cndmask_b32_e64 v20, v20, v22, s[6:7]
+; TONGA-NEXT:    v_add_u32_e32 v12, vcc, v11, v10
+; TONGA-NEXT:    v_subrev_u32_e32 v10, vcc, v11, v10
+; TONGA-NEXT:    v_cndmask_b32_e64 v10, v10, v12, s[4:5]
+; TONGA-NEXT:    v_mul_lo_u32 v12, v8, v4
+; TONGA-NEXT:    v_mul_hi_u32 v11, v20, v19
+; TONGA-NEXT:    v_mul_hi_u32 v10, v10, v2
+; TONGA-NEXT:    v_add_u32_e32 v13, vcc, 1, v8
+; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v0, v12
+; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v0, v12
+; TONGA-NEXT:    v_mul_lo_u32 v12, v9, v5
+; TONGA-NEXT:    v_add_u32_e32 v20, vcc, v11, v19
+; TONGA-NEXT:    v_subrev_u32_e32 v11, vcc, v11, v19
+; TONGA-NEXT:    v_cndmask_b32_e64 v11, v11, v20, s[6:7]
+; TONGA-NEXT:    v_cmp_ge_u32_e64 s[4:5], v1, v12
+; TONGA-NEXT:    v_sub_u32_e32 v1, vcc, v1, v12
+; TONGA-NEXT:    v_mul_lo_u32 v12, v10, v6
+; TONGA-NEXT:    v_mul_hi_u32 v11, v11, v3
 ; TONGA-NEXT:    v_cmp_ge_u32_e64 s[2:3], v0, v4
-; TONGA-NEXT:    v_cndmask_b32_e64 v10, v10, v13, s[4:5]
-; TONGA-NEXT:    v_mul_lo_u32 v0, v8, v5
-; TONGA-NEXT:    v_mul_hi_u32 v4, v10, v2
-; TONGA-NEXT:    v_add_u32_e32 v12, vcc, -1, v9
-; TONGA-NEXT:    v_add_u32_e32 v10, vcc, -1, v8
-; TONGA-NEXT:    v_cmp_ge_u32_e64 s[4:5], v1, v0
-; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v1, v0
-; TONGA-NEXT:    v_cmp_ge_u32_e64 s[6:7], v0, v5
-; TONGA-NEXT:    v_mul_lo_u32 v5, v4, v6
-; TONGA-NEXT:    v_add_u32_e32 v1, vcc, 1, v9
-; TONGA-NEXT:    v_add_u32_e32 v0, vcc, 1, v8
-; TONGA-NEXT:    s_and_b64 vcc, s[2:3], s[0:1]
-; TONGA-NEXT:    v_cndmask_b32_e32 v1, v9, v1, vcc
-; TONGA-NEXT:    v_sub_u32_e32 v9, vcc, v2, v5
-; TONGA-NEXT:    s_and_b64 vcc, s[6:7], s[4:5]
-; TONGA-NEXT:    v_cvt_f32_u32_e32 v11, v7
-; TONGA-NEXT:    v_cndmask_b32_e32 v0, v8, v0, vcc
-; TONGA-NEXT:    v_cndmask_b32_e64 v1, v12, v1, s[0:1]
-; TONGA-NEXT:    v_cndmask_b32_e64 v0, v10, v0, s[4:5]
-; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v15
-; TONGA-NEXT:    v_xor_b32_e32 v8, v0, v16
-; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v1, v15
-; TONGA-NEXT:    v_sub_u32_e32 v1, vcc, v8, v16
-; TONGA-NEXT:    v_rcp_iflag_f32_e32 v8, v11
-; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v9, v6
-; TONGA-NEXT:    v_cmp_ge_u32_e64 s[2:3], v2, v5
-; TONGA-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
-; TONGA-NEXT:    v_mul_f32_e32 v8, s14, v8
-; TONGA-NEXT:    v_cvt_u32_f32_e32 v8, v8
-; TONGA-NEXT:    v_add_u32_e32 v3, vcc, v10, v3
-; TONGA-NEXT:    v_xor_b32_e32 v3, v3, v10
-; TONGA-NEXT:    v_add_u32_e32 v6, vcc, -1, v4
-; TONGA-NEXT:    v_mul_lo_u32 v5, v8, v7
-; TONGA-NEXT:    v_mul_hi_u32 v9, v8, v7
-; TONGA-NEXT:    v_add_u32_e32 v2, vcc, 1, v4
-; TONGA-NEXT:    v_sub_u32_e32 v11, vcc, 0, v5
-; TONGA-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v9
-; TONGA-NEXT:    v_cndmask_b32_e64 v5, v5, v11, s[4:5]
-; TONGA-NEXT:    v_mul_hi_u32 v5, v5, v8
-; TONGA-NEXT:    v_add_u32_e32 v9, vcc, v5, v8
-; TONGA-NEXT:    v_subrev_u32_e32 v5, vcc, v5, v8
-; TONGA-NEXT:    v_cndmask_b32_e64 v5, v5, v9, s[4:5]
-; TONGA-NEXT:    v_mul_hi_u32 v5, v5, v3
-; TONGA-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; TONGA-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
-; TONGA-NEXT:    v_cndmask_b32_e64 v2, v6, v2, s[2:3]
-; TONGA-NEXT:    v_mul_lo_u32 v4, v5, v7
-; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v17
-; TONGA-NEXT:    v_sub_u32_e32 v2, vcc, v2, v17
-; TONGA-NEXT:    v_xor_b32_e32 v6, v10, v14
-; TONGA-NEXT:    v_sub_u32_e32 v8, vcc, v3, v4
-; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v8, v7
-; TONGA-NEXT:    v_cmp_ge_u32_e64 s[2:3], v3, v4
-; TONGA-NEXT:    v_add_u32_e32 v7, vcc, -1, v5
-; TONGA-NEXT:    v_add_u32_e32 v3, vcc, 1, v5
+; TONGA-NEXT:    v_cmp_ge_u32_e64 s[6:7], v1, v5
+; TONGA-NEXT:    v_cmp_ge_u32_e64 s[8:9], v2, v12
+; TONGA-NEXT:    v_sub_u32_e32 v2, vcc, v2, v12
+; TONGA-NEXT:    v_add_u32_e32 v19, vcc, -1, v8
+; TONGA-NEXT:    v_add_u32_e32 v0, vcc, 1, v9
+; TONGA-NEXT:    v_add_u32_e32 v4, vcc, -1, v9
+; TONGA-NEXT:    v_add_u32_e32 v1, vcc, 1, v10
+; TONGA-NEXT:    v_add_u32_e32 v5, vcc, -1, v10
+; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
+; TONGA-NEXT:    s_and_b64 s[2:3], s[2:3], s[0:1]
+; TONGA-NEXT:    s_and_b64 vcc, vcc, s[8:9]
+; TONGA-NEXT:    v_mul_lo_u32 v12, v11, v7
+; TONGA-NEXT:    v_cndmask_b32_e64 v2, v8, v13, s[2:3]
+; TONGA-NEXT:    v_cndmask_b32_e32 v1, v10, v1, vcc
+; TONGA-NEXT:    s_and_b64 s[2:3], s[6:7], s[4:5]
+; TONGA-NEXT:    v_cndmask_b32_e64 v0, v9, v0, s[2:3]
+; TONGA-NEXT:    v_cndmask_b32_e64 v2, v19, v2, s[0:1]
+; TONGA-NEXT:    v_cndmask_b32_e64 v1, v5, v1, s[8:9]
+; TONGA-NEXT:    v_cndmask_b32_e64 v0, v4, v0, s[4:5]
+; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v16
+; TONGA-NEXT:    v_xor_b32_e32 v5, v1, v18
+; TONGA-NEXT:    v_xor_b32_e32 v4, v0, v17
+; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v2, v16
+; TONGA-NEXT:    v_sub_u32_e32 v2, vcc, v5, v18
+; TONGA-NEXT:    v_sub_u32_e32 v5, vcc, v3, v12
+; TONGA-NEXT:    v_sub_u32_e32 v1, vcc, v4, v17
+; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v5, v7
+; TONGA-NEXT:    v_cmp_ge_u32_e64 s[2:3], v3, v12
+; TONGA-NEXT:    v_add_u32_e32 v5, vcc, -1, v11
+; TONGA-NEXT:    v_add_u32_e32 v3, vcc, 1, v11
 ; TONGA-NEXT:    s_and_b64 vcc, s[0:1], s[2:3]
-; TONGA-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
-; TONGA-NEXT:    v_cndmask_b32_e64 v3, v7, v3, s[2:3]
-; TONGA-NEXT:    v_xor_b32_e32 v3, v3, v6
-; TONGA-NEXT:    v_sub_u32_e32 v3, vcc, v3, v6
-; TONGA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[8:11], 0
+; TONGA-NEXT:    v_cndmask_b32_e32 v3, v11, v3, vcc
+; TONGA-NEXT:    v_xor_b32_e32 v4, v14, v15
+; TONGA-NEXT:    v_cndmask_b32_e64 v3, v5, v3, s[2:3]
+; TONGA-NEXT:    v_xor_b32_e32 v3, v3, v4
+; TONGA-NEXT:    v_sub_u32_e32 v3, vcc, v3, v4
+; TONGA-NEXT:    buffer_store_dwordx4 v[0:3], off, s[12:15], 0
 ; TONGA-NEXT:    s_endpgm
 ;
 ; GFX9-LABEL: sdiv_v4i32:
@@ -1601,11 +1601,11 @@
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v2
 ; GCN-NEXT:    v_mul_f32_e32 v1, v3, v4
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
-; GCN-NEXT:    v_mad_f32 v3, -v1, v2, v3
-; GCN-NEXT:    v_cvt_i32_f32_e32 v1, v1
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
+; GCN-NEXT:    v_cvt_i32_f32_e32 v4, v1
+; GCN-NEXT:    v_mad_f32 v1, -v1, v2, v3
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v2|
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
 ; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 8
 ; GCN-NEXT:    buffer_store_dword v0, off, s[0:3], 0
 ; GCN-NEXT:    s_endpgm
@@ -1634,11 +1634,11 @@
 ; TONGA-NEXT:    v_rcp_iflag_f32_e32 v4, v2
 ; TONGA-NEXT:    v_mul_f32_e32 v1, v3, v4
 ; TONGA-NEXT:    v_trunc_f32_e32 v1, v1
-; TONGA-NEXT:    v_mad_f32 v3, -v1, v2, v3
-; TONGA-NEXT:    v_cvt_i32_f32_e32 v1, v1
-; TONGA-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v2|
+; TONGA-NEXT:    v_cvt_i32_f32_e32 v4, v1
+; TONGA-NEXT:    v_mad_f32 v1, -v1, v2, v3
+; TONGA-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v2|
 ; TONGA-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
-; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v1
+; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v4
 ; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 8
 ; TONGA-NEXT:    buffer_store_dword v0, off, s[0:3], 0
 ; TONGA-NEXT:    s_endpgm
@@ -1754,11 +1754,11 @@
 ; GCN-NEXT:    v_or_b32_e32 v0, 1, v0
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v4
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_cvt_i32_f32_e32 v4, v2
 ; GCN-NEXT:    v_mad_f32 v1, -v2, v3, v1
-; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v3|
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
 ; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 23
 ; GCN-NEXT:    buffer_store_dword v0, off, s[0:3], 0
 ; GCN-NEXT:    s_endpgm
@@ -1795,11 +1795,11 @@
 ; TONGA-NEXT:    v_or_b32_e32 v0, 1, v0
 ; TONGA-NEXT:    v_mul_f32_e32 v2, v1, v4
 ; TONGA-NEXT:    v_trunc_f32_e32 v2, v2
+; TONGA-NEXT:    v_cvt_i32_f32_e32 v4, v2
 ; TONGA-NEXT:    v_mad_f32 v1, -v2, v3, v1
-; TONGA-NEXT:    v_cvt_i32_f32_e32 v2, v2
 ; TONGA-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v3|
 ; TONGA-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
-; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v2
+; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v4
 ; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 23
 ; TONGA-NEXT:    buffer_store_dword v0, off, s[0:3], 0
 ; TONGA-NEXT:    s_endpgm
@@ -1935,11 +1935,11 @@
 ; GCN-NEXT:    v_or_b32_e32 v1, 1, v1
 ; GCN-NEXT:    v_mul_f32_e32 v3, v0, v4
 ; GCN-NEXT:    v_trunc_f32_e32 v3, v3
+; GCN-NEXT:    v_cvt_i32_f32_e32 v4, v3
 ; GCN-NEXT:    v_mad_f32 v0, -v3, v2, v0
-; GCN-NEXT:    v_cvt_i32_f32_e32 v3, v3
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, |v2|
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
 ; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 24
 ; GCN-NEXT:    buffer_store_dword v0, off, s[0:3], 0
 ; GCN-NEXT:    s_endpgm
@@ -1974,11 +1974,11 @@
 ; TONGA-NEXT:    v_or_b32_e32 v1, 1, v1
 ; TONGA-NEXT:    v_mul_f32_e32 v3, v0, v4
 ; TONGA-NEXT:    v_trunc_f32_e32 v3, v3
+; TONGA-NEXT:    v_cvt_i32_f32_e32 v4, v3
 ; TONGA-NEXT:    v_mad_f32 v0, -v3, v2, v0
-; TONGA-NEXT:    v_cvt_i32_f32_e32 v3, v3
 ; TONGA-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, |v2|
 ; TONGA-NEXT:    v_cndmask_b32_e32 v0, 0, v1, vcc
-; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v3
+; TONGA-NEXT:    v_add_u32_e32 v0, vcc, v0, v4
 ; TONGA-NEXT:    v_bfe_i32 v0, v0, 0, 24
 ; TONGA-NEXT:    buffer_store_dword v0, off, s[0:3], 0
 ; TONGA-NEXT:    s_endpgm
@@ -2111,32 +2111,32 @@
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v1, v2
 ; GCN-NEXT:    v_xor_b32_e32 v2, v2, v1
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v3, v2
-; GCN-NEXT:    v_bfe_i32 v4, v0, 0, 25
+; GCN-NEXT:    v_bfe_i32 v6, v0, 0, 25
 ; GCN-NEXT:    v_bfe_i32 v0, v0, 24, 1
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v0, v4
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v3, v3
-; GCN-NEXT:    v_xor_b32_e32 v4, v4, v0
-; GCN-NEXT:    v_xor_b32_e32 v0, v0, v1
 ; GCN-NEXT:    v_mul_f32_e32 v3, 0x4f800000, v3
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
-; GCN-NEXT:    v_mul_lo_u32 v5, v3, v2
-; GCN-NEXT:    v_mul_hi_u32 v6, v3, v2
-; GCN-NEXT:    v_sub_i32_e32 v7, vcc, 0, v5
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v6
-; GCN-NEXT:    v_cndmask_b32_e64 v5, v5, v7, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v5, v5, v3
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v5, v3
-; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v5, v3
+; GCN-NEXT:    v_mul_lo_u32 v4, v3, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, v3, v2
+; GCN-NEXT:    v_sub_i32_e32 v7, vcc, 0, v4
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v5
+; GCN-NEXT:    v_cndmask_b32_e64 v4, v4, v7, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v4, v4, v3
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v0, v6
+; GCN-NEXT:    v_xor_b32_e32 v5, v5, v0
+; GCN-NEXT:    v_xor_b32_e32 v0, v0, v1
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v4, v3
+; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v4, v3
 ; GCN-NEXT:    v_cndmask_b32_e64 v3, v3, v6, s[0:1]
-; GCN-NEXT:    v_mul_hi_u32 v3, v3, v4
-; GCN-NEXT:    v_mul_lo_u32 v1, v3, v2
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, 1, v3
+; GCN-NEXT:    v_mul_hi_u32 v3, v3, v5
+; GCN-NEXT:    v_mul_lo_u32 v4, v3, v2
+; GCN-NEXT:    v_add_i32_e32 v1, vcc, 1, v3
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, -1, v3
-; GCN-NEXT:    v_subrev_i32_e32 v7, vcc, v1, v4
-; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v1
+; GCN-NEXT:    v_subrev_i32_e32 v7, vcc, v4, v5
+; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v5, v4
 ; GCN-NEXT:    v_cmp_ge_u32_e64 s[0:1], v7, v2
 ; GCN-NEXT:    s_and_b64 s[0:1], s[0:1], vcc
-; GCN-NEXT:    v_cndmask_b32_e64 v1, v3, v5, s[0:1]
+; GCN-NEXT:    v_cndmask_b32_e64 v1, v3, v1, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
 ; GCN-NEXT:    v_xor_b32_e32 v1, v1, v0
 ; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v1, v0
@@ -2163,32 +2163,32 @@
 ; TONGA-NEXT:    v_add_u32_e32 v2, vcc, v1, v2
 ; TONGA-NEXT:    v_xor_b32_e32 v2, v2, v1
 ; TONGA-NEXT:    v_cvt_f32_u32_e32 v3, v2
-; TONGA-NEXT:    v_bfe_i32 v4, v0, 0, 25
+; TONGA-NEXT:    v_bfe_i32 v6, v0, 0, 25
 ; TONGA-NEXT:    v_bfe_i32 v0, v0, 24, 1
-; TONGA-NEXT:    v_add_u32_e32 v4, vcc, v0, v4
 ; TONGA-NEXT:    v_rcp_iflag_f32_e32 v3, v3
-; TONGA-NEXT:    v_xor_b32_e32 v4, v4, v0
-; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v1
 ; TONGA-NEXT:    v_mul_f32_e32 v3, 0x4f800000, v3
 ; TONGA-NEXT:    v_cvt_u32_f32_e32 v3, v3
-; TONGA-NEXT:    v_mul_lo_u32 v5, v3, v2
-; TONGA-NEXT:    v_mul_hi_u32 v6, v3, v2
-; TONGA-NEXT:    v_sub_u32_e32 v7, vcc, 0, v5
-; TONGA-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v6
-; TONGA-NEXT:    v_cndmask_b32_e64 v5, v5, v7, s[0:1]
-; TONGA-NEXT:    v_mul_hi_u32 v5, v5, v3
-; TONGA-NEXT:    v_add_u32_e32 v6, vcc, v5, v3
-; TONGA-NEXT:    v_subrev_u32_e32 v3, vcc, v5, v3
+; TONGA-NEXT:    v_mul_lo_u32 v4, v3, v2
+; TONGA-NEXT:    v_mul_hi_u32 v5, v3, v2
+; TONGA-NEXT:    v_sub_u32_e32 v7, vcc, 0, v4
+; TONGA-NEXT:    v_cmp_eq_u32_e64 s[0:1], 0, v5
+; TONGA-NEXT:    v_cndmask_b32_e64 v4, v4, v7, s[0:1]
+; TONGA-NEXT:    v_mul_hi_u32 v4, v4, v3
+; TONGA-NEXT:    v_add_u32_e32 v5, vcc, v0, v6
+; TONGA-NEXT:    v_xor_b32_e32 v5, v5, v0
+; TONGA-NEXT:    v_xor_b32_e32 v0, v0, v1
+; TONGA-NEXT:    v_add_u32_e32 v6, vcc, v4, v3
+; TONGA-NEXT:    v_subrev_u32_e32 v3, vcc, v4, v3
 ; TONGA-NEXT:    v_cndmask_b32_e64 v3, v3, v6, s[0:1]
-; TONGA-NEXT:    v_mul_hi_u32 v3, v3, v4
-; TONGA-NEXT:    v_mul_lo_u32 v1, v3, v2
-; TONGA-NEXT:    v_add_u32_e32 v5, vcc, 1, v3
+; TONGA-NEXT:    v_mul_hi_u32 v3, v3, v5
+; TONGA-NEXT:    v_mul_lo_u32 v4, v3, v2
+; TONGA-NEXT:    v_add_u32_e32 v1, vcc, 1, v3
 ; TONGA-NEXT:    v_add_u32_e32 v6, vcc, -1, v3
-; TONGA-NEXT:    v_subrev_u32_e32 v7, vcc, v1, v4
-; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v1
+; TONGA-NEXT:    v_subrev_u32_e32 v7, vcc, v4, v5
+; TONGA-NEXT:    v_cmp_ge_u32_e32 vcc, v5, v4
 ; TONGA-NEXT:    v_cmp_ge_u32_e64 s[0:1], v7, v2
 ; TONGA-NEXT:    s_and_b64 s[0:1], s[0:1], vcc
-; TONGA-NEXT:    v_cndmask_b32_e64 v1, v3, v5, s[0:1]
+; TONGA-NEXT:    v_cndmask_b32_e64 v1, v3, v1, s[0:1]
 ; TONGA-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
 ; TONGA-NEXT:    v_xor_b32_e32 v1, v1, v0
 ; TONGA-NEXT:    v_sub_u32_e32 v0, vcc, v1, v0
diff --git a/llvm/test/CodeGen/AMDGPU/sdiv64.ll b/llvm/test/CodeGen/AMDGPU/sdiv64.ll
--- a/llvm/test/CodeGen/AMDGPU/sdiv64.ll
+++ b/llvm/test/CodeGen/AMDGPU/sdiv64.ll
@@ -6,113 +6,112 @@
 ; GCN-LABEL: s_test_sdiv:
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0xd
-; GCN-NEXT:    v_mov_b32_e32 v7, 0
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_mov_b32_e32 v3, 0
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_ashr_i32 s12, s3, 31
-; GCN-NEXT:    s_add_u32 s2, s2, s12
-; GCN-NEXT:    s_mov_b32 s13, s12
-; GCN-NEXT:    s_addc_u32 s3, s3, s12
-; GCN-NEXT:    s_xor_b64 s[2:3], s[2:3], s[12:13]
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s2
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s3
-; GCN-NEXT:    s_sub_u32 s4, 0, s2
-; GCN-NEXT:    s_subb_u32 s5, 0, s3
-; GCN-NEXT:    s_ashr_i32 s14, s11, 31
+; GCN-NEXT:    s_ashr_i32 s8, s3, 31
+; GCN-NEXT:    s_add_u32 s2, s2, s8
+; GCN-NEXT:    s_mov_b32 s9, s8
+; GCN-NEXT:    s_addc_u32 s3, s3, s8
+; GCN-NEXT:    s_xor_b64 s[10:11], s[2:3], s[8:9]
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s10
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s11
+; GCN-NEXT:    s_sub_u32 s12, 0, s10
+; GCN-NEXT:    s_subb_u32 s4, 0, s11
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0x4f800000, v1
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
-; GCN-NEXT:    s_mov_b32 s15, s14
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
 ; GCN-NEXT:    v_mul_f32_e32 v2, 0x2f800000, v0
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
-; GCN-NEXT:    v_mul_hi_u32 v4, s4, v0
-; GCN-NEXT:    v_mul_lo_u32 v3, s4, v2
-; GCN-NEXT:    v_mul_lo_u32 v6, s5, v0
-; GCN-NEXT:    v_mul_lo_u32 v5, s4, v0
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v4, v0, v5
-; GCN-NEXT:    v_mul_lo_u32 v6, v0, v3
-; GCN-NEXT:    v_mul_hi_u32 v8, v0, v3
-; GCN-NEXT:    v_mul_hi_u32 v9, v2, v3
-; GCN-NEXT:    v_mul_lo_u32 v3, v2, v3
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v6
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v7, v8, vcc
-; GCN-NEXT:    v_mul_lo_u32 v8, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v5, v2, v5
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v8, v4
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v6, v5, vcc
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v3
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v7, v5, vcc
-; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v2, v4, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v5, s4, v3
-; GCN-NEXT:    v_mul_hi_u32 v6, s4, v0
-; GCN-NEXT:    v_mul_lo_u32 v8, s5, v0
-; GCN-NEXT:    s_mov_b32 s5, s9
+; GCN-NEXT:    v_mul_hi_u32 v5, s12, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, s12, v2
+; GCN-NEXT:    v_mul_lo_u32 v7, s4, v0
+; GCN-NEXT:    v_mul_lo_u32 v6, s12, v0
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v5, v0, v6
+; GCN-NEXT:    v_mul_lo_u32 v7, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v9, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, v6
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v4
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v3, v9, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, v4
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_mul_lo_u32 v6, s4, v0
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
+; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v4
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v2, v5, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v6, s12, v0
+; GCN-NEXT:    v_mul_lo_u32 v7, s12, v4
+; GCN-NEXT:    v_mul_lo_u32 v8, s4, v0
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
+; GCN-NEXT:    v_mul_lo_u32 v7, s12, v0
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
+; GCN-NEXT:    v_mul_lo_u32 v9, v0, v6
 ; GCN-NEXT:    v_mul_hi_u32 v11, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v9, v3, v6
-; GCN-NEXT:    v_mul_lo_u32 v6, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v8, v3, v5
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v7, v12, vcc
-; GCN-NEXT:    v_mul_lo_u32 v3, v3, v5
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v10
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v8, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v6, v3
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v5, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
-; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v5, s[0:1]
-; GCN-NEXT:    s_add_u32 s0, s10, s14
-; GCN-NEXT:    s_addc_u32 s1, s11, s14
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
-; GCN-NEXT:    s_xor_b64 s[10:11], s[0:1], s[14:15]
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v7
+; GCN-NEXT:    v_mul_lo_u32 v7, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v8, v4, v6
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v3, v11, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v4, v6
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v8, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v3, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v6, s[2:3]
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_ashr_i32 s2, s7, 31
+; GCN-NEXT:    s_add_u32 s0, s6, s2
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
+; GCN-NEXT:    s_addc_u32 s1, s7, s2
+; GCN-NEXT:    s_mov_b32 s3, s2
+; GCN-NEXT:    s_xor_b64 s[12:13], s[0:1], s[2:3]
 ; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v2, vcc
-; GCN-NEXT:    v_mul_lo_u32 v3, s10, v2
-; GCN-NEXT:    v_mul_hi_u32 v4, s10, v0
-; GCN-NEXT:    v_mul_hi_u32 v5, s10, v2
-; GCN-NEXT:    v_mul_hi_u32 v6, s11, v2
-; GCN-NEXT:    v_mul_lo_u32 v2, s11, v2
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v7, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v5, s11, v0
-; GCN-NEXT:    v_mul_hi_u32 v0, s11, v0
-; GCN-NEXT:    s_mov_b32 s4, s8
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v4, v0, vcc
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v6, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_mul_lo_u32 v4, s12, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, s12, v0
+; GCN-NEXT:    v_mul_hi_u32 v6, s12, v2
+; GCN-NEXT:    v_mul_hi_u32 v7, s13, v2
+; GCN-NEXT:    v_mul_lo_u32 v2, s13, v2
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_mul_lo_u32 v6, s13, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s13, v0
+; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v5, v0, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v7, v1, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, s2, v1
-; GCN-NEXT:    v_mul_hi_u32 v3, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, s3, v0
-; GCN-NEXT:    v_mov_b32_e32 v5, s3
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v3, v1, vcc
+; GCN-NEXT:    v_mul_lo_u32 v2, s10, v1
+; GCN-NEXT:    v_mul_hi_u32 v3, s10, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, s11, v0
+; GCN-NEXT:    v_mov_b32_e32 v5, s11
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_mul_lo_u32 v3, s2, v0
+; GCN-NEXT:    v_mul_lo_u32 v3, s10, v0
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s11, v2
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s10, v3
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s13, v2
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s12, v3
 ; GCN-NEXT:    v_subb_u32_e64 v4, s[0:1], v4, v5, vcc
-; GCN-NEXT:    v_subrev_i32_e64 v5, s[0:1], s2, v3
+; GCN-NEXT:    v_subrev_i32_e64 v5, s[0:1], s10, v3
 ; GCN-NEXT:    v_subbrev_u32_e64 v4, s[0:1], 0, v4, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s3, v4
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s11, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s2, v5
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s10, v5
 ; GCN-NEXT:    v_cndmask_b32_e64 v5, 0, -1, s[0:1]
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], s3, v4
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], s11, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v4, v6, v5, s[0:1]
 ; GCN-NEXT:    v_add_i32_e64 v5, s[0:1], 2, v0
 ; GCN-NEXT:    v_addc_u32_e64 v6, s[0:1], 0, v1, s[0:1]
@@ -120,18 +119,18 @@
 ; GCN-NEXT:    v_addc_u32_e64 v8, s[0:1], 0, v1, s[0:1]
 ; GCN-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v4, v8, v6, s[0:1]
-; GCN-NEXT:    v_mov_b32_e32 v6, s11
+; GCN-NEXT:    v_mov_b32_e32 v6, s13
 ; GCN-NEXT:    v_subb_u32_e32 v2, vcc, v6, v2, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s3, v2
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s11, v2
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s2, v3
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s10, v3
 ; GCN-NEXT:    v_cndmask_b32_e64 v3, 0, -1, vcc
-; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s3, v2
+; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s11, v2
 ; GCN-NEXT:    v_cndmask_b32_e32 v2, v6, v3, vcc
 ; GCN-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v7, v5, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
-; GCN-NEXT:    s_xor_b64 s[0:1], s[14:15], s[12:13]
+; GCN-NEXT:    s_xor_b64 s[0:1], s[2:3], s[8:9]
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v4, vcc
 ; GCN-NEXT:    v_xor_b32_e32 v0, s0, v0
 ; GCN-NEXT:    v_xor_b32_e32 v1, s1, v1
@@ -281,20 +280,20 @@
 ; GCN-NEXT:    v_mul_hi_u32 v9, v7, v5
 ; GCN-NEXT:    v_mul_lo_u32 v10, v7, v6
 ; GCN-NEXT:    v_mul_lo_u32 v11, v8, v5
+; GCN-NEXT:    v_mul_lo_u32 v12, v7, v5
 ; GCN-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
-; GCN-NEXT:    v_mul_lo_u32 v10, v7, v5
 ; GCN-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
-; GCN-NEXT:    v_mul_lo_u32 v12, v5, v9
-; GCN-NEXT:    v_mul_hi_u32 v11, v5, v9
-; GCN-NEXT:    v_mul_hi_u32 v13, v5, v10
+; GCN-NEXT:    v_mul_lo_u32 v10, v5, v9
+; GCN-NEXT:    v_mul_hi_u32 v11, v5, v12
+; GCN-NEXT:    v_mul_hi_u32 v13, v5, v9
 ; GCN-NEXT:    v_mul_hi_u32 v16, v6, v9
 ; GCN-NEXT:    v_mul_lo_u32 v9, v6, v9
-; GCN-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
-; GCN-NEXT:    v_mul_lo_u32 v13, v6, v10
-; GCN-NEXT:    v_mul_hi_u32 v10, v6, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v15, v11, vcc
-; GCN-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
-; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v11, v10, vcc
+; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
+; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v15, v13, vcc
+; GCN-NEXT:    v_mul_lo_u32 v13, v6, v12
+; GCN-NEXT:    v_mul_hi_u32 v12, v6, v12
+; GCN-NEXT:    v_add_i32_e32 v10, vcc, v13, v10
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v11, v12, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v16, v14, vcc
 ; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
 ; GCN-NEXT:    v_add_i32_e64 v5, s[4:5], v5, v9
@@ -306,17 +305,17 @@
 ; GCN-NEXT:    v_mul_lo_u32 v7, v7, v5
 ; GCN-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v11, v8
-; GCN-NEXT:    v_mul_lo_u32 v13, v5, v8
-; GCN-NEXT:    v_mul_hi_u32 v16, v5, v7
-; GCN-NEXT:    v_mul_hi_u32 v17, v5, v8
-; GCN-NEXT:    v_mul_hi_u32 v12, v9, v7
+; GCN-NEXT:    v_mul_lo_u32 v12, v5, v8
+; GCN-NEXT:    v_mul_hi_u32 v13, v5, v7
+; GCN-NEXT:    v_mul_hi_u32 v16, v5, v8
+; GCN-NEXT:    v_mul_hi_u32 v17, v9, v7
 ; GCN-NEXT:    v_mul_lo_u32 v7, v9, v7
-; GCN-NEXT:    v_add_i32_e32 v13, vcc, v16, v13
+; GCN-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
 ; GCN-NEXT:    v_mul_hi_u32 v11, v9, v8
-; GCN-NEXT:    v_addc_u32_e32 v16, vcc, v15, v17, vcc
+; GCN-NEXT:    v_addc_u32_e32 v13, vcc, v15, v16, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v8, v9, v8
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v13
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v16, v12, vcc
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v12
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v13, v17, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v11, v14, vcc
 ; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
 ; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v15, v9, vcc
@@ -346,12 +345,12 @@
 ; GCN-NEXT:    v_mul_lo_u32 v8, v2, v6
 ; GCN-NEXT:    v_mul_hi_u32 v9, v2, v5
 ; GCN-NEXT:    v_mul_lo_u32 v10, v3, v5
+; GCN-NEXT:    v_mul_lo_u32 v11, v2, v5
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
-; GCN-NEXT:    v_mul_lo_u32 v9, v2, v5
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
-; GCN-NEXT:    v_sub_i32_e32 v10, vcc, v1, v8
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v9
-; GCN-NEXT:    v_subb_u32_e64 v9, s[4:5], v10, v3, vcc
+; GCN-NEXT:    v_sub_i32_e32 v9, vcc, v1, v8
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v11
+; GCN-NEXT:    v_subb_u32_e64 v9, s[4:5], v9, v3, vcc
 ; GCN-NEXT:    v_sub_i32_e64 v10, s[4:5], v0, v2
 ; GCN-NEXT:    v_subbrev_u32_e64 v9, s[4:5], 0, v9, s[4:5]
 ; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v9, v3
@@ -993,11 +992,11 @@
 ; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    v_mul_f32_e32 v2, v3, v4
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-NEXT:    v_mad_f32 v3, -v2, v1, v3
-; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v1|
+; GCN-NEXT:    v_cvt_i32_f32_e32 v4, v2
+; GCN-NEXT:    v_mad_f32 v2, -v2, v1, v3
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v1|
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
 ; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 24
 ; GCN-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
 ; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
@@ -1134,7 +1133,7 @@
 ; GCN-LABEL: s_test_sdiv_k_num_i64:
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-NEXT:    v_mov_b32_e32 v2, 0
+; GCN-NEXT:    v_mov_b32_e32 v3, 0
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    s_ashr_i32 s2, s7, 31
 ; GCN-NEXT:    s_add_u32 s0, s6, s2
@@ -1144,74 +1143,74 @@
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s8
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s9
 ; GCN-NEXT:    s_sub_u32 s3, 0, s8
-; GCN-NEXT:    s_subb_u32 s10, 0, s9
+; GCN-NEXT:    s_subb_u32 s6, 0, s9
 ; GCN-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0x4f800000, v1
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
-; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
-; GCN-NEXT:    v_mul_f32_e32 v3, 0x2f800000, v0
-; GCN-NEXT:    v_trunc_f32_e32 v3, v3
-; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v3
+; GCN-NEXT:    v_mul_f32_e32 v2, 0x2f800000, v0
+; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
 ; GCN-NEXT:    v_mul_hi_u32 v5, s3, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, s3, v3
-; GCN-NEXT:    v_mul_lo_u32 v7, s10, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, s3, v2
+; GCN-NEXT:    v_mul_lo_u32 v7, s6, v0
 ; GCN-NEXT:    v_mul_lo_u32 v6, s3, v0
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
 ; GCN-NEXT:    v_mul_hi_u32 v5, v0, v6
 ; GCN-NEXT:    v_mul_lo_u32 v7, v0, v4
 ; GCN-NEXT:    v_mul_hi_u32 v9, v0, v4
-; GCN-NEXT:    v_mul_lo_u32 v8, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v6, v3, v6
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, v6
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v2, v9, vcc
-; GCN-NEXT:    v_mul_hi_u32 v9, v3, v4
-; GCN-NEXT:    v_mul_lo_u32 v4, v3, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v6, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v9, v1, vcc
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v4
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v3, v9, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v1, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
 ; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v2, v6, vcc
-; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v2, v5, s[0:1]
 ; GCN-NEXT:    v_mul_lo_u32 v6, s3, v4
 ; GCN-NEXT:    v_mul_hi_u32 v7, s3, v0
-; GCN-NEXT:    v_mul_lo_u32 v8, s10, v0
+; GCN-NEXT:    v_mul_lo_u32 v8, s6, v0
+; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
 ; GCN-NEXT:    v_mul_lo_u32 v7, s3, v0
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v4, v7
+; GCN-NEXT:    v_mul_lo_u32 v9, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v7
 ; GCN-NEXT:    v_mul_lo_u32 v7, v4, v7
 ; GCN-NEXT:    v_mul_hi_u32 v8, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v2, v12, vcc
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v3, v11, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v4, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v7, v4
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v2, v6, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
-; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v8, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v3, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v6, s[0:1]
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v2, vcc
 ; GCN-NEXT:    v_mul_hi_u32 v5, 24, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, v3, 24
-; GCN-NEXT:    v_mul_hi_u32 v6, 24, v3
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, 24
+; GCN-NEXT:    v_mul_hi_u32 v6, 24, v2
 ; GCN-NEXT:    v_mul_hi_u32 v0, 0, v0
-; GCN-NEXT:    v_mul_hi_u32 v3, 0, v3
+; GCN-NEXT:    v_mul_hi_u32 v2, 0, v2
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v2, v6, vcc
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v3, v6, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, 0, v4
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v2, v0, vcc
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v3, v1, vcc
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v0, vcc
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v2, v1, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, s8, v1
 ; GCN-NEXT:    v_mul_hi_u32 v3, s8, v0
 ; GCN-NEXT:    v_mul_lo_u32 v4, s9, v0
@@ -1373,23 +1372,23 @@
 ; GCN-NEXT:    v_mac_f32_e32 v3, 0xcf800000, v4
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v4
-; GCN-NEXT:    v_mul_hi_u32 v7, v5, v3
-; GCN-NEXT:    v_mul_lo_u32 v8, v5, v4
-; GCN-NEXT:    v_mul_lo_u32 v9, v6, v3
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
-; GCN-NEXT:    v_mul_lo_u32 v8, v5, v3
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
+; GCN-NEXT:    v_mul_hi_u32 v8, v5, v3
+; GCN-NEXT:    v_mul_lo_u32 v7, v5, v4
+; GCN-NEXT:    v_mul_lo_u32 v10, v6, v3
+; GCN-NEXT:    v_mul_lo_u32 v9, v5, v3
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
+; GCN-NEXT:    v_mul_hi_u32 v8, v3, v9
 ; GCN-NEXT:    v_mul_lo_u32 v10, v3, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v3, v7
-; GCN-NEXT:    v_mul_hi_u32 v11, v3, v8
+; GCN-NEXT:    v_mul_hi_u32 v11, v3, v7
 ; GCN-NEXT:    v_mul_hi_u32 v14, v4, v7
 ; GCN-NEXT:    v_mul_lo_u32 v7, v4, v7
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_mul_lo_u32 v11, v4, v8
-; GCN-NEXT:    v_mul_hi_u32 v8, v4, v8
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v13, v9, vcc
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v9, v8, vcc
+; GCN-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v13, v11, vcc
+; GCN-NEXT:    v_mul_lo_u32 v11, v4, v9
+; GCN-NEXT:    v_mul_hi_u32 v9, v4, v9
+; GCN-NEXT:    v_add_i32_e32 v8, vcc, v11, v8
+; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v10, v9, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v14, v12, vcc
 ; GCN-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
 ; GCN-NEXT:    v_add_i32_e64 v3, s[4:5], v3, v7
@@ -1401,17 +1400,17 @@
 ; GCN-NEXT:    v_mul_lo_u32 v5, v5, v3
 ; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v9, v6
-; GCN-NEXT:    v_mul_lo_u32 v11, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v14, v3, v5
-; GCN-NEXT:    v_mul_hi_u32 v15, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v10, v7, v5
+; GCN-NEXT:    v_mul_lo_u32 v10, v3, v6
+; GCN-NEXT:    v_mul_hi_u32 v11, v3, v5
+; GCN-NEXT:    v_mul_hi_u32 v14, v3, v6
+; GCN-NEXT:    v_mul_hi_u32 v15, v7, v5
 ; GCN-NEXT:    v_mul_lo_u32 v5, v7, v5
-; GCN-NEXT:    v_add_i32_e32 v11, vcc, v14, v11
+; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
 ; GCN-NEXT:    v_mul_hi_u32 v9, v7, v6
-; GCN-NEXT:    v_addc_u32_e32 v14, vcc, v13, v15, vcc
+; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v13, v14, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v6, v7, v6
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v11
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v14, v10, vcc
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v10
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v11, v15, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v9, v12, vcc
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
 ; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v13, v7, vcc
@@ -1432,36 +1431,36 @@
 ; GCN-NEXT:    v_mul_lo_u32 v5, v0, v4
 ; GCN-NEXT:    v_mul_hi_u32 v6, v0, v3
 ; GCN-NEXT:    v_mul_lo_u32 v7, v1, v3
+; GCN-NEXT:    v_mul_lo_u32 v8, v0, v3
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_mul_lo_u32 v6, v0, v3
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
-; GCN-NEXT:    v_sub_i32_e32 v7, vcc, 0, v5
-; GCN-NEXT:    v_sub_i32_e32 v6, vcc, 24, v6
-; GCN-NEXT:    v_subb_u32_e64 v7, s[4:5], v7, v1, vcc
-; GCN-NEXT:    v_sub_i32_e64 v8, s[4:5], v6, v0
-; GCN-NEXT:    v_subbrev_u32_e64 v7, s[4:5], 0, v7, s[4:5]
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v7, v1
+; GCN-NEXT:    v_sub_i32_e32 v6, vcc, 0, v5
+; GCN-NEXT:    v_sub_i32_e32 v7, vcc, 24, v8
+; GCN-NEXT:    v_subb_u32_e64 v6, s[4:5], v6, v1, vcc
+; GCN-NEXT:    v_sub_i32_e64 v8, s[4:5], v7, v0
+; GCN-NEXT:    v_subbrev_u32_e64 v6, s[4:5], 0, v6, s[4:5]
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v6, v1
 ; GCN-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
 ; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v8, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v8, 0, -1, s[4:5]
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], v7, v1
-; GCN-NEXT:    v_cndmask_b32_e64 v7, v9, v8, s[4:5]
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], v6, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v6, v9, v8, s[4:5]
 ; GCN-NEXT:    v_add_i32_e64 v8, s[4:5], 2, v3
 ; GCN-NEXT:    v_addc_u32_e64 v9, s[4:5], 0, v4, s[4:5]
 ; GCN-NEXT:    v_add_i32_e64 v10, s[4:5], 1, v3
 ; GCN-NEXT:    v_subb_u32_e32 v5, vcc, 0, v5, vcc
 ; GCN-NEXT:    v_addc_u32_e64 v11, s[4:5], 0, v4, s[4:5]
-; GCN-NEXT:    v_cmp_ne_u32_e64 s[4:5], 0, v7
+; GCN-NEXT:    v_cmp_ne_u32_e64 s[4:5], 0, v6
 ; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v5, v1
-; GCN-NEXT:    v_cndmask_b32_e64 v7, v11, v9, s[4:5]
+; GCN-NEXT:    v_cndmask_b32_e64 v6, v11, v9, s[4:5]
 ; GCN-NEXT:    v_cndmask_b32_e64 v9, 0, -1, vcc
-; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v6, v0
+; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v7, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
 ; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, v5, v1
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, v9, v0, vcc
 ; GCN-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v1, v10, v8, s[4:5]
-; GCN-NEXT:    v_cndmask_b32_e32 v0, v4, v7, vcc
+; GCN-NEXT:    v_cndmask_b32_e32 v0, v4, v6, vcc
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc
 ; GCN-NEXT:    v_xor_b32_e32 v3, v0, v2
 ; GCN-NEXT:    v_xor_b32_e32 v0, v1, v2
@@ -1585,23 +1584,23 @@
 ; GCN-NEXT:    v_mac_f32_e32 v3, 0xcf800000, v4
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v4
-; GCN-NEXT:    v_mul_hi_u32 v7, v5, v3
-; GCN-NEXT:    v_mul_lo_u32 v8, v5, v4
-; GCN-NEXT:    v_mul_lo_u32 v9, v6, v3
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
-; GCN-NEXT:    v_mul_lo_u32 v8, v5, v3
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
+; GCN-NEXT:    v_mul_hi_u32 v8, v5, v3
+; GCN-NEXT:    v_mul_lo_u32 v7, v5, v4
+; GCN-NEXT:    v_mul_lo_u32 v10, v6, v3
+; GCN-NEXT:    v_mul_lo_u32 v9, v5, v3
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
+; GCN-NEXT:    v_mul_hi_u32 v8, v3, v9
 ; GCN-NEXT:    v_mul_lo_u32 v10, v3, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v3, v7
-; GCN-NEXT:    v_mul_hi_u32 v11, v3, v8
+; GCN-NEXT:    v_mul_hi_u32 v11, v3, v7
 ; GCN-NEXT:    v_mul_hi_u32 v14, v4, v7
 ; GCN-NEXT:    v_mul_lo_u32 v7, v4, v7
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_mul_lo_u32 v11, v4, v8
-; GCN-NEXT:    v_mul_hi_u32 v8, v4, v8
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v13, v9, vcc
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v9, v8, vcc
+; GCN-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v13, v11, vcc
+; GCN-NEXT:    v_mul_lo_u32 v11, v4, v9
+; GCN-NEXT:    v_mul_hi_u32 v9, v4, v9
+; GCN-NEXT:    v_add_i32_e32 v8, vcc, v11, v8
+; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v10, v9, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v14, v12, vcc
 ; GCN-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
 ; GCN-NEXT:    v_add_i32_e64 v3, s[4:5], v3, v7
@@ -1613,17 +1612,17 @@
 ; GCN-NEXT:    v_mul_lo_u32 v5, v5, v3
 ; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v9, v6
-; GCN-NEXT:    v_mul_lo_u32 v11, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v14, v3, v5
-; GCN-NEXT:    v_mul_hi_u32 v15, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v10, v7, v5
+; GCN-NEXT:    v_mul_lo_u32 v10, v3, v6
+; GCN-NEXT:    v_mul_hi_u32 v11, v3, v5
+; GCN-NEXT:    v_mul_hi_u32 v14, v3, v6
+; GCN-NEXT:    v_mul_hi_u32 v15, v7, v5
 ; GCN-NEXT:    v_mul_lo_u32 v5, v7, v5
-; GCN-NEXT:    v_add_i32_e32 v11, vcc, v14, v11
+; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
 ; GCN-NEXT:    v_mul_hi_u32 v9, v7, v6
-; GCN-NEXT:    v_addc_u32_e32 v14, vcc, v13, v15, vcc
+; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v13, v14, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v6, v7, v6
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v11
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v14, v10, vcc
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v10
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v11, v15, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v9, v12, vcc
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
 ; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v13, v7, vcc
@@ -1632,49 +1631,49 @@
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
 ; GCN-NEXT:    s_mov_b32 s4, 0x8000
 ; GCN-NEXT:    v_addc_u32_e32 v4, vcc, 0, v4, vcc
-; GCN-NEXT:    v_mul_hi_u32 v5, s4, v3
-; GCN-NEXT:    v_mul_hi_u32 v6, s4, v4
+; GCN-NEXT:    v_mul_hi_u32 v6, s4, v3
+; GCN-NEXT:    v_mul_hi_u32 v5, s4, v4
 ; GCN-NEXT:    v_lshlrev_b32_e32 v7, 15, v4
 ; GCN-NEXT:    v_mul_hi_u32 v3, 0, v3
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
 ; GCN-NEXT:    v_mul_hi_u32 v4, 0, v4
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v13, v6, vcc
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, 0, v5
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v6, v3, vcc
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v13, v5, vcc
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, 0, v6
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v5, v3, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v4, v12, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v5, v0, v4
 ; GCN-NEXT:    v_mul_hi_u32 v6, v0, v3
 ; GCN-NEXT:    v_mul_lo_u32 v7, v1, v3
+; GCN-NEXT:    v_mul_lo_u32 v8, v0, v3
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_mul_lo_u32 v6, v0, v3
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
-; GCN-NEXT:    v_sub_i32_e32 v7, vcc, 0, v5
-; GCN-NEXT:    v_sub_i32_e32 v6, vcc, s4, v6
-; GCN-NEXT:    v_subb_u32_e64 v7, s[4:5], v7, v1, vcc
-; GCN-NEXT:    v_sub_i32_e64 v8, s[4:5], v6, v0
-; GCN-NEXT:    v_subbrev_u32_e64 v7, s[4:5], 0, v7, s[4:5]
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v7, v1
+; GCN-NEXT:    v_sub_i32_e32 v6, vcc, 0, v5
+; GCN-NEXT:    v_sub_i32_e32 v7, vcc, s4, v8
+; GCN-NEXT:    v_subb_u32_e64 v6, s[4:5], v6, v1, vcc
+; GCN-NEXT:    v_sub_i32_e64 v8, s[4:5], v7, v0
+; GCN-NEXT:    v_subbrev_u32_e64 v6, s[4:5], 0, v6, s[4:5]
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v6, v1
 ; GCN-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
 ; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v8, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v8, 0, -1, s[4:5]
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], v7, v1
-; GCN-NEXT:    v_cndmask_b32_e64 v7, v9, v8, s[4:5]
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], v6, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v6, v9, v8, s[4:5]
 ; GCN-NEXT:    v_add_i32_e64 v8, s[4:5], 2, v3
 ; GCN-NEXT:    v_addc_u32_e64 v9, s[4:5], 0, v4, s[4:5]
 ; GCN-NEXT:    v_add_i32_e64 v10, s[4:5], 1, v3
 ; GCN-NEXT:    v_subb_u32_e32 v5, vcc, 0, v5, vcc
 ; GCN-NEXT:    v_addc_u32_e64 v11, s[4:5], 0, v4, s[4:5]
-; GCN-NEXT:    v_cmp_ne_u32_e64 s[4:5], 0, v7
+; GCN-NEXT:    v_cmp_ne_u32_e64 s[4:5], 0, v6
 ; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v5, v1
-; GCN-NEXT:    v_cndmask_b32_e64 v7, v11, v9, s[4:5]
+; GCN-NEXT:    v_cndmask_b32_e64 v6, v11, v9, s[4:5]
 ; GCN-NEXT:    v_cndmask_b32_e64 v9, 0, -1, vcc
-; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v6, v0
+; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v7, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
 ; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, v5, v1
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, v9, v0, vcc
 ; GCN-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v1, v10, v8, s[4:5]
-; GCN-NEXT:    v_cndmask_b32_e32 v0, v4, v7, vcc
+; GCN-NEXT:    v_cndmask_b32_e32 v0, v4, v6, vcc
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc
 ; GCN-NEXT:    v_xor_b32_e32 v3, v0, v2
 ; GCN-NEXT:    v_xor_b32_e32 v0, v1, v2
@@ -2011,11 +2010,11 @@
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v1
 ; GCN-NEXT:    v_mul_f32_e32 v2, s4, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-NEXT:    v_mad_f32 v3, -v2, v1, s4
-; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v1|
+; GCN-NEXT:    v_cvt_i32_f32_e32 v3, v2
+; GCN-NEXT:    v_mad_f32 v2, -v2, v1, s4
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v1|
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v2, v0
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v3, v0
 ; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 24
 ; GCN-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
 ; GCN-NEXT:    s_setpc_b64 s[30:31]
@@ -2031,11 +2030,11 @@
 ; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v1
 ; GCN-IR-NEXT:    v_mul_f32_e32 v2, s4, v2
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_mad_f32 v3, -v2, v1, s4
-; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v1|
+; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v3, v2
+; GCN-IR-NEXT:    v_mad_f32 v2, -v2, v1, s4
+; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v1|
 ; GCN-IR-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
-; GCN-IR-NEXT:    v_add_i32_e32 v0, vcc, v2, v0
+; GCN-IR-NEXT:    v_add_i32_e32 v0, vcc, v3, v0
 ; GCN-IR-NEXT:    v_bfe_i32 v0, v0, 0, 24
 ; GCN-IR-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
 ; GCN-IR-NEXT:    s_setpc_b64 s[30:31]
@@ -2056,11 +2055,11 @@
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v1
 ; GCN-NEXT:    v_mul_f32_e32 v2, s4, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-NEXT:    v_mad_f32 v3, -v2, v1, s4
-; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v1|
+; GCN-NEXT:    v_cvt_i32_f32_e32 v3, v2
+; GCN-NEXT:    v_mad_f32 v2, -v2, v1, s4
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v1|
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v2, v0
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v3, v0
 ; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 24
 ; GCN-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
 ; GCN-NEXT:    s_setpc_b64 s[30:31]
@@ -2076,11 +2075,11 @@
 ; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v1
 ; GCN-IR-NEXT:    v_mul_f32_e32 v2, s4, v2
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_mad_f32 v3, -v2, v1, s4
-; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v1|
+; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v3, v2
+; GCN-IR-NEXT:    v_mad_f32 v2, -v2, v1, s4
+; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v1|
 ; GCN-IR-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
-; GCN-IR-NEXT:    v_add_i32_e32 v0, vcc, v2, v0
+; GCN-IR-NEXT:    v_add_i32_e32 v0, vcc, v3, v0
 ; GCN-IR-NEXT:    v_bfe_i32 v0, v0, 0, 24
 ; GCN-IR-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
 ; GCN-IR-NEXT:    s_setpc_b64 s[30:31]
@@ -2110,11 +2109,11 @@
 ; GCN-IR-NEXT:    v_or_b32_e32 v0, 1, v0
 ; GCN-IR-NEXT:    v_mul_f32_e32 v2, 0x38000000, v1
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v3, v2
 ; GCN-IR-NEXT:    v_mad_f32 v1, -v2, s4, v1
-; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v2, v2
 ; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, s4
 ; GCN-IR-NEXT:    v_cndmask_b32_e32 v0, 0, v0, vcc
-; GCN-IR-NEXT:    v_add_i32_e32 v0, vcc, v2, v0
+; GCN-IR-NEXT:    v_add_i32_e32 v0, vcc, v3, v0
 ; GCN-IR-NEXT:    v_bfe_i32 v0, v0, 0, 24
 ; GCN-IR-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
 ; GCN-IR-NEXT:    s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll b/llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
--- a/llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
+++ b/llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
@@ -855,36 +855,36 @@
 ; VI:       ; %bb.0:
 ; VI-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
 ; VI-NEXT:    v_lshlrev_b32_e32 v1, 1, v0
-; VI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; VI-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
 ; VI-NEXT:    s_waitcnt lgkmcnt(0)
-; VI-NEXT:    v_mov_b32_e32 v2, s3
-; VI-NEXT:    v_add_u32_e32 v1, vcc, s2, v1
-; VI-NEXT:    v_addc_u32_e32 v2, vcc, 0, v2, vcc
-; VI-NEXT:    v_add_u32_e32 v3, vcc, s0, v0
-; VI-NEXT:    flat_load_ushort v0, v[1:2]
-; VI-NEXT:    v_mov_b32_e32 v4, s1
-; VI-NEXT:    v_addc_u32_e32 v4, vcc, 0, v4, vcc
+; VI-NEXT:    v_mov_b32_e32 v3, s3
+; VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v1
+; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v3, vcc
+; VI-NEXT:    flat_load_ushort v0, v[0:1]
+; VI-NEXT:    v_mov_b32_e32 v3, s1
+; VI-NEXT:    v_add_u32_e32 v2, vcc, s0, v2
+; VI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
 ; VI-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
 ; VI-NEXT:    v_subrev_u16_e32 v0, 64, v0
-; VI-NEXT:    flat_store_dword v[3:4], v0
+; VI-NEXT:    flat_store_dword v[2:3], v0
 ; VI-NEXT:    s_endpgm
 ;
 ; GFX9-LABEL: v_test_i16_x_sub_64_zext_to_i32:
 ; GFX9:       ; %bb.0:
 ; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
 ; GFX9-NEXT:    v_lshlrev_b32_e32 v1, 1, v0
-; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
+; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
 ; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
-; GFX9-NEXT:    v_mov_b32_e32 v2, s3
-; GFX9-NEXT:    v_add_co_u32_e32 v1, vcc, s2, v1
-; GFX9-NEXT:    v_addc_co_u32_e32 v2, vcc, 0, v2, vcc
-; GFX9-NEXT:    v_add_co_u32_e32 v3, vcc, s0, v0
-; GFX9-NEXT:    global_load_ushort v0, v[1:2], off
-; GFX9-NEXT:    v_mov_b32_e32 v4, s1
-; GFX9-NEXT:    v_addc_co_u32_e32 v4, vcc, 0, v4, vcc
+; GFX9-NEXT:    v_mov_b32_e32 v3, s3
+; GFX9-NEXT:    v_add_co_u32_e32 v0, vcc, s2, v1
+; GFX9-NEXT:    v_addc_co_u32_e32 v1, vcc, 0, v3, vcc
+; GFX9-NEXT:    global_load_ushort v0, v[0:1], off
+; GFX9-NEXT:    v_mov_b32_e32 v3, s1
+; GFX9-NEXT:    v_add_co_u32_e32 v2, vcc, s0, v2
+; GFX9-NEXT:    v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
 ; GFX9-NEXT:    s_waitcnt vmcnt(0)
 ; GFX9-NEXT:    v_subrev_u16_e32 v0, 64, v0
-; GFX9-NEXT:    global_store_dword v[3:4], v0, off
+; GFX9-NEXT:    global_store_dword v[2:3], v0, off
 ; GFX9-NEXT:    s_endpgm
 ;
 ; GFX10-LABEL: v_test_i16_x_sub_64_zext_to_i32:
diff --git a/llvm/test/CodeGen/AMDGPU/srem64.ll b/llvm/test/CodeGen/AMDGPU/srem64.ll
--- a/llvm/test/CodeGen/AMDGPU/srem64.ll
+++ b/llvm/test/CodeGen/AMDGPU/srem64.ll
@@ -6,95 +6,96 @@
 ; GCN-LABEL: s_test_srem:
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dwordx2 s[12:13], s[0:1], 0xd
-; GCN-NEXT:    v_mov_b32_e32 v2, 0
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_mov_b32_e32 v3, 0
+; GCN-NEXT:    s_mov_b32 s11, 0xf000
+; GCN-NEXT:    s_mov_b32 s10, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s12
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s13
-; GCN-NEXT:    s_sub_u32 s2, 0, s12
-; GCN-NEXT:    s_subb_u32 s3, 0, s13
-; GCN-NEXT:    s_mov_b32 s4, s8
+; GCN-NEXT:    s_sub_u32 s8, 0, s12
+; GCN-NEXT:    s_subb_u32 s4, 0, s13
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0x4f800000, v1
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
-; GCN-NEXT:    s_mov_b32 s5, s9
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
-; GCN-NEXT:    v_mul_f32_e32 v3, 0x2f800000, v0
-; GCN-NEXT:    v_trunc_f32_e32 v3, v3
-; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v3
+; GCN-NEXT:    v_mul_f32_e32 v2, 0x2f800000, v0
+; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
-; GCN-NEXT:    v_mul_hi_u32 v5, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, s2, v3
-; GCN-NEXT:    v_mul_lo_u32 v7, s3, v0
-; GCN-NEXT:    v_mul_lo_u32 v6, s2, v0
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, s8, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, s8, v2
+; GCN-NEXT:    v_mul_lo_u32 v7, s4, v0
+; GCN-NEXT:    v_mul_lo_u32 v6, s8, v0
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
 ; GCN-NEXT:    v_mul_hi_u32 v5, v0, v6
 ; GCN-NEXT:    v_mul_lo_u32 v7, v0, v4
 ; GCN-NEXT:    v_mul_hi_u32 v9, v0, v4
-; GCN-NEXT:    v_mul_lo_u32 v8, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v6, v3, v6
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, v6
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v2, v9, vcc
-; GCN-NEXT:    v_mul_hi_u32 v9, v3, v4
-; GCN-NEXT:    v_mul_lo_u32 v4, v3, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v6, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v9, v1, vcc
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v4
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v3, v9, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v1, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v2, v6, vcc
-; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v6, s2, v4
-; GCN-NEXT:    v_mul_hi_u32 v7, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v8, s3, v0
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
-; GCN-NEXT:    v_mul_lo_u32 v7, s2, v0
+; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v4
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v2, v5, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v6, s8, v0
+; GCN-NEXT:    v_mul_lo_u32 v7, s8, v4
+; GCN-NEXT:    v_mul_lo_u32 v8, s4, v0
+; GCN-NEXT:    v_mul_lo_u32 v9, s8, v0
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v4, v7
-; GCN-NEXT:    v_mul_lo_u32 v7, v4, v7
-; GCN-NEXT:    v_mul_hi_u32 v8, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v2, v12, vcc
+; GCN-NEXT:    v_mul_lo_u32 v8, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v9
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v9
+; GCN-NEXT:    v_mul_lo_u32 v9, v4, v9
+; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
+; GCN-NEXT:    v_mul_hi_u32 v7, v4, v6
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v3, v11, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v4, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v7, v4
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v2, v6, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
-; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v9, v8
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v7, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v3, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v6, s[2:3]
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
-; GCN-NEXT:    v_mul_lo_u32 v4, s10, v3
-; GCN-NEXT:    v_mul_hi_u32 v5, s10, v0
-; GCN-NEXT:    v_mul_hi_u32 v6, s10, v3
-; GCN-NEXT:    v_mul_hi_u32 v7, s11, v3
-; GCN-NEXT:    v_mul_lo_u32 v3, s11, v3
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v2, vcc
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    v_mul_lo_u32 v4, s6, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, s6, v0
+; GCN-NEXT:    v_mul_hi_u32 v6, s6, v2
+; GCN-NEXT:    v_mul_hi_u32 v7, s7, v2
+; GCN-NEXT:    v_mul_lo_u32 v2, s7, v2
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v2, v6, vcc
-; GCN-NEXT:    v_mul_lo_u32 v6, s11, v0
-; GCN-NEXT:    v_mul_hi_u32 v0, s11, v0
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_mul_lo_u32 v6, s7, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s7, v0
+; GCN-NEXT:    s_mov_b32 s8, s4
+; GCN-NEXT:    s_mov_b32 s9, s5
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v5, v0, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v7, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v2, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v3, v1, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v1, s12, v1
 ; GCN-NEXT:    v_mul_hi_u32 v2, s12, v0
 ; GCN-NEXT:    v_mul_lo_u32 v3, s13, v0
 ; GCN-NEXT:    v_mul_lo_u32 v0, s12, v0
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s11, v1
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s7, v1
 ; GCN-NEXT:    v_mov_b32_e32 v3, s13
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s10, v0
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s6, v0
 ; GCN-NEXT:    v_subb_u32_e64 v2, s[0:1], v2, v3, vcc
 ; GCN-NEXT:    v_subrev_i32_e64 v4, s[0:1], s12, v0
 ; GCN-NEXT:    v_subbrev_u32_e64 v5, s[2:3], 0, v2, s[0:1]
@@ -109,7 +110,7 @@
 ; GCN-NEXT:    v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
 ; GCN-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, v6
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v5, v2, s[0:1]
-; GCN-NEXT:    v_mov_b32_e32 v5, s11
+; GCN-NEXT:    v_mov_b32_e32 v5, s7
 ; GCN-NEXT:    v_subb_u32_e32 v1, vcc, v5, v1, vcc
 ; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s13, v1
 ; GCN-NEXT:    v_cndmask_b32_e64 v5, 0, -1, vcc
@@ -121,7 +122,7 @@
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v4, v3, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
-; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[8:11], 0
 ; GCN-NEXT:    s_endpgm
 ;
 ; GCN-IR-LABEL: s_test_srem:
@@ -259,20 +260,20 @@
 ; GCN-NEXT:    v_mul_hi_u32 v8, v6, v4
 ; GCN-NEXT:    v_mul_lo_u32 v9, v6, v5
 ; GCN-NEXT:    v_mul_lo_u32 v10, v7, v4
+; GCN-NEXT:    v_mul_lo_u32 v11, v6, v4
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
-; GCN-NEXT:    v_mul_lo_u32 v9, v6, v4
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
-; GCN-NEXT:    v_mul_lo_u32 v11, v4, v8
-; GCN-NEXT:    v_mul_hi_u32 v10, v4, v8
-; GCN-NEXT:    v_mul_hi_u32 v12, v4, v9
+; GCN-NEXT:    v_mul_lo_u32 v9, v4, v8
+; GCN-NEXT:    v_mul_hi_u32 v10, v4, v11
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v8
 ; GCN-NEXT:    v_mul_hi_u32 v15, v5, v8
 ; GCN-NEXT:    v_mul_lo_u32 v8, v5, v8
-; GCN-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
-; GCN-NEXT:    v_mul_lo_u32 v12, v5, v9
-; GCN-NEXT:    v_mul_hi_u32 v9, v5, v9
-; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v14, v10, vcc
-; GCN-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v10, v9, vcc
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v14, v12, vcc
+; GCN-NEXT:    v_mul_lo_u32 v12, v5, v11
+; GCN-NEXT:    v_mul_hi_u32 v11, v5, v11
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v12, v9
+; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v10, v11, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v15, v13, vcc
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
 ; GCN-NEXT:    v_add_i32_e64 v4, s[4:5], v4, v8
@@ -284,17 +285,17 @@
 ; GCN-NEXT:    v_mul_lo_u32 v6, v6, v4
 ; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
 ; GCN-NEXT:    v_add_i32_e32 v7, vcc, v10, v7
-; GCN-NEXT:    v_mul_lo_u32 v12, v4, v7
-; GCN-NEXT:    v_mul_hi_u32 v15, v4, v6
-; GCN-NEXT:    v_mul_hi_u32 v16, v4, v7
-; GCN-NEXT:    v_mul_hi_u32 v11, v8, v6
+; GCN-NEXT:    v_mul_lo_u32 v11, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v6
+; GCN-NEXT:    v_mul_hi_u32 v15, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v16, v8, v6
 ; GCN-NEXT:    v_mul_lo_u32 v6, v8, v6
-; GCN-NEXT:    v_add_i32_e32 v12, vcc, v15, v12
+; GCN-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
 ; GCN-NEXT:    v_mul_hi_u32 v10, v8, v7
-; GCN-NEXT:    v_addc_u32_e32 v15, vcc, v14, v16, vcc
+; GCN-NEXT:    v_addc_u32_e32 v12, vcc, v14, v15, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v7, v8, v7
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v12
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v15, v11, vcc
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v11
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v12, v16, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v10, v13, vcc
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
 ; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v14, v8, vcc
@@ -631,11 +632,11 @@
 ; GCN-NEXT:    v_or_b32_e32 v5, 1, v5
 ; GCN-NEXT:    v_mul_f32_e32 v4, v1, v4
 ; GCN-NEXT:    v_trunc_f32_e32 v4, v4
+; GCN-NEXT:    v_cvt_i32_f32_e32 v6, v4
 ; GCN-NEXT:    v_mad_f32 v1, -v4, v3, v1
-; GCN-NEXT:    v_cvt_i32_f32_e32 v4, v4
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v3|
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, 0, v5, vcc
-; GCN-NEXT:    v_add_i32_e32 v1, vcc, v4, v1
+; GCN-NEXT:    v_add_i32_e32 v1, vcc, v6, v1
 ; GCN-NEXT:    v_mul_lo_u32 v1, v1, v2
 ; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v1
 ; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 24
@@ -655,11 +656,11 @@
 ; GCN-IR-NEXT:    v_or_b32_e32 v5, 1, v5
 ; GCN-IR-NEXT:    v_mul_f32_e32 v4, v1, v4
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v4, v4
+; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v6, v4
 ; GCN-IR-NEXT:    v_mad_f32 v1, -v4, v3, v1
-; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v4, v4
 ; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v3|
 ; GCN-IR-NEXT:    v_cndmask_b32_e32 v1, 0, v5, vcc
-; GCN-IR-NEXT:    v_add_i32_e32 v1, vcc, v4, v1
+; GCN-IR-NEXT:    v_add_i32_e32 v1, vcc, v6, v1
 ; GCN-IR-NEXT:    v_mul_lo_u32 v1, v1, v2
 ; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, v0, v1
 ; GCN-IR-NEXT:    v_bfe_i32 v0, v0, 0, 24
@@ -817,19 +818,19 @@
 define amdgpu_kernel void @s_test_srem32_64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
 ; GCN-LABEL: s_test_srem32_64:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-NEXT:    s_load_dword s0, s[0:1], 0xe
-; GCN-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-NEXT:    s_mov_b32 s2, -1
+; GCN-NEXT:    s_load_dword s4, s[0:1], 0xe
+; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    v_cvt_f32_i32_e32 v1, s7
-; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s0
-; GCN-NEXT:    s_xor_b32 s1, s7, s0
-; GCN-NEXT:    s_ashr_i32 s1, s1, 30
-; GCN-NEXT:    s_or_b32 s1, s1, 1
+; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s4
+; GCN-NEXT:    v_cvt_f32_i32_e32 v1, s3
+; GCN-NEXT:    s_xor_b32 s2, s3, s4
+; GCN-NEXT:    s_ashr_i32 s2, s2, 30
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
-; GCN-NEXT:    v_mov_b32_e32 v3, s1
-; GCN-NEXT:    s_mov_b32 s1, s5
+; GCN-NEXT:    s_or_b32 s2, s2, 1
+; GCN-NEXT:    v_mov_b32_e32 v3, s2
+; GCN-NEXT:    s_mov_b32 s5, s1
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-NEXT:    v_mad_f32 v1, -v2, v0, v1
@@ -837,28 +838,28 @@
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v0|
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
-; GCN-NEXT:    v_mul_lo_u32 v0, v0, s0
-; GCN-NEXT:    s_mov_b32 s0, s4
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s7, v0
+; GCN-NEXT:    v_mul_lo_u32 v0, v0, s4
+; GCN-NEXT:    s_mov_b32 s4, s0
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s3, v0
 ; GCN-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
-; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
 ; GCN-NEXT:    s_endpgm
 ;
 ; GCN-IR-LABEL: s_test_srem32_64:
 ; GCN-IR:       ; %bb.0:
-; GCN-IR-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-IR-NEXT:    s_load_dword s0, s[0:1], 0xe
-; GCN-IR-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-IR-NEXT:    s_mov_b32 s2, -1
+; GCN-IR-NEXT:    s_load_dword s4, s[0:1], 0xe
+; GCN-IR-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
+; GCN-IR-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-IR-NEXT:    s_mov_b32 s6, -1
 ; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-IR-NEXT:    v_cvt_f32_i32_e32 v1, s7
-; GCN-IR-NEXT:    v_cvt_f32_i32_e32 v0, s0
-; GCN-IR-NEXT:    s_xor_b32 s1, s7, s0
-; GCN-IR-NEXT:    s_ashr_i32 s1, s1, 30
-; GCN-IR-NEXT:    s_or_b32 s1, s1, 1
+; GCN-IR-NEXT:    v_cvt_f32_i32_e32 v0, s4
+; GCN-IR-NEXT:    v_cvt_f32_i32_e32 v1, s3
+; GCN-IR-NEXT:    s_xor_b32 s2, s3, s4
+; GCN-IR-NEXT:    s_ashr_i32 s2, s2, 30
 ; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v0
-; GCN-IR-NEXT:    v_mov_b32_e32 v3, s1
-; GCN-IR-NEXT:    s_mov_b32 s1, s5
+; GCN-IR-NEXT:    s_or_b32 s2, s2, 1
+; GCN-IR-NEXT:    v_mov_b32_e32 v3, s2
+; GCN-IR-NEXT:    s_mov_b32 s5, s1
 ; GCN-IR-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-IR-NEXT:    v_mad_f32 v1, -v2, v0, v1
@@ -866,11 +867,11 @@
 ; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, |v0|
 ; GCN-IR-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
 ; GCN-IR-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
-; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, s0
-; GCN-IR-NEXT:    s_mov_b32 s0, s4
-; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, s7, v0
+; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, s4
+; GCN-IR-NEXT:    s_mov_b32 s4, s0
+; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, s3, v0
 ; GCN-IR-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
-; GCN-IR-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
+; GCN-IR-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
 ; GCN-IR-NEXT:    s_endpgm
   %1 = ashr i64 %x, 32
   %2 = ashr i64 %y, 32
@@ -883,129 +884,127 @@
 define amdgpu_kernel void @s_test_srem33_64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
 ; GCN-LABEL: s_test_srem33_64:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x9
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
 ; GCN-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0xd
-; GCN-NEXT:    v_mov_b32_e32 v7, 0
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_mov_b32_e32 v3, 0
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_ashr_i64 s[2:3], s[10:11], 31
-; GCN-NEXT:    s_ashr_i64 s[4:5], s[0:1], 31
+; GCN-NEXT:    s_ashr_i64 s[2:3], s[6:7], 31
+; GCN-NEXT:    s_ashr_i64 s[8:9], s[0:1], 31
 ; GCN-NEXT:    s_ashr_i32 s0, s1, 31
-; GCN-NEXT:    s_add_u32 s4, s4, s0
+; GCN-NEXT:    s_add_u32 s8, s8, s0
 ; GCN-NEXT:    s_mov_b32 s1, s0
-; GCN-NEXT:    s_addc_u32 s5, s5, s0
-; GCN-NEXT:    s_xor_b64 s[12:13], s[4:5], s[0:1]
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s12
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s13
-; GCN-NEXT:    s_sub_u32 s4, 0, s12
-; GCN-NEXT:    s_subb_u32 s5, 0, s13
-; GCN-NEXT:    s_ashr_i32 s10, s11, 31
+; GCN-NEXT:    s_addc_u32 s9, s9, s0
+; GCN-NEXT:    s_xor_b64 s[8:9], s[8:9], s[0:1]
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s8
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s9
+; GCN-NEXT:    s_sub_u32 s6, 0, s8
+; GCN-NEXT:    s_subb_u32 s10, 0, s9
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0x4f800000, v1
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
-; GCN-NEXT:    s_mov_b32 s11, s10
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
 ; GCN-NEXT:    v_mul_f32_e32 v2, 0x2f800000, v0
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
-; GCN-NEXT:    v_mul_hi_u32 v4, s4, v0
-; GCN-NEXT:    v_mul_lo_u32 v3, s4, v2
-; GCN-NEXT:    v_mul_lo_u32 v6, s5, v0
-; GCN-NEXT:    v_mul_lo_u32 v5, s4, v0
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v4, v0, v5
-; GCN-NEXT:    v_mul_lo_u32 v6, v0, v3
-; GCN-NEXT:    v_mul_hi_u32 v8, v0, v3
-; GCN-NEXT:    v_mul_hi_u32 v9, v2, v3
-; GCN-NEXT:    v_mul_lo_u32 v3, v2, v3
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v6
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v7, v8, vcc
-; GCN-NEXT:    v_mul_lo_u32 v8, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v5, v2, v5
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v8, v4
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v6, v5, vcc
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v3
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v7, v5, vcc
-; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v2, v4, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v5, s4, v3
-; GCN-NEXT:    v_mul_hi_u32 v6, s4, v0
-; GCN-NEXT:    v_mul_lo_u32 v8, s5, v0
-; GCN-NEXT:    s_mov_b32 s5, s9
+; GCN-NEXT:    v_mul_hi_u32 v5, s6, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, s6, v2
+; GCN-NEXT:    v_mul_lo_u32 v7, s10, v0
+; GCN-NEXT:    v_mul_lo_u32 v6, s6, v0
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v5, v0, v6
+; GCN-NEXT:    v_mul_lo_u32 v7, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v9, v0, v4
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, v6
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v4
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v3, v9, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, v4
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_mul_lo_u32 v6, s4, v0
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v5
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
+; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v4
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v2, v5, s[0:1]
+; GCN-NEXT:    v_mul_lo_u32 v6, s6, v4
+; GCN-NEXT:    v_mul_hi_u32 v7, s6, v0
+; GCN-NEXT:    v_mul_lo_u32 v8, s10, v0
+; GCN-NEXT:    s_ashr_i32 s10, s7, 31
+; GCN-NEXT:    s_mov_b32 s11, s10
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
+; GCN-NEXT:    v_mul_lo_u32 v7, s6, v0
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
+; GCN-NEXT:    v_mul_lo_u32 v9, v0, v6
 ; GCN-NEXT:    v_mul_hi_u32 v11, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v9, v3, v6
-; GCN-NEXT:    v_mul_lo_u32 v6, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v8, v3, v5
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v7, v12, vcc
-; GCN-NEXT:    v_mul_lo_u32 v3, v3, v5
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v10
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v8, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v6, v3
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v5, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
-; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v5, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v7
+; GCN-NEXT:    v_mul_lo_u32 v7, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v8, v4, v6
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v3, v11, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v4, v6
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v8, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v3, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v6, s[0:1]
 ; GCN-NEXT:    s_add_u32 s0, s2, s10
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
 ; GCN-NEXT:    s_addc_u32 s1, s3, s10
-; GCN-NEXT:    s_xor_b64 s[14:15], s[0:1], s[10:11]
+; GCN-NEXT:    s_xor_b64 s[12:13], s[0:1], s[10:11]
 ; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v2, vcc
-; GCN-NEXT:    v_mul_lo_u32 v3, s14, v2
-; GCN-NEXT:    v_mul_hi_u32 v4, s14, v0
-; GCN-NEXT:    v_mul_hi_u32 v5, s14, v2
-; GCN-NEXT:    v_mul_hi_u32 v6, s15, v2
-; GCN-NEXT:    v_mul_lo_u32 v2, s15, v2
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v7, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v5, s15, v0
-; GCN-NEXT:    v_mul_hi_u32 v0, s15, v0
-; GCN-NEXT:    s_mov_b32 s4, s8
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v4, v0, vcc
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v6, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_mul_lo_u32 v4, s12, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, s12, v0
+; GCN-NEXT:    v_mul_hi_u32 v6, s12, v2
+; GCN-NEXT:    v_mul_hi_u32 v7, s13, v2
+; GCN-NEXT:    v_mul_lo_u32 v2, s13, v2
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_mul_lo_u32 v6, s13, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s13, v0
+; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v5, v0, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v7, v1, vcc
-; GCN-NEXT:    v_mul_lo_u32 v1, s12, v1
-; GCN-NEXT:    v_mul_hi_u32 v2, s12, v0
-; GCN-NEXT:    v_mul_lo_u32 v3, s13, v0
-; GCN-NEXT:    v_mul_lo_u32 v0, s12, v0
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v3, v1, vcc
+; GCN-NEXT:    v_mul_lo_u32 v1, s8, v1
+; GCN-NEXT:    v_mul_hi_u32 v2, s8, v0
+; GCN-NEXT:    v_mul_lo_u32 v3, s9, v0
+; GCN-NEXT:    v_mul_lo_u32 v0, s8, v0
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s15, v1
-; GCN-NEXT:    v_mov_b32_e32 v3, s13
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s14, v0
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s13, v1
+; GCN-NEXT:    v_mov_b32_e32 v3, s9
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s12, v0
 ; GCN-NEXT:    v_subb_u32_e64 v2, s[0:1], v2, v3, vcc
-; GCN-NEXT:    v_subrev_i32_e64 v4, s[0:1], s12, v0
+; GCN-NEXT:    v_subrev_i32_e64 v4, s[0:1], s8, v0
 ; GCN-NEXT:    v_subbrev_u32_e64 v5, s[2:3], 0, v2, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s13, v5
+; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s9, v5
 ; GCN-NEXT:    v_subb_u32_e64 v2, s[0:1], v2, v3, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, s[2:3]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s12, v4
-; GCN-NEXT:    v_subrev_i32_e64 v3, s[0:1], s12, v4
+; GCN-NEXT:    v_cmp_le_u32_e64 s[2:3], s8, v4
+; GCN-NEXT:    v_subrev_i32_e64 v3, s[0:1], s8, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[2:3]
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], s13, v5
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[2:3], s9, v5
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, v6, v7, s[2:3]
 ; GCN-NEXT:    v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
 ; GCN-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, v6
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v5, v2, s[0:1]
-; GCN-NEXT:    v_mov_b32_e32 v5, s15
+; GCN-NEXT:    v_mov_b32_e32 v5, s13
 ; GCN-NEXT:    v_subb_u32_e32 v1, vcc, v5, v1, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s13, v1
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s9, v1
 ; GCN-NEXT:    v_cndmask_b32_e64 v5, 0, -1, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s12, v0
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s8, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, vcc
-; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s13, v1
+; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s9, v1
 ; GCN-NEXT:    v_cndmask_b32_e32 v5, v5, v6, vcc
 ; GCN-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v5
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc
@@ -1148,39 +1147,39 @@
 define amdgpu_kernel void @s_test_srem24_48(i48 addrspace(1)* %out, i48 %x, i48 %y) {
 ; GCN-LABEL: s_test_srem24_48:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
 ; GCN-NEXT:    s_load_dword s2, s[0:1], 0xb
 ; GCN-NEXT:    s_load_dword s3, s[0:1], 0xc
-; GCN-NEXT:    s_load_dword s6, s[0:1], 0xd
-; GCN-NEXT:    s_load_dword s0, s[0:1], 0xe
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
+; GCN-NEXT:    s_load_dword s4, s[0:1], 0xd
+; GCN-NEXT:    s_load_dword s5, s[0:1], 0xe
+; GCN-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    v_mov_b32_e32 v2, s2
-; GCN-NEXT:    s_sext_i32_i16 s1, s3
-; GCN-NEXT:    v_mov_b32_e32 v0, s6
-; GCN-NEXT:    s_sext_i32_i16 s0, s0
-; GCN-NEXT:    v_alignbit_b32 v0, s0, v0, 24
+; GCN-NEXT:    s_sext_i32_i16 s3, s3
+; GCN-NEXT:    v_mov_b32_e32 v0, s4
+; GCN-NEXT:    s_sext_i32_i16 s5, s5
+; GCN-NEXT:    v_alignbit_b32 v0, s5, v0, 24
 ; GCN-NEXT:    v_cvt_f32_i32_e32 v1, v0
-; GCN-NEXT:    v_alignbit_b32 v2, s1, v2, 24
+; GCN-NEXT:    v_alignbit_b32 v2, s3, v2, 24
 ; GCN-NEXT:    v_cvt_f32_i32_e32 v3, v2
 ; GCN-NEXT:    v_xor_b32_e32 v5, v2, v0
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v4, v1
 ; GCN-NEXT:    v_ashrrev_i32_e32 v5, 30, v5
 ; GCN-NEXT:    v_or_b32_e32 v5, 1, v5
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
 ; GCN-NEXT:    v_mul_f32_e32 v4, v3, v4
 ; GCN-NEXT:    v_trunc_f32_e32 v4, v4
+; GCN-NEXT:    v_cvt_i32_f32_e32 v6, v4
 ; GCN-NEXT:    v_mad_f32 v3, -v4, v1, v3
-; GCN-NEXT:    v_cvt_i32_f32_e32 v4, v4
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v3|, |v1|
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, 0, v5, vcc
-; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v4
+; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v6
 ; GCN-NEXT:    v_mul_lo_u32 v0, v1, v0
+; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v2, v0
 ; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 24
 ; GCN-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
-; GCN-NEXT:    buffer_store_dword v0, off, s[4:7], 0
-; GCN-NEXT:    buffer_store_short v1, off, s[4:7], 0 offset:4
+; GCN-NEXT:    buffer_store_dword v0, off, s[0:3], 0
+; GCN-NEXT:    buffer_store_short v1, off, s[0:3], 0 offset:4
 ; GCN-NEXT:    s_endpgm
 ;
 ; GCN-IR-LABEL: s_test_srem24_48:
@@ -1321,7 +1320,7 @@
 ; GCN-LABEL: s_test_srem_k_num_i64:
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-NEXT:    v_mov_b32_e32 v2, 0
+; GCN-NEXT:    v_mov_b32_e32 v3, 0
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    s_ashr_i32 s0, s7, 31
 ; GCN-NEXT:    s_add_u32 s2, s6, s0
@@ -1338,13 +1337,13 @@
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
 ; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
-; GCN-NEXT:    v_mul_f32_e32 v3, 0x2f800000, v0
-; GCN-NEXT:    v_trunc_f32_e32 v3, v3
-; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v3
+; GCN-NEXT:    v_mul_f32_e32 v2, 0x2f800000, v0
+; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
 ; GCN-NEXT:    v_mul_hi_u32 v5, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, s2, v3
+; GCN-NEXT:    v_mul_lo_u32 v4, s2, v2
 ; GCN-NEXT:    v_mul_lo_u32 v7, s3, v0
 ; GCN-NEXT:    v_mul_lo_u32 v6, s2, v0
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
@@ -1352,53 +1351,53 @@
 ; GCN-NEXT:    v_mul_hi_u32 v5, v0, v6
 ; GCN-NEXT:    v_mul_lo_u32 v7, v0, v4
 ; GCN-NEXT:    v_mul_hi_u32 v9, v0, v4
-; GCN-NEXT:    v_mul_lo_u32 v8, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v6, v3, v6
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, v6
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v2, v9, vcc
-; GCN-NEXT:    v_mul_hi_u32 v9, v3, v4
-; GCN-NEXT:    v_mul_lo_u32 v4, v3, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v6, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v9, v1, vcc
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v4
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v3, v9, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v1, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
 ; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v2, v6, vcc
-; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v2, v5, s[0:1]
 ; GCN-NEXT:    v_mul_lo_u32 v6, s2, v4
 ; GCN-NEXT:    v_mul_hi_u32 v7, s2, v0
 ; GCN-NEXT:    v_mul_lo_u32 v8, s3, v0
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
 ; GCN-NEXT:    v_mul_lo_u32 v7, s2, v0
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v4, v7
+; GCN-NEXT:    v_mul_lo_u32 v9, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v7
 ; GCN-NEXT:    v_mul_lo_u32 v7, v4, v7
 ; GCN-NEXT:    v_mul_hi_u32 v8, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v2, v12, vcc
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v3, v11, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v4, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v7, v4
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v2, v6, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
-; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v8, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v3, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v6, s[0:1]
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v2, vcc
 ; GCN-NEXT:    v_mul_hi_u32 v5, 24, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, v3, 24
-; GCN-NEXT:    v_mul_hi_u32 v6, 24, v3
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, 24
+; GCN-NEXT:    v_mul_hi_u32 v6, 24, v2
 ; GCN-NEXT:    v_mul_hi_u32 v0, 0, v0
-; GCN-NEXT:    v_mul_hi_u32 v3, 0, v3
+; GCN-NEXT:    v_mul_hi_u32 v2, 0, v2
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v2, v6, vcc
+; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v3, v6, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, 0, v4
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v2, v0, vcc
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v3, v1, vcc
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v0, vcc
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v2, v1, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v1, s8, v1
 ; GCN-NEXT:    v_mul_hi_u32 v2, s8, v0
 ; GCN-NEXT:    v_mul_lo_u32 v3, s9, v0
@@ -1557,23 +1556,23 @@
 ; GCN-NEXT:    v_mac_f32_e32 v2, 0xcf800000, v3
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
-; GCN-NEXT:    v_mul_hi_u32 v6, v4, v2
-; GCN-NEXT:    v_mul_lo_u32 v7, v4, v3
-; GCN-NEXT:    v_mul_lo_u32 v8, v5, v2
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
-; GCN-NEXT:    v_mul_lo_u32 v7, v4, v2
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v8
+; GCN-NEXT:    v_mul_hi_u32 v7, v4, v2
+; GCN-NEXT:    v_mul_lo_u32 v6, v4, v3
+; GCN-NEXT:    v_mul_lo_u32 v9, v5, v2
+; GCN-NEXT:    v_mul_lo_u32 v8, v4, v2
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v9
+; GCN-NEXT:    v_mul_hi_u32 v7, v2, v8
 ; GCN-NEXT:    v_mul_lo_u32 v9, v2, v6
-; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
-; GCN-NEXT:    v_mul_hi_u32 v10, v2, v7
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v6
 ; GCN-NEXT:    v_mul_hi_u32 v13, v3, v6
 ; GCN-NEXT:    v_mul_lo_u32 v6, v3, v6
-; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
-; GCN-NEXT:    v_mul_lo_u32 v10, v3, v7
-; GCN-NEXT:    v_mul_hi_u32 v7, v3, v7
-; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v12, v8, vcc
-; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v8, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v12, v10, vcc
+; GCN-NEXT:    v_mul_lo_u32 v10, v3, v8
+; GCN-NEXT:    v_mul_hi_u32 v8, v3, v8
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v10, v7
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v9, v8, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v13, v11, vcc
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
 ; GCN-NEXT:    v_add_i32_e64 v2, s[4:5], v2, v6
@@ -1585,17 +1584,17 @@
 ; GCN-NEXT:    v_mul_lo_u32 v4, v4, v2
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_mul_lo_u32 v10, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v13, v2, v4
-; GCN-NEXT:    v_mul_hi_u32 v14, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v9, v6, v4
+; GCN-NEXT:    v_mul_lo_u32 v9, v2, v5
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v4
+; GCN-NEXT:    v_mul_hi_u32 v13, v2, v5
+; GCN-NEXT:    v_mul_hi_u32 v14, v6, v4
 ; GCN-NEXT:    v_mul_lo_u32 v4, v6, v4
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v13, v10
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
 ; GCN-NEXT:    v_mul_hi_u32 v8, v6, v5
-; GCN-NEXT:    v_addc_u32_e32 v13, vcc, v12, v14, vcc
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v12, v13, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v5, v6, v5
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v10
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v13, v9, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v9
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v10, v14, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v11, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
 ; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v12, v6, vcc
@@ -1735,8 +1734,8 @@
 ; GCN-IR-NEXT:    v_mul_hi_u32 v4, v0, v2
 ; GCN-IR-NEXT:    v_mul_lo_u32 v1, v1, v2
 ; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, v2
-; GCN-IR-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
-; GCN-IR-NEXT:    v_add_i32_e32 v1, vcc, v3, v1
+; GCN-IR-NEXT:    v_add_i32_e32 v2, vcc, v4, v3
+; GCN-IR-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
 ; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, 24, v0
 ; GCN-IR-NEXT:    v_subb_u32_e32 v1, vcc, 0, v1, vcc
 ; GCN-IR-NEXT:    s_setpc_b64 s[30:31]
@@ -1767,23 +1766,23 @@
 ; GCN-NEXT:    v_mac_f32_e32 v2, 0xcf800000, v3
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
-; GCN-NEXT:    v_mul_hi_u32 v6, v4, v2
-; GCN-NEXT:    v_mul_lo_u32 v7, v4, v3
-; GCN-NEXT:    v_mul_lo_u32 v8, v5, v2
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
-; GCN-NEXT:    v_mul_lo_u32 v7, v4, v2
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v8
+; GCN-NEXT:    v_mul_hi_u32 v7, v4, v2
+; GCN-NEXT:    v_mul_lo_u32 v6, v4, v3
+; GCN-NEXT:    v_mul_lo_u32 v9, v5, v2
+; GCN-NEXT:    v_mul_lo_u32 v8, v4, v2
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v9
+; GCN-NEXT:    v_mul_hi_u32 v7, v2, v8
 ; GCN-NEXT:    v_mul_lo_u32 v9, v2, v6
-; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
-; GCN-NEXT:    v_mul_hi_u32 v10, v2, v7
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v6
 ; GCN-NEXT:    v_mul_hi_u32 v13, v3, v6
 ; GCN-NEXT:    v_mul_lo_u32 v6, v3, v6
-; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
-; GCN-NEXT:    v_mul_lo_u32 v10, v3, v7
-; GCN-NEXT:    v_mul_hi_u32 v7, v3, v7
-; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v12, v8, vcc
-; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v8, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v12, v10, vcc
+; GCN-NEXT:    v_mul_lo_u32 v10, v3, v8
+; GCN-NEXT:    v_mul_hi_u32 v8, v3, v8
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v10, v7
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v9, v8, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v13, v11, vcc
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
 ; GCN-NEXT:    v_add_i32_e64 v2, s[4:5], v2, v6
@@ -1795,17 +1794,17 @@
 ; GCN-NEXT:    v_mul_lo_u32 v4, v4, v2
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_mul_lo_u32 v10, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v13, v2, v4
-; GCN-NEXT:    v_mul_hi_u32 v14, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v9, v6, v4
+; GCN-NEXT:    v_mul_lo_u32 v9, v2, v5
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v4
+; GCN-NEXT:    v_mul_hi_u32 v13, v2, v5
+; GCN-NEXT:    v_mul_hi_u32 v14, v6, v4
 ; GCN-NEXT:    v_mul_lo_u32 v4, v6, v4
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v13, v10
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
 ; GCN-NEXT:    v_mul_hi_u32 v8, v6, v5
-; GCN-NEXT:    v_addc_u32_e32 v13, vcc, v12, v14, vcc
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v12, v13, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v5, v6, v5
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v10
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v13, v9, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v9
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v10, v14, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v11, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
 ; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v12, v6, vcc
@@ -1814,15 +1813,15 @@
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
 ; GCN-NEXT:    s_mov_b32 s4, 0x8000
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
-; GCN-NEXT:    v_mul_hi_u32 v4, s4, v2
-; GCN-NEXT:    v_mul_hi_u32 v5, s4, v3
+; GCN-NEXT:    v_mul_hi_u32 v5, s4, v2
+; GCN-NEXT:    v_mul_hi_u32 v4, s4, v3
 ; GCN-NEXT:    v_lshlrev_b32_e32 v6, 15, v3
 ; GCN-NEXT:    v_mul_hi_u32 v2, 0, v2
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v6
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
 ; GCN-NEXT:    v_mul_hi_u32 v3, 0, v3
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v12, v5, vcc
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, 0, v4
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v5, v2, vcc
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v12, v4, vcc
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, 0, v5
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v4, v2, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v3, v11, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v3, v0, v3
 ; GCN-NEXT:    v_mul_hi_u32 v4, v0, v2
@@ -2070,24 +2069,24 @@
 ; GCN-LABEL: s_test_srem24_k_num_i64:
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s6, 0x41c00000
+; GCN-NEXT:    s_mov_b32 s5, 0x41c00000
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_ashr_i64 s[4:5], s[2:3], 40
-; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s4
-; GCN-NEXT:    s_ashr_i32 s5, s4, 30
-; GCN-NEXT:    s_or_b32 s5, s5, 1
-; GCN-NEXT:    v_mov_b32_e32 v3, s5
+; GCN-NEXT:    s_ashr_i64 s[2:3], s[2:3], 40
+; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s2
+; GCN-NEXT:    s_ashr_i32 s4, s2, 30
+; GCN-NEXT:    s_or_b32 s4, s4, 1
+; GCN-NEXT:    v_mov_b32_e32 v3, s4
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v0
 ; GCN-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-NEXT:    s_mov_b32 s2, -1
-; GCN-NEXT:    v_mul_f32_e32 v1, s6, v1
+; GCN-NEXT:    v_mul_f32_e32 v1, s5, v1
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
-; GCN-NEXT:    v_mad_f32 v2, -v1, v0, s6
+; GCN-NEXT:    v_mad_f32 v2, -v1, v0, s5
 ; GCN-NEXT:    v_cvt_i32_f32_e32 v1, v1
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v0|
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
-; GCN-NEXT:    v_mul_lo_u32 v0, v0, s4
+; GCN-NEXT:    v_mul_lo_u32 v0, v0, s2
+; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    v_sub_i32_e32 v0, vcc, 24, v0
 ; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 24
 ; GCN-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
@@ -2097,24 +2096,24 @@
 ; GCN-IR-LABEL: s_test_srem24_k_num_i64:
 ; GCN-IR:       ; %bb.0:
 ; GCN-IR-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
-; GCN-IR-NEXT:    s_mov_b32 s6, 0x41c00000
+; GCN-IR-NEXT:    s_mov_b32 s5, 0x41c00000
 ; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-IR-NEXT:    s_ashr_i64 s[4:5], s[2:3], 40
-; GCN-IR-NEXT:    v_cvt_f32_i32_e32 v0, s4
-; GCN-IR-NEXT:    s_ashr_i32 s5, s4, 30
-; GCN-IR-NEXT:    s_or_b32 s5, s5, 1
-; GCN-IR-NEXT:    v_mov_b32_e32 v3, s5
+; GCN-IR-NEXT:    s_ashr_i64 s[2:3], s[2:3], 40
+; GCN-IR-NEXT:    v_cvt_f32_i32_e32 v0, s2
+; GCN-IR-NEXT:    s_ashr_i32 s4, s2, 30
+; GCN-IR-NEXT:    s_or_b32 s4, s4, 1
+; GCN-IR-NEXT:    v_mov_b32_e32 v3, s4
 ; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v1, v0
 ; GCN-IR-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-IR-NEXT:    s_mov_b32 s2, -1
-; GCN-IR-NEXT:    v_mul_f32_e32 v1, s6, v1
+; GCN-IR-NEXT:    v_mul_f32_e32 v1, s5, v1
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v1, v1
-; GCN-IR-NEXT:    v_mad_f32 v2, -v1, v0, s6
+; GCN-IR-NEXT:    v_mad_f32 v2, -v1, v0, s5
 ; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v1, v1
 ; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v0|
 ; GCN-IR-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
 ; GCN-IR-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
-; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, s4
+; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, s2
+; GCN-IR-NEXT:    s_mov_b32 s2, -1
 ; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, 24, v0
 ; GCN-IR-NEXT:    v_bfe_i32 v0, v0, 0, 24
 ; GCN-IR-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
@@ -2130,9 +2129,8 @@
 ; GCN-LABEL: s_test_srem24_k_den_i64:
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s8, 0x46b6fe00
+; GCN-NEXT:    s_mov_b32 s2, 0x46b6fe00
 ; GCN-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    s_ashr_i64 s[6:7], s[6:7], 40
 ; GCN-NEXT:    v_cvt_f32_i32_e32 v0, s6
@@ -2141,13 +2139,14 @@
 ; GCN-NEXT:    v_mov_b32_e32 v1, s0
 ; GCN-NEXT:    v_mul_f32_e32 v2, 0x38331158, v0
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-NEXT:    v_mad_f32 v0, -v2, s8, v0
-; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, s8
+; GCN-NEXT:    v_cvt_i32_f32_e32 v3, v2
+; GCN-NEXT:    v_mad_f32 v0, -v2, s2, v0
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, s2
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, 0, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
 ; GCN-NEXT:    s_movk_i32 s0, 0x5b7f
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
 ; GCN-NEXT:    v_mul_lo_u32 v0, v0, s0
+; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    s_mov_b32 s0, s4
 ; GCN-NEXT:    s_mov_b32 s1, s5
 ; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s6, v0
@@ -2159,9 +2158,8 @@
 ; GCN-IR-LABEL: s_test_srem24_k_den_i64:
 ; GCN-IR:       ; %bb.0:
 ; GCN-IR-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-IR-NEXT:    s_mov_b32 s8, 0x46b6fe00
+; GCN-IR-NEXT:    s_mov_b32 s2, 0x46b6fe00
 ; GCN-IR-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-IR-NEXT:    s_mov_b32 s2, -1
 ; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-IR-NEXT:    s_ashr_i64 s[6:7], s[6:7], 40
 ; GCN-IR-NEXT:    v_cvt_f32_i32_e32 v0, s6
@@ -2170,13 +2168,14 @@
 ; GCN-IR-NEXT:    v_mov_b32_e32 v1, s0
 ; GCN-IR-NEXT:    v_mul_f32_e32 v2, 0x38331158, v0
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_mad_f32 v0, -v2, s8, v0
-; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, s8
+; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v3, v2
+; GCN-IR-NEXT:    v_mad_f32 v0, -v2, s2, v0
+; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, s2
 ; GCN-IR-NEXT:    v_cndmask_b32_e32 v0, 0, v1, vcc
+; GCN-IR-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
 ; GCN-IR-NEXT:    s_movk_i32 s0, 0x5b7f
-; GCN-IR-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
 ; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, s0
+; GCN-IR-NEXT:    s_mov_b32 s2, -1
 ; GCN-IR-NEXT:    s_mov_b32 s0, s4
 ; GCN-IR-NEXT:    s_mov_b32 s1, s5
 ; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, s6, v0
@@ -2202,11 +2201,11 @@
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v1
 ; GCN-NEXT:    v_mul_f32_e32 v2, s4, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-NEXT:    v_mad_f32 v4, -v2, v1, s4
-; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, |v1|
+; GCN-NEXT:    v_cvt_i32_f32_e32 v4, v2
+; GCN-NEXT:    v_mad_f32 v2, -v2, v1, s4
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v1|
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
-; GCN-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
+; GCN-NEXT:    v_add_i32_e32 v1, vcc, v4, v1
 ; GCN-NEXT:    v_mul_lo_u32 v0, v1, v0
 ; GCN-NEXT:    v_sub_i32_e32 v0, vcc, 24, v0
 ; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 24
@@ -2224,11 +2223,11 @@
 ; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v1
 ; GCN-IR-NEXT:    v_mul_f32_e32 v2, s4, v2
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_mad_f32 v4, -v2, v1, s4
-; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, |v1|
+; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v4, v2
+; GCN-IR-NEXT:    v_mad_f32 v2, -v2, v1, s4
+; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v1|
 ; GCN-IR-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
-; GCN-IR-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
+; GCN-IR-NEXT:    v_add_i32_e32 v1, vcc, v4, v1
 ; GCN-IR-NEXT:    v_mul_lo_u32 v0, v1, v0
 ; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, 24, v0
 ; GCN-IR-NEXT:    v_bfe_i32 v0, v0, 0, 24
@@ -2251,11 +2250,11 @@
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v1
 ; GCN-NEXT:    v_mul_f32_e32 v2, s4, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-NEXT:    v_mad_f32 v4, -v2, v1, s4
-; GCN-NEXT:    v_cvt_i32_f32_e32 v2, v2
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, |v1|
+; GCN-NEXT:    v_cvt_i32_f32_e32 v4, v2
+; GCN-NEXT:    v_mad_f32 v2, -v2, v1, s4
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v1|
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
-; GCN-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
+; GCN-NEXT:    v_add_i32_e32 v1, vcc, v4, v1
 ; GCN-NEXT:    v_mul_lo_u32 v0, v1, v0
 ; GCN-NEXT:    v_sub_i32_e32 v0, vcc, 0x8000, v0
 ; GCN-NEXT:    v_bfe_i32 v0, v0, 0, 24
@@ -2273,11 +2272,11 @@
 ; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v1
 ; GCN-IR-NEXT:    v_mul_f32_e32 v2, s4, v2
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_mad_f32 v4, -v2, v1, s4
-; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, |v1|
+; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v4, v2
+; GCN-IR-NEXT:    v_mad_f32 v2, -v2, v1, s4
+; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, |v1|
 ; GCN-IR-NEXT:    v_cndmask_b32_e32 v1, 0, v3, vcc
-; GCN-IR-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
+; GCN-IR-NEXT:    v_add_i32_e32 v1, vcc, v4, v1
 ; GCN-IR-NEXT:    v_mul_lo_u32 v0, v1, v0
 ; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, 0x8000, v0
 ; GCN-IR-NEXT:    v_bfe_i32 v0, v0, 0, 24
@@ -2311,11 +2310,11 @@
 ; GCN-IR-NEXT:    v_or_b32_e32 v2, 1, v2
 ; GCN-IR-NEXT:    v_mul_f32_e32 v3, 0x38000000, v1
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v3, v3
+; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v4, v3
 ; GCN-IR-NEXT:    v_mad_f32 v1, -v3, s4, v1
-; GCN-IR-NEXT:    v_cvt_i32_f32_e32 v3, v3
 ; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, s4
 ; GCN-IR-NEXT:    v_cndmask_b32_e32 v1, 0, v2, vcc
-; GCN-IR-NEXT:    v_add_i32_e32 v1, vcc, v3, v1
+; GCN-IR-NEXT:    v_add_i32_e32 v1, vcc, v4, v1
 ; GCN-IR-NEXT:    v_lshlrev_b32_e32 v1, 15, v1
 ; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, v0, v1
 ; GCN-IR-NEXT:    v_bfe_i32 v0, v0, 0, 24
diff --git a/llvm/test/CodeGen/AMDGPU/udiv64.ll b/llvm/test/CodeGen/AMDGPU/udiv64.ll
--- a/llvm/test/CodeGen/AMDGPU/udiv64.ll
+++ b/llvm/test/CodeGen/AMDGPU/udiv64.ll
@@ -5,104 +5,105 @@
 define amdgpu_kernel void @s_test_udiv_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
 ; GCN-LABEL: s_test_udiv_i64:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0xd
-; GCN-NEXT:    v_mov_b32_e32 v2, 0
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    s_load_dwordx2 s[12:13], s[0:1], 0xd
+; GCN-NEXT:    v_mov_b32_e32 v3, 0
+; GCN-NEXT:    s_mov_b32 s11, 0xf000
+; GCN-NEXT:    s_mov_b32 s10, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s2
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s3
-; GCN-NEXT:    s_sub_u32 s4, 0, s2
-; GCN-NEXT:    s_subb_u32 s5, 0, s3
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s12
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s13
+; GCN-NEXT:    s_sub_u32 s8, 0, s12
+; GCN-NEXT:    s_subb_u32 s4, 0, s13
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0x4f800000, v1
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
-; GCN-NEXT:    v_mul_f32_e32 v3, 0x2f800000, v0
-; GCN-NEXT:    v_trunc_f32_e32 v3, v3
-; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v3
+; GCN-NEXT:    v_mul_f32_e32 v2, 0x2f800000, v0
+; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
-; GCN-NEXT:    v_mul_hi_u32 v5, s4, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, s4, v3
-; GCN-NEXT:    v_mul_lo_u32 v7, s5, v0
-; GCN-NEXT:    v_mul_lo_u32 v6, s4, v0
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, s8, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, s8, v2
+; GCN-NEXT:    v_mul_lo_u32 v7, s4, v0
+; GCN-NEXT:    v_mul_lo_u32 v6, s8, v0
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
 ; GCN-NEXT:    v_mul_hi_u32 v5, v0, v6
 ; GCN-NEXT:    v_mul_lo_u32 v7, v0, v4
 ; GCN-NEXT:    v_mul_hi_u32 v9, v0, v4
-; GCN-NEXT:    v_mul_lo_u32 v8, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v6, v3, v6
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, v6
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v2, v9, vcc
-; GCN-NEXT:    v_mul_hi_u32 v9, v3, v4
-; GCN-NEXT:    v_mul_lo_u32 v4, v3, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v6, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v9, v1, vcc
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v4
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v3, v9, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v1, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v2, v6, vcc
-; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v6, s4, v4
-; GCN-NEXT:    v_mul_hi_u32 v7, s4, v0
-; GCN-NEXT:    v_mul_lo_u32 v8, s5, v0
-; GCN-NEXT:    s_mov_b32 s5, s9
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
-; GCN-NEXT:    v_mul_lo_u32 v7, s4, v0
+; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v4
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v2, v5, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v6, s8, v0
+; GCN-NEXT:    v_mul_lo_u32 v7, s8, v4
+; GCN-NEXT:    v_mul_lo_u32 v8, s4, v0
+; GCN-NEXT:    v_mul_lo_u32 v9, s8, v0
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v4, v7
-; GCN-NEXT:    v_mul_lo_u32 v7, v4, v7
-; GCN-NEXT:    v_mul_hi_u32 v8, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v2, v12, vcc
+; GCN-NEXT:    v_mul_lo_u32 v8, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v9
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v9
+; GCN-NEXT:    v_mul_lo_u32 v9, v4, v9
+; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
+; GCN-NEXT:    v_mul_hi_u32 v7, v4, v6
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v3, v11, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v4, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v7, v4
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v2, v6, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
-; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v9, v8
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v7, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v3, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v6, s[2:3]
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
-; GCN-NEXT:    v_mul_lo_u32 v4, s10, v3
-; GCN-NEXT:    v_mul_hi_u32 v5, s10, v0
-; GCN-NEXT:    v_mul_hi_u32 v6, s10, v3
-; GCN-NEXT:    v_mul_hi_u32 v7, s11, v3
-; GCN-NEXT:    v_mul_lo_u32 v3, s11, v3
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v2, vcc
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    v_mul_lo_u32 v4, s6, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, s6, v0
+; GCN-NEXT:    v_mul_hi_u32 v6, s6, v2
+; GCN-NEXT:    v_mul_hi_u32 v7, s7, v2
+; GCN-NEXT:    v_mul_lo_u32 v2, s7, v2
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v2, v6, vcc
-; GCN-NEXT:    v_mul_lo_u32 v6, s11, v0
-; GCN-NEXT:    v_mul_hi_u32 v0, s11, v0
-; GCN-NEXT:    s_mov_b32 s4, s8
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_mul_lo_u32 v6, s7, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s7, v0
+; GCN-NEXT:    s_mov_b32 s8, s4
+; GCN-NEXT:    s_mov_b32 s9, s5
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v5, v0, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v7, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v2, v1, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, s2, v1
-; GCN-NEXT:    v_mul_hi_u32 v3, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, s3, v0
-; GCN-NEXT:    v_mov_b32_e32 v5, s3
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v3, v1, vcc
+; GCN-NEXT:    v_mul_lo_u32 v2, s12, v1
+; GCN-NEXT:    v_mul_hi_u32 v3, s12, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, s13, v0
+; GCN-NEXT:    v_mov_b32_e32 v5, s13
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_mul_lo_u32 v3, s2, v0
+; GCN-NEXT:    v_mul_lo_u32 v3, s12, v0
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s11, v2
-; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s10, v3
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s7, v2
+; GCN-NEXT:    v_sub_i32_e32 v3, vcc, s6, v3
 ; GCN-NEXT:    v_subb_u32_e64 v4, s[0:1], v4, v5, vcc
-; GCN-NEXT:    v_subrev_i32_e64 v5, s[0:1], s2, v3
+; GCN-NEXT:    v_subrev_i32_e64 v5, s[0:1], s12, v3
 ; GCN-NEXT:    v_subbrev_u32_e64 v4, s[0:1], 0, v4, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s3, v4
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s13, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, s[0:1]
-; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s2, v5
+; GCN-NEXT:    v_cmp_le_u32_e64 s[0:1], s12, v5
 ; GCN-NEXT:    v_cndmask_b32_e64 v5, 0, -1, s[0:1]
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], s3, v4
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[0:1], s13, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v4, v6, v5, s[0:1]
 ; GCN-NEXT:    v_add_i32_e64 v5, s[0:1], 2, v0
 ; GCN-NEXT:    v_addc_u32_e64 v6, s[0:1], 0, v1, s[0:1]
@@ -110,19 +111,19 @@
 ; GCN-NEXT:    v_addc_u32_e64 v8, s[0:1], 0, v1, s[0:1]
 ; GCN-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, v4
 ; GCN-NEXT:    v_cndmask_b32_e64 v4, v8, v6, s[0:1]
-; GCN-NEXT:    v_mov_b32_e32 v6, s11
+; GCN-NEXT:    v_mov_b32_e32 v6, s7
 ; GCN-NEXT:    v_subb_u32_e32 v2, vcc, v6, v2, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s3, v2
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s13, v2
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, vcc
-; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s2, v3
+; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s12, v3
 ; GCN-NEXT:    v_cndmask_b32_e64 v3, 0, -1, vcc
-; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s3, v2
+; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, s13, v2
 ; GCN-NEXT:    v_cndmask_b32_e32 v2, v6, v3, vcc
 ; GCN-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v7, v5, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v4, vcc
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
-; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[8:11], 0
 ; GCN-NEXT:    s_endpgm
 ;
 ; GCN-IR-LABEL: s_test_udiv_i64:
@@ -241,23 +242,23 @@
 ; GCN-NEXT:    v_mac_f32_e32 v4, 0xcf800000, v5
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v4
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v5
-; GCN-NEXT:    v_mul_hi_u32 v8, v6, v4
-; GCN-NEXT:    v_mul_lo_u32 v9, v6, v5
-; GCN-NEXT:    v_mul_lo_u32 v10, v7, v4
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
-; GCN-NEXT:    v_mul_lo_u32 v9, v6, v4
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
+; GCN-NEXT:    v_mul_hi_u32 v9, v6, v4
+; GCN-NEXT:    v_mul_lo_u32 v8, v6, v5
+; GCN-NEXT:    v_mul_lo_u32 v11, v7, v4
+; GCN-NEXT:    v_mul_lo_u32 v10, v6, v4
+; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
+; GCN-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
+; GCN-NEXT:    v_mul_hi_u32 v9, v4, v10
 ; GCN-NEXT:    v_mul_lo_u32 v11, v4, v8
-; GCN-NEXT:    v_mul_hi_u32 v10, v4, v8
-; GCN-NEXT:    v_mul_hi_u32 v12, v4, v9
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v8
 ; GCN-NEXT:    v_mul_hi_u32 v15, v5, v8
 ; GCN-NEXT:    v_mul_lo_u32 v8, v5, v8
-; GCN-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
-; GCN-NEXT:    v_mul_lo_u32 v12, v5, v9
-; GCN-NEXT:    v_mul_hi_u32 v9, v5, v9
-; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v14, v10, vcc
-; GCN-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v10, v9, vcc
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
+; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v14, v12, vcc
+; GCN-NEXT:    v_mul_lo_u32 v12, v5, v10
+; GCN-NEXT:    v_mul_hi_u32 v10, v5, v10
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v12, v9
+; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v11, v10, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v15, v13, vcc
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
 ; GCN-NEXT:    v_add_i32_e64 v4, s[4:5], v4, v8
@@ -269,17 +270,17 @@
 ; GCN-NEXT:    v_mul_lo_u32 v6, v6, v4
 ; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
 ; GCN-NEXT:    v_add_i32_e32 v7, vcc, v10, v7
-; GCN-NEXT:    v_mul_lo_u32 v12, v4, v7
-; GCN-NEXT:    v_mul_hi_u32 v15, v4, v6
-; GCN-NEXT:    v_mul_hi_u32 v16, v4, v7
-; GCN-NEXT:    v_mul_hi_u32 v11, v8, v6
+; GCN-NEXT:    v_mul_lo_u32 v11, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v6
+; GCN-NEXT:    v_mul_hi_u32 v15, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v16, v8, v6
 ; GCN-NEXT:    v_mul_lo_u32 v6, v8, v6
-; GCN-NEXT:    v_add_i32_e32 v12, vcc, v15, v12
+; GCN-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
 ; GCN-NEXT:    v_mul_hi_u32 v10, v8, v7
-; GCN-NEXT:    v_addc_u32_e32 v15, vcc, v14, v16, vcc
+; GCN-NEXT:    v_addc_u32_e32 v12, vcc, v14, v15, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v7, v8, v7
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v12
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v15, v11, vcc
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v11
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v12, v16, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v10, v13, vcc
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
 ; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v14, v8, vcc
@@ -304,12 +305,12 @@
 ; GCN-NEXT:    v_mul_lo_u32 v6, v2, v5
 ; GCN-NEXT:    v_mul_hi_u32 v7, v2, v4
 ; GCN-NEXT:    v_mul_lo_u32 v8, v3, v4
+; GCN-NEXT:    v_mul_lo_u32 v9, v2, v4
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
-; GCN-NEXT:    v_mul_lo_u32 v7, v2, v4
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v8
-; GCN-NEXT:    v_sub_i32_e32 v8, vcc, v1, v6
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v7
-; GCN-NEXT:    v_subb_u32_e64 v7, s[4:5], v8, v3, vcc
+; GCN-NEXT:    v_sub_i32_e32 v7, vcc, v1, v6
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, v0, v9
+; GCN-NEXT:    v_subb_u32_e64 v7, s[4:5], v7, v3, vcc
 ; GCN-NEXT:    v_sub_i32_e64 v8, s[4:5], v0, v2
 ; GCN-NEXT:    v_subbrev_u32_e64 v7, s[4:5], 0, v7, s[4:5]
 ; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v7, v3
@@ -434,18 +435,17 @@
 define amdgpu_kernel void @s_test_udiv24_64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
 ; GCN-LABEL: s_test_udiv24_64:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-NEXT:    s_load_dword s0, s[0:1], 0xe
-; GCN-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-NEXT:    s_mov_b32 s2, -1
+; GCN-NEXT:    s_load_dword s2, s[0:1], 0xe
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_mov_b32 s1, s5
-; GCN-NEXT:    s_lshr_b32 s0, s0, 8
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s0
-; GCN-NEXT:    s_lshr_b32 s0, s7, 8
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s0
-; GCN-NEXT:    s_mov_b32 s0, s4
+; GCN-NEXT:    s_lshr_b32 s2, s2, 8
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s2
+; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_lshr_b32 s2, s3, 8
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s2
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
+; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v2
@@ -459,18 +459,17 @@
 ;
 ; GCN-IR-LABEL: s_test_udiv24_64:
 ; GCN-IR:       ; %bb.0:
-; GCN-IR-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-IR-NEXT:    s_load_dword s0, s[0:1], 0xe
-; GCN-IR-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-IR-NEXT:    s_mov_b32 s2, -1
+; GCN-IR-NEXT:    s_load_dword s2, s[0:1], 0xe
 ; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-IR-NEXT:    s_mov_b32 s1, s5
-; GCN-IR-NEXT:    s_lshr_b32 s0, s0, 8
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s0
-; GCN-IR-NEXT:    s_lshr_b32 s0, s7, 8
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v1, s0
-; GCN-IR-NEXT:    s_mov_b32 s0, s4
+; GCN-IR-NEXT:    s_lshr_b32 s2, s2, 8
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s2
+; GCN-IR-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
 ; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v0
+; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-IR-NEXT:    s_lshr_b32 s2, s3, 8
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v1, s2
+; GCN-IR-NEXT:    s_mov_b32 s3, 0xf000
+; GCN-IR-NEXT:    s_mov_b32 s2, -1
 ; GCN-IR-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v3, v2
@@ -534,16 +533,14 @@
 ; GCN-LABEL: s_test_udiv32_i64:
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dword s2, s[0:1], 0xe
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s2
 ; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_mov_b32 s2, -1
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s3
-; GCN-NEXT:    s_mov_b32 s4, s0
-; GCN-NEXT:    s_mov_b32 s5, s1
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v2
@@ -551,22 +548,20 @@
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v3, vcc
-; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
 ; GCN-NEXT:    s_endpgm
 ;
 ; GCN-IR-LABEL: s_test_udiv32_i64:
 ; GCN-IR:       ; %bb.0:
 ; GCN-IR-NEXT:    s_load_dword s2, s[0:1], 0xe
-; GCN-IR-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-IR-NEXT:    s_mov_b32 s6, -1
 ; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s2
 ; GCN-IR-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
-; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v0
 ; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-IR-NEXT:    s_mov_b32 s2, -1
+; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v0
 ; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v1, s3
-; GCN-IR-NEXT:    s_mov_b32 s4, s0
-; GCN-IR-NEXT:    s_mov_b32 s5, s1
+; GCN-IR-NEXT:    s_mov_b32 s3, 0xf000
 ; GCN-IR-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v3, v2
@@ -574,7 +569,7 @@
 ; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
 ; GCN-IR-NEXT:    v_mov_b32_e32 v1, 0
 ; GCN-IR-NEXT:    v_addc_u32_e32 v0, vcc, 0, v3, vcc
-; GCN-IR-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GCN-IR-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
 ; GCN-IR-NEXT:    s_endpgm
   %1 = lshr i64 %x, 32
   %2 = lshr i64 %y, 32
@@ -586,18 +581,17 @@
 define amdgpu_kernel void @s_test_udiv31_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
 ; GCN-LABEL: s_test_udiv31_i64:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-NEXT:    s_load_dword s0, s[0:1], 0xe
-; GCN-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-NEXT:    s_mov_b32 s2, -1
+; GCN-NEXT:    s_load_dword s2, s[0:1], 0xe
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_mov_b32 s1, s5
-; GCN-NEXT:    s_lshr_b32 s0, s0, 1
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s0
-; GCN-NEXT:    s_lshr_b32 s0, s7, 1
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s0
-; GCN-NEXT:    s_mov_b32 s0, s4
+; GCN-NEXT:    s_lshr_b32 s2, s2, 1
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s2
+; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_lshr_b32 s2, s3, 1
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s2
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
+; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v2
@@ -611,18 +605,17 @@
 ;
 ; GCN-IR-LABEL: s_test_udiv31_i64:
 ; GCN-IR:       ; %bb.0:
-; GCN-IR-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-IR-NEXT:    s_load_dword s0, s[0:1], 0xe
-; GCN-IR-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-IR-NEXT:    s_mov_b32 s2, -1
+; GCN-IR-NEXT:    s_load_dword s2, s[0:1], 0xe
 ; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-IR-NEXT:    s_mov_b32 s1, s5
-; GCN-IR-NEXT:    s_lshr_b32 s0, s0, 1
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s0
-; GCN-IR-NEXT:    s_lshr_b32 s0, s7, 1
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v1, s0
-; GCN-IR-NEXT:    s_mov_b32 s0, s4
+; GCN-IR-NEXT:    s_lshr_b32 s2, s2, 1
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s2
+; GCN-IR-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
 ; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v0
+; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-IR-NEXT:    s_lshr_b32 s2, s3, 1
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v1, s2
+; GCN-IR-NEXT:    s_mov_b32 s3, 0xf000
+; GCN-IR-NEXT:    s_mov_b32 s2, -1
 ; GCN-IR-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v3, v2
@@ -643,18 +636,17 @@
 define amdgpu_kernel void @s_test_udiv23_i64(i64 addrspace(1)* %out, i64 %x, i64 %y) {
 ; GCN-LABEL: s_test_udiv23_i64:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-NEXT:    s_load_dword s0, s[0:1], 0xe
-; GCN-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-NEXT:    s_mov_b32 s2, -1
+; GCN-NEXT:    s_load_dword s2, s[0:1], 0xe
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_mov_b32 s1, s5
-; GCN-NEXT:    s_lshr_b32 s0, s0, 9
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s0
-; GCN-NEXT:    s_lshr_b32 s0, s7, 9
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s0
-; GCN-NEXT:    s_mov_b32 s0, s4
+; GCN-NEXT:    s_lshr_b32 s2, s2, 9
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s2
+; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_lshr_b32 s2, s3, 9
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s2
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
+; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v2
@@ -668,18 +660,17 @@
 ;
 ; GCN-IR-LABEL: s_test_udiv23_i64:
 ; GCN-IR:       ; %bb.0:
-; GCN-IR-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-IR-NEXT:    s_load_dword s0, s[0:1], 0xe
-; GCN-IR-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-IR-NEXT:    s_mov_b32 s2, -1
+; GCN-IR-NEXT:    s_load_dword s2, s[0:1], 0xe
 ; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-IR-NEXT:    s_mov_b32 s1, s5
-; GCN-IR-NEXT:    s_lshr_b32 s0, s0, 9
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s0
-; GCN-IR-NEXT:    s_lshr_b32 s0, s7, 9
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v1, s0
-; GCN-IR-NEXT:    s_mov_b32 s0, s4
+; GCN-IR-NEXT:    s_lshr_b32 s2, s2, 9
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s2
+; GCN-IR-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
 ; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v0
+; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-IR-NEXT:    s_lshr_b32 s2, s3, 9
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v1, s2
+; GCN-IR-NEXT:    s_mov_b32 s3, 0xf000
+; GCN-IR-NEXT:    s_mov_b32 s2, -1
 ; GCN-IR-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v3, v2
@@ -725,28 +716,27 @@
 ; GCN-NEXT:    v_mul_f32_e32 v2, 0x2f800000, v1
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
 ; GCN-NEXT:    v_mac_f32_e32 v1, 0xcf800000, v2
-; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    s_subb_u32 s9, 0, s3
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    s_subb_u32 s4, 0, s3
 ; GCN-NEXT:    v_mov_b32_e32 v8, 0
-; GCN-NEXT:    v_mul_lo_u32 v3, s8, v2
-; GCN-NEXT:    v_mul_hi_u32 v4, s8, v1
-; GCN-NEXT:    v_mul_lo_u32 v5, s9, v1
-; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
-; GCN-NEXT:    v_mul_lo_u32 v4, s8, v1
+; GCN-NEXT:    v_mul_hi_u32 v3, s8, v1
+; GCN-NEXT:    v_mul_lo_u32 v4, s8, v2
+; GCN-NEXT:    v_mul_lo_u32 v5, s4, v1
+; GCN-NEXT:    v_mul_lo_u32 v6, s8, v1
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v4
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
-; GCN-NEXT:    v_mul_lo_u32 v6, v1, v3
-; GCN-NEXT:    v_mul_hi_u32 v5, v1, v3
-; GCN-NEXT:    v_mul_hi_u32 v7, v1, v4
+; GCN-NEXT:    v_mul_lo_u32 v4, v1, v3
+; GCN-NEXT:    v_mul_hi_u32 v5, v1, v6
+; GCN-NEXT:    v_mul_hi_u32 v7, v1, v3
 ; GCN-NEXT:    v_mul_hi_u32 v10, v2, v3
 ; GCN-NEXT:    v_mul_lo_u32 v3, v2, v3
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
-; GCN-NEXT:    v_mul_lo_u32 v7, v2, v4
-; GCN-NEXT:    v_mul_hi_u32 v4, v2, v4
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v5, vcc
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v5, v4, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v7, vcc
+; GCN-NEXT:    v_mul_lo_u32 v7, v2, v6
+; GCN-NEXT:    v_mul_hi_u32 v6, v2, v6
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v7, v4
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v5, v6, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v10, v8, vcc
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
 ; GCN-NEXT:    v_add_i32_e64 v1, s[2:3], v1, v3
@@ -754,24 +744,25 @@
 ; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v2, v4, s[2:3]
 ; GCN-NEXT:    v_mul_lo_u32 v5, s8, v3
 ; GCN-NEXT:    v_mul_hi_u32 v6, s8, v1
-; GCN-NEXT:    v_mul_lo_u32 v7, s9, v1
+; GCN-NEXT:    v_mul_lo_u32 v7, s4, v1
+; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
 ; GCN-NEXT:    v_mul_lo_u32 v6, s8, v1
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
-; GCN-NEXT:    v_mul_lo_u32 v11, v1, v5
-; GCN-NEXT:    v_mul_hi_u32 v13, v1, v5
-; GCN-NEXT:    v_mul_hi_u32 v12, v1, v6
-; GCN-NEXT:    v_mul_hi_u32 v10, v3, v6
+; GCN-NEXT:    v_mul_lo_u32 v10, v1, v5
+; GCN-NEXT:    v_mul_hi_u32 v12, v1, v5
+; GCN-NEXT:    v_mul_hi_u32 v11, v1, v6
+; GCN-NEXT:    v_mul_hi_u32 v13, v3, v6
 ; GCN-NEXT:    v_mul_lo_u32 v6, v3, v6
 ; GCN-NEXT:    v_mul_hi_u32 v7, v3, v5
-; GCN-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
-; GCN-NEXT:    v_addc_u32_e32 v12, vcc, v9, v13, vcc
+; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
+; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v9, v12, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v3, v3, v5
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v11
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v12, v10, vcc
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v8, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v6, v3
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v5, vcc
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v10
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v11, v13, vcc
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v7, v8, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v6, vcc
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
 ; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v5, s[2:3]
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
@@ -941,7 +932,7 @@
 ; GCN-LABEL: s_test_udiv_k_num_i64:
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-NEXT:    v_mov_b32_e32 v2, 0
+; GCN-NEXT:    v_mov_b32_e32 v3, 0
 ; GCN-NEXT:    s_mov_b32 s11, 0xf000
 ; GCN-NEXT:    s_mov_b32 s10, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
@@ -955,13 +946,13 @@
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
 ; GCN-NEXT:    s_mov_b32 s9, s5
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
-; GCN-NEXT:    v_mul_f32_e32 v3, 0x2f800000, v0
-; GCN-NEXT:    v_trunc_f32_e32 v3, v3
-; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v3
+; GCN-NEXT:    v_mul_f32_e32 v2, 0x2f800000, v0
+; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
 ; GCN-NEXT:    v_mul_hi_u32 v5, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, s2, v3
+; GCN-NEXT:    v_mul_lo_u32 v4, s2, v2
 ; GCN-NEXT:    v_mul_lo_u32 v7, s3, v0
 ; GCN-NEXT:    v_mul_lo_u32 v6, s2, v0
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
@@ -969,49 +960,49 @@
 ; GCN-NEXT:    v_mul_hi_u32 v5, v0, v6
 ; GCN-NEXT:    v_mul_lo_u32 v7, v0, v4
 ; GCN-NEXT:    v_mul_hi_u32 v9, v0, v4
-; GCN-NEXT:    v_mul_lo_u32 v8, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v6, v3, v6
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, v6
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
-; GCN-NEXT:    v_mul_hi_u32 v10, v3, v4
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v2, v9, vcc
-; GCN-NEXT:    v_mul_lo_u32 v4, v3, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v6, vcc
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v4
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v3, v9, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v8, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v1, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
 ; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v2, v6, vcc
-; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v6, s2, v4
-; GCN-NEXT:    v_mul_hi_u32 v7, s2, v0
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v2, v5, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v6, s2, v0
+; GCN-NEXT:    v_mul_lo_u32 v7, s2, v4
 ; GCN-NEXT:    v_mul_lo_u32 v8, s3, v0
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
-; GCN-NEXT:    v_mul_lo_u32 v7, s2, v0
+; GCN-NEXT:    v_mul_lo_u32 v9, s2, v0
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v4, v7
-; GCN-NEXT:    v_mul_lo_u32 v7, v4, v7
-; GCN-NEXT:    v_mul_hi_u32 v8, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v2, v12, vcc
+; GCN-NEXT:    v_mul_lo_u32 v8, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v9
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v9
+; GCN-NEXT:    v_mul_lo_u32 v9, v4, v9
+; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
+; GCN-NEXT:    v_mul_hi_u32 v7, v4, v6
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v3, v11, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v4, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v7, v4
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v2, v6, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
-; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v9, v8
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v7, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v3, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v6, s[0:1]
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
-; GCN-NEXT:    v_mul_lo_u32 v4, v3, 24
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v2, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, 24
 ; GCN-NEXT:    v_mul_hi_u32 v0, v0, 24
-; GCN-NEXT:    v_mul_hi_u32 v3, v3, 24
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, 24
 ; GCN-NEXT:    v_mov_b32_e32 v5, s7
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v2, v3, vcc
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v2, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, s6, v1
 ; GCN-NEXT:    v_mul_hi_u32 v3, s6, v0
@@ -1152,7 +1143,7 @@
 ; GCN-NEXT:    v_mov_b32_e32 v12, 0
 ; GCN-NEXT:    v_mac_f32_e32 v2, 0x4f800000, v3
 ; GCN-NEXT:    v_rcp_f32_e32 v2, v2
-; GCN-NEXT:    v_mov_b32_e32 v11, 0
+; GCN-NEXT:    v_mov_b32_e32 v10, 0
 ; GCN-NEXT:    v_mul_f32_e32 v2, 0x5f7ffffc, v2
 ; GCN-NEXT:    v_mul_f32_e32 v3, 0x2f800000, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v3, v3
@@ -1161,22 +1152,22 @@
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
 ; GCN-NEXT:    v_mul_hi_u32 v7, v4, v2
 ; GCN-NEXT:    v_mul_lo_u32 v6, v4, v3
-; GCN-NEXT:    v_mul_lo_u32 v8, v5, v2
-; GCN-NEXT:    v_mul_lo_u32 v9, v4, v2
+; GCN-NEXT:    v_mul_lo_u32 v9, v5, v2
+; GCN-NEXT:    v_mul_lo_u32 v8, v4, v2
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v8
-; GCN-NEXT:    v_mul_lo_u32 v8, v2, v6
-; GCN-NEXT:    v_mul_hi_u32 v10, v2, v9
-; GCN-NEXT:    v_mul_hi_u32 v7, v2, v6
-; GCN-NEXT:    v_mul_hi_u32 v13, v3, v6
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v9
+; GCN-NEXT:    v_mul_hi_u32 v7, v2, v8
+; GCN-NEXT:    v_mul_lo_u32 v9, v2, v6
+; GCN-NEXT:    v_mul_hi_u32 v11, v2, v6
+; GCN-NEXT:    v_mul_lo_u32 v13, v3, v8
+; GCN-NEXT:    v_mul_hi_u32 v8, v3, v8
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v12, v11, vcc
+; GCN-NEXT:    v_mul_hi_u32 v11, v3, v6
 ; GCN-NEXT:    v_mul_lo_u32 v6, v3, v6
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
-; GCN-NEXT:    v_mul_lo_u32 v10, v3, v9
-; GCN-NEXT:    v_mul_hi_u32 v9, v3, v9
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v12, v7, vcc
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v7, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v13, v11, vcc
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v13, v7
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v9, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v11, v10, vcc
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
 ; GCN-NEXT:    v_add_i32_e64 v2, s[4:5], v2, v6
 ; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v12, v8, vcc
@@ -1187,18 +1178,18 @@
 ; GCN-NEXT:    v_mul_lo_u32 v4, v4, v2
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_mul_lo_u32 v10, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v13, v2, v4
-; GCN-NEXT:    v_mul_hi_u32 v14, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v9, v6, v4
+; GCN-NEXT:    v_mul_lo_u32 v9, v2, v5
+; GCN-NEXT:    v_mul_hi_u32 v11, v2, v4
+; GCN-NEXT:    v_mul_hi_u32 v13, v2, v5
+; GCN-NEXT:    v_mul_hi_u32 v14, v6, v4
 ; GCN-NEXT:    v_mul_lo_u32 v4, v6, v4
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v13, v10
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
 ; GCN-NEXT:    v_mul_hi_u32 v8, v6, v5
-; GCN-NEXT:    v_addc_u32_e32 v13, vcc, v12, v14, vcc
+; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v12, v13, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v5, v6, v5
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v10
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v13, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v11, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v9
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v11, v14, vcc
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v10, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
 ; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v12, v6, vcc
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v7
@@ -1208,36 +1199,36 @@
 ; GCN-NEXT:    v_lshrrev_b32_e32 v2, 17, v2
 ; GCN-NEXT:    v_mul_lo_u32 v3, v1, v2
 ; GCN-NEXT:    v_mul_hi_u32 v4, v0, v2
+; GCN-NEXT:    v_mul_lo_u32 v5, v0, v2
 ; GCN-NEXT:    s_mov_b32 s4, 0x8000
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
-; GCN-NEXT:    v_mul_lo_u32 v4, v0, v2
-; GCN-NEXT:    v_sub_i32_e32 v5, vcc, 0, v3
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s4, v4
-; GCN-NEXT:    v_subb_u32_e64 v5, s[4:5], v5, v1, vcc
-; GCN-NEXT:    v_sub_i32_e64 v6, s[4:5], v4, v0
-; GCN-NEXT:    v_subbrev_u32_e64 v5, s[4:5], 0, v5, s[4:5]
-; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v5, v1
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, 0, v3
+; GCN-NEXT:    v_sub_i32_e32 v5, vcc, s4, v5
+; GCN-NEXT:    v_subb_u32_e64 v4, s[4:5], v4, v1, vcc
+; GCN-NEXT:    v_sub_i32_e64 v6, s[4:5], v5, v0
+; GCN-NEXT:    v_subbrev_u32_e64 v4, s[4:5], 0, v4, s[4:5]
+; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v4, v1
 ; GCN-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
 ; GCN-NEXT:    v_cmp_ge_u32_e64 s[4:5], v6, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, s[4:5]
-; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], v5, v1
-; GCN-NEXT:    v_cndmask_b32_e64 v5, v7, v6, s[4:5]
+; GCN-NEXT:    v_cmp_eq_u32_e64 s[4:5], v4, v1
+; GCN-NEXT:    v_cndmask_b32_e64 v4, v7, v6, s[4:5]
 ; GCN-NEXT:    v_add_i32_e64 v6, s[4:5], 2, v2
 ; GCN-NEXT:    v_addc_u32_e64 v7, s[4:5], 0, v12, s[4:5]
 ; GCN-NEXT:    v_add_i32_e64 v8, s[4:5], 1, v2
 ; GCN-NEXT:    v_subb_u32_e32 v3, vcc, 0, v3, vcc
 ; GCN-NEXT:    v_addc_u32_e64 v9, s[4:5], 0, v12, s[4:5]
-; GCN-NEXT:    v_cmp_ne_u32_e64 s[4:5], 0, v5
+; GCN-NEXT:    v_cmp_ne_u32_e64 s[4:5], 0, v4
 ; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v1
-; GCN-NEXT:    v_cndmask_b32_e64 v5, v8, v6, s[4:5]
+; GCN-NEXT:    v_cndmask_b32_e64 v4, v8, v6, s[4:5]
 ; GCN-NEXT:    v_cndmask_b32_e64 v6, 0, -1, vcc
-; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v4, v0
+; GCN-NEXT:    v_cmp_ge_u32_e32 vcc, v5, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
 ; GCN-NEXT:    v_cmp_eq_u32_e32 vcc, v3, v1
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, v6, v0, vcc
 ; GCN-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
 ; GCN-NEXT:    v_cndmask_b32_e64 v1, v9, v7, s[4:5]
-; GCN-NEXT:    v_cndmask_b32_e32 v0, v2, v5, vcc
+; GCN-NEXT:    v_cndmask_b32_e32 v0, v2, v4, vcc
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
 ; GCN-NEXT:    s_setpc_b64 s[30:31]
 ;
@@ -1427,85 +1418,85 @@
 ; GCN-NEXT:    v_mov_b32_e32 v0, 0x4f800000
 ; GCN-NEXT:    v_madak_f32 v0, 0, v0, 0x41c00000
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
-; GCN-NEXT:    s_movk_i32 s2, 0xffe8
-; GCN-NEXT:    v_mov_b32_e32 v8, 0
-; GCN-NEXT:    v_mov_b32_e32 v7, 0
+; GCN-NEXT:    s_movk_i32 s4, 0xffe8
+; GCN-NEXT:    v_mov_b32_e32 v6, 0
+; GCN-NEXT:    v_mov_b32_e32 v2, 0
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
 ; GCN-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    v_mul_hi_u32 v2, v0, s2
-; GCN-NEXT:    v_mul_lo_u32 v3, v1, s2
-; GCN-NEXT:    v_mul_lo_u32 v4, v0, s2
-; GCN-NEXT:    s_mov_b32 s6, -1
-; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v0, v2
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_mul_lo_u32 v5, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v6, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v3, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v9, v1, v2
-; GCN-NEXT:    v_mul_lo_u32 v2, v1, v2
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_mul_lo_u32 v6, v1, v4
-; GCN-NEXT:    v_mul_hi_u32 v4, v1, v4
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v3, vcc
-; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_mov_b32 s4, s8
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v3, v4, vcc
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v9, v7, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v2
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v4, vcc
-; GCN-NEXT:    v_mul_hi_u32 v4, v0, s2
-; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v5, v2, s2
-; GCN-NEXT:    v_mul_lo_u32 v6, v0, s2
-; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v0, v4
-; GCN-NEXT:    s_mov_b32 s5, s9
+; GCN-NEXT:    s_mov_b32 s11, 0xf000
+; GCN-NEXT:    s_mov_b32 s10, -1
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, s4
+; GCN-NEXT:    v_mul_lo_u32 v5, v1, s4
+; GCN-NEXT:    v_mul_lo_u32 v4, v0, s4
+; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v0, v3
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
+; GCN-NEXT:    v_mul_hi_u32 v7, v0, v4
+; GCN-NEXT:    v_mul_lo_u32 v5, v0, v3
+; GCN-NEXT:    v_mul_hi_u32 v8, v0, v3
+; GCN-NEXT:    v_mul_hi_u32 v9, v1, v4
+; GCN-NEXT:    v_mul_lo_u32 v4, v1, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v6, v8, vcc
+; GCN-NEXT:    v_mul_hi_u32 v8, v1, v3
+; GCN-NEXT:    v_mul_lo_u32 v3, v1, v3
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
-; GCN-NEXT:    v_mul_lo_u32 v5, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v9, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v10, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v11, v2, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v9, v5
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v8, v10, vcc
-; GCN-NEXT:    v_mul_lo_u32 v10, v2, v6
-; GCN-NEXT:    v_mul_hi_u32 v6, v2, v6
-; GCN-NEXT:    v_mul_lo_u32 v2, v2, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v10, v5
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v6, vcc
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v11, v7, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v8, v4, vcc
-; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v4, s[0:1]
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v7, v9, vcc
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v8, v2, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
+; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v3
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v6, v5, vcc
+; GCN-NEXT:    v_mul_hi_u32 v5, v0, s4
+; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v1, v4, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v7, v3, s4
+; GCN-NEXT:    v_mul_lo_u32 v8, v0, s4
+; GCN-NEXT:    v_subrev_i32_e32 v5, vcc, v0, v5
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
+; GCN-NEXT:    v_mul_lo_u32 v7, v0, v5
+; GCN-NEXT:    v_mul_hi_u32 v9, v0, v8
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v5
+; GCN-NEXT:    v_mul_hi_u32 v11, v3, v5
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    s_mov_b32 s8, s4
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v9, v7
+; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v6, v10, vcc
+; GCN-NEXT:    v_mul_lo_u32 v10, v3, v8
+; GCN-NEXT:    v_mul_hi_u32 v8, v3, v8
+; GCN-NEXT:    v_mul_lo_u32 v3, v3, v5
+; GCN-NEXT:    s_mov_b32 s9, s5
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v10, v7
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v2, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v4
+; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v5, s[2:3]
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, s10, v1
-; GCN-NEXT:    v_mul_hi_u32 v3, s10, v0
-; GCN-NEXT:    v_mul_hi_u32 v4, s10, v1
-; GCN-NEXT:    v_mul_hi_u32 v5, s11, v1
-; GCN-NEXT:    v_mul_lo_u32 v1, s11, v1
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v4, vcc
-; GCN-NEXT:    v_mul_lo_u32 v4, s11, v0
-; GCN-NEXT:    v_mul_hi_u32 v0, s11, v0
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v0, vcc
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v5, v7, vcc
+; GCN-NEXT:    v_mul_lo_u32 v3, s6, v1
+; GCN-NEXT:    v_mul_hi_u32 v4, s6, v0
+; GCN-NEXT:    v_mul_hi_u32 v5, s6, v1
+; GCN-NEXT:    v_mul_hi_u32 v7, s7, v1
+; GCN-NEXT:    v_mul_lo_u32 v1, s7, v1
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v6, v5, vcc
+; GCN-NEXT:    v_mul_lo_u32 v5, s7, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s7, v0
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v4, v0, vcc
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v7, v2, vcc
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v8, v2, vcc
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v6, v2, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v2, v1, 24
 ; GCN-NEXT:    v_mul_hi_u32 v3, v0, 24
 ; GCN-NEXT:    v_mul_lo_u32 v4, v0, 24
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s10, v4
-; GCN-NEXT:    v_mov_b32_e32 v3, s11
+; GCN-NEXT:    v_sub_i32_e32 v4, vcc, s6, v4
+; GCN-NEXT:    v_mov_b32_e32 v3, s7
 ; GCN-NEXT:    v_subb_u32_e32 v2, vcc, v3, v2, vcc
 ; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, 24, v4
 ; GCN-NEXT:    v_subbrev_u32_e32 v5, vcc, 0, v2, vcc
@@ -1527,7 +1518,7 @@
 ; GCN-NEXT:    v_cndmask_b32_e32 v2, v7, v5, vcc
 ; GCN-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[0:1]
-; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[8:11], 0
 ; GCN-NEXT:    s_endpgm
 ;
 ; GCN-IR-LABEL: s_test_udiv_k_den_i64:
@@ -1630,21 +1621,21 @@
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
 ; GCN-NEXT:    v_mul_hi_u32 v4, v2, s6
-; GCN-NEXT:    v_mul_lo_u32 v5, v3, s6
-; GCN-NEXT:    v_mul_lo_u32 v6, v2, s6
+; GCN-NEXT:    v_mul_lo_u32 v6, v3, s6
+; GCN-NEXT:    v_mul_lo_u32 v5, v2, s6
 ; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v2, v4
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_mul_lo_u32 v7, v2, v4
-; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
-; GCN-NEXT:    v_mul_hi_u32 v5, v2, v4
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_mul_hi_u32 v7, v2, v5
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, v4
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v4
 ; GCN-NEXT:    v_mul_hi_u32 v11, v3, v4
 ; GCN-NEXT:    v_mul_lo_u32 v4, v3, v4
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
-; GCN-NEXT:    v_mul_lo_u32 v8, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v6, v3, v6
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v10, v5, vcc
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v5, v6, vcc
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v10, v8, vcc
+; GCN-NEXT:    v_mul_lo_u32 v8, v3, v5
+; GCN-NEXT:    v_mul_hi_u32 v5, v3, v5
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v5, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v11, v9, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
 ; GCN-NEXT:    v_add_i32_e64 v2, s[4:5], v2, v4
@@ -1664,11 +1655,11 @@
 ; GCN-NEXT:    v_mul_lo_u32 v12, v4, v8
 ; GCN-NEXT:    v_mul_hi_u32 v8, v4, v8
 ; GCN-NEXT:    v_mul_lo_u32 v4, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v12, v7
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v8, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v13, v9, vcc
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v7, v4
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v6, vcc
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v12, v7
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v11, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v13, v9, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v7, vcc
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
 ; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v3, v6, s[4:5]
 ; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
diff --git a/llvm/test/CodeGen/AMDGPU/urem64.ll b/llvm/test/CodeGen/AMDGPU/urem64.ll
--- a/llvm/test/CodeGen/AMDGPU/urem64.ll
+++ b/llvm/test/CodeGen/AMDGPU/urem64.ll
@@ -6,95 +6,96 @@
 ; GCN-LABEL: s_test_urem_i64:
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dwordx2 s[12:13], s[0:1], 0xd
-; GCN-NEXT:    v_mov_b32_e32 v2, 0
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s7, 0xf000
-; GCN-NEXT:    s_mov_b32 s6, -1
+; GCN-NEXT:    v_mov_b32_e32 v3, 0
+; GCN-NEXT:    s_mov_b32 s11, 0xf000
+; GCN-NEXT:    s_mov_b32 s10, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s12
 ; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s13
-; GCN-NEXT:    s_sub_u32 s2, 0, s12
-; GCN-NEXT:    s_subb_u32 s3, 0, s13
-; GCN-NEXT:    s_mov_b32 s4, s8
+; GCN-NEXT:    s_sub_u32 s8, 0, s12
+; GCN-NEXT:    s_subb_u32 s4, 0, s13
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0x4f800000, v1
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
-; GCN-NEXT:    s_mov_b32 s5, s9
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
-; GCN-NEXT:    v_mul_f32_e32 v3, 0x2f800000, v0
-; GCN-NEXT:    v_trunc_f32_e32 v3, v3
-; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v3
+; GCN-NEXT:    v_mul_f32_e32 v2, 0x2f800000, v0
+; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
-; GCN-NEXT:    v_mul_hi_u32 v5, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, s2, v3
-; GCN-NEXT:    v_mul_lo_u32 v7, s3, v0
-; GCN-NEXT:    v_mul_lo_u32 v6, s2, v0
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, s8, v0
+; GCN-NEXT:    v_mul_lo_u32 v4, s8, v2
+; GCN-NEXT:    v_mul_lo_u32 v7, s4, v0
+; GCN-NEXT:    v_mul_lo_u32 v6, s8, v0
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
 ; GCN-NEXT:    v_mul_hi_u32 v5, v0, v6
 ; GCN-NEXT:    v_mul_lo_u32 v7, v0, v4
 ; GCN-NEXT:    v_mul_hi_u32 v9, v0, v4
-; GCN-NEXT:    v_mul_lo_u32 v8, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v6, v3, v6
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, v6
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v2, v9, vcc
-; GCN-NEXT:    v_mul_hi_u32 v9, v3, v4
-; GCN-NEXT:    v_mul_lo_u32 v4, v3, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v6, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v9, v1, vcc
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v4
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v3, v9, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v1, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v2, v6, vcc
-; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v6, s2, v4
-; GCN-NEXT:    v_mul_hi_u32 v7, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v8, s3, v0
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
-; GCN-NEXT:    v_mul_lo_u32 v7, s2, v0
+; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v4
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v2, v5, s[2:3]
+; GCN-NEXT:    v_mul_hi_u32 v6, s8, v0
+; GCN-NEXT:    v_mul_lo_u32 v7, s8, v4
+; GCN-NEXT:    v_mul_lo_u32 v8, s4, v0
+; GCN-NEXT:    v_mul_lo_u32 v9, s8, v0
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v4, v7
-; GCN-NEXT:    v_mul_lo_u32 v7, v4, v7
-; GCN-NEXT:    v_mul_hi_u32 v8, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v2, v12, vcc
+; GCN-NEXT:    v_mul_lo_u32 v8, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v9
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v9
+; GCN-NEXT:    v_mul_lo_u32 v9, v4, v9
+; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
+; GCN-NEXT:    v_mul_hi_u32 v7, v4, v6
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v3, v11, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v4, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v7, v4
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v2, v6, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
-; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v9, v8
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v7, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v3, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v6, s[2:3]
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
-; GCN-NEXT:    v_mul_lo_u32 v4, s10, v3
-; GCN-NEXT:    v_mul_hi_u32 v5, s10, v0
-; GCN-NEXT:    v_mul_hi_u32 v6, s10, v3
-; GCN-NEXT:    v_mul_hi_u32 v7, s11, v3
-; GCN-NEXT:    v_mul_lo_u32 v3, s11, v3
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v2, vcc
+; GCN-NEXT:    s_waitcnt lgkmcnt(0)
+; GCN-NEXT:    v_mul_lo_u32 v4, s6, v2
+; GCN-NEXT:    v_mul_hi_u32 v5, s6, v0
+; GCN-NEXT:    v_mul_hi_u32 v6, s6, v2
+; GCN-NEXT:    v_mul_hi_u32 v7, s7, v2
+; GCN-NEXT:    v_mul_lo_u32 v2, s7, v2
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v2, v6, vcc
-; GCN-NEXT:    v_mul_lo_u32 v6, s11, v0
-; GCN-NEXT:    v_mul_hi_u32 v0, s11, v0
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_mul_lo_u32 v6, s7, v0
+; GCN-NEXT:    v_mul_hi_u32 v0, s7, v0
+; GCN-NEXT:    s_mov_b32 s8, s4
+; GCN-NEXT:    s_mov_b32 s9, s5
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v5, v0, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v7, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v2, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v3, v1, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v1, s12, v1
 ; GCN-NEXT:    v_mul_hi_u32 v2, s12, v0
 ; GCN-NEXT:    v_mul_lo_u32 v3, s13, v0
 ; GCN-NEXT:    v_mul_lo_u32 v0, s12, v0
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
 ; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s11, v1
+; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s7, v1
 ; GCN-NEXT:    v_mov_b32_e32 v3, s13
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s10, v0
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s6, v0
 ; GCN-NEXT:    v_subb_u32_e64 v2, s[0:1], v2, v3, vcc
 ; GCN-NEXT:    v_subrev_i32_e64 v4, s[0:1], s12, v0
 ; GCN-NEXT:    v_subbrev_u32_e64 v5, s[2:3], 0, v2, s[0:1]
@@ -109,7 +110,7 @@
 ; GCN-NEXT:    v_subbrev_u32_e64 v2, s[0:1], 0, v2, s[0:1]
 ; GCN-NEXT:    v_cmp_ne_u32_e64 s[0:1], 0, v6
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v5, v2, s[0:1]
-; GCN-NEXT:    v_mov_b32_e32 v5, s11
+; GCN-NEXT:    v_mov_b32_e32 v5, s7
 ; GCN-NEXT:    v_subb_u32_e32 v1, vcc, v5, v1, vcc
 ; GCN-NEXT:    v_cmp_le_u32_e32 vcc, s13, v1
 ; GCN-NEXT:    v_cndmask_b32_e64 v5, 0, -1, vcc
@@ -121,7 +122,7 @@
 ; GCN-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc
 ; GCN-NEXT:    v_cndmask_b32_e64 v2, v4, v3, s[0:1]
 ; GCN-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
-; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
+; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[8:11], 0
 ; GCN-NEXT:    s_endpgm
 ;
 ; GCN-IR-LABEL: s_test_urem_i64:
@@ -251,23 +252,23 @@
 ; GCN-NEXT:    v_mac_f32_e32 v4, 0xcf800000, v5
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v4
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v5
-; GCN-NEXT:    v_mul_hi_u32 v8, v6, v4
-; GCN-NEXT:    v_mul_lo_u32 v9, v6, v5
-; GCN-NEXT:    v_mul_lo_u32 v10, v7, v4
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
-; GCN-NEXT:    v_mul_lo_u32 v9, v6, v4
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
+; GCN-NEXT:    v_mul_hi_u32 v9, v6, v4
+; GCN-NEXT:    v_mul_lo_u32 v8, v6, v5
+; GCN-NEXT:    v_mul_lo_u32 v11, v7, v4
+; GCN-NEXT:    v_mul_lo_u32 v10, v6, v4
+; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
+; GCN-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
+; GCN-NEXT:    v_mul_hi_u32 v9, v4, v10
 ; GCN-NEXT:    v_mul_lo_u32 v11, v4, v8
-; GCN-NEXT:    v_mul_hi_u32 v10, v4, v8
-; GCN-NEXT:    v_mul_hi_u32 v12, v4, v9
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v8
 ; GCN-NEXT:    v_mul_hi_u32 v15, v5, v8
 ; GCN-NEXT:    v_mul_lo_u32 v8, v5, v8
-; GCN-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
-; GCN-NEXT:    v_mul_lo_u32 v12, v5, v9
-; GCN-NEXT:    v_mul_hi_u32 v9, v5, v9
-; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v14, v10, vcc
-; GCN-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v10, v9, vcc
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
+; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v14, v12, vcc
+; GCN-NEXT:    v_mul_lo_u32 v12, v5, v10
+; GCN-NEXT:    v_mul_hi_u32 v10, v5, v10
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v12, v9
+; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v11, v10, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v15, v13, vcc
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
 ; GCN-NEXT:    v_add_i32_e64 v4, s[4:5], v4, v8
@@ -279,17 +280,17 @@
 ; GCN-NEXT:    v_mul_lo_u32 v6, v6, v4
 ; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
 ; GCN-NEXT:    v_add_i32_e32 v7, vcc, v10, v7
-; GCN-NEXT:    v_mul_lo_u32 v12, v4, v7
-; GCN-NEXT:    v_mul_hi_u32 v15, v4, v6
-; GCN-NEXT:    v_mul_hi_u32 v16, v4, v7
-; GCN-NEXT:    v_mul_hi_u32 v11, v8, v6
+; GCN-NEXT:    v_mul_lo_u32 v11, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v6
+; GCN-NEXT:    v_mul_hi_u32 v15, v4, v7
+; GCN-NEXT:    v_mul_hi_u32 v16, v8, v6
 ; GCN-NEXT:    v_mul_lo_u32 v6, v8, v6
-; GCN-NEXT:    v_add_i32_e32 v12, vcc, v15, v12
+; GCN-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
 ; GCN-NEXT:    v_mul_hi_u32 v10, v8, v7
-; GCN-NEXT:    v_addc_u32_e32 v15, vcc, v14, v16, vcc
+; GCN-NEXT:    v_addc_u32_e32 v12, vcc, v14, v15, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v7, v8, v7
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v12
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v15, v11, vcc
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v11
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v12, v16, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v10, v13, vcc
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
 ; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v14, v8, vcc
@@ -437,8 +438,8 @@
 ; GCN-IR-NEXT:    v_mul_hi_u32 v6, v2, v4
 ; GCN-IR-NEXT:    v_mul_lo_u32 v3, v3, v4
 ; GCN-IR-NEXT:    v_mul_lo_u32 v2, v2, v4
-; GCN-IR-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-IR-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
+; GCN-IR-NEXT:    v_add_i32_e32 v4, vcc, v6, v5
+; GCN-IR-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
 ; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, v0, v2
 ; GCN-IR-NEXT:    v_subb_u32_e32 v1, vcc, v1, v3, vcc
 ; GCN-IR-NEXT:    s_setpc_b64 s[30:31]
@@ -508,85 +509,85 @@
 define amdgpu_kernel void @s_test_urem31_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> %x, <2 x i64> %y) {
 ; GCN-LABEL: s_test_urem31_v2i64:
 ; GCN:       ; %bb.0:
+; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x11
 ; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0xd
-; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x11
+; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0xd
 ; GCN-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_lshr_b32 s2, s9, 1
+; GCN-NEXT:    s_lshr_b32 s8, s9, 1
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s8
 ; GCN-NEXT:    s_lshr_b32 s0, s1, 1
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s0
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s2
-; GCN-NEXT:    s_lshr_b32 s3, s3, 1
-; GCN-NEXT:    v_cvt_f32_u32_e32 v4, s3
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s0
+; GCN-NEXT:    s_lshr_b32 s2, s11, 1
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
-; GCN-NEXT:    s_lshr_b32 s1, s11, 1
-; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s1
+; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s2
+; GCN-NEXT:    s_lshr_b32 s1, s3, 1
+; GCN-NEXT:    v_cvt_f32_u32_e32 v5, s1
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v2
-; GCN-NEXT:    v_mad_f32 v1, -v2, v0, v1
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v4
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v0, v0, s0
-; GCN-NEXT:    v_mul_f32_e32 v2, v3, v2
-; GCN-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v2
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s2, v0
-; GCN-NEXT:    v_mad_f32 v2, -v2, v4, v3
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v4
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, v2, s3
+; GCN-NEXT:    v_mad_f32 v4, -v2, v0, v1
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v6, v3
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, v0
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
+; GCN-NEXT:    v_mul_f32_e32 v2, v5, v6
+; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v2
+; GCN-NEXT:    v_mad_f32 v2, -v2, v3, v5
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v3
+; GCN-NEXT:    v_mul_lo_u32 v0, v0, s8
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v4, vcc
+; GCN-NEXT:    v_mul_lo_u32 v2, v2, s2
+; GCN-NEXT:    v_mov_b32_e32 v3, v1
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
 ; GCN-NEXT:    s_brev_b32 s0, -2
-; GCN-NEXT:    v_and_b32_e32 v0, s0, v0
 ; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s1, v2
+; GCN-NEXT:    v_and_b32_e32 v0, s0, v0
 ; GCN-NEXT:    v_and_b32_e32 v2, s0, v2
-; GCN-NEXT:    v_mov_b32_e32 v3, v1
 ; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
 ; GCN-NEXT:    s_endpgm
 ;
 ; GCN-IR-LABEL: s_test_urem31_v2i64:
 ; GCN-IR:       ; %bb.0:
+; GCN-IR-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x11
 ; GCN-IR-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-IR-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0xd
-; GCN-IR-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x11
+; GCN-IR-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0xd
 ; GCN-IR-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-IR-NEXT:    s_mov_b32 s6, -1
 ; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-IR-NEXT:    s_lshr_b32 s2, s9, 1
+; GCN-IR-NEXT:    s_lshr_b32 s8, s9, 1
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s8
 ; GCN-IR-NEXT:    s_lshr_b32 s0, s1, 1
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s0
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v1, s2
-; GCN-IR-NEXT:    s_lshr_b32 s3, s3, 1
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v4, s3
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v1, s0
+; GCN-IR-NEXT:    s_lshr_b32 s2, s11, 1
 ; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v0
-; GCN-IR-NEXT:    s_lshr_b32 s1, s11, 1
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v3, s1
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v3, s2
+; GCN-IR-NEXT:    s_lshr_b32 s1, s3, 1
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v5, s1
 ; GCN-IR-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v5, v2
-; GCN-IR-NEXT:    v_mad_f32 v1, -v2, v0, v1
-; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v4
-; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
-; GCN-IR-NEXT:    v_addc_u32_e32 v0, vcc, 0, v5, vcc
-; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, s0
-; GCN-IR-NEXT:    v_mul_f32_e32 v2, v3, v2
-; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v5, v2
-; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, s2, v0
-; GCN-IR-NEXT:    v_mad_f32 v2, -v2, v4, v3
-; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v4
-; GCN-IR-NEXT:    v_addc_u32_e32 v2, vcc, 0, v5, vcc
-; GCN-IR-NEXT:    v_mul_lo_u32 v2, v2, s3
+; GCN-IR-NEXT:    v_mad_f32 v4, -v2, v0, v1
+; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v6, v3
+; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, v0
 ; GCN-IR-NEXT:    v_mov_b32_e32 v1, 0
+; GCN-IR-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
+; GCN-IR-NEXT:    v_mul_f32_e32 v2, v5, v6
+; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v4, v2
+; GCN-IR-NEXT:    v_mad_f32 v2, -v2, v3, v5
+; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v3
+; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, s8
+; GCN-IR-NEXT:    v_addc_u32_e32 v2, vcc, 0, v4, vcc
+; GCN-IR-NEXT:    v_mul_lo_u32 v2, v2, s2
+; GCN-IR-NEXT:    v_mov_b32_e32 v3, v1
+; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
 ; GCN-IR-NEXT:    s_brev_b32 s0, -2
-; GCN-IR-NEXT:    v_and_b32_e32 v0, s0, v0
 ; GCN-IR-NEXT:    v_sub_i32_e32 v2, vcc, s1, v2
+; GCN-IR-NEXT:    v_and_b32_e32 v0, s0, v0
 ; GCN-IR-NEXT:    v_and_b32_e32 v2, s0, v2
-; GCN-IR-NEXT:    v_mov_b32_e32 v3, v1
 ; GCN-IR-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
 ; GCN-IR-NEXT:    s_endpgm
   %1 = lshr <2 x i64> %x, <i64 33, i64 33>
@@ -658,85 +659,85 @@
 define amdgpu_kernel void @s_test_urem23_64_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> %x, <2 x i64> %y) {
 ; GCN-LABEL: s_test_urem23_64_v2i64:
 ; GCN:       ; %bb.0:
+; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x11
 ; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0xd
-; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x11
+; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0xd
 ; GCN-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-NEXT:    s_mov_b32 s6, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_lshr_b32 s2, s9, 1
+; GCN-NEXT:    s_lshr_b32 s8, s9, 1
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s8
 ; GCN-NEXT:    s_lshr_b32 s0, s1, 1
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s0
-; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s2
-; GCN-NEXT:    s_lshr_b32 s3, s3, 9
-; GCN-NEXT:    v_cvt_f32_u32_e32 v4, s3
+; GCN-NEXT:    v_cvt_f32_u32_e32 v1, s0
+; GCN-NEXT:    s_lshr_b32 s2, s11, 9
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v0
-; GCN-NEXT:    s_lshr_b32 s1, s11, 9
-; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s1
+; GCN-NEXT:    v_cvt_f32_u32_e32 v3, s2
+; GCN-NEXT:    s_lshr_b32 s1, s3, 9
+; GCN-NEXT:    v_cvt_f32_u32_e32 v5, s1
 ; GCN-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v2
-; GCN-NEXT:    v_mad_f32 v1, -v2, v0, v1
-; GCN-NEXT:    v_rcp_iflag_f32_e32 v2, v4
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v0, v0, s0
-; GCN-NEXT:    v_mul_f32_e32 v2, v3, v2
-; GCN-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-NEXT:    v_cvt_u32_f32_e32 v5, v2
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s2, v0
-; GCN-NEXT:    v_mad_f32 v2, -v2, v4, v3
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v4
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v5, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, v2, s3
+; GCN-NEXT:    v_mad_f32 v4, -v2, v0, v1
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-NEXT:    v_rcp_iflag_f32_e32 v6, v3
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, v0
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
+; GCN-NEXT:    v_mul_f32_e32 v2, v5, v6
+; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_cvt_u32_f32_e32 v4, v2
+; GCN-NEXT:    v_mad_f32 v2, -v2, v3, v5
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v3
+; GCN-NEXT:    v_mul_lo_u32 v0, v0, s8
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v4, vcc
+; GCN-NEXT:    v_mul_lo_u32 v2, v2, s2
+; GCN-NEXT:    v_mov_b32_e32 v3, v1
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
 ; GCN-NEXT:    s_brev_b32 s0, -2
-; GCN-NEXT:    v_and_b32_e32 v0, s0, v0
 ; GCN-NEXT:    v_sub_i32_e32 v2, vcc, s1, v2
+; GCN-NEXT:    v_and_b32_e32 v0, s0, v0
 ; GCN-NEXT:    v_and_b32_e32 v2, s0, v2
-; GCN-NEXT:    v_mov_b32_e32 v3, v1
 ; GCN-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
 ; GCN-NEXT:    s_endpgm
 ;
 ; GCN-IR-LABEL: s_test_urem23_64_v2i64:
 ; GCN-IR:       ; %bb.0:
+; GCN-IR-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0x11
 ; GCN-IR-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x9
-; GCN-IR-NEXT:    s_load_dwordx4 s[8:11], s[0:1], 0xd
-; GCN-IR-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x11
+; GCN-IR-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0xd
 ; GCN-IR-NEXT:    s_mov_b32 s7, 0xf000
 ; GCN-IR-NEXT:    s_mov_b32 s6, -1
 ; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-IR-NEXT:    s_lshr_b32 s2, s9, 1
+; GCN-IR-NEXT:    s_lshr_b32 s8, s9, 1
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s8
 ; GCN-IR-NEXT:    s_lshr_b32 s0, s1, 1
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s0
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v1, s2
-; GCN-IR-NEXT:    s_lshr_b32 s3, s3, 9
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v4, s3
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v1, s0
+; GCN-IR-NEXT:    s_lshr_b32 s2, s11, 9
 ; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v0
-; GCN-IR-NEXT:    s_lshr_b32 s1, s11, 9
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v3, s1
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v3, s2
+; GCN-IR-NEXT:    s_lshr_b32 s1, s3, 9
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v5, s1
 ; GCN-IR-NEXT:    v_mul_f32_e32 v2, v1, v2
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v5, v2
-; GCN-IR-NEXT:    v_mad_f32 v1, -v2, v0, v1
-; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v2, v4
-; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
-; GCN-IR-NEXT:    v_addc_u32_e32 v0, vcc, 0, v5, vcc
-; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, s0
-; GCN-IR-NEXT:    v_mul_f32_e32 v2, v3, v2
-; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
-; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v5, v2
-; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, s2, v0
-; GCN-IR-NEXT:    v_mad_f32 v2, -v2, v4, v3
-; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v4
-; GCN-IR-NEXT:    v_addc_u32_e32 v2, vcc, 0, v5, vcc
-; GCN-IR-NEXT:    v_mul_lo_u32 v2, v2, s3
+; GCN-IR-NEXT:    v_mad_f32 v4, -v2, v0, v1
+; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v2, v2
+; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v6, v3
+; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v4|, v0
 ; GCN-IR-NEXT:    v_mov_b32_e32 v1, 0
+; GCN-IR-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
+; GCN-IR-NEXT:    v_mul_f32_e32 v2, v5, v6
+; GCN-IR-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v4, v2
+; GCN-IR-NEXT:    v_mad_f32 v2, -v2, v3, v5
+; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v2|, v3
+; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, s8
+; GCN-IR-NEXT:    v_addc_u32_e32 v2, vcc, 0, v4, vcc
+; GCN-IR-NEXT:    v_mul_lo_u32 v2, v2, s2
+; GCN-IR-NEXT:    v_mov_b32_e32 v3, v1
+; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, s0, v0
 ; GCN-IR-NEXT:    s_brev_b32 s0, -2
-; GCN-IR-NEXT:    v_and_b32_e32 v0, s0, v0
 ; GCN-IR-NEXT:    v_sub_i32_e32 v2, vcc, s1, v2
+; GCN-IR-NEXT:    v_and_b32_e32 v0, s0, v0
 ; GCN-IR-NEXT:    v_and_b32_e32 v2, s0, v2
-; GCN-IR-NEXT:    v_mov_b32_e32 v3, v1
 ; GCN-IR-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
 ; GCN-IR-NEXT:    s_endpgm
   %1 = lshr <2 x i64> %x, <i64 33, i64 41>
@@ -750,7 +751,7 @@
 ; GCN-LABEL: s_test_urem_k_num_i64:
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-NEXT:    v_mov_b32_e32 v2, 0
+; GCN-NEXT:    v_mov_b32_e32 v3, 0
 ; GCN-NEXT:    s_mov_b32 s11, 0xf000
 ; GCN-NEXT:    s_mov_b32 s10, -1
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
@@ -764,13 +765,13 @@
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
 ; GCN-NEXT:    s_mov_b32 s9, s5
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
-; GCN-NEXT:    v_mul_f32_e32 v3, 0x2f800000, v0
-; GCN-NEXT:    v_trunc_f32_e32 v3, v3
-; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v3
+; GCN-NEXT:    v_mul_f32_e32 v2, 0x2f800000, v0
+; GCN-NEXT:    v_trunc_f32_e32 v2, v2
+; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v2
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
-; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
+; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v2
 ; GCN-NEXT:    v_mul_hi_u32 v5, s2, v0
-; GCN-NEXT:    v_mul_lo_u32 v4, s2, v3
+; GCN-NEXT:    v_mul_lo_u32 v4, s2, v2
 ; GCN-NEXT:    v_mul_lo_u32 v7, s3, v0
 ; GCN-NEXT:    v_mul_lo_u32 v6, s2, v0
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
@@ -778,48 +779,48 @@
 ; GCN-NEXT:    v_mul_hi_u32 v5, v0, v6
 ; GCN-NEXT:    v_mul_lo_u32 v7, v0, v4
 ; GCN-NEXT:    v_mul_hi_u32 v9, v0, v4
-; GCN-NEXT:    v_mul_lo_u32 v8, v3, v6
-; GCN-NEXT:    v_mul_hi_u32 v6, v3, v6
+; GCN-NEXT:    v_mul_hi_u32 v8, v2, v6
+; GCN-NEXT:    v_mul_lo_u32 v6, v2, v6
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
-; GCN-NEXT:    v_mul_hi_u32 v10, v3, v4
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v2, v9, vcc
-; GCN-NEXT:    v_mul_lo_u32 v4, v3, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v6, vcc
+; GCN-NEXT:    v_mul_hi_u32 v10, v2, v4
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v3, v9, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v7, v8, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v1, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
 ; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v2, v6, vcc
-; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v6, s2, v4
-; GCN-NEXT:    v_mul_hi_u32 v7, s2, v0
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v3, v6, vcc
+; GCN-NEXT:    v_addc_u32_e64 v4, vcc, v2, v5, s[0:1]
+; GCN-NEXT:    v_mul_hi_u32 v6, s2, v0
+; GCN-NEXT:    v_mul_lo_u32 v7, s2, v4
 ; GCN-NEXT:    v_mul_lo_u32 v8, s3, v0
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
-; GCN-NEXT:    v_mul_lo_u32 v7, s2, v0
+; GCN-NEXT:    v_mul_lo_u32 v9, s2, v0
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v7
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
-; GCN-NEXT:    v_mul_lo_u32 v10, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v12, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v11, v0, v7
-; GCN-NEXT:    v_mul_hi_u32 v9, v4, v7
-; GCN-NEXT:    v_mul_lo_u32 v7, v4, v7
-; GCN-NEXT:    v_mul_hi_u32 v8, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
-; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v2, v12, vcc
+; GCN-NEXT:    v_mul_lo_u32 v8, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v9
+; GCN-NEXT:    v_mul_hi_u32 v11, v0, v6
+; GCN-NEXT:    v_mul_hi_u32 v12, v4, v9
+; GCN-NEXT:    v_mul_lo_u32 v9, v4, v9
+; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
+; GCN-NEXT:    v_mul_hi_u32 v7, v4, v6
+; GCN-NEXT:    v_addc_u32_e32 v10, vcc, v3, v11, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v4, v4, v6
-; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v1, vcc
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v7, v4
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v2, v6, vcc
-; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
-; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v9, v8
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v10, v12, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v7, v1, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v3, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
+; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v2, v6, s[0:1]
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
-; GCN-NEXT:    v_mul_lo_u32 v4, v3, 24
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, 0, v2, vcc
+; GCN-NEXT:    v_mul_lo_u32 v4, v2, 24
 ; GCN-NEXT:    v_mul_hi_u32 v0, v0, 24
-; GCN-NEXT:    v_mul_hi_u32 v3, v3, 24
+; GCN-NEXT:    v_mul_hi_u32 v2, v2, 24
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v4
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v2, v3, vcc
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v2, vcc
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v1, s6, v1
 ; GCN-NEXT:    v_mul_hi_u32 v2, s6, v0
@@ -959,79 +960,79 @@
 ; GCN-NEXT:    v_mov_b32_e32 v0, 0x4f800000
 ; GCN-NEXT:    v_madak_f32 v0, 0, v0, 0x41c00000
 ; GCN-NEXT:    v_rcp_f32_e32 v0, v0
-; GCN-NEXT:    s_movk_i32 s2, 0xffe8
-; GCN-NEXT:    v_mov_b32_e32 v8, 0
-; GCN-NEXT:    v_mov_b32_e32 v7, 0
+; GCN-NEXT:    s_movk_i32 s4, 0xffe8
+; GCN-NEXT:    v_mov_b32_e32 v6, 0
+; GCN-NEXT:    v_mov_b32_e32 v2, 0
 ; GCN-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
 ; GCN-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v0, v0
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v1, v1
-; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
 ; GCN-NEXT:    s_mov_b32 s11, 0xf000
-; GCN-NEXT:    v_mul_hi_u32 v2, v0, s2
-; GCN-NEXT:    v_mul_lo_u32 v3, v1, s2
-; GCN-NEXT:    v_mul_lo_u32 v4, v0, s2
 ; GCN-NEXT:    s_mov_b32 s10, -1
-; GCN-NEXT:    v_subrev_i32_e32 v2, vcc, v0, v2
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_mul_lo_u32 v5, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v6, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v3, v0, v2
-; GCN-NEXT:    v_mul_hi_u32 v9, v1, v2
-; GCN-NEXT:    v_mul_lo_u32 v2, v1, v2
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_mul_lo_u32 v6, v1, v4
-; GCN-NEXT:    v_mul_hi_u32 v4, v1, v4
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v3, vcc
+; GCN-NEXT:    v_mul_hi_u32 v3, v0, s4
+; GCN-NEXT:    v_mul_lo_u32 v5, v1, s4
+; GCN-NEXT:    v_mul_lo_u32 v4, v0, s4
+; GCN-NEXT:    v_subrev_i32_e32 v3, vcc, v0, v3
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
+; GCN-NEXT:    v_mul_hi_u32 v7, v0, v4
+; GCN-NEXT:    v_mul_lo_u32 v5, v0, v3
+; GCN-NEXT:    v_mul_hi_u32 v8, v0, v3
+; GCN-NEXT:    v_mul_hi_u32 v9, v1, v4
+; GCN-NEXT:    v_mul_lo_u32 v4, v1, v4
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v6, v8, vcc
+; GCN-NEXT:    v_mul_hi_u32 v8, v1, v3
+; GCN-NEXT:    v_mul_lo_u32 v3, v1, v3
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v7, v9, vcc
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v8, v2, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
+; GCN-NEXT:    v_add_i32_e64 v0, s[2:3], v0, v3
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v6, v5, vcc
+; GCN-NEXT:    v_mul_hi_u32 v5, v0, s4
+; GCN-NEXT:    v_addc_u32_e64 v3, vcc, v1, v4, s[2:3]
+; GCN-NEXT:    v_mul_lo_u32 v7, v3, s4
+; GCN-NEXT:    v_mul_lo_u32 v8, v0, s4
+; GCN-NEXT:    v_subrev_i32_e32 v5, vcc, v0, v5
+; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
+; GCN-NEXT:    v_mul_lo_u32 v7, v0, v5
+; GCN-NEXT:    v_mul_hi_u32 v9, v0, v8
+; GCN-NEXT:    v_mul_hi_u32 v10, v0, v5
+; GCN-NEXT:    v_mul_hi_u32 v11, v3, v5
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    s_mov_b32 s8, s4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v3, v4, vcc
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v9, v7, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_add_i32_e64 v0, s[0:1], v0, v2
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v4, vcc
-; GCN-NEXT:    v_mul_hi_u32 v4, v0, s2
-; GCN-NEXT:    v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
-; GCN-NEXT:    v_mul_lo_u32 v5, v2, s2
-; GCN-NEXT:    v_mul_lo_u32 v6, v0, s2
-; GCN-NEXT:    v_subrev_i32_e32 v4, vcc, v0, v4
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v9, v7
+; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v6, v10, vcc
+; GCN-NEXT:    v_mul_lo_u32 v10, v3, v8
+; GCN-NEXT:    v_mul_hi_u32 v8, v3, v8
+; GCN-NEXT:    v_mul_lo_u32 v3, v3, v5
 ; GCN-NEXT:    s_mov_b32 s9, s5
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
-; GCN-NEXT:    v_mul_lo_u32 v5, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v9, v0, v6
-; GCN-NEXT:    v_mul_hi_u32 v10, v0, v4
-; GCN-NEXT:    v_mul_hi_u32 v11, v2, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v9, v5
-; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v8, v10, vcc
-; GCN-NEXT:    v_mul_lo_u32 v10, v2, v6
-; GCN-NEXT:    v_mul_hi_u32 v6, v2, v6
-; GCN-NEXT:    v_mul_lo_u32 v2, v2, v4
-; GCN-NEXT:    v_add_i32_e32 v5, vcc, v10, v5
-; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v6, vcc
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v11, v7, vcc
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v5, v2
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v8, v4, vcc
-; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
-; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v4, s[0:1]
-; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
+; GCN-NEXT:    v_add_i32_e32 v5, vcc, v10, v7
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v9, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v11, v2, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
+; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v6, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v1, vcc, v1, v4
+; GCN-NEXT:    v_addc_u32_e64 v1, vcc, v1, v5, s[2:3]
+; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
 ; GCN-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
-; GCN-NEXT:    v_mul_lo_u32 v2, s6, v1
-; GCN-NEXT:    v_mul_hi_u32 v3, s6, v0
-; GCN-NEXT:    v_mul_hi_u32 v4, s6, v1
-; GCN-NEXT:    v_mul_hi_u32 v5, s7, v1
+; GCN-NEXT:    v_mul_lo_u32 v3, s6, v1
+; GCN-NEXT:    v_mul_hi_u32 v4, s6, v0
+; GCN-NEXT:    v_mul_hi_u32 v5, s6, v1
+; GCN-NEXT:    v_mul_hi_u32 v7, s7, v1
 ; GCN-NEXT:    v_mul_lo_u32 v1, s7, v1
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
-; GCN-NEXT:    v_addc_u32_e32 v3, vcc, v8, v4, vcc
-; GCN-NEXT:    v_mul_lo_u32 v4, s7, v0
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v6, v5, vcc
+; GCN-NEXT:    v_mul_lo_u32 v5, s7, v0
 ; GCN-NEXT:    v_mul_hi_u32 v0, s7, v0
-; GCN-NEXT:    v_add_i32_e32 v2, vcc, v4, v2
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v3, v0, vcc
-; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v5, v7, vcc
+; GCN-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, v4, v0, vcc
+; GCN-NEXT:    v_addc_u32_e32 v2, vcc, v7, v2, vcc
 ; GCN-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
-; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v8, v2, vcc
+; GCN-NEXT:    v_addc_u32_e32 v1, vcc, v6, v2, vcc
 ; GCN-NEXT:    v_mul_hi_u32 v2, v0, 24
 ; GCN-NEXT:    v_mul_lo_u32 v1, v1, 24
 ; GCN-NEXT:    v_mul_lo_u32 v0, v0, 24
@@ -1169,7 +1170,7 @@
 ; GCN-NEXT:    v_mov_b32_e32 v12, 0
 ; GCN-NEXT:    v_mac_f32_e32 v2, 0x4f800000, v3
 ; GCN-NEXT:    v_rcp_f32_e32 v2, v2
-; GCN-NEXT:    v_mov_b32_e32 v11, 0
+; GCN-NEXT:    v_mov_b32_e32 v10, 0
 ; GCN-NEXT:    v_mul_f32_e32 v2, 0x5f7ffffc, v2
 ; GCN-NEXT:    v_mul_f32_e32 v3, 0x2f800000, v2
 ; GCN-NEXT:    v_trunc_f32_e32 v3, v3
@@ -1178,22 +1179,22 @@
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v3, v3
 ; GCN-NEXT:    v_mul_hi_u32 v7, v4, v2
 ; GCN-NEXT:    v_mul_lo_u32 v6, v4, v3
-; GCN-NEXT:    v_mul_lo_u32 v8, v5, v2
-; GCN-NEXT:    v_mul_lo_u32 v9, v4, v2
+; GCN-NEXT:    v_mul_lo_u32 v9, v5, v2
+; GCN-NEXT:    v_mul_lo_u32 v8, v4, v2
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
-; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v8
-; GCN-NEXT:    v_mul_lo_u32 v8, v2, v6
-; GCN-NEXT:    v_mul_hi_u32 v10, v2, v9
-; GCN-NEXT:    v_mul_hi_u32 v7, v2, v6
-; GCN-NEXT:    v_mul_hi_u32 v13, v3, v6
+; GCN-NEXT:    v_add_i32_e32 v6, vcc, v6, v9
+; GCN-NEXT:    v_mul_hi_u32 v7, v2, v8
+; GCN-NEXT:    v_mul_lo_u32 v9, v2, v6
+; GCN-NEXT:    v_mul_hi_u32 v11, v2, v6
+; GCN-NEXT:    v_mul_lo_u32 v13, v3, v8
+; GCN-NEXT:    v_mul_hi_u32 v8, v3, v8
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
+; GCN-NEXT:    v_addc_u32_e32 v9, vcc, v12, v11, vcc
+; GCN-NEXT:    v_mul_hi_u32 v11, v3, v6
 ; GCN-NEXT:    v_mul_lo_u32 v6, v3, v6
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
-; GCN-NEXT:    v_mul_lo_u32 v10, v3, v9
-; GCN-NEXT:    v_mul_hi_u32 v9, v3, v9
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v12, v7, vcc
-; GCN-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
-; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v7, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v13, v11, vcc
+; GCN-NEXT:    v_add_i32_e32 v7, vcc, v13, v7
+; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v9, v8, vcc
+; GCN-NEXT:    v_addc_u32_e32 v8, vcc, v11, v10, vcc
 ; GCN-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
 ; GCN-NEXT:    v_add_i32_e64 v2, s[4:5], v2, v6
 ; GCN-NEXT:    v_addc_u32_e32 v7, vcc, v12, v8, vcc
@@ -1204,18 +1205,18 @@
 ; GCN-NEXT:    v_mul_lo_u32 v4, v4, v2
 ; GCN-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
 ; GCN-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
-; GCN-NEXT:    v_mul_lo_u32 v10, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v13, v2, v4
-; GCN-NEXT:    v_mul_hi_u32 v14, v2, v5
-; GCN-NEXT:    v_mul_hi_u32 v9, v6, v4
+; GCN-NEXT:    v_mul_lo_u32 v9, v2, v5
+; GCN-NEXT:    v_mul_hi_u32 v11, v2, v4
+; GCN-NEXT:    v_mul_hi_u32 v13, v2, v5
+; GCN-NEXT:    v_mul_hi_u32 v14, v6, v4
 ; GCN-NEXT:    v_mul_lo_u32 v4, v6, v4
-; GCN-NEXT:    v_add_i32_e32 v10, vcc, v13, v10
+; GCN-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
 ; GCN-NEXT:    v_mul_hi_u32 v8, v6, v5
-; GCN-NEXT:    v_addc_u32_e32 v13, vcc, v12, v14, vcc
+; GCN-NEXT:    v_addc_u32_e32 v11, vcc, v12, v13, vcc
 ; GCN-NEXT:    v_mul_lo_u32 v5, v6, v5
-; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v10
-; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v13, v9, vcc
-; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v11, vcc
+; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v9
+; GCN-NEXT:    v_addc_u32_e32 v4, vcc, v11, v14, vcc
+; GCN-NEXT:    v_addc_u32_e32 v6, vcc, v8, v10, vcc
 ; GCN-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
 ; GCN-NEXT:    v_addc_u32_e32 v5, vcc, v12, v6, vcc
 ; GCN-NEXT:    v_add_i32_e32 v3, vcc, v3, v7
@@ -1448,21 +1449,21 @@
 ; GCN-LABEL: s_test_urem24_k_num_i64:
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s5, 0x41c00000
+; GCN-NEXT:    s_mov_b32 s4, 0x41c00000
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_mov_b32 s2, -1
-; GCN-NEXT:    s_lshr_b32 s4, s3, 8
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s4
+; GCN-NEXT:    s_lshr_b32 s2, s3, 8
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s2
 ; GCN-NEXT:    s_mov_b32 s3, 0xf000
 ; GCN-NEXT:    v_rcp_iflag_f32_e32 v1, v0
-; GCN-NEXT:    v_mul_f32_e32 v1, s5, v1
+; GCN-NEXT:    v_mul_f32_e32 v1, s4, v1
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v1
-; GCN-NEXT:    v_mad_f32 v1, -v1, v0, s5
+; GCN-NEXT:    v_mad_f32 v1, -v1, v0, s4
 ; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
 ; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
-; GCN-NEXT:    v_mul_lo_u32 v0, v0, s4
+; GCN-NEXT:    v_mul_lo_u32 v0, v0, s2
+; GCN-NEXT:    s_mov_b32 s2, -1
 ; GCN-NEXT:    v_sub_i32_e32 v0, vcc, 24, v0
 ; GCN-NEXT:    v_and_b32_e32 v0, 0xffffff, v0
 ; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
@@ -1471,21 +1472,21 @@
 ; GCN-IR-LABEL: s_test_urem24_k_num_i64:
 ; GCN-IR:       ; %bb.0:
 ; GCN-IR-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
-; GCN-IR-NEXT:    s_mov_b32 s5, 0x41c00000
+; GCN-IR-NEXT:    s_mov_b32 s4, 0x41c00000
 ; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-IR-NEXT:    s_mov_b32 s2, -1
-; GCN-IR-NEXT:    s_lshr_b32 s4, s3, 8
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s4
+; GCN-IR-NEXT:    s_lshr_b32 s2, s3, 8
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s2
 ; GCN-IR-NEXT:    s_mov_b32 s3, 0xf000
 ; GCN-IR-NEXT:    v_rcp_iflag_f32_e32 v1, v0
-; GCN-IR-NEXT:    v_mul_f32_e32 v1, s5, v1
+; GCN-IR-NEXT:    v_mul_f32_e32 v1, s4, v1
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v2, v1
-; GCN-IR-NEXT:    v_mad_f32 v1, -v1, v0, s5
+; GCN-IR-NEXT:    v_mad_f32 v1, -v1, v0, s4
 ; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v1|, v0
 ; GCN-IR-NEXT:    v_mov_b32_e32 v1, 0
 ; GCN-IR-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
-; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, s4
+; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, s2
+; GCN-IR-NEXT:    s_mov_b32 s2, -1
 ; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, 24, v0
 ; GCN-IR-NEXT:    v_and_b32_e32 v0, 0xffffff, v0
 ; GCN-IR-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
@@ -1499,50 +1500,46 @@
 define amdgpu_kernel void @s_test_urem24_k_den_i64(i64 addrspace(1)* %out, i64 %x) {
 ; GCN-LABEL: s_test_urem24_k_den_i64:
 ; GCN:       ; %bb.0:
-; GCN-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-NEXT:    s_mov_b32 s1, 0x46b6fe00
-; GCN-NEXT:    s_movk_i32 s0, 0x5b7f
-; GCN-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-NEXT:    s_mov_b32 s2, -1
+; GCN-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
+; GCN-NEXT:    s_mov_b32 s5, 0x46b6fe00
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-NEXT:    s_lshr_b32 s6, s7, 8
-; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s6
+; GCN-NEXT:    s_movk_i32 s2, 0x5b7f
+; GCN-NEXT:    s_lshr_b32 s4, s3, 8
+; GCN-NEXT:    v_cvt_f32_u32_e32 v0, s4
+; GCN-NEXT:    s_mov_b32 s3, 0xf000
 ; GCN-NEXT:    v_mul_f32_e32 v1, 0x38331158, v0
 ; GCN-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-NEXT:    v_cvt_u32_f32_e32 v2, v1
-; GCN-NEXT:    v_mad_f32 v0, -v1, s1, v0
-; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, s1
-; GCN-NEXT:    s_mov_b32 s1, s5
-; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
-; GCN-NEXT:    v_mul_lo_u32 v0, v0, s0
-; GCN-NEXT:    s_mov_b32 s0, s4
+; GCN-NEXT:    v_mad_f32 v0, -v1, s5, v0
+; GCN-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, s5
 ; GCN-NEXT:    v_mov_b32_e32 v1, 0
-; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s6, v0
+; GCN-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
+; GCN-NEXT:    v_mul_lo_u32 v0, v0, s2
+; GCN-NEXT:    s_mov_b32 s2, -1
+; GCN-NEXT:    v_sub_i32_e32 v0, vcc, s4, v0
 ; GCN-NEXT:    v_and_b32_e32 v0, 0xffffff, v0
 ; GCN-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
 ; GCN-NEXT:    s_endpgm
 ;
 ; GCN-IR-LABEL: s_test_urem24_k_den_i64:
 ; GCN-IR:       ; %bb.0:
-; GCN-IR-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
-; GCN-IR-NEXT:    s_mov_b32 s1, 0x46b6fe00
-; GCN-IR-NEXT:    s_movk_i32 s0, 0x5b7f
-; GCN-IR-NEXT:    s_mov_b32 s3, 0xf000
-; GCN-IR-NEXT:    s_mov_b32 s2, -1
+; GCN-IR-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
+; GCN-IR-NEXT:    s_mov_b32 s5, 0x46b6fe00
 ; GCN-IR-NEXT:    s_waitcnt lgkmcnt(0)
-; GCN-IR-NEXT:    s_lshr_b32 s6, s7, 8
-; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s6
+; GCN-IR-NEXT:    s_movk_i32 s2, 0x5b7f
+; GCN-IR-NEXT:    s_lshr_b32 s4, s3, 8
+; GCN-IR-NEXT:    v_cvt_f32_u32_e32 v0, s4
+; GCN-IR-NEXT:    s_mov_b32 s3, 0xf000
 ; GCN-IR-NEXT:    v_mul_f32_e32 v1, 0x38331158, v0
 ; GCN-IR-NEXT:    v_trunc_f32_e32 v1, v1
 ; GCN-IR-NEXT:    v_cvt_u32_f32_e32 v2, v1
-; GCN-IR-NEXT:    v_mad_f32 v0, -v1, s1, v0
-; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, s1
-; GCN-IR-NEXT:    s_mov_b32 s1, s5
-; GCN-IR-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
-; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, s0
-; GCN-IR-NEXT:    s_mov_b32 s0, s4
+; GCN-IR-NEXT:    v_mad_f32 v0, -v1, s5, v0
+; GCN-IR-NEXT:    v_cmp_ge_f32_e64 vcc, |v0|, s5
 ; GCN-IR-NEXT:    v_mov_b32_e32 v1, 0
-; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, s6, v0
+; GCN-IR-NEXT:    v_addc_u32_e32 v0, vcc, 0, v2, vcc
+; GCN-IR-NEXT:    v_mul_lo_u32 v0, v0, s2
+; GCN-IR-NEXT:    s_mov_b32 s2, -1
+; GCN-IR-NEXT:    v_sub_i32_e32 v0, vcc, s4, v0
 ; GCN-IR-NEXT:    v_and_b32_e32 v0, 0xffffff, v0
 ; GCN-IR-NEXT:    buffer_store_dwordx2 v[0:1], off, s[0:3], 0
 ; GCN-IR-NEXT:    s_endpgm