Index: llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp =================================================================== --- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -134,10 +134,18 @@ class MipsAsmParser : public MCTargetAsmParser { MipsTargetStreamer &getTargetStreamer() { + assert(getParser().getStreamer().getTargetStreamer() && + "do not have a target streamer"); MCTargetStreamer &TS = *getParser().getStreamer().getTargetStreamer(); return static_cast(TS); } + // The llvm-exegesis Streamer used for parsing code snippets doesn't have the + // TargetStreamer initialized. + bool isExegesisStreamer() { + return getParser().getStreamer().getTargetStreamer(); + } + MipsABIInfo ABI; SmallVector, 2> AssemblerOptions; MCSymbol *CurrentFn; // Pointer to the function being parsed. It may be a @@ -529,7 +537,8 @@ AssemblerOptions.push_back( std::make_unique(getSTI().getFeatureBits())); - getTargetStreamer().updateABIInfo(*this); + if (isExegesisStreamer()) + getTargetStreamer().updateABIInfo(*this); if (!isABI_O32() && !useOddSPReg() != 0) report_fatal_error("-mno-odd-spreg requires the O32 ABI"); @@ -1854,7 +1863,9 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out, const MCSubtargetInfo *STI) { - MipsTargetStreamer &TOut = getTargetStreamer(); + MipsTargetStreamer *TOut; + if (isExegesisStreamer()) + TOut = &getTargetStreamer(); const unsigned Opcode = Inst.getOpcode(); const MCInstrDesc &MCID = getInstDesc(Opcode); bool ExpandedJalSym = false; @@ -2124,10 +2135,10 @@ MCSymbolRefExpr::create(JalSym, MCSymbolRefExpr::VK_None, getContext(), IDLoc); - TOut.getStreamer().EmitRelocDirective(*TmpExpr, + TOut->getStreamer().EmitRelocDirective(*TmpExpr, inMicroMipsMode() ? "R_MICROMIPS_JALR" : "R_MIPS_JALR", RelocJalrExpr, IDLoc, *STI); - TOut.getStreamer().EmitLabel(TmpLabel); + TOut->getStreamer().EmitLabel(TmpLabel); } Inst = JalrInst; @@ -2169,7 +2180,7 @@ (BaseReg.getReg() == Mips::GP || BaseReg.getReg() == Mips::GP_64)) { - TOut.emitRRI(Mips::LWGP_MM, DstReg.getReg(), Mips::GP, MemOffset, + TOut->emitRRI(Mips::LWGP_MM, DstReg.getReg(), Mips::GP, MemOffset, IDLoc, STI); return false; } @@ -2303,7 +2314,7 @@ bool FillDelaySlot = MCID.hasDelaySlot() && AssemblerOptions.back()->isReorder(); if (FillDelaySlot) - TOut.emitDirectiveSetNoReorder(); + TOut->emitDirectiveSetNoReorder(); MacroExpanderResultTy ExpandResult = tryExpandInstruction(Inst, IDLoc, Out, STI); @@ -2320,15 +2331,15 @@ // We know we emitted an instruction on the MER_NotAMacro or MER_Success path. // If we're in microMIPS mode then we must also set EF_MIPS_MICROMIPS. if (inMicroMipsMode()) { - TOut.setUsesMicroMips(); - TOut.updateABIInfo(*this); + TOut->setUsesMicroMips(); + TOut->updateABIInfo(*this); } // If this instruction has a delay slot and .set reorder is active, // emit a NOP after it. if (FillDelaySlot) { - TOut.emitEmptyDelaySlot(hasShortDelaySlot(Inst), IDLoc, STI); - TOut.emitDirectiveSetReorder(); + TOut->emitEmptyDelaySlot(hasShortDelaySlot(Inst), IDLoc, STI); + TOut->emitDirectiveSetReorder(); } if ((Opcode == Mips::JalOneReg || Opcode == Mips::JalTwoReg || @@ -2339,11 +2350,11 @@ // If .set reorder has been used, we've already emitted a NOP. // If .set noreorder has been used, we need to emit a NOP at this point. if (!AssemblerOptions.back()->isReorder()) - TOut.emitEmptyDelaySlot(hasShortDelaySlot(Inst), IDLoc, + TOut->emitEmptyDelaySlot(hasShortDelaySlot(Inst), IDLoc, STI); // Load the $gp from the stack. - TOut.emitGPRestore(CpRestoreOffset, IDLoc, STI); + TOut->emitGPRestore(CpRestoreOffset, IDLoc, STI); } else Warning(IDLoc, "no .cprestore used in PIC mode"); } @@ -6733,7 +6744,8 @@ LLVM_DEBUG(dbgs() << "ParseInstruction\n"); // We have reached first instruction, module directive are now forbidden. - getTargetStreamer().forbidModuleDirective(); + if (isExegesisStreamer()) + getTargetStreamer().forbidModuleDirective(); // Check if we have valid mnemonic if (!mnemonicIsValid(Name, 0)) {