Index: llvm/include/llvm/CodeGen/LivePhysRegs.h =================================================================== --- llvm/include/llvm/CodeGen/LivePhysRegs.h +++ llvm/include/llvm/CodeGen/LivePhysRegs.h @@ -137,6 +137,9 @@ /// Live out registers are the union of the live-in registers of the successor /// blocks and pristine registers. Live out registers of the end block are the /// callee saved registers. + /// If a register is not added by this method, it is guaranteed to not be + /// live out from MBB, although a sub-register may be. This is true + /// both before and after regalloc. void addLiveOuts(const MachineBasicBlock &MBB); /// Adds all live-out registers of basic block \p MBB but skips pristine Index: llvm/lib/CodeGen/MachineVerifier.cpp =================================================================== --- llvm/lib/CodeGen/MachineVerifier.cpp +++ llvm/lib/CodeGen/MachineVerifier.cpp @@ -2304,6 +2304,32 @@ if (LiveInts) verifyLiveIntervals(); + // Check live-in list of each MBB. If a register is live into MBB, check + // that the register is in regsLiveOut of each predecessor block. Since + // this must come from a definition in the predecesssor or its live-in + // list, this will catch a live-through case where the predecessor does not + // have the register in its live-in list. This currently only checks + // registers that have no aliases, are not allocatable and are not + // reserved, which could mean a condition code register for instance. + if (MRI->tracksLiveness()) + for (const auto &MBB : *MF) + for (MachineBasicBlock::RegisterMaskPair P : MBB.liveins()) { + MCPhysReg LiveInReg = P.PhysReg; + bool hasAliases = MCRegAliasIterator(LiveInReg, TRI, false).isValid(); + if (hasAliases || isAllocatable(LiveInReg) || isReserved(LiveInReg)) + continue; + for (const MachineBasicBlock *Pred : MBB.predecessors()) { + BBInfo &PInfo = MBBInfoMap[Pred]; + if (!PInfo.regsLiveOut.count(LiveInReg)) { + report("Live in register not found to be live out from predecessor.", + &MBB); + errs() << TRI->getName(LiveInReg) + << " not found to be live out from " + << printMBBReference(*Pred) << "\n"; + } + } + } + for (auto CSInfo : MF->getCallSitesInfo()) if (!CSInfo.first->isCall()) report("Call site info referencing instruction that is not call", MF); Index: llvm/lib/Target/SystemZ/SystemZElimCompare.cpp =================================================================== --- llvm/lib/Target/SystemZ/SystemZElimCompare.cpp +++ llvm/lib/Target/SystemZ/SystemZElimCompare.cpp @@ -18,6 +18,7 @@ #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/StringRef.h" +#include "llvm/CodeGen/LivePhysRegs.h" #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/MachineFunctionPass.h" @@ -97,20 +98,13 @@ const SystemZInstrInfo *TII = nullptr; const TargetRegisterInfo *TRI = nullptr; + LivePhysRegs LiveRegs; }; char SystemZElimCompare::ID = 0; } // end anonymous namespace -// Return true if CC is live out of MBB. -static bool isCCLiveOut(MachineBasicBlock &MBB) { - for (auto SI = MBB.succ_begin(), SE = MBB.succ_end(); SI != SE; ++SI) - if ((*SI)->isLiveIn(SystemZ::CC)) - return true; - return false; -} - // Returns true if MI is an instruction whose output equals the value in Reg. static bool preservesValueOf(MachineInstr &MI, unsigned Reg) { switch (MI.getOpcode()) { @@ -595,7 +589,9 @@ // Walk backwards through the block looking for comparisons, recording // all CC users as we go. The subroutines can delete Compare and // instructions before it. - bool CompleteCCUsers = !isCCLiveOut(MBB); + LiveRegs.clear(); + LiveRegs.addLiveOuts(MBB); + bool CompleteCCUsers = !LiveRegs.contains(SystemZ::CC); SmallVector CCUsers; MachineBasicBlock::iterator MBBI = MBB.end(); while (MBBI != MBB.begin()) { @@ -626,6 +622,7 @@ TII = static_cast(F.getSubtarget().getInstrInfo()); TRI = &TII->getRegisterInfo(); + LiveRegs.init(*TRI); bool Changed = false; for (auto &MBB : F) Index: llvm/test/MachineVerifier/live-ins-01.mir =================================================================== --- /dev/null +++ llvm/test/MachineVerifier/live-ins-01.mir @@ -0,0 +1,56 @@ +# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s + +# Test that a the machine verifier reports an error when a register in +# liveins is not liveout from predecessor. + +--- +name: f1 +tracksRegLiveness: true +machineFunctionInfo: {} +body: | + bb.0: + liveins: $r2l, $r3l + + %1:gr32bit = COPY $r3l + %0:gr32bit = COPY $r2l + CHIMux %0, 0, implicit-def $cc + + bb.1: + liveins: $cc + + bb.2: + liveins: $cc + + %2:grx32bit = LOCRMux %1, %0, 14, 8, implicit $cc + $r2l = COPY %2 + Return implicit $r2l +... + +# CHECK: *** Bad machine code: Live in register not found to be live out from predecessor. *** +# CHECK:- function: f2 +# CHECK:- basic block: %bb.2 +# CHECK:CC not found to be live out from %bb.1 +--- +name: f2 +tracksRegLiveness: true +machineFunctionInfo: {} +body: | + bb.0: + liveins: $r2l, $r3l + + %1:gr32bit = COPY $r3l + %0:gr32bit = COPY $r2l + CHIMux %0, 0, implicit-def $cc + + bb.1: + liveins: $cc + KILL killed $cc + + bb.2: + liveins: $cc + + %2:grx32bit = LOCRMux %1, %0, 14, 8, implicit $cc + $r2l = COPY %2 + Return implicit $r2l + +... Index: llvm/test/MachineVerifier/live-ins-02.mir =================================================================== --- /dev/null +++ llvm/test/MachineVerifier/live-ins-02.mir @@ -0,0 +1,31 @@ +# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s + +# Test that a the machine verifier reports an error when a register in +# liveins is not liveout from predecessor. + +--- +name: f1 +tracksRegLiveness: true +machineFunctionInfo: {} +body: | + bb.0: + liveins: $r2l, $r3l + + %1:gr32bit = COPY $r3l + %0:gr32bit = COPY $r2l + CHIMux %0, 0, implicit-def $cc + + bb.1: + + bb.2: + liveins: $cc + + %2:grx32bit = LOCRMux %1, %0, 14, 8, implicit $cc + $r2l = COPY %2 + Return implicit $r2l +... + +# CHECK: *** Bad machine code: Live in register not found to be live out from predecessor. *** +# CHECK:- function: f1 +# CHECK:- basic block: %bb.2 +# CHECK:CC not found to be live out from %bb.1 Index: llvm/test/MachineVerifier/live-ins-03.mir =================================================================== --- /dev/null +++ llvm/test/MachineVerifier/live-ins-03.mir @@ -0,0 +1,35 @@ +# RUN: not llc -o - %s -mtriple=s390x-linux-gnu -mcpu=z14 -run-pass none 2>&1 | FileCheck %s + +# Test that a the machine verifier reports an error when a register in +# liveins is not liveout from predecessor. + +--- +name: f1 +tracksRegLiveness: true +machineFunctionInfo: {} +body: | + bb.0: + liveins: $r2l, $r3l + + %1:gr32bit = COPY $r3l + %0:gr32bit = COPY $r2l + CHIMux %0, 0, implicit-def $cc + + bb.1: + liveins: $cc + BRC 14, 8, %bb.3, implicit $cc + + bb.2: + + bb.3: + liveins: $cc + + %2:grx32bit = LOCRMux %1, %0, 14, 8, implicit $cc + $r2l = COPY %2 + Return implicit $r2l +... + +# CHECK: *** Bad machine code: Live in register not found to be live out from predecessor. *** +# CHECK:- function: f1 +# CHECK:- basic block: %bb.3 +# CHECK:CC not found to be live out from %bb.2